WO2001093114A2 - Procede pour optimiser le temps d'execution de conversions de modeles orientes etat ou deroulement en solutions reelles - Google Patents

Procede pour optimiser le temps d'execution de conversions de modeles orientes etat ou deroulement en solutions reelles Download PDF

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Publication number
WO2001093114A2
WO2001093114A2 PCT/EP2001/005536 EP0105536W WO0193114A2 WO 2001093114 A2 WO2001093114 A2 WO 2001093114A2 EP 0105536 W EP0105536 W EP 0105536W WO 0193114 A2 WO0193114 A2 WO 0193114A2
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model
condition
chain
networks
processing
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PCT/EP2001/005536
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German (de)
English (en)
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WO2001093114A3 (fr
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Jens V. Aspern
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Aspern Jens V
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Priority to AU2001267443A priority Critical patent/AU2001267443A1/en
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Publication of WO2001093114A3 publication Critical patent/WO2001093114A3/fr

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    • G—PHYSICS
    • G05—CONTROLLING; REGULATING
    • G05B—CONTROL OR REGULATING SYSTEMS IN GENERAL; FUNCTIONAL ELEMENTS OF SUCH SYSTEMS; MONITORING OR TESTING ARRANGEMENTS FOR SUCH SYSTEMS OR ELEMENTS
    • G05B19/00—Programme-control systems
    • G05B19/02—Programme-control systems electric
    • G05B19/04—Programme control other than numerical control, i.e. in sequence controllers or logic controllers
    • G05B19/042—Programme control other than numerical control, i.e. in sequence controllers or logic controllers using digital processors
    • G05B19/0426—Programming the control sequence
    • G—PHYSICS
    • G05—CONTROLLING; REGULATING
    • G05B—CONTROL OR REGULATING SYSTEMS IN GENERAL; FUNCTIONAL ELEMENTS OF SUCH SYSTEMS; MONITORING OR TESTING ARRANGEMENTS FOR SUCH SYSTEMS OR ELEMENTS
    • G05B2219/00—Program-control systems
    • G05B2219/20—Pc systems
    • G05B2219/23—Pc programming
    • G05B2219/23002—Petrinet
    • G—PHYSICS
    • G05—CONTROLLING; REGULATING
    • G05B—CONTROL OR REGULATING SYSTEMS IN GENERAL; FUNCTIONAL ELEMENTS OF SUCH SYSTEMS; MONITORING OR TESTING ARRANGEMENTS FOR SUCH SYSTEMS OR ELEMENTS
    • G05B2219/00—Program-control systems
    • G05B2219/20—Pc systems
    • G05B2219/23—Pc programming
    • G05B2219/23257—Grafcet
    • G—PHYSICS
    • G05—CONTROLLING; REGULATING
    • G05B—CONTROL OR REGULATING SYSTEMS IN GENERAL; FUNCTIONAL ELEMENTS OF SUCH SYSTEMS; MONITORING OR TESTING ARRANGEMENTS FOR SUCH SYSTEMS OR ELEMENTS
    • G05B2219/00—Program-control systems
    • G05B2219/20—Pc systems
    • G05B2219/23—Pc programming
    • G05B2219/23267—Program derived from sequence time diagram and stored in table
    • G—PHYSICS
    • G05—CONTROLLING; REGULATING
    • G05B—CONTROL OR REGULATING SYSTEMS IN GENERAL; FUNCTIONAL ELEMENTS OF SUCH SYSTEMS; MONITORING OR TESTING ARRANGEMENTS FOR SUCH SYSTEMS OR ELEMENTS
    • G05B2219/00—Program-control systems
    • G05B2219/30—Nc systems
    • G05B2219/34—Director, elements to supervisory
    • G05B2219/34325—Speed up, optimize execution by combining instructions belonging together
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
    • Y02P90/00—Enabling technologies with a potential contribution to greenhouse gas [GHG] emissions mitigation
    • Y02P90/02—Total factory control, e.g. smart factories, flexible manufacturing systems [FMS] or integrated manufacturing systems [IMS]

Definitions

  • the chain optimization (Ko), according to claim 2 is applicable to all images of a model and can be used simultaneously with the element optimization (Eo), according to claim 3, whereby the strategies according to claim 5 change arbitrarily within one image, multiple times and simultaneously are.
  • the flag can also be a FIFO, a counter or another mechanism.
  • the flag is used here only as an example. Control network elements can also function as a flag.
  • co-flags even if they can be represented by model elements, are not explicitly specified in the model, since they only take on the function of code optimization. Possibly. Explicit representation in software tools as an operating mode of these tools can be helpful.
  • An efficient variant provided that the programming language and / or the operating system and / or the development environment supports this, is that a predecessor element (when switching) all the successor elements, which can then cause a change of state due to the model state, in a dynamic list entries and removes himself and possibly others from this list.
  • the list contains all model elements that have to be edited due to the model state, or do not have to be edited, depending on which is more useful. Often the administrative effort of the lists is very high, so that the benefits are only available from a certain network size. In this case, the flags can represent a pointer or similar mechanisms.
  • the upper program code (example 1) shows that only the program lines up to the RET command are subject to constant processing, while the part from T2 to the last line is only processed if the co-flag allows it.
  • the lower program code is completely (every line) subject to processing.
  • the element optimization (Eo), according to claim 3, is essentially suitable for PLC and PLC-like processing mechanisms.
  • the model elements responsible for the state transitions it can also be used for states (magnifying glasses) and actions (IEC61131) and other model elements.
  • the individual model elements are structured ( Figure 2). That is, the switching condition (or similar mechanisms) is determined by the switching action (or similar
  • Example 1 Illustration of the model from Figure 1 with the PLC programming language AWL standardized with DIN EN 61131-3. above with Ko and below without Ko (the necessary variable declaration has been dispensed with).
  • the latter is only processed if the condition of the switching action is fulfilled and the so-called switching (or similar) takes place. This could be done, for example, with a jump distributor, a list or a table.
  • Example 2 Realized implementation of the model element T1 from Figure 3 (above with Eo and below without Eo) with the PLC programming language STL, standardized with DIN EN 61131-3
  • mapping of the elements of the same model can include both mapping variants.
  • the entire network optimization (Ko and Eo) can also be represented as a tree structure, in which elements of lower levels are managed (executed) via more control structures than elements in higher levels. Elements of the highest level are always processed.
  • control tasks are implemented by means of a program generator and / or compiler or assembler, interpreter, by a special operating system or runtime libraries (runtime), such as in the case of a PLC (programmable logic controller) and / or languages close to the processor become.
  • the control tasks also include business management, organizational or other control tasks.
  • a source code (solutions) generated with this invention is therefore in particular Basis for a program, the processing time (time it takes a processor to execute it) is significantly reduced. This is of particular interest for the real-time capability of control solutions (automation technology).
  • the actual speed increase depends on the topology of the model and ultimately on the selected platform (compiler tool, hardware on which the control solution is implemented, the chosen programming language, such as C, C ++, Pascal, assembler, programming languages of DIN EN 61131-3 , such as STL, ST and possibly more).
  • Petri nets (short: Netz or Petri net (PN)) have been known since 1962 (automata theory has been around for a long time) as a typical representative of state- or process-oriented models for discrete processes. There are various variants and classes of theories, which are discussed in detail in various publications. The theory finds practical, industrial use only in exceptional cases, although the number of applications has increased in recent years. In control technology, however, these models can be used effectively regardless of the platform.
  • causal chains [vA93], [vA94], [A94] and [F94] are mapped by stringing together the program code of the chains without additional checking of the need for general processing.
  • the mapping to high-level languages according to claim 2 is therefore subject to the claim here.
  • Linear models are usually processed completely by the processor system (entire model), so that the causal structure of the model topology is not taken into account.
  • a change of state in a model can only take place on active states (marked states).
  • the topology of the networks (Petri networks, SFC, Grafcet, state machines, automatons, IEC 61499), which assume certain (marking) states, gives rise to a number of options for minimizing the computing time required.
  • the network elements here essentially transitions, but also actions or step-by-step magnifiers
  • a network element itself or its processing time in particular if it is implemented in STL, can be significantly shortened in one case or another. The logical program length is reduced.
  • the target language of the coding offers (e.g. dynamic jump targets) Frequency of processing (actions twice, transitions once) Frequency of switching or non-switching of transitions Number the standard pre-edges, other pre-edges, post edges, scope of other switching conditions, scope of the instruction block
  • Period of time that fulfills or does not meet a partial condition of the switching condition (very different, almost the same) (time interval between the fulfillment of a partial condition and the fulfillment of the entire condition)
  • Dead networks or dead subnetworks (BK e.g. initialized or network hierarchies) Degree of conflict as small as possible Number of conflicts as small as possible
  • Control systems process their programs so quickly that in the process the ratio of simultaneous events to the sum of the possible process events is often significantly smaller than the ratio of the PLC cycles without status change to the sum of the PLC cycles with status change.
  • PLC Physical Control systems
  • combinations of all strategies can be used simultaneously, individually and repeatedly to map (code) a network on a target system, using all system and language properties.
  • Edit instruction block of specialized transition (delete, instruction ..)
  • instruction block and / or the switching operation or even the entire transition can also be accommodated in separate program modules. It is suitable to implement the switching operation or the associated instruction block using subroutine techniques, as is supported by some environments.
  • the 3 source parts of the switching condition are designated with conditions 1 to 3.
  • a further division in the given individual case is possible and may make sense.
  • the switching operation consists of code for the implementation
  • switching operation the source part of the switching operation is represented by the box, titled "switching operation”.
  • parts can be omitted and additional source parts can also be added.
  • Transformation of coding suggestions from STL to ST or other languages follow simple rules. Jumps are to be replaced by IF instructions, etc.
  • Network elements are all elementary elements from which a network can consist, such as nodes (space and transition), edges, task, action, step magnifiers, etc.
  • Linear coding is the standard coding.
  • a special feature is that the time required for switching is just as long as that for not switching.
  • the splitting breaks down the complete switching condition into partial conditions.
  • the link result of each subcondition acts on a jump that ends the processing if the transition condition is not met.
  • the non-switching of a transition T n is considerably shortened in that a program branch (conditional jump) decides after a partial condition whether the next transition T n + 1 or further program lines of the transition T n are subject to processing.
  • the splitting could almost be interpreted as a decomposition of a transition into partial transitions. Each sub-transition actually only represents a sub-condition.
  • the order in which the individual conditions of the switching condition are placed in the source can be important. Automatically generated code should choose an order in which the partial condition runs from the shortest processing time to the longest.
  • the jump distributor (SpV) first introduces a virtual place (transition flag) for each transition.
  • the saving effect is achieved by processing only the higher-level branch distributor (i.e. 2 instructions per transition; flag query and branch). Only the transition whose flag is set is subject to further testing of the switching condition. In principle, the separate coding can then additionally be implemented.
  • transition If the transition is not switchable, there is a return to the jump distributor. In the event that it is switchable, there are 2 variants, a) to switch back to the SPV after switching and b) to check the switching condition of the subsequent transition. However, the latter only makes sense if the successor transition may become switchable by switching its predecessor transition. The switching action of a transition in the jump distributor must reset its flag and set the flags of the successor transitions that could become switchable by switching according to the network topology. These are all transitions that have a successor position to the switched transition as a predecessor position.
  • a special form of SpV can be useful for coding special network classes or certain network topologies.
  • Networks that are referred to as so-called one-brand networks have only one brand in the entire network.
  • transition whose predecessor location is owned by the brand cannot switch, then no other transition can switch in this network. For coding, this means that if a transition is not switched, the rest of the code does not have to be processed either. There is no new marking that enables switching.
  • an IEC 61131 SFC network is to underpin the discussion. It has a chain (10 steps) followed by a simultaneous branching (40 steps in total).
  • the chain (10 steps) is a typical representative for a single-brand area, so it can be ESpV-coded 3 . Chains are interpreted as independent ESpV.
  • the jump does not take place at the end of the network but at the beginning of the simultaneous branching.
  • the coding of the simultaneous branch also consisting of two chains, also uses a jump distributor.
  • This strategy is based on the fact that there is always a signal that the last one contributes to the fulfillment of the switching condition. It is often the same signal.
  • Each edge and possibly also the additional condition (e.g. comparison) that belong to a switching condition are considered as signals. For example, there is a transition with a predecessor position (engine turns) and an input (limit switch reached). Here it is usually the input that ultimately triggers the switching.
  • the event signal of a transition is the first to be queried. Since it only occurs for a short time and it is the last signal that is still missing to fulfill the switching condition for switching.
  • the signal (which should not exceed 2 signals), which ultimately triggers the switching, is the first condition
  • the rest of the condition from which the signal was extracted may remain as an independent sub-condition with a program branch, or b) the rest is connected to another sub-condition to form a new one.
  • condition groups precants, signal precursors, additional condition
  • the signal is in place of the flag and the flag can be omitted entirely. This also reduces the time required to implement switching, since flag management is no longer necessary.
  • the signals are reorganized to subconditions.
  • the last condition often contains the most complex conditions (eg comparators) and / or signals that are actually always met in terms of the switching condition. The number of conditions is arbitrary.
  • An unbranched chain is only processed if there is at least one mark in the chain. Efficient localization of existing brands within a chain uses special transitions, the chain entry and exit exits.
  • the entry transition creates a brand in this chain and at the same time sets a chain flag. If several brands can occur, a counter is used as a flag. Chain processing is only to be carried out if the chain flag is set or if the chain flag is greater than zero. If a mark leaves the chain, the exit transition resets the chain flag or decrements the counter.
  • control network can also be understood as an administration network that is closely linked to the control network.
  • Suitable entry transitions are those whose switching conditions are rarely met. Transitions whose switching condition contains a date, a time, a large delay time or a rather rare process signal may be mentioned here as an example.
  • the segmentation means extends the chain flag to a structured chain flag mechanism and is suitable for very long chains. For this purpose, long chains are divided into areas, the segments. Each segment has its own segment flag. The principle of segment management is the same as that of the chain flag. There are separate entry and exit transitions for each segment. An extreme case of segmentation leads to jump distributor coding of the transitions.
  • chain flag is on the top level, including the first level of the segments.
  • Another segmentation means that a segment controls the segments of its lower level. It then acts like the chain flag that controls the next segment level.
  • Figure 1.9 shows how the behavior of chain optimization (thin using Petri nets) can be designed with simple means. As soon as the first step of a chain or segment is activated by the transition, one or more chain flags are also set. The flag is reset as soon as the last step of the chain or segment is deactivated.
  • a flag (LeerFlag) is used, which indicates whether the steps of the entire chain are deactivated and a flag, which indicates whether a segment (SgFlag1 ... n) has an active state.
  • the empty flag can be dispensed with; it serves to ensure that only one query in the case of a deactivated chain, instead of 3 (SgFlagl ... n). In this case, almost the entire processing time of the chain is saved. The processing time is reduced to almost a third if there is an active step within the chain, assuming that all segments take the same processing time.
  • a CASE instruction can also be used. Each transition then represents a CASE case. This means that only one of all transitions of a CASE statement can switch. When switching a transition, it enters its successor transition in the CASE selector.
  • the dispatcher is very complex. It is particularly suitable for networks whose number of transitions that could switch due to the network marking are very much smaller than those of those that are not ready to switch.
  • the basic principle is quite simple. There is a list (e.g. array) of transitions that could switch due to the network marking. Transitions that switch are deleted from this list and enter all transitions in the list that have one of their successor positions as the previous position.
  • the list can consist of jump destinations or pointers.
  • the dispatcher is particularly suitable for implementation directly in the PLC runtime, but can also be implemented in the IEC code.
  • the dynamic jump distributor can replace the simple jump distributor or the dispatcher or supplement it in part. If you replace the entire jump distributor with a variable and a jump command with a dynamic jump destination, each transition, in its switching action, must enter the subsequent transition in the variable instead of managing the transition flags. A segregation can be omitted. The management of parallel switchable transitions must not take place in this way without further measures.
  • the use of dynamic jump distributors for parallel switchable transitions is more complex. Either lists or loops have to be managed or a jump distributor must be available for every possible parallel connection.
  • the splitting, the jump distributor, and the single-mark considerations, as well as the chain flag, the segmentation, possibly the dispatcher and the DSpV are important for the automatic code generation. Semi-automatic fine tuning can also be available.
  • the mechanisms for optimizing transitions can be used to determine the execution. Splitting, fine-tuning over the signal duration and possibly the dispatcher are particularly important.

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  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Automation & Control Theory (AREA)
  • Devices For Executing Special Programs (AREA)
  • Management, Administration, Business Operations System, And Electronic Commerce (AREA)

Abstract

Pour permettre une prise en considération, de manière appropriée, de la topologie lors de la conversion d'un modèle, un indicateur est placé dans une chaîne causale lors de l'entrée dans une marque, ledit indicateur étant réinitialisé lors de la sortie. On dispose ainsi d'un critère de décision pour une ramification de programme, ledit critère veillant à ce que la chaîne soit traitée uniquement lorsqu'une marque se trouve à l'intérieur de cette dernière. Il est possible de diviser de longues chaînes causales en zones qui disposent chacune d'un indicateur la contrôlant. La conversion des éléments de modèles en langages de systèmes de commande (SPS) s'effectue, par exemple dans le cas d'une transition, de la manière suivante : la commutation est soumise au traitement, uniquement si nécessaire, en fonction d'une ramification de programme située en aval du contrôle d'aptitude à la commutation. Une série d'autres stratégies sont fondées sur les différentes propriétés du modèle, du processus représenté dans le modèle et de la plate-forme cible. Le choix de la stratégie peut s'effectuer en majeure partie de manière assistée par ordinateur pour le temps de projet, éventuellement pour le temps d'exécution et éventuellement de façon manuelle pour les ajustements de précision.
PCT/EP2001/005536 2000-05-27 2001-05-16 Procede pour optimiser le temps d'execution de conversions de modeles orientes etat ou deroulement en solutions reelles WO2001093114A2 (fr)

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AU2001267443A AU2001267443A1 (en) 2000-05-27 2001-05-16 Method for optimizing the execution time for conversions of state or operational sequence oriented models into real solutions

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DE10026387.9 2000-05-27
DE10026387A DE10026387B4 (de) 2000-05-27 2000-05-27 Verfahren zur Ausführungszeitoptimierung für Umsetzungen von zustands- bzw. ablauforientierten Modellen, wie Petrinetze oder Automaten

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DE10028140A1 (de) 2000-06-07 2001-12-20 Siemens Ag Verfahren zur Organisation des Ablaufs elektronisch gesteuerter Schaltvorgänge
DE102023205246B3 (de) 2023-06-05 2024-07-04 Robert Bosch Gesellschaft mit beschränkter Haftung Petri-netz-basierte modellierung und erkennung einer betriebsstörung in einem sensorsystem

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AU2001267443A1 (en) 2001-12-11
DE10026387B4 (de) 2007-04-19
WO2001093114A3 (fr) 2002-07-11
DE10026387A1 (de) 2001-12-06

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AK Designated states

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Designated state(s): AE AG AL AM AT AU AZ BA BB BG BR BY BZ CA CH CN CO CR CU CZ DE DK DM DZ EC EE ES FI GB GD GE GH GM HR HU ID IL IN IS JP KE KG KP KR KZ LC LK LR LS LT LU LV MA MD MG MK MN MW MX MZ NO NZ PL PT RO RU SD SE SG SI SK SL TJ TM TR TT TZ UA UG US UZ VN YU ZA ZW

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