WO2001059828A3 - Bauelement mit konstant verspannter verklebung und verfahren zur verklebung - Google Patents

Bauelement mit konstant verspannter verklebung und verfahren zur verklebung Download PDF

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Publication number
WO2001059828A3
WO2001059828A3 PCT/DE2001/000403 DE0100403W WO0159828A3 WO 2001059828 A3 WO2001059828 A3 WO 2001059828A3 DE 0100403 W DE0100403 W DE 0100403W WO 0159828 A3 WO0159828 A3 WO 0159828A3
Authority
WO
WIPO (PCT)
Prior art keywords
bonding
building component
distorsion
constant
free
Prior art date
Application number
PCT/DE2001/000403
Other languages
English (en)
French (fr)
Other versions
WO2001059828A2 (de
Inventor
Bernhard Bader
Peter Geschka
Juergen Agrikola
Original Assignee
Epcos Ag
Bernhard Bader
Peter Geschka
Juergen Agrikola
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Epcos Ag, Bernhard Bader, Peter Geschka, Juergen Agrikola filed Critical Epcos Ag
Publication of WO2001059828A2 publication Critical patent/WO2001059828A2/de
Publication of WO2001059828A3 publication Critical patent/WO2001059828A3/de

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/16—Fillings or auxiliary members in containers or encapsulations, e.g. centering rings
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
    • H01L21/56—Encapsulations, e.g. encapsulation layers, coatings
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L24/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L24/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/8312—Aligning
    • H01L2224/83136—Aligning involving guiding structures, e.g. spacers or supporting members
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/8338—Bonding interfaces outside the semiconductor or solid-state body
    • H01L2224/83385—Shape, e.g. interlocking features
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01019—Potassium [K]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01068—Erbium [Er]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151—Die mounting substrate
    • H01L2924/156—Material
    • H01L2924/15786—Material with a principal constituent of the material being a non metallic, non metalloid inorganic material
    • H01L2924/15787—Ceramics, e.g. crystalline carbides, nitrides or oxides

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Surface Acoustic Wave Elements And Circuit Networks Thereof (AREA)
  • Adhesives Or Adhesive Processes (AREA)
  • Piezo-Electric Or Mechanical Vibrators, Or Delay Or Filter Circuits (AREA)

Abstract

Zur Verklebung spannungsempfindlicher Bauelementsubstrate (BS) mit einem Systemträger (ST) wird vorgeschlagen, Abstandsstrukturen (AS) zwischen den beiden zu verklebenden Oberflächen vorzusehen, die ein definierte Anordnung der beiden zu verklebenden Oberflächen gewährleistet. Die Abstandsstrukturen können mittels Siebdruck aufgebracht werden, der Raum zwischen den Abstandsstrukturen kann mit Klebstoff (K) aufgefüllt werden.
PCT/DE2001/000403 2000-02-14 2001-02-02 Bauelement mit konstant verspannter verklebung und verfahren zur verklebung WO2001059828A2 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
DE10006447A DE10006447A1 (de) 2000-02-14 2000-02-14 Bauelement mit konstant verspannter Verklebung und Verfahren zur Verklebung
DE10006447.7 2000-02-14

Publications (2)

Publication Number Publication Date
WO2001059828A2 WO2001059828A2 (de) 2001-08-16
WO2001059828A3 true WO2001059828A3 (de) 2002-02-28

Family

ID=7630817

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/DE2001/000403 WO2001059828A2 (de) 2000-02-14 2001-02-02 Bauelement mit konstant verspannter verklebung und verfahren zur verklebung

Country Status (3)

Country Link
US (1) US20030141782A1 (de)
DE (1) DE10006447A1 (de)
WO (1) WO2001059828A2 (de)

Families Citing this family (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7495862B2 (en) * 2005-02-08 2009-02-24 Seagate Technology Llc Formed parts for adhesive height setting
TWI589420B (zh) * 2012-09-26 2017-07-01 Mitsuboshi Diamond Ind Co Ltd Metal multilayer ceramic substrate breaking method and trench processing tools
DE102015101711B4 (de) * 2014-02-11 2020-10-01 GM Global Technology Operations LLC (n. d. Ges. d. Staates Delaware) Verfahren zum Bilden einer Klebeverbindung sowie Verfahren zum Reparieren von Automobilkomponenten
US10018211B2 (en) * 2014-02-11 2018-07-10 GM Global Technology Operations LLC Bond standoffs for sliding positioning of components in an assembly
JP6669104B2 (ja) 2017-03-03 2020-03-18 株式会社デンソー 半導体装置
JPWO2020175619A1 (ja) * 2019-02-28 2021-12-16 京セラ株式会社 電子部品搭載用パッケージ、電子装置及び発光装置
DE102022209197A1 (de) 2022-09-05 2024-03-07 Robert Bosch Gesellschaft mit beschränkter Haftung Vorrichtung und Verfahren zum Bedrucken eines Substrats mit einem Dicht- und/oder Klebstoff

Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH02105449A (ja) * 1988-10-13 1990-04-18 Nec Corp 半導体装置用リードフレーム
JPH02144954A (ja) * 1988-11-28 1990-06-04 Matsushita Electron Corp 半導体装置
JPH03206626A (ja) * 1990-01-08 1991-09-10 Nec Corp 樹脂封止型半導体装置
JPH0438859A (ja) * 1990-06-04 1992-02-10 Hitachi Ltd 電子部品組立構造及びその組立方法
JPH05109786A (ja) * 1991-10-18 1993-04-30 Fujitsu Ltd 半導体チツプの実装構造
JPH05343658A (ja) * 1992-06-09 1993-12-24 Sony Corp 固体撮像装置のパッケージ構造
JPH10284515A (ja) * 1997-04-10 1998-10-23 Murata Mfg Co Ltd ダイボンディング方法およびそれを用いた電子部品の実装構造

Patent Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH02105449A (ja) * 1988-10-13 1990-04-18 Nec Corp 半導体装置用リードフレーム
JPH02144954A (ja) * 1988-11-28 1990-06-04 Matsushita Electron Corp 半導体装置
JPH03206626A (ja) * 1990-01-08 1991-09-10 Nec Corp 樹脂封止型半導体装置
JPH0438859A (ja) * 1990-06-04 1992-02-10 Hitachi Ltd 電子部品組立構造及びその組立方法
JPH05109786A (ja) * 1991-10-18 1993-04-30 Fujitsu Ltd 半導体チツプの実装構造
JPH05343658A (ja) * 1992-06-09 1993-12-24 Sony Corp 固体撮像装置のパッケージ構造
JPH10284515A (ja) * 1997-04-10 1998-10-23 Murata Mfg Co Ltd ダイボンディング方法およびそれを用いた電子部品の実装構造

Non-Patent Citations (8)

* Cited by examiner, † Cited by third party
Title
"CHIP-HEATSINK ATTACH USING CONTOURED ADHESIVE WITH GLASS STAND-OFFS", IBM TECHNICAL DISCLOSURE BULLETIN, IBM CORP. NEW YORK, US, vol. 34, no. 3, 1 August 1991 (1991-08-01), pages 161 - 162, XP000210487, ISSN: 0018-8689 *
PATENT ABSTRACTS OF JAPAN vol. 014, no. 316 (E - 0949) 6 July 1990 (1990-07-06) *
PATENT ABSTRACTS OF JAPAN vol. 014, no. 391 (E - 0968) 23 August 1990 (1990-08-23) *
PATENT ABSTRACTS OF JAPAN vol. 015, no. 476 (E - 1140) 4 December 1991 (1991-12-04) *
PATENT ABSTRACTS OF JAPAN vol. 016, no. 224 (E - 1206) 25 May 1992 (1992-05-25) *
PATENT ABSTRACTS OF JAPAN vol. 017, no. 463 (E - 1420) 24 August 1993 (1993-08-24) *
PATENT ABSTRACTS OF JAPAN vol. 018, no. 171 (E - 1529) 23 March 1994 (1994-03-23) *
PATENT ABSTRACTS OF JAPAN vol. 1999, no. 01 29 January 1999 (1999-01-29) *

Also Published As

Publication number Publication date
WO2001059828A2 (de) 2001-08-16
DE10006447A1 (de) 2001-08-16
US20030141782A1 (en) 2003-07-31

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