WO2000045441A3 - Semiconductor device with a multiple dielectric - Google Patents

Semiconductor device with a multiple dielectric Download PDF

Info

Publication number
WO2000045441A3
WO2000045441A3 PCT/DE2000/000203 DE0000203W WO0045441A3 WO 2000045441 A3 WO2000045441 A3 WO 2000045441A3 DE 0000203 W DE0000203 W DE 0000203W WO 0045441 A3 WO0045441 A3 WO 0045441A3
Authority
WO
WIPO (PCT)
Prior art keywords
dielectric
semiconductor device
gate dielectric
semiconductor substrate
conduction type
Prior art date
Application number
PCT/DE2000/000203
Other languages
German (de)
French (fr)
Other versions
WO2000045441A2 (en
Inventor
Harald Bachhofer
Hans Reisinger
Thomas Peter Haneder
Original Assignee
Infineon Technologies Ag
Harald Bachhofer
Hans Reisinger
Thomas Peter Haneder
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Infineon Technologies Ag, Harald Bachhofer, Hans Reisinger, Thomas Peter Haneder filed Critical Infineon Technologies Ag
Publication of WO2000045441A2 publication Critical patent/WO2000045441A2/en
Publication of WO2000045441A3 publication Critical patent/WO2000045441A3/en

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/40—Electrodes ; Multistep manufacturing processes therefor
    • H01L29/43—Electrodes ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
    • H01L29/49—Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET
    • H01L29/51—Insulating materials associated therewith
    • H01L29/511—Insulating materials associated therewith with a compositional variation, e.g. multilayer structures

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Ceramic Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Insulated Gate Type Field-Effect Transistor (AREA)
  • Non-Volatile Memory (AREA)
  • Semiconductor Memories (AREA)

Abstract

The invention relates to a semiconductor device with a multiple dielectric, especially an ONO-triple dielectric, comprising a semiconductor substrate (10) of a first conduction type, a first doping area (20) of a second conduction type which is provided in said semiconductor substrate (10), a second doping area (30) of the second conduction type which is provided in the semiconductor substrate (10), a channel area (25) which is situated between the first and the second doping area (20, 30), a gate dielectric (40, 50, 60) which lies on top of the channel area (25) and which has at least three layers; and a gate terminal (70) which is provided on top of the gate dielectric (40, 50, 60). The bottom layer (40) of the gate dielectric (40, 50, 60) has an essentially smaller dielectric constant than the top layer (60) of the gate dielectric (40, 50, 60).
PCT/DE2000/000203 1999-01-29 2000-01-25 Semiconductor device with a multiple dielectric WO2000045441A2 (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
DE1999103598 DE19903598A1 (en) 1999-01-29 1999-01-29 Multi-dielectric semiconductor device
DE19903598.9 1999-01-29

Publications (2)

Publication Number Publication Date
WO2000045441A2 WO2000045441A2 (en) 2000-08-03
WO2000045441A3 true WO2000045441A3 (en) 2001-03-29

Family

ID=7895824

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/DE2000/000203 WO2000045441A2 (en) 1999-01-29 2000-01-25 Semiconductor device with a multiple dielectric

Country Status (2)

Country Link
DE (1) DE19903598A1 (en)
WO (1) WO2000045441A2 (en)

Families Citing this family (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20030062567A1 (en) * 2001-09-28 2003-04-03 Wei Zheng Non volatile dielectric memory cell structure with high dielectric constant capacitive coupling layer
DE10158019C2 (en) * 2001-11-27 2003-09-18 Infineon Technologies Ag Floating gate field effect transistor
US6717226B2 (en) 2002-03-15 2004-04-06 Motorola, Inc. Transistor with layered high-K gate dielectric and method therefor
US6812517B2 (en) * 2002-08-29 2004-11-02 Freescale Semiconductor, Inc. Dielectric storage memory cell having high permittivity top dielectric and method therefor
US7135370B2 (en) 2004-07-01 2006-11-14 Freescale Semiconductor, Inc. Dielectric storage memory cell having high permittivity top dielectric and method therefor
DE102005008321B4 (en) * 2005-02-23 2008-09-25 Qimonda Ag Field effect controllable semiconductor memory element with improved trapping dielectric
US7790516B2 (en) 2006-07-10 2010-09-07 Qimonda Ag Method of manufacturing at least one semiconductor component and memory cells

Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4250206A (en) * 1978-12-11 1981-02-10 Texas Instruments Incorporated Method of making non-volatile semiconductor memory elements
US4804640A (en) * 1985-08-27 1989-02-14 General Electric Company Method of forming silicon and aluminum containing dielectric film and semiconductor device including said film
EP0692825A2 (en) * 1994-07-15 1996-01-17 Sony Corporation Analogue MISFET with threshold voltage adjuster
EP0742593A2 (en) * 1995-05-10 1996-11-13 Nec Corporation Semiconductor device with multilevel structured insulator and fabrication method thereof
JPH10178170A (en) * 1996-12-19 1998-06-30 Fujitsu Ltd Semiconductor device and its manufacture
US6015739A (en) * 1997-10-29 2000-01-18 Advanced Micro Devices Method of making gate dielectric for sub-half micron MOS transistors including a graded dielectric constant

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4250206A (en) * 1978-12-11 1981-02-10 Texas Instruments Incorporated Method of making non-volatile semiconductor memory elements
US4804640A (en) * 1985-08-27 1989-02-14 General Electric Company Method of forming silicon and aluminum containing dielectric film and semiconductor device including said film
EP0692825A2 (en) * 1994-07-15 1996-01-17 Sony Corporation Analogue MISFET with threshold voltage adjuster
EP0742593A2 (en) * 1995-05-10 1996-11-13 Nec Corporation Semiconductor device with multilevel structured insulator and fabrication method thereof
JPH10178170A (en) * 1996-12-19 1998-06-30 Fujitsu Ltd Semiconductor device and its manufacture
US6015739A (en) * 1997-10-29 2000-01-18 Advanced Micro Devices Method of making gate dielectric for sub-half micron MOS transistors including a graded dielectric constant

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
PATENT ABSTRACTS OF JAPAN vol. 1998, no. 11 30 September 1998 (1998-09-30) *

Also Published As

Publication number Publication date
WO2000045441A2 (en) 2000-08-03
DE19903598A1 (en) 2000-08-10

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