WO2000014804A1 - Dielectric element and production method thereof and semiconductor device - Google Patents

Dielectric element and production method thereof and semiconductor device Download PDF

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Publication number
WO2000014804A1
WO2000014804A1 PCT/JP1999/004679 JP9904679W WO0014804A1 WO 2000014804 A1 WO2000014804 A1 WO 2000014804A1 JP 9904679 W JP9904679 W JP 9904679W WO 0014804 A1 WO0014804 A1 WO 0014804A1
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Prior art keywords
dielectric
ferroelectric
temperature
elements
weight
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PCT/JP1999/004679
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French (fr)
Japanese (ja)
Inventor
Toshihide Nabatame
Takaaki Suzuki
Tetsuo Fujiwara
Kazutoshi Higashiyama
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Hitachi, Ltd.
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Priority to KR1020007003089A priority Critical patent/KR20010024248A/en
Publication of WO2000014804A1 publication Critical patent/WO2000014804A1/en

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Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L28/00—Passive two-terminal components without a potential-jump or surface barrier for integrated circuits; Details thereof; Multistep manufacturing processes therefor
    • H01L28/40—Capacitors
    • H01L28/55—Capacitors with a dielectric comprising a perovskite structure material
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
    • H01L21/02172—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing at least one metal element, e.g. metal oxides, metal nitrides, metal oxynitrides or metal carbides
    • H01L21/02197—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing at least one metal element, e.g. metal oxides, metal nitrides, metal oxynitrides or metal carbides the material having a perovskite structure, e.g. BaTiO3
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
    • H01L21/0226—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process
    • H01L21/02263—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase
    • H01L21/02266—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase deposition by physical ablation of a target, e.g. sputtering, reactive sputtering, physical vapour deposition or pulsed laser deposition
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02296—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer
    • H01L21/02318—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer post-treatment
    • H01L21/02356—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer post-treatment treatment to change the morphology of the insulating layer, e.g. transformation of an amorphous layer into a crystalline layer
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/40—Electrodes ; Multistep manufacturing processes therefor
    • H01L29/401—Multistep manufacturing processes
    • H01L29/4011—Multistep manufacturing processes for data storage electrodes
    • H01L29/40111—Multistep manufacturing processes for data storage electrodes the electrodes comprising a layer which is used for its ferroelectric properties
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B53/00—Ferroelectric RAM [FeRAM] devices comprising ferroelectric memory capacitors

Definitions

  • the present invention relates to a dielectric element, a method of manufacturing the same, and a semiconductor device.
  • the present invention relates to a dielectric element used as a ferroelectric element such as a FeRAM or a highly dielectric element such as a DRAM, a method for manufacturing the same, and a semiconductor device.
  • Ferroelectric Random Access Memory uses a ferroelectric material for the capacitor material.
  • FeRAM uses the fact that ferroelectrics have two remanent polarizations with different polarities, so that the stored contents can be retained even with a power supply OFF.
  • the speed at which information is rewritten is less than / s, very high speed, and is attracting attention as an ideal next-generation memory.
  • miniaturization of circuit components is required, and capacitors are being miniaturized.
  • Japanese Patent Application Laid-Open No. 5-190797 discloses that a zirconate titanate ship (PZT) is used as a ferroelectric material to suppress the reactivity between the ferroelectric material and a metal electrode.
  • PZT zirconate titanate ship
  • SiNX silicon nitride film
  • DRAM Dynamic Random Access Memory
  • This DRAM is high density
  • Means for miniaturizing the capacitor include thinning the dielectric material, selecting a material with a high dielectric constant, and flattening the structure consisting of the upper and lower electrodes and the dielectric to make it three-dimensional.
  • BST crystal structure is a single grating Berobusukai preparative structure ((B a / S r) T i 0 3) there Ri, S i 0 2 / S i It is known to have a large dielectric constant as compared with 3 N 4 ( ⁇ ).
  • the goal is to operate at a low voltage with high integration. For this purpose, it is necessary to increase the capacitance of the dielectric element used in the memory, and use a dielectric with a higher dielectric constant, increase the electrode area, and reduce the thickness of the high dielectric. Are being considered.
  • a low dielectric constant layer or a giant crystal grown by grain growth may be formed between the electrode and the dielectric thin film. If a low dielectric constant layer is formed, the remanent polarization (P r) of the device as a whole becomes smaller, and the function as a dielectric device is lost.
  • P r remanent polarization
  • a giant crystal is formed, a leak current flows through the grain boundaries of the crystal, and the withstand voltage characteristics of the dielectric element decrease, so that a voltage sufficient to operate as a dielectric element cannot be applied.
  • the electrode is made of metal, a transition layer is formed at the interface between the dielectric thin film and the metal electrode by a diffusion reaction of elements. transition The layer has the problem that the remanent polarization (P r) decreases, the coercive electric field (E c) increases, the film fatigue occurs, and the function as a dielectric element deteriorates.
  • An object of the present invention is to provide a dielectric element which maintains a large remanent polarization and functions soundly, a method of manufacturing the same, and a semiconductor device.
  • a feature of the present invention that achieves the above object is that the dielectric contains a Group Ia element, a Mg element, or a Ca element.
  • the crystallization temperature of the dielectric can be lowered because the dielectric contains these alkali metals or alkaline earth metals. Therefore, heat treatment for crystallization can be performed at a low temperature, and at this time, the dielectric can be formed without reacting with the dielectric and the electrode in contact with the dielectric, and a sound function can be achieved.
  • a dielectric element can be obtained.
  • the group la elements are Li, Na, and K.
  • the dielectric preferably contains a Group Ia element, a Mg element, or a Ca element in a ratio of 0.5 part by weight or more and 10 parts by weight or less with respect to 100 parts by weight of the dielectric. Good.
  • the dielectric substance has a chemical structural formula (AO ⁇ By ⁇ CyOsy10,) 2 (however,
  • A is T 1, 'H g, P b, B i, or a rare earth element
  • B is B i, P b, C a, S r, or B a
  • C Is Ti, Nb, Ta, W, Mo, Fe, Co, Cr, or Zr.
  • Mote crystal structure was or chemical structural formula (P b, - x A x ) (Z r - y T i y) 0 3 ( where, A is L a, B a, or the With Nb, 0 ⁇ x ⁇ 0.2 and 0 ⁇ y ⁇ l), the dielectric is a ferroelectric, and a ferroelectric element can be obtained. .
  • This ferroelectric element has a high remanent polarization Pr value, has a low coercive electric field Ec value, and is a soundly functioning ferroelectric element in which film fatigue is suppressed.
  • the chemical structural formula (A 0) 2 Ten (B y - C y 0 3y + 1) 2 - is (A 2 0 2) 2 + (B y -, C y O 3 y + i) 2 "
  • dielectric, chemical structural formulas (B a -. X S r JT i 0 3 ( however, if Mote the crystal structure of a 0 ⁇ x ⁇ 1), dielectric Ri high dielectric der
  • This ferroelectric element has a large capacitance, maintains a high remanent polarization Pr value, has a good withstand voltage characteristic, and has a soundly functioning high ferroelectric element. Element.
  • a dielectric containing a Group Ia element, a Mg element, or a Ca element is formed at 250 ° C. or more and 500 ° C. or less.
  • the dielectric containing these alkali metals or alkaline earth metals has a low crystallization temperature and is formed at a temperature of 250 ° C. or more and 500 ° C. or less. Therefore, the reaction between the dielectric and the electrode in contact with the dielectric can be suppressed. Therefore, a sound dielectric can be formed, and a dielectric element that functions soundly can be obtained.
  • a step of providing an amorphous dielectric containing a Group Ia element, a Mg element, or a Ca element is performed, and a heat treatment for crystallizing the amorphous dielectric is performed. Performing at a temperature of 250 ° C. or higher and 500 ° C. or lower may be included. If the dielectric is a ferroelectric, provide an amorphous ferroelectric containing Group Ia, Mg, or Ca elements at a temperature lower than 350 ° C. The heat treatment for crystallizing the amorphous ferroelectric can be performed at 350 ° C. or more and 500 ° C. or less. Within these temperature ranges, the reaction between the ferroelectric and the electrode in contact with the ferroelectric can be suppressed. Therefore, a sound ferroelectric can be formed, and a sound dielectric element can be obtained.
  • the dielectric is a high dielectric
  • the heat treatment for crystallizing the amorphous high dielectric substance can be performed at 250 ° C. or higher and 450 ° C. or lower. Within these temperature ranges, the reaction between the high dielectric and the electrode in contact with the high dielectric can be suppressed. Therefore, a sound high dielectric can be formed, and a dielectric element that functions soundly can be obtained.
  • a step of adding a group Ia element, an Mg element, or a Ca element to the dielectric material may be included.
  • the semiconductor device has a dielectric element whose dielectric includes a Group Ia element, a Mg element, or a Ca element. According to this feature, the crystallization temperature of the dielectric can be lowered because the dielectric contains these alkali metals or alkaline earth metals. Therefore, a heat treatment for crystallization can be performed at a low temperature, and the dielectric can be formed without reacting with the dielectric and the electrode in contact with the dielectric at this time, and can function satisfactorily. A dielectric element can be obtained. Semiconductor devices such as Fe RAM and DRAM If such a dielectric element is used, it is possible to increase the capacity and operate at a lower voltage. BRIEF DESCRIPTION OF THE FIGURES
  • Figure 1 is, S r B i 2 T a 2 0 9 1 0 0 a K of 5 parts by weight was added with respect to the weight parts, 4 5 0 when manufactured in ° C S r B i 2 T a 2 0 : S ⁇ ⁇ photo of layer.
  • FIG. 2 is a diagram illustrating a relationship between a voltage of a zero layer and a polarization.
  • FIG. 3 is a sectional view of the ferroelectric element of the present invention.
  • FIG. 4 is a sectional view of the high dielectric element of the present invention.
  • Figure 5 shows the relationship between the heat treatment temperature and the P r properties of (B i 0) 2 S r T a 2 0 7) 2 ferroelectric element including K elements.
  • FIG. 6 is a diagram showing the relationship between (B a 0. 5 S r 0. 6) T i 0 3 heat treatment temperature and the ⁇ characteristics of the high dielectric element containing K elements.
  • FIG. 7 is a cross-sectional view of a semiconductor device using the ferroelectric element of the present invention.
  • FIG. 8 is a diagram showing the relationship between the amount of each single element added and the crystallization temperature. , L i, N a, ⁇ , a g, and the total amount of C a and the crystallization temperature are not shown.
  • FIG. 10 is a flowchart showing a method of manufacturing the ferroelectric element of the first embodiment.
  • FIG. 11 is a diagram showing a non-contact type memory card according to a fifth embodiment.
  • the inventors of the present invention have found that a low-permittivity layer or a giant crystal grown by grain formation between an electrode of a dielectric element and a dielectric thin film is caused by a high-temperature heat treatment. Conventionally, a dielectric thin film formed by high-temperature heat treatment and No consideration was given to the reaction with the electrodes provided.
  • a non-crystalline dielectric thin film is crystallized by heat treatment.
  • the crystallization of an amorphous dielectric thin film was performed by a solid-phase reaction, so that a high-temperature heat treatment of 700 ° C. or more was required.
  • heat treatment at a high temperature of 700 ° C. or more was required.
  • the dielectric thin film reacts with the electrode provided in contact with the dielectric thin film, and a layer or the like that hinders the device function as described above is placed between the electrode and the dielectric thin film. Crystals are formed.
  • the inventors By adding an alkali metal or an alkaline earth metal to the dielectric, the inventors lower the crystallization temperature of the dielectric, and make the ferroelectric without reacting the ferroelectric with the electrode. Found that the body can be crystallized. The principle by which the crystallization temperature of the dielectric can be reduced will be described below.
  • Strength is a dielectric (AO) 2 Ten (B y - 1 C y 0 3 y + 1) 2 - ( where, A is T l, Ri H g, P b, B i , or rare earth elements Der , B is B i, P b, C a, S r, or B a, and C is T i, N b, T a, W, M o, F e, C o, C r , Or Z r :) or (P b, — X A X ) (Z r: _ y T i y ) 0 3 (where A is La, B a, or N b, 0 ⁇ x ⁇ 0.2, and 0 ⁇ y ⁇ l).
  • the crystallization temperature of the ferroelectric is in the range of 350 ° C. or more and 500 ° C. or less. Therefore, even if the heat treatment is performed at a temperature lower than the conventional temperature of 350 ° C. or more and 500 ° C. or less, the ferroelectric material is crystallized without reacting the ferroelectric material and the electrode. Let be able to.
  • the crystallization temperature is lowered by crystallization using the liquid phase, as in the case of Group Ia. be able to.
  • L i element, N a elements, K element, M g elements and C a element Even when chromium is added, the crystallization temperature can be lowered to 250 ° C. or more and 450 ° C. or less by crystallization using a liquid phase as in the case of ferroelectrics.
  • the Li element, Na element, K element, Mg element, and Ca element may be used alone or in combination, but the total amount added is 100 parts by weight of the ferroelectric. It is preferable that the ratio be 5 parts by weight or more and 10 parts by weight or less.
  • the method of manufacturing a dielectric element by crystallizing a dielectric at a lower temperature than in the past will be specifically described.
  • FIG. 3 shows a schematic cross-sectional view of the ferroelectric element of this example.
  • the ferroelectric thin film 32 used in the ferroelectric element of the present embodiment contains a K element and has a chemical structural formula
  • the ferroelectric thin film 32 is sandwiched between the upper electrode 31 and the lower electrode 32 and is formed on the base substrate 34.
  • a base substrate 34 is prepared.
  • Base substrate 3 4 on S i wafer having a S i 0 2 layer on the surface, and forming a T i N layer 2 0 0 people thickness becomes Roh Li catcher layer.
  • the lower electrode 33 is formed on the base substrate 34.
  • Spatter on base substrate 34 A lower electrode 33 is formed by forming a Pt thin film having a thickness of 1000 by a tapping method.
  • the temperature of the starting substrate 3 was formed with lower Ri by the crystallization temperature, were deposited in here includes a K element (B i O) 2 + ( S r T a 2 0 7) 2 — A strong dielectric thin film of 32, which is an amorphous thin film. Also, the temperature of the underlying substrate 3
  • the film could be formed without reacting with the ferroelectric thin film 32 and the base electrode 33.
  • heat treatment is performed to crystallize the amorphous ferroelectric thin film 32.
  • the heat treatment is performed by raising the temperature of the base substrate 34 to 500 ° C., which is the crystallization temperature of the ferroelectric thin film 32, in air or oxygen at l atm for 10 to 15 minutes. .
  • an upper electrode 31 is formed on the crystallized ferroelectric thin film 32.
  • a Pt thin film having a thickness of 1000 is formed on the ferroelectric thin film 32 by a sputtering method to form an upper electrode 31.
  • a ferroelectric element was created.
  • the heat treatment for crystallization is performed in (4), and then the upper electrode 31 is formed in (5).
  • the heat treatment for crystallization may be performed after forming the upper electrode 31.
  • the ferroelectric thin film 32 after the heat treatment of (4) was observed by SEM, as shown in the SEM photograph of FIG. 1, the ferroelectric thin film 32 did not show a large crystal with grain growth.
  • the film was composed of fine ferroelectric crystals with a particle size of 100 to 100 persons.
  • the ferroelectric thin film 32 contained 100 parts by weight of (Bio). 2 + contained (S r T a 2 ⁇ 7) K elements 5.0 parts by weight to 2.
  • FIG. 2 shows the result of examining the relationship between the voltage and the polarization of the ferroelectric element of this example.
  • the characteristics deteriorated about 3%, indicating excellent ferroelectric characteristics, and no characteristic deterioration due to the addition of K element was observed.
  • the K element is added to the ferroelectric thin film 32, the liquid phase between the alkali metal (K element) and the ferroelectric is easily formed.
  • This liquid phase generation occurs at a temperature lower than the temperature of the solid-phase reaction, and the crystallization of the ferroelectric thin film 32 is performed by the liquid-phase reaction.
  • the temperature drops to 500 ° C. Therefore, since the heat treatment can be performed at a low temperature, the strong dielectric thin film 32 can be crystallized without reacting the dielectric thin film 32 with the upper and lower electrodes, and can function soundly.
  • Ferroelectric element Can be made.
  • Including K elements (B i 0) show 2 + a relation between (S r T a 2 0 7 ) heat treatment temperature of 2 _ ferroelectric element and P r characteristic in FIG. 5.
  • the vertical axis in FIG. 5 is the value (PrZPr (500)) normalized by Pr at 5 V of the ferroelectric element manufactured at 50 CTC.
  • Pr / Pr (500)> 0.95 exhibited extremely excellent characteristics in a temperature range of 350 ° C. or higher.
  • Fig. 8 shows the results of an investigation on the relationship between the amount of addition and the crystallization temperature.
  • Work made method similarly to the above ((B i O) 2+ ( S r T a 2 0 7) 2 _) the K 2 C 0 3 with respect to 1 0 0 parts by weight as seen in the K elements 0-1 5 parts by weight of the range, L i 2 C 0 3 a L i elements ⁇ look 0-1 5 parts by weight range, N a 2 C 0 3 range of 0-1 5 parts by weight as seen in the N a elements, M g the C 0 3 was added in the range of 0 1 to 5 parts by weight as viewed looking in M g elemental 0-1 5 parts by weight of the range, the C a C 0 3 in C a element.
  • the crystallization temperature in the figure indicates the minimum crystallization temperature at which the obtained ferroelectric element satisfies 2 Pr> 10 C / cm 2 at 5 V. From Fig. 8, it can be seen that the minimum crystallization temperature is from 350 ° C to 500 ° C for any of the additional elements when added in the range of 0.5 to 10 parts by weight. It turns out that it becomes.
  • the elements with the large range of the addition amount (tolerance) required to achieve the crystallization temperature of 350 ° C were in the order of K>Na> Mg, Ca> Li.
  • Fig. 9 shows the results of a study on the relationship between the amount of addition and the crystallization temperature. As is evident from FIG. 9, even when two or more elements selected from the group consisting of Li, Na, ⁇ , ⁇ g, and Ca are added in combination, If the total amount of addition is in the range of 0.5 parts by weight or more and 10 parts by weight or less, the crystallization temperature can be 350 ° C. or more and 500 ° C. or less.
  • a ferroelectric thin film used in the ferroelectric element of the present embodiment includes a K element, chemical structural formulas P b (Z r o. 4 T i 0. E) those having a crystal structure of O 3 , Chemical structural formula
  • the gas was a 1: 1 mixed gas of oxygen and argon, the deposition pressure was 2 Pa, the RF layer was 200 W, and a film thickness of 250 nm was obtained.
  • heat treatment was performed at a temperature of 500 ° C. for 10 to 150 minutes.
  • the Pr value (PrZPrCSOO)) of the ferroelectric element fabricated at 500 ° C, normalized by Pr at 5 V, is less than 350 ° C in the temperature range. r / Pr (500)> 0.95, which is very excellent.
  • Table 2 shows the 2 Pr values (unit: ⁇ C / cm 2 ) at 5 V of these ferroelectric devices manufactured at 500 ° C. Table 2 shows the values. As described above, the 2 Pr value greatly changed depending on the y value, and a particularly high Pr characteristic was obtained in the range of 0.5 ⁇ y ⁇ 0.75.
  • FIG. 4 shows a schematic cross-sectional view of the high dielectric element of the present example.
  • the high-dielectric thin film used in the high-dielectric element of this embodiment contains the element K and has a chemical structural formula
  • the high dielectric element of this embodiment is also manufactured in the same manner as in the first embodiment.
  • a Si wafer including a 200- layer thick TiN layer barrier layer formed by heating at 300 ° C. and a SiO 2 layer formed by thermal oxidation was used for the base substrate 44.
  • a lower electrode 43 was formed on the base substrate 44.
  • the lower electrode 43 was formed by heating the base substrate 44 to 350 ° C. and forming 200 thin Pt films by sputtering. Ba, Sr, Tr, and K elements are formed on the lower electrode 43 to form a high dielectric thin film 42.
  • the crystal structure (B a -! X S r x) in the high dielectric T i O 3, x is 0
  • epsilon value of the high dielectric element manufactured in the same manner as described above 4 5 0 ° C is, K 2 C 0 3 a viewed in ⁇ element 0.5 parts by weight or more 1 0 When added in a range of not more than the weight part, electric characteristics of ⁇ > 400 were exhibited.
  • high dielectric crystal structure (B a ⁇ S rj T i Os, also in S r T i O 3 when X is 1, similarly to the above 4 5 0 high dielectric element manufactured ° C shall of epsilon values, if added K 2 C 0 3 1 0 parts by weight or less of the range 0.5 parts by weight or more as viewed in ⁇ element showed epsilon> 1 8 0 electrical characteristics.
  • FIG. 7 is a schematic sectional view of a semiconductor device using a ferroelectric element according to the present invention.
  • the fabrication method is described below.
  • a diffusion layer 77 is formed on the Si wafer 75 by ion implantation and heat treatment, and then a SiO 2 gate film 79 is formed on the Si wafer 75 by surface oxidation.
  • Gate electrodes 78 were formed.
  • the SiO 2 film 76 as an element separation between the transistor and the capacitor, the strong dielectric elements 73, 72, and 72 were formed.
  • an aluminum wiring 7 10 is formed, and the upper electrode 71 and the diffusion layer 77 are connected.
  • the obtained ferroelectric memory element semiconductor device is a semiconductor device that can be detected by a change in the storage charge capacity obtained at a voltage of 3 V.
  • P t consists electrode 7 3 structure
  • P t electrodes, (B a 0 . 5 S r .. 5) high dielectric thin film such as T i 0 3 may be formed of high dielectric memory device having a structure consisting of P t electrodes.
  • the semiconductor device of the high-dielectric memory element obtained in this way is a semiconductor device having a storage capacitance of 30 fF at a voltage of 3 V. It is.
  • the dielectric element of the present invention is used, it is possible to increase the capacity and operate at a lower voltage.
  • the TiN layer is used as the barrier layer formed on the Si substrate, but Ti, TiAIN, Ta, or the like may be used.
  • the upper and lower electrodes in addition to P t, W, P t T i, R u, I r, A 1, C u, it is the this the like R u 0 2, lr 0 2 .
  • a MOCVD method using oxygen or excited oxygen a spin coating method using a metal alkoxide or an organic acid salt as a starting material, and a dip coating method can be used to form a dielectric film. May be appropriately selected.
  • a non-contact type memory card 50 according to a fifth embodiment of the present invention will be described.
  • the non-contact memory card 50 of the present embodiment shown in FIG. 11 includes a data ROM 51 for storing data, a FeRAM device 52, and a non-contact interface. 53 and antenna 54 are provided on the card.
  • the Fe RAM element 52 the ferroelectric element described in the first to fourth embodiments is used.
  • the data ROM 51, the FeRAM element 52, and the non-contact interface 53 are interconnected by signal lines through which data flows.
  • An antenna 54 is connected to a signal line to the non-contact interface 53.
  • Information from the outside is sent from the antenna 54 to the non-contact interface 53 and converted into a voltage signal.
  • the FeRAM element 52 can be driven to write information or read information from the data ROM 51.
  • an applied voltage of 16 V was required because a nonvolatile element of the EEPR0M element was used.
  • the voltage signal can be reduced to 5 V or less.
  • the dielectric contains the group Ia element, the Mg element, or the Ca element
  • the heat treatment for crystallization can be performed at a low temperature.
  • the dielectric can be formed without reacting between the dielectric and the electrode in contact with the dielectric, and a dielectric element that functions properly can be obtained.
  • the dielectric substance has the chemical structural formula (AO) 2 + (B y —) C y 0 3 y + 1 ) 2 — (where A is T l, H g, P b, B i, or R is a rare earth element, B is Bi, Pb, Ca, Sr, or Ba, and C is Ti, Nb, Ta, W, Mo, Fe, C o, C r, was or is Z r if Mote crystal structure), was or chemical structural formula (P bn a x) (Z r, -.
  • A is T l, H g, P b, B i, or R is a rare earth element
  • B is Bi, Pb, Ca, Sr, or Ba
  • C is Ti, Nb, Ta, W, Mo, Fe, C o, C r, was or is Z r if Mote crystal structure
  • P bn a x Z r, -.
  • This ferroelectric element has a high remanent polarization Pr value, has a low coercive electric field Ec value, and is a soundly functioning ferroelectric element in which film fatigue is suppressed.
  • dielectric chemical structural formulas (B a, - x S r x) T i 0 3 (. Provided that 0 ⁇ x ⁇ 1) If Mote the crystal structure of the dielectric is a high dielectric Therefore, a high-strength dielectric element can be obtained.
  • This high ferroelectric element has a large capacitance, maintains a high remanent polarization Pr value, has a good withstand voltage characteristic, and functions satisfactorily.
  • a dielectric containing an alkali metal or an alkaline earth metal has a low crystallization temperature, and is 250 ° C. or more and 500 ° C. or more. Since the film can be formed at the following temperature, the reaction between the dielectric and the electrode in contact with the dielectric can be suppressed. Therefore, a sound dielectric can be formed, and a dielectric element that functions soundly can be obtained.
  • the dielectric is a ferroelectric
  • the heat treatment for crystallizing the amorphous ferroelectric can be performed at 350 ° C. or more and 500 ° C. or less. Within these temperature ranges, the reaction between the ferroelectric and the electrode in contact with the ferroelectric can be suppressed. Therefore, a healthy ferroelectric material can be formed, a high remanent polarization Pr value is maintained, a low coercive electric field Ec value is achieved, and a soundly functioning dielectric element in which film fatigue is suppressed is provided. Can be obtained.
  • the dielectric is a high dielectric
  • the heat treatment for crystallizing the amorphous high dielectric substance can be performed at 250 ° C. or higher and 450 ° C. or lower. Within these temperature ranges, the reaction between the high dielectric and the electrode in contact with the high dielectric can be suppressed. Therefore, it is possible to form a sound high-dielectric material, obtain a dielectric element that has a large capacitance, maintains a high remanent polarization Pr value, and has good withstand voltage characteristics and a sound function. It can be.
  • the semiconductor device has a dielectric element containing a group Ia element, a Mg element, or a Ca element as a dielectric
  • the heat treatment can be performed at a low temperature.
  • the dielectric can be formed without reacting with the contacting electrode, and a healthy dielectric element can be obtained. If such a dielectric element is used for a semiconductor device such as a Fe RAM or a DRAM, it is possible to increase the capacity and operate at a lower voltage.
  • the dielectric containing the Ia group element, the Mg element, or the Ca element of the present invention is formed between the upper electrode and the lower electrode to form a ferroelectric element such as FeRAM or the like.
  • a ferroelectric element such as FeRAM or the like.
  • High dielectric elements such as DRAM can be manufactured.

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Abstract

An addition of elements Li, Na and K in Ia group to a ferroelectric facilitates a liquid phase generation involving an added alkali metal and the ferroelectric. This liquid phase generation occurs at temperatures lower than a solid phase reaction temperature to crystallize the ferroelectric through a liquid phase reaction. Therefore, it is possible to crystallize the ferroelectric without causing a reaction between the ferroelectric and an electrode even when a heat treatment is carried out at temperatures not lower than 350 °C and not higher than 500 °C, lower than a conventional temperature. An addition of elements Mg and Ca, alkaline earth metals, to a ferroelectric can also lower a crystallization temperature as in the case of Ia group. An addition of elements Li, Na, K, Mg and Ca to a high dielectric can lower, as with a ferroelectric, a crystallization temperature to not lower than 250 °C and not higher than 450 °C. A ferroelectric element or a high dielectric element can be produced by forming the ferroelectric or high dielectric in a film form between upper and lower electrodes.

Description

明 細 書  Specification
誘電体素子およびその製造方法並びに半導体装置 技術分野  TECHNICAL FIELD The present invention relates to a dielectric element, a method of manufacturing the same, and a semiconductor device.
本発明は、 F e RAMなどの強誘電体素子ま たは D RAMなどの高誘 電体素子と して用い られる、 誘電体素子およびその製造方法並びに半導 体装置に関する。 背景技術  The present invention relates to a dielectric element used as a ferroelectric element such as a FeRAM or a highly dielectric element such as a DRAM, a method for manufacturing the same, and a semiconductor device. Background art
不揮発性メモリ 一である F e R AM (Ferroelectric Random Access Memory)は、 キャパシター材料に強誘電体を用いている。 F e R AMは、 強誘電体が極性の異なる 2つの残留分極をもつこと を利用 して、 電源 O F Fでも記憶内容を保持できる。 情報を書き換えるスピー ドも / s 以 下で、 非常に高速であ り 、 次世代の理想的メモリ 一と して注目されてい る。 そ して、 記憶容量を大容量化するために、 回路構成素子の微細化が 要求され、 キャパシターの微細化が行われている。 キャパシターを微細 化するためには、 誘電体材料の薄膜化、 よ り残留分極の大きな強誘電体 の利用、 強誘電体とその上下の電極からなる素子の構造の平坦化および 立体化などの方策がある。  One type of non-volatile memory, Ferroelectric Random Access Memory (FRAM), uses a ferroelectric material for the capacitor material. FeRAM uses the fact that ferroelectrics have two remanent polarizations with different polarities, so that the stored contents can be retained even with a power supply OFF. The speed at which information is rewritten is less than / s, very high speed, and is attracting attention as an ideal next-generation memory. In order to increase storage capacity, miniaturization of circuit components is required, and capacitors are being miniaturized. In order to reduce the size of capacitors, measures such as reducing the thickness of dielectric materials, using ferroelectrics with greater remanent polarization, and flattening and three-dimensionalizing the structure of the element consisting of the ferroelectric and the electrodes above and below it There is.
特開平 5— 190797号公報は、 強誘電体にチタ ン酸ジルコ ン酸船（P Z T) を用いて、 強誘電体と金属電極との反応性を抑制するために、 強誘電体 の周 り に拡散防止層と して窒化ケィ素膜 （ S i N X ) を形成した半導体 記憶装置を記載する。  Japanese Patent Application Laid-Open No. 5-190797 discloses that a zirconate titanate ship (PZT) is used as a ferroelectric material to suppress the reactivity between the ferroelectric material and a metal electrode. A semiconductor memory device in which a silicon nitride film (SiNX) is formed as a diffusion prevention layer will be described.
半導体メモリ ーと しては、 データ の高速書き換えに特徴がある DRAM ( Dynami c Random Access Memory ) 力 ある。 この D R AMは、 高密度， 高集積技術の進歩に伴い、 1 6 M， 6 4 Mビッ トの大容量化時代を迎え ている。 このために、 回路構成素子の微細化が要求され、 特に情報を蓄 積するコ ンデンサ一の微細化が行われている。 コ ンデンサ一の微細化の 手段と しては、 誘電体材料の薄膜化， 誘電率の高い材料の選択， 上下電 極と誘電体からなる構造の平坦化から立体化などが挙げられる。 誘電率 の高い材料すなわち高誘電体と して、 結晶構造がベロブスカイ ト構造の 単一格子である B S T ( (B a / S r ) T i 03 ) があ り 、 S i 02/ S i 3 N4に比べて大きな誘電率 （ ε ) を有する ことが知られている。 ま た、 B S Τを用いたメモリ 一では、 高集積化に伴い、 低い電圧で動 作する ことが目標と されている。 このためには、 メモリ 一に用いられる 誘電体素子のキャパシタ ンスの容量を大き く する必要があ り 、 よ リ高い 誘電率の誘電体の利用、 電極の面積の拡大、 高誘電体の薄膜化が検討さ れている。 高誘電体を使用する例が、 イ ンターナショナル · エレク ト口 ン ' デバイ ス ' ミ ィ ーティ ング ' テクニカル ' ダイ ジェス ト 1 9 9 1年 8 2 3頁 （ IEDM Tech. Dig. :823, 1961 ) に報告されている。 発明の開示 As a semiconductor memory, there is a DRAM (Dynamic Random Access Memory) which is characterized by high-speed rewriting of data. This DRAM is high density, With the advance of highly integrated technology, the era of large capacity of 16M and 64M bits is approaching. For this reason, miniaturization of circuit components is required, and in particular, capacitors for storing information are being miniaturized. Means for miniaturizing the capacitor include thinning the dielectric material, selecting a material with a high dielectric constant, and flattening the structure consisting of the upper and lower electrodes and the dielectric to make it three-dimensional. And a high dielectric constant material or a high dielectric, BST crystal structure is a single grating Berobusukai preparative structure ((B a / S r) T i 0 3) there Ri, S i 0 2 / S i It is known to have a large dielectric constant as compared with 3 N 4 (ε). In addition, in memories using BS II, the goal is to operate at a low voltage with high integration. For this purpose, it is necessary to increase the capacitance of the dielectric element used in the memory, and use a dielectric with a higher dielectric constant, increase the electrode area, and reduce the thickness of the high dielectric. Are being considered. An example of using a high dielectric material is International Electronic Device, 'Device', 'Meeting', 'Technical' Digest, 1991, pp. 823 (IEDM Tech. Dig.:823, 1961) ). Disclosure of the invention
しかしながら、 上述したメモリ 一に用いられる従来の誘電体素子には 電極と誘電体薄膜との間に低誘電率層や粒成長した巨大結晶ができる こ とがあった。 低誘電率層ができると、 素子全体の静電容量が小さ く な リ 残留分極 （ P r ) が小さ く なつて、 誘電体素子と しての機能を持たな く なる。 巨大結晶ができると、 結晶の粒界にリ ーク電流が流れて、 誘電体 素子の耐電圧特性が低下するので、 誘電体素子と して動作させるのに十 分な電圧を印加できない。 特に、 電極が金属である場合は、 誘電体薄膜 と金属電極との界面で、 元素の拡散反応によって遷移層ができる。 遷移 層は、 残留分極 （ P r ) の低下， 抗電界 （ E c ) の増大、 および膜疲労 などを起こ し、 誘電体素子と しての機能が低下する問題がある。 However, in the conventional dielectric element used in the above-mentioned memory, a low dielectric constant layer or a giant crystal grown by grain growth may be formed between the electrode and the dielectric thin film. If a low dielectric constant layer is formed, the remanent polarization (P r) of the device as a whole becomes smaller, and the function as a dielectric device is lost. When a giant crystal is formed, a leak current flows through the grain boundaries of the crystal, and the withstand voltage characteristics of the dielectric element decrease, so that a voltage sufficient to operate as a dielectric element cannot be applied. In particular, when the electrode is made of metal, a transition layer is formed at the interface between the dielectric thin film and the metal electrode by a diffusion reaction of elements. transition The layer has the problem that the remanent polarization (P r) decreases, the coercive electric field (E c) increases, the film fatigue occurs, and the function as a dielectric element deteriorates.
本発明の目的は、 大きな残留分極を維持し、 健全に機能する誘電体素 子およびその製造方法並びに半導体装置を提供する ことにある。  An object of the present invention is to provide a dielectric element which maintains a large remanent polarization and functions soundly, a method of manufacturing the same, and a semiconductor device.
上記目的を達成する本発明の特徴は、 誘電体が、 I a族元素， M g元 素、 ま たは C a元素を含むこ と にある。 この特徴によれば、 誘電体がこ れらのアルカ リ 金属ま たはアルカ リ 土類金属を含むので、 誘電体の結晶 化温度を低く する こ とができる。 したがって、 低い温度で結晶化のため の熱処理を行う ことができるので、 このと きに誘電体と誘電体に接する 電極とが反応する こ となく 、 誘電体を形成することができ、 健全に機能 する誘電体素子を得る ことができる。 l a族元素は L i ， N a， Kであ るのが好ま しい。  A feature of the present invention that achieves the above object is that the dielectric contains a Group Ia element, a Mg element, or a Ca element. According to this feature, the crystallization temperature of the dielectric can be lowered because the dielectric contains these alkali metals or alkaline earth metals. Therefore, heat treatment for crystallization can be performed at a low temperature, and at this time, the dielectric can be formed without reacting with the dielectric and the electrode in contact with the dielectric, and a sound function can be achieved. Thus, a dielectric element can be obtained. Preferably, the group la elements are Li, Na, and K.
誘電体は、 誘電体 1 0 0重量部に対して、 0. 5 重量部以上 1 0重量 部以下の割合で、 I a族元素， M g元素、 ま たは C a元素を含むのが好 ま しい。  The dielectric preferably contains a Group Ia element, a Mg element, or a Ca element in a ratio of 0.5 part by weight or more and 10 parts by weight or less with respect to 100 parts by weight of the dielectric. Good.
ま た、 誘電体が、 化学構造式 （ A O ^ B y^ C y O sy十，）2 (但し、In addition, the dielectric substance has a chemical structural formula (AO ^ By ^ CyOsy10,) 2 (however,
Aは T 1 ， ' H g， P b， B i 、 ま たは希土類元素であ り 、 Bは B i ， P b， C a， S r、 ま たは B aであ り 、 かつ、 Cは T i ， N b， T a， W， M o， F e， C o， C r 、 ま たは Z rである。 ） の結晶構造をもて ば、 ま たは、 化学構造式 （ P b ,— x A x ) ( Z r — y T i y ) 03 (但し、 Aは L a， B a、 ま たは N bであ り 、 0 ≤ x≤ 0. 2 、 かつ、 0 < y≤ l で ある。 ） の結晶構造をもてば、 誘電体は強誘電体であ り 、 強誘電体素子 が得られる。 この強誘電体素子は、 高い残留分極 P r値を維持し、 低い 抗電界 E c値をもち、 かつ、 膜疲労が抑制された、 健全に機能する強誘 電体素子である。 こ こで、 化学構造式 （ A 0 ) 2十（ B y— C y 03y + 1)2—は （ A 2 02 ) 2 + ( B y- , C y O 3 y + i) 2" の場合を含んで表している。 特に、 A元素に B i を用いた場合に （ A 2 02 ) 2 + ( B C y 03y + 1)2— とな り 、 例えば A = B i ， B = S r , C = T a , y = 2 の場合の上記化学構造式（B i O) 2 + ( S r T a 2 07 ) 2' は （ B i s O j s+ C S r i T a s O? ) 2— であるため、 S r B i 2 T a 2 0 と等価である。 ま た、 A元素に T l ， H g を用いた 場合には（A
Figure imgf000006_0001
C y O sy+!) 2—と（A2 02) 2+ ( B y— C y O +J 2— の両方の結晶構造とな り 、 こ こでは （ A 0 ) 2 + ( B y—： C y 03y + 1)2— でそ の両方を表している。 A is T 1, 'H g, P b, B i, or a rare earth element, B is B i, P b, C a, S r, or B a, and C Is Ti, Nb, Ta, W, Mo, Fe, Co, Cr, or Zr. If Mote crystal structure), was or chemical structural formula (P b, - x A x ) (Z r - y T i y) 0 3 ( where, A is L a, B a, or the With Nb, 0 ≤ x ≤ 0.2 and 0 <y ≤ l), the dielectric is a ferroelectric, and a ferroelectric element can be obtained. . This ferroelectric element has a high remanent polarization Pr value, has a low coercive electric field Ec value, and is a soundly functioning ferroelectric element in which film fatigue is suppressed. In here, the chemical structural formula (A 0) 2 Ten (B y - C y 0 3y + 1) 2 - is (A 2 0 2) 2 + (B y -, C y O 3 y + i) 2 " In particular, when B i is used as the A element, (A 2 0 2 ) 2 + (BC y 0 3y + 1 ) 2 — is obtained, for example, A = B i, B = S r, C = T a, y = 2, the above chemical structural formula (B i O) 2 + (S r T a 2 0 7 ) 2 ′ is (B is O js + CS ri T as O? ) 2 -. because a is, S r B i 2 is T a 2 0 equivalent or, in the case of using the T l, H g to the element a (a
Figure imgf000006_0001
The crystal structure of both C y O sy +!) 2 — and (A 2 0 2 ) 2+ (B y—C y O + J 2 — is obtained, and here, (A 0) 2 + (B y — : C y 0 3y + 1 ) 2 — represents both.
ま た、 誘電体が、 化学構造式 （ B a — x S r J T i 03 (但し、 0 ≤ x ≤ 1 である。 ） の結晶構造をもてば、 誘電体は高誘電体であ り 、 高強誘 電体素子が得られる。 この高強誘電体素子は、 静電容量が大き く 、 高い 残留分極 P r値を維持し、 かつ、 耐電圧特性がよい、 健全に機能する高 強誘電体素子である。 Also, dielectric, chemical structural formulas (B a -. X S r JT i 0 3 ( however, if Mote the crystal structure of a 0 ≤ x ≤ 1), dielectric Ri high dielectric der This ferroelectric element has a large capacitance, maintains a high remanent polarization Pr value, has a good withstand voltage characteristic, and has a soundly functioning high ferroelectric element. Element.
本発明の他の特徴は、 I a族元素， M g元素、 ま たは C a元素を含む 誘電体の形成を 2 5 0 °C以上 5 0 0 °C以下で行う こと にある。 この特徴 によれば、 これらのアルカ リ 金属ま たはアルカ リ 土類金属が含まれてい る誘電体は結晶化温度が低く 、 2 5 0 °C以上 5 0 0 °C以下の温度で成膜 を行う ことができるので、 誘電体と誘電体に接する電極との反応を抑制 する ことができる。 したがって、 健全な誘電体を形成する ことができ、 健全に機能する誘電体素子を得る こ とができる。  Another feature of the present invention is that a dielectric containing a Group Ia element, a Mg element, or a Ca element is formed at 250 ° C. or more and 500 ° C. or less. According to this feature, the dielectric containing these alkali metals or alkaline earth metals has a low crystallization temperature and is formed at a temperature of 250 ° C. or more and 500 ° C. or less. Therefore, the reaction between the dielectric and the electrode in contact with the dielectric can be suppressed. Therefore, a sound dielectric can be formed, and a dielectric element that functions soundly can be obtained.
ま た、 誘電体の形成を行う に当たって、 I a族元素， M g元素、 ま た は C a元素を含む非晶質な誘電体を設けるステップと、 非晶質な誘電体 を結晶化する熱処理を 2 5 0 °C以上 5 0 0 °C以下で行う ステップとが含 まれてもよい。 誘電体が強誘電体である場合は、 3 5 0 °Cよ り低い温度で、 I a族元 素， M g元素、 ま たは C a元素を含む非晶質な強誘電体を設ける ことが でき、 非晶質な強誘電体を結晶化する熱処理は 3 5 0 °C以上 5 0 0 °C以 下で行う ことができる。 これらの温度範囲であれば、 強誘電体と強誘電 体に接する電極との反応を抑制する ことができる。 したがって、 健全な 強誘電体を形成する こ とができ、 健全に機能する誘電体素子を得ること ができる。 In forming the dielectric, a step of providing an amorphous dielectric containing a Group Ia element, a Mg element, or a Ca element is performed, and a heat treatment for crystallizing the amorphous dielectric is performed. Performing at a temperature of 250 ° C. or higher and 500 ° C. or lower may be included. If the dielectric is a ferroelectric, provide an amorphous ferroelectric containing Group Ia, Mg, or Ca elements at a temperature lower than 350 ° C. The heat treatment for crystallizing the amorphous ferroelectric can be performed at 350 ° C. or more and 500 ° C. or less. Within these temperature ranges, the reaction between the ferroelectric and the electrode in contact with the ferroelectric can be suppressed. Therefore, a sound ferroelectric can be formed, and a sound dielectric element can be obtained.
誘電体が高誘電体である場合は、 2 5 0 °Cよ り低い温度で、 I a族元 素， M g元素、 ま たは C a元素を含む非晶質な高誘電体を設ける ことが でき、 非晶質な高誘電体を結晶化する熱処理は 2 5 0 °C以上 4 5 0 °C以 下で行う ことができる。 これらの温度範囲であれば、 高誘電体と高誘電 体に接する電極との反応を抑制する ことができる。 したがって、 健全な 高誘電体を形成する ことができ、 健全に機能する誘電体素子を得る こと ができる。  If the dielectric is a high dielectric, provide an amorphous high dielectric containing Group Ia, Mg, or Ca elements at a temperature lower than 250 ° C. The heat treatment for crystallizing the amorphous high dielectric substance can be performed at 250 ° C. or higher and 450 ° C. or lower. Within these temperature ranges, the reaction between the high dielectric and the electrode in contact with the high dielectric can be suppressed. Therefore, a sound high dielectric can be formed, and a dielectric element that functions soundly can be obtained.
ま た、 誘電体の形成を行う に当たって、 誘電体の材料に I a族元素， M g元素、 ま たは C a元素を添加するステップが含まれてもよい。 ま た、 本発明の特徴は、 半導体装置が、 誘電体が I a族元素， M g元 素、 ま たは C a元素を含む誘電体素子を有する こと にある。 この特徴に よれば、 誘電体がこれらのアルカ リ 金属ま たはアルカ リ 土類金属を含む ので、 誘電体の結晶化温度を低く する こ とができる。 したがって、 低い 温度で結晶化のための熱処理を行う ことができるので、 このと きに誘電 体と誘電体に接する電極とが反応する ことなく 、 誘電体を形成する こと ができ、 健全に機能する誘電体素子を得る ことができる。 F e R A Mや D R A Mなどの半導体装置について このよう な誘電体素子を用いれば、 大容量化およびよ り低い電圧での動作が可能になる。 図面の簡単な説明 In forming the dielectric, a step of adding a group Ia element, an Mg element, or a Ca element to the dielectric material may be included. Further, a feature of the present invention is that the semiconductor device has a dielectric element whose dielectric includes a Group Ia element, a Mg element, or a Ca element. According to this feature, the crystallization temperature of the dielectric can be lowered because the dielectric contains these alkali metals or alkaline earth metals. Therefore, a heat treatment for crystallization can be performed at a low temperature, and the dielectric can be formed without reacting with the dielectric and the electrode in contact with the dielectric at this time, and can function satisfactorily. A dielectric element can be obtained. Semiconductor devices such as Fe RAM and DRAM If such a dielectric element is used, it is possible to increase the capacity and operate at a lower voltage. BRIEF DESCRIPTION OF THE FIGURES
第 1 図は、 S r B i 2 T a209 1 0 0重量部に対して 5重量部の K を添加し、 4 5 0 °Cで作製した場合の S r B i 2 T a20: 層の S Ε Μ写 真である。 Figure 1 is, S r B i 2 T a 2 0 9 1 0 0 a K of 5 parts by weight was added with respect to the weight parts, 4 5 0 when manufactured in ° C S r B i 2 T a 2 0 : S Ε 層 photo of layer.
第 2図は、 S r B i 2 T a209 1 0 0重量部に対して 5重量部の Κ を添加し、 4 5 0 °Cで作製した場合の S r B i 2 T a20 層の電圧と分 極の関係を示す図である。 FIG. 2, S r B i 2 T a 2 0 9 1 0 0 of 5 parts by weight Κ was added to parts by weight, 4 5 0 when manufactured in ° C S r B i 2 T a 2 FIG. 4 is a diagram illustrating a relationship between a voltage of a zero layer and a polarization.
第 3図は、 本発明の強誘電体素子の断面図である。  FIG. 3 is a sectional view of the ferroelectric element of the present invention.
第 4図は、 本発明の高誘電体素子の断面図である。  FIG. 4 is a sectional view of the high dielectric element of the present invention.
第 5図は、 K元素を含む （ B i 0)2 S r T a 207 )2 強誘電体素子 の熱処理温度と P r特性との関係を示す。 Figure 5 shows the relationship between the heat treatment temperature and the P r properties of (B i 0) 2 S r T a 2 0 7) 2 ferroelectric element including K elements.
第 6図は、 K元素を含む （ B a 0. 5 S r 0. 6) T i 03高誘電体素子の熱 処理温度と ε特性の関係を示す図である。 6 is a diagram showing the relationship between (B a 0. 5 S r 0. 6) T i 0 3 heat treatment temperature and the ε characteristics of the high dielectric element containing K elements.
第 7図は、 本発明の強誘電体素子を用いた半導体装置の断面図である 第 8図は、 各単一元素の添加量と結晶化温度との関係を示す図である 第 9図は、 L i ， N a , Κ， Μ g , C aの総添加量と結晶化温度との 関係を示ず図である。  FIG. 7 is a cross-sectional view of a semiconductor device using the ferroelectric element of the present invention. FIG. 8 is a diagram showing the relationship between the amount of each single element added and the crystallization temperature. , L i, N a, Κ, a g, and the total amount of C a and the crystallization temperature are not shown.
第 1 0図は、 第 1 の実施例の強誘電体素子の製造方法を示す流れ図で ある。  FIG. 10 is a flowchart showing a method of manufacturing the ferroelectric element of the first embodiment.
第 1 1 図は、 第 5の実施例の非接触型メモリ一カー ドを示す図である 発明を実施するための最良の形態  FIG. 11 is a diagram showing a non-contact type memory card according to a fifth embodiment.
本発明の発明者らは、 誘電体素子の電極と誘電体薄膜との間に、 低誘 電率層や粒成長した巨大結晶ができる原因が、 高温の熱処理にあること を見出した。 従来は、 高温の熱処理による誘電体薄膜とその上下に設け られた電極との反応については考慮されていなかった。 The inventors of the present invention have found that a low-permittivity layer or a giant crystal grown by grain formation between an electrode of a dielectric element and a dielectric thin film is caused by a high-temperature heat treatment. Conventionally, a dielectric thin film formed by high-temperature heat treatment and No consideration was given to the reaction with the electrodes provided.
誘電体素子を形成する際に、 熱処理によって、 非結晶質な誘電体薄膜 を結晶化させる こ とが行われる。 従来は、 非結晶質な誘電体薄膜の結晶 化を、 固相反応によって行っていたために、 7 0 0 °C以上の高温の熱処 理が必要であっ た。 ま た、 結晶化させながら誘電体薄膜を成膜する場合 にも、 7 0 0 °C以上の高温の熱処理が必要であった。  When forming a dielectric element, a non-crystalline dielectric thin film is crystallized by heat treatment. Conventionally, the crystallization of an amorphous dielectric thin film was performed by a solid-phase reaction, so that a high-temperature heat treatment of 700 ° C. or more was required. Also, when forming a dielectric thin film while crystallizing, heat treatment at a high temperature of 700 ° C. or more was required.
しかし、 このよ う な高温では、 誘電体薄膜とそれに接して設けられた 電極とが反応して、 電極と誘電体薄膜との間に、 上述したよ う な素子機 能の障害となる層や結晶ができて しま う 。  However, at such a high temperature, the dielectric thin film reacts with the electrode provided in contact with the dielectric thin film, and a layer or the like that hinders the device function as described above is placed between the electrode and the dielectric thin film. Crystals are formed.
発明者らは、 誘電体にアルカ リ 金属ま たはアルカ リ 土類金属を添加す る ことで、 誘電体の結晶化温度を低温化し、 強誘電体と電極と を反応さ せないで強誘電体を結晶化できる こと を見出した。 誘電体の結晶化温度 を低温化できる原理を以下に説明する。  By adding an alkali metal or an alkaline earth metal to the dielectric, the inventors lower the crystallization temperature of the dielectric, and make the ferroelectric without reacting the ferroelectric with the electrode. Found that the body can be crystallized. The principle by which the crystallization temperature of the dielectric can be reduced will be described below.
強誘電体である （ A O ) 2十 （ B y— 1 C y 0 3 y + 1)2— (但し、 Aは T l ， H g， P b， B i 、 ま たは希土類元素であ り 、 Bは B i ， P b， C a , S r 、 ま たは B aであ り 、 かつ、 Cは T i ， N b， T a， W， M o， F e， C o， C r 、 ま たは Z r である。 ：） 、 ま たは （ P b ,— XAX ) ( Z r :_y T i y) 03 (但し、 Aは L a， B a、 ま たは N b であ り 、 0 ≤ x ≤ 0 . 2 、 かつ、 0く y ≤ l である。 ） に、 I a族の L i 元素， N a元素， K元素を添加すると、 添加されたアルカ リ 金属と強誘電体と の液相生成が容易になる。 この液相生成は固相反応の温度よ り も低い温 度で起こ り 、 液相反応によって強誘電体の結晶化が起こる。 すなわち、 強誘電体の結晶化温度は 3 5 0 °C以上 5 0 0 °C以下の範囲になる。 した がって、 3 5 0 °C以上 5 0 0 °C以下の従来よ り低い温度で熱処理を行つ ても、 強誘電体と電極とが反応する ことな く 、 強誘電体を結晶化させる ことができる。 Strength is a dielectric (AO) 2 Ten (B y - 1 C y 0 3 y + 1) 2 - ( where, A is T l, Ri H g, P b, B i , or rare earth elements Der , B is B i, P b, C a, S r, or B a, and C is T i, N b, T a, W, M o, F e, C o, C r , Or Z r :) or (P b, — X A X ) (Z r: _ y T i y ) 0 3 (where A is La, B a, or N b, 0 ≤ x ≤ 0.2, and 0 ≤ y ≤ l). When the Li, Na, and K elements of Group Ia are added, the added alkali The liquid phase between the metal and the ferroelectric is easily generated. This liquid phase generation occurs at a temperature lower than the temperature of the solid phase reaction, and crystallization of the ferroelectric occurs by the liquid phase reaction. That is, the crystallization temperature of the ferroelectric is in the range of 350 ° C. or more and 500 ° C. or less. Therefore, even if the heat treatment is performed at a temperature lower than the conventional temperature of 350 ° C. or more and 500 ° C. or less, the ferroelectric material is crystallized without reacting the ferroelectric material and the electrode. Let be able to.
ま た、 アルカ リ 土類金属の M g元素， C a元素を強誘電体に添加して も、 I a族の場合と同様に液相を利用 した結晶化によって、 結晶化温度 を低温にする こ とができる。  In addition, even if the Mg and Ca elements of alkaline earth metals are added to the ferroelectric, the crystallization temperature is lowered by crystallization using the liquid phase, as in the case of Group Ia. be able to.
高誘電体である （ B a , x S r x) T i 03 (但し、 0 ≤ χ≤ 1 である。 ） に、 L i 元素， N a元素， K元素， M g元素および C a元素を添加して も、 強誘電体の場合と同様に液相を利用 した結晶化によって、 結晶化温 度を 2 5 0 °C以上 4 5 0 °C以下に低く する ことができる。 A high dielectric (B a, x S r x ) T i 0 3 ( where, 0 ≤ χ≤ 1.) To, L i element, N a elements, K element, M g elements and C a element Even when chromium is added, the crystallization temperature can be lowered to 250 ° C. or more and 450 ° C. or less by crystallization using a liquid phase as in the case of ferroelectrics.
L i 元素， N a元素， K元素， M g元素および C a元素を単独に用い ても、 組み合わせても よいが、 合計の添加量は、 強誘電体 1 0 0重量部 に対して 0. 5 重量部以上 1 0重量部以下の割合であるのが好ま しい。 以下に、 従来よ リ も低温で誘電体の結晶化を行って誘電体素子を製造 する こと を具体的に説明する。  The Li element, Na element, K element, Mg element, and Ca element may be used alone or in combination, but the total amount added is 100 parts by weight of the ferroelectric. It is preferable that the ratio be 5 parts by weight or more and 10 parts by weight or less. Hereinafter, the method of manufacturing a dielectric element by crystallizing a dielectric at a lower temperature than in the past will be specifically described.
〔実施例 1 〕  (Example 1)
本発明の第 1 の実施例である強誘電体素子を説明する。 第 3図に本実 施例の強誘電体素子の断面模式図を示す。 本実施例の強誘電体素子に用 いられている強誘電体薄膜 3 2は、 K元素を含み、 化学構造式  A ferroelectric element according to a first embodiment of the present invention will be described. FIG. 3 shows a schematic cross-sectional view of the ferroelectric element of this example. The ferroelectric thin film 32 used in the ferroelectric element of the present embodiment contains a K element and has a chemical structural formula
(B i 0)2+ ( S r T a207) 2—の結晶構造をもつものである。 強誘電体薄 膜 3 2は上部電極 3 1 と下部電極 3 2に挟まれてお り 、 下地基板 3 4上 に形成されている。 It has a crystal structure of (B i 0) 2+ (S r T a 2 0 7 ) 2 —. The ferroelectric thin film 32 is sandwiched between the upper electrode 31 and the lower electrode 32 and is formed on the base substrate 34.
本実施例の強誘電体素子の製造方法を第 1 0図を用いて説明する。 The manufacturing method of the ferroelectric element of this embodiment will be described with reference to FIG.
( 1 ) はじめに、 下地基板 3 4を用意する。 下地基板 3 4は、 表面に S i 02 層を有する S i ウェハ上に、 ノ リ ャ層となる厚み 2 0 0人の T i N層を形成したものである。 (1) First, a base substrate 34 is prepared. Base substrate 3 4 on S i wafer having a S i 0 2 layer on the surface, and forming a T i N layer 2 0 0 people thickness becomes Roh Li catcher layer.
( 2 ) 下地基板 3 4上に下部電極 3 3 を作る。 下地基板 3 4上にスパッ タ リ ング法で 1 0 0 0人の厚さの P t薄膜を形成して、 下部電極 3 3 と する。 (2) The lower electrode 33 is formed on the base substrate 34. Spatter on base substrate 34 A lower electrode 33 is formed by forming a Pt thin film having a thickness of 1000 by a tapping method.
( 3 ) 下部電極 3 3上に、 K元素を含む （ B i O)2 + ( S r T a207)2一 の強誘電体薄膜 3 2 をスパッタ リ ング法で作る。 スパッタ リ ング法では、 S r B i 2 T a209 に K2 C 03 を添加したタ一ゲッ トを用いる。 雰囲気 ガスは酸素とアルゴンの 1 ： 1混合ガス、 成膜圧力は 2 P a , R Fパヮ 一は 2 0 0 Wと し、 下地基板 3 4の温度を 3 5 0 °Cよ り も低く して強誘 電体薄膜 3 2 を 2 5 0 n mの厚さ まで成膜する。 タ一ゲッ ト中の (3) on the lower electrode 3 3, making including K elements of (B i O) 2 + ( S r T a 2 0 7) 2 one ferroelectric thin film 3 2 by the sputtering-ring method. The sputtering-ring method, using a data one Getting bets addition of S r B i 2 T a 2 0 9 to K 2 C 0 3. Atmosphere The gas is a 1: 1 mixed gas of oxygen and argon, the deposition pressure is 2 Pa, the RF power is 200 W, and the temperature of the base substrate 34 is lower than 350 ° C. A strong dielectric thin film 32 is formed to a thickness of 250 nm. On target
S r B i2 T a209 と K2 C 03の割合は、 1 0 0重量部の S rB i2 Ta209 に対して K元素が 5重量部となるよ う な割合にする。 S ratio of r B i 2 T a 2 0 9 and K 2 C 0 3 is 1 0 0 percentage Do Let 's K elements against S rB i 2 Ta 2 0 9 becomes 5 parts by weight of parts by weight I do.
下地基板 3 の温度を結晶化温度よ り も低く して成膜したので、 こ こ で成膜されたのは、 K元素を含む （ B i O)2 + ( S r T a207)2— の強誘 電体薄膜 3 2で、 非結晶質な薄膜である。 ま た、 下地基板 3 の温度がSince the temperature of the starting substrate 3 was formed with lower Ri by the crystallization temperature, were deposited in here includes a K element (B i O) 2 + ( S r T a 2 0 7) 2 — A strong dielectric thin film of 32, which is an amorphous thin film. Also, the temperature of the underlying substrate 3
3 5 0 °Cよ り低いので、 強誘電体薄膜 3 2と下地電極 3 3 と反応する こ とな く 、 成膜する こ とができた。 Since the temperature was lower than 350 ° C., the film could be formed without reacting with the ferroelectric thin film 32 and the base electrode 33.
( ) 次に、 熱処理を行って非結晶質な強誘電体薄膜 3 2 を結晶化させ る。 熱処理は、 下地基板 3 4の温度を、 強誘電体薄膜 3 2の結晶化温度 である 5 0 0 °Cまで上げて、 l atm の空気中ま たは酸素中で 1 0〜 1 5 分間行う 。  () Next, heat treatment is performed to crystallize the amorphous ferroelectric thin film 32. The heat treatment is performed by raising the temperature of the base substrate 34 to 500 ° C., which is the crystallization temperature of the ferroelectric thin film 32, in air or oxygen at l atm for 10 to 15 minutes. .
( 5 ) 最後に、 結晶化した強誘電体薄膜 3 2の上に、 上部電極 3 1 を作 る。 強誘電体薄膜 3 2上にスパッタ リ ング法で 1 0 0 0人の厚さの P t 薄膜を形成して、 上部電極 3 1 とする。  (5) Finally, an upper electrode 31 is formed on the crystallized ferroelectric thin film 32. A Pt thin film having a thickness of 1000 is formed on the ferroelectric thin film 32 by a sputtering method to form an upper electrode 31.
以上によ り 、 強誘電体素子を作成した。 本実施例では （ 4 ) で結晶化 のための熱処理を行い、 次いで （ 5 ) で上部電極 3 1 を作ったが、 上部 電極 3 1 を作ってから結晶化のための熱処理を行っても よい。 ( 4 ) の熱処理後の強誘電体薄膜 3 2 を S E M観察したと ころ、 第 1 図の S E M写真に示されるよ う に、 強誘電体薄膜 3 2は、 粒成長した巨 大結晶は見られず、 粒径 1 0 0〜 1 0 0 0人の微細な強誘電体の結晶で 膜が構成されていた。 この強誘電体薄膜 3 2 を I C P分析した結果、 遷 移層や低誘電層を示すよ う な組成は検出されず、 強誘電体薄膜 3 2は、 1 0 0重量部の （ B i O)2 + ( S r T a2〇7)2 に対して 5. 0 重量部の K元素を含んでいた。 Thus, a ferroelectric element was created. In this embodiment, the heat treatment for crystallization is performed in (4), and then the upper electrode 31 is formed in (5). However, the heat treatment for crystallization may be performed after forming the upper electrode 31. . When the ferroelectric thin film 32 after the heat treatment of (4) was observed by SEM, as shown in the SEM photograph of FIG. 1, the ferroelectric thin film 32 did not show a large crystal with grain growth. The film was composed of fine ferroelectric crystals with a particle size of 100 to 100 persons. As a result of ICP analysis of the ferroelectric thin film 32, no composition indicating a transition layer or a low dielectric layer was detected, and the ferroelectric thin film 32 contained 100 parts by weight of (Bio). 2 + contained (S r T a 2 〇 7) K elements 5.0 parts by weight to 2.
本実施例の強誘電体素子の電圧と分極の関係を調べた結果を第 2図に 示す。 5 Vにおける 2 Ρ Γ = 1 4 μ〇Ζ。πι2， E c = 5 0 k VZcm の電 気特性を示した。 ま た、 電圧 3 Vの士反転による書き込み回数 1 012回 で特性劣化約 3 %と優れた強誘電体特性を示し、 K元素の添加による特 性低下は認め られなかった。 FIG. 2 shows the result of examining the relationship between the voltage and the polarization of the ferroelectric element of this example. 2 Ρ 5 at 5 V = 14 μ〇Ζ. It showed electrical characteristics of πι 2 , E c = 50 kVZcm. In addition, when the number of times of writing was 10 12 times due to the inversion of a voltage of 3 V, the characteristics deteriorated about 3%, indicating excellent ferroelectric characteristics, and no characteristic deterioration due to the addition of K element was observed.
従来は、 非結晶質な誘電体薄膜の結晶化を、 固相反応によ って行って いたために、 7 0 0 °C以上の高温の熱処理が必要であった。 しかし、 こ のよ う な高温では、 誘電体薄膜と上下の電極とが反応して、 電極と誘電 体薄膜との間に機能の障害となる層や結晶ができ、 耐電圧特性の低下， 残留分極 （ P r ) の低下， 抗電界 （ E c ) の増大、 および膜疲労が起こ つて、 強誘電体素子と して機能しないことがあった。  Conventionally, since a non-crystalline dielectric thin film was crystallized by a solid-phase reaction, a heat treatment at a high temperature of 700 ° C. or more was required. However, at such a high temperature, the dielectric thin film reacts with the upper and lower electrodes to form a layer or a crystal between the electrode and the dielectric thin film that hinders the function. The polarization (P r) decreased, the coercive electric field (E c) increased, and film fatigue occurred.
本実施例によれば、 強誘電体薄膜 3 2 に K元素が添加されているので、 アルカ リ 金属 （ K元素） と強誘電体との液相生成が容易になる。 この液 相生成は固相反応の温度よ り も低い温度で起こ リ 、 液相反応によ って強 誘電体薄膜 3 2の結晶化が行われるので、 強誘電体薄膜 3 2の結晶化温 度は 5 0 0 °Cに低く なる。 したがって、 低い温度で熱処理を行う こ とが できるので、 誘電体薄膜 3 2 と上下の電極とが反応する ことな く 、 強誘 電体薄膜 3 2 を結晶化させる こ とができ、 健全に機能する強誘電体素子 を作ることができる。 According to this embodiment, since the K element is added to the ferroelectric thin film 32, the liquid phase between the alkali metal (K element) and the ferroelectric is easily formed. This liquid phase generation occurs at a temperature lower than the temperature of the solid-phase reaction, and the crystallization of the ferroelectric thin film 32 is performed by the liquid-phase reaction. The temperature drops to 500 ° C. Therefore, since the heat treatment can be performed at a low temperature, the strong dielectric thin film 32 can be crystallized without reacting the dielectric thin film 32 with the upper and lower electrodes, and can function soundly. Ferroelectric element Can be made.
K元素を含む （ B i 0)2 + ( S r T a207)2_ 強誘電体素子の熱処理温 度と P r特性との関係を第 5図に示す。 第 5図の縦軸は、 5 0 CTCで作 製した強誘電体素子の 5 Vにおける P rで規格化した値 （ P r Z P r ( 5 0 0 ) ) である。 第 5図に示されているように、 3 5 0 °C以上の温度 範囲で P r / P r ( 5 0 0 ) > 0. 9 5 と非常に優れた特性を示した。 Including K elements (B i 0) show 2 + a relation between (S r T a 2 0 7 ) heat treatment temperature of 2 _ ferroelectric element and P r characteristic in FIG. 5. The vertical axis in FIG. 5 is the value (PrZPr (500)) normalized by Pr at 5 V of the ferroelectric element manufactured at 50 CTC. As shown in FIG. 5, Pr / Pr (500)> 0.95 exhibited extremely excellent characteristics in a temperature range of 350 ° C. or higher.
1 0 0重量部の （ B i O)2 + ( S r T a207)2— に対して、 K元素が 0. 5 重量部以上 1 0重量部以下となる範囲で K2 C 03を添加すると、 5 Vにおける 2 Ρ Γ > 1 0 μ ΟΖοιιι2， E c = 4 5〜 6 0 k VZcm の電 気特性を示した。 K2 C 03の代わりに L i 2 C 03 ， N a C 0 1 0 0 parts by weight of (B i O) 2 + ( S r T a 2 0 7) 2 - with respect to, K 2 C 0 in a range where K elements becomes 1 0 parts by weight or less than 5 parts by weight 0.5 3 When added, showed a 2 Ρ Γ> 1 0 μ ΟΖοιιι 2, electrical characteristics of E c = 4 5~ 6 0 k VZcm in 5 V. K 2 C 0 instead of 3 L i 2 C 0 3, N a C 0
M g C 03， C a C 03を添加した場合でも上記と同様の製造方法を行う と、 5 Vにおける 2 ? > 1 0 ^〇/01112 , E c = 4 5 ~ 6 0 k V/cm の電気特性を示した。 Even when Mg C 0 3 and Ca C 0 3 are added, if the same manufacturing method is performed as above, 2?> 10 0 ^ 〇 / 0111 2 at 5 V, E c = 45 to 60 kV / cm 2 electrical characteristics.
第 8図に、 添加量と結晶化温度の関係について調べた結果を示す。 作 製方法は、 上記と同様に （（B i O) 2+( S r T a207)2_) 1 0 0重量部 に対して K2 C 03を K元素でみて 0〜 1 5重量部の範囲， L i 2 C 03を L i 元素 ^みて 0〜 1 5重量部の範囲， N a2 C 03を N a元素でみて 0 ~ 1 5重量部の範囲， M g C 03 を M g元素でみて 0 ~ 1 5重量部の範 囲、 C a C 03 を C a元素でみて 0〜 1 5重量部の範囲で添加した。 図 中の結晶化温度は、 得られた強誘電体素子が 5 Vにおける 2 P r > 1 0 C / cm2 を満足する最小結晶化温度を示している。 第 8図から、 いず れの添加元素でも、 0. 5 重量部以上 1 0重量部以下の範囲で添加すれ ば、 最小の結晶化温度が 3 5 0 °C以上 5 0 0 °C以下となることが分かる。 また、 3 5 0 °Cの結晶化温度を達成するのに必要な添加量の幅（許容度） が大きな元素は、 K〉N a >M g， C a > L i の順であった。 同様に、 K2 C 03， L i 2 C 03， N a2 C 03， M g C 03 , C a C 03 を混合して L i ， N a , K, M g , C aの総添加量が 0〜 1 5重量部と なる範囲で添加した。 添加量と結晶化温度の関係について調べた結果を 第 9図に示す。 第 9図から明らかなよ う に、 L i ， N a , Κ， Μ g , C aからなる群から選択された元素を 2種類以上組み合わせて添加する 場合においても、 上記の単一元素の場合と同様に総添加量が 0. 5 重量 部以上 1 0重量部以下となる範囲で添加すれば、 結晶化温度を 3 5 0 °C 以上 5 0 0 °C以下とする ことができる。 Fig. 8 shows the results of an investigation on the relationship between the amount of addition and the crystallization temperature. Work made method, similarly to the above ((B i O) 2+ ( S r T a 2 0 7) 2 _) the K 2 C 0 3 with respect to 1 0 0 parts by weight as seen in the K elements 0-1 5 parts by weight of the range, L i 2 C 0 3 a L i elements ^ look 0-1 5 parts by weight range, N a 2 C 0 3 range of 0-1 5 parts by weight as seen in the N a elements, M g the C 0 3 was added in the range of 0 1 to 5 parts by weight as viewed looking in M g elemental 0-1 5 parts by weight of the range, the C a C 0 3 in C a element. The crystallization temperature in the figure indicates the minimum crystallization temperature at which the obtained ferroelectric element satisfies 2 Pr> 10 C / cm 2 at 5 V. From Fig. 8, it can be seen that the minimum crystallization temperature is from 350 ° C to 500 ° C for any of the additional elements when added in the range of 0.5 to 10 parts by weight. It turns out that it becomes. In addition, the elements with the large range of the addition amount (tolerance) required to achieve the crystallization temperature of 350 ° C were in the order of K>Na> Mg, Ca> Li. Similarly, K 2 C 0 3, L i 2 C 0 3, N a 2 C 0 3, M g C 0 3, C a C 0 3 were mixed L i, N a, K, M g, C a was added in a range where the total addition amount of a was 0 to 15 parts by weight. Fig. 9 shows the results of a study on the relationship between the amount of addition and the crystallization temperature. As is evident from FIG. 9, even when two or more elements selected from the group consisting of Li, Na, Κ, Μg, and Ca are added in combination, If the total amount of addition is in the range of 0.5 parts by weight or more and 10 parts by weight or less, the crystallization temperature can be 350 ° C. or more and 500 ° C. or less.
〔実施例 2〕  (Example 2)
本発明の第 2の実施例である強誘電体素子を説明する。 本実施例の強 誘電体素子に用いられている強誘電体薄膜は、 K元素を含み、 化学構造 式 P b (Z r o.4T i 0. e) O3の結晶構造をもつもので、 化学構造式 A ferroelectric element according to a second embodiment of the present invention will be described. A ferroelectric thin film used in the ferroelectric element of the present embodiment includes a K element, chemical structural formulas P b (Z r o. 4 T i 0. E) those having a crystal structure of O 3 , Chemical structural formula
( P b AJ ( Z r ,-y T i y) 03 で、 x = 0かつ y = 0. 6の場合に相 当する。 本実施例の強誘電体素子についても、 第 1 の実施例と同様に製 造する。 実施例 1 の場合と同様の P t ( 1 0 0 0 A)ZT i N ( 2 0 O A ) / S i 02 Z S i 基板上に、 P b (Z r。.4T i 。.6) 03 1 0 0重量部に 対して K2 C 03を K元素でみて 5重量部の割合で添加したターゲッ トを 用いてスパッタ リ ング法で成膜した。 スパッタガスは酸素とアルゴンの 1 ： 1混合ガス、 成膜圧力は 2 P a、 R Fパヮ一は 2 0 0 Wと し、 膜厚 2 5 0 n mを得た。 その後、 1 atm の空気中又は酸素中にて、 温度 500 °Cで 1 0〜 1 5 0分間熱処理を行った。 (P b AJ (Z r, -. In y T i y) 0 3, for the ferroelectric element of the present embodiment is equivalent to the case of x = 0 and y = 0. 6, the first embodiment Pt (100 A) ZT i N (20 OA) / S i 0 2 ZS i The same as in Example 1. P b (Z r .. 4 T i .. 6) 0 3 1 0 0 for the parts by weight K 2 C 0 3 was formed by a sputtering-ring method using a target which is added in an amount of 5 parts by weight as viewed in K elements. sputtering The gas was a 1: 1 mixed gas of oxygen and argon, the deposition pressure was 2 Pa, the RF layer was 200 W, and a film thickness of 250 nm was obtained. In the inside, heat treatment was performed at a temperature of 500 ° C. for 10 to 150 minutes.
以上の操作によ り 、 K元素を含む強誘電体層 P b (Zr。.4T i 0 .6) 03 を得た。 この強誘電体素子の電圧と分極の関係を調べた結果、 5 Vにお ける 2 Ρ Γ = 3 6 μ〇 / cm3 , E c = 5 0 k V /cm の電気特性を示した。 ま た、 電圧 3 Vの土反転による書き込み回数 1 09 回で特性劣化約 1 0 %と優れた強誘電体特性を示し、 K元素の添加による特性低下は認めら れなかった。 ま た、 5 0 0 °Cで作製した強誘電体素子の 5 Vにおける P rで規格化した P r値 （ P r Z P r C S O O) ) は、 3 5 0 °C以上の温 度範囲で P r / P r ( 5 0 0 ) > 0. 9 5 と非常に優れた特性を示した。 Ri by the above procedure to give a ferroelectric layer P b (Zr .. 4 T i 0. 6) 0 3 containing K elements. As a result of examining the relationship between the voltage and the polarization of the ferroelectric element, it was found that the electric characteristics at 5 V were 2Ρ = 36 μ 3 / cm 3 and E c = 50 kV / cm. Also, degradation of characteristics about 1 0 1 0 9 times the number writing by soil inversion at 3 V % And excellent ferroelectric properties, and no deterioration in properties due to the addition of element K was observed. In addition, the Pr value (PrZPrCSOO)) of the ferroelectric element fabricated at 500 ° C, normalized by Pr at 5 V, is less than 350 ° C in the temperature range. r / Pr (500)> 0.95, which is very excellent.
P b ( Z r 0 . 4 T i 。.6) 03 1 0 0重量部に対して K2 C 03を K元素で 0. 5 重量部以上 1 0重量部以下の範囲で添加して上記と同様の方法で 作製したと ころ、 5 Vにおける 2 P r〉 3 0 CZcm2 ， E c = 4 5 ~ 6 0 k V / cmの電気特性が得られた。 P b (Z r 0. 4 T i .. 6) 0 3 1 0 0 a K 2 C 0 3 by weight parts were added with 0.5 parts by weight or more 1 0 parts by weight of the range K elements When fabricated by the same method as above, electrical characteristics of 2 Pr at 30 V> 30 CZcm 2 and E c = 45 to 60 kV / cm were obtained.
さ らに、 化学構造式 （ P b
Figure imgf000015_0001
Ζ r 0.4T i 0 . 6 ) 03からなる結晶 構造において、 A元素に L a， B a , N b元素を置換し、 xの比率を 0 ≤ X ≤ 0. 2 の範囲内で変化させて、 上記と同様に して強誘電体薄膜を 形成した。 強誘電体薄膜の形成に当たっては、 （ P b】— x Ax) ( Z r 0. 4 T i ο. e) 03 1 0 0重量部に対して添加元素と して Κ元素を 5重量部の 割合で添加した。 第 1表は、 5 0 0 °Cで作製したこれらの強誘電体素子 の 5 Vにおける 2 P r値 （単位は C / cm2 ) を示す。 第 1表に示され ているよう に、 上記と同様に して 5 0 0 °Cで作製した強誘電体素子の 5 Vにおけ 2 P r値は、 全て 3 0 Cノ cm2以上と優れた特性を示した。 In addition, the chemical structural formula (Pb
Figure imgf000015_0001
Zeta r 0. In 4 T i 0. 6) 0 3 made of a crystalline structure, the A element L a, B a, replacing the N b element, the ratio of x in the range of 0 ≤ X ≤ 0. 2 By changing it, a ferroelectric thin film was formed in the same manner as above. Strength In forming the dielectric thin film, (P b] - x A x) (. Z r 0. 4 T i ο e) 0 3 1 0 0 5 weight Κ element as the additive element with respect to the weight part Parts were added. Table 1 shows the 2 Pr values (unit: C / cm 2 ) at 5 V of these ferroelectric devices manufactured at 500 ° C. As shown in Table 1, the 2 Pr values at 5 V of the ferroelectric devices fabricated at 500 ° C. in the same manner as above were all excellent at 30 C cm 2 or more. Characteristics.
第 1表  Table 1
Figure imgf000015_0002
Figure imgf000015_0002
ま た、 化学構造式 （ P b ο.9 Α0·】）（ Z Τ i y) 03からなる結晶構 造において、 A元素に L a， B a， N b元素を置換し、 yの比率を 0 < y≤ 1. 0 の範囲内で変化させて、 上記と同様に して強誘電体薄膜を形 成した。 強誘電体薄膜の形成に当たっては、 （ P b o. sAo. J ( Z r :-ν T i y) 03 1 0 0重量部に対して添加元素と して K元素を 5重量部の割 合で添加した。 第 2表は、 5 0 0 °Cで作製したこれらの強誘電体素子の 5 Vにおける 2 P r値（単位は μ C / cm2 ) を示す。 第 2表に示されてい るよう に、 y値によって 2 P r値が大き く 変わり 、 0. 5≤ y≤ 0. 7 5 の範囲で特に高い P r特性が得られた。 Also, the chemical structural formula (P b ο. 9 Α 0 · ]) (Z Τ i y) 0 3 made of a crystalline structure In the fabrication, the element A is replaced with the elements La, Ba, and Nb, and the ratio of y is changed within the range of 0 <y ≤ 1.0, and the ferroelectric thin film is formed in the same manner as above. Done. Strength In forming the dielectric thin film, (P b o sAo J ( Z r: -.. Ν T i y) 0 3 1 0 0 weight K element 5 parts by weight and the additive element with respect to part split Table 2 shows the 2 Pr values (unit: μC / cm 2 ) at 5 V of these ferroelectric devices manufactured at 500 ° C. Table 2 shows the values. As described above, the 2 Pr value greatly changed depending on the y value, and a particularly high Pr characteristic was obtained in the range of 0.5 ≤ y ≤ 0.75.
第 2表  Table 2
Figure imgf000016_0001
Figure imgf000016_0001
〔実施例 3〕  (Example 3)
本発明の第 3の実施例である高誘電体素子を説明する。 第 4図に、 本 実施例の高誘電体素子の断面模式図を示す。 本実施例の高誘電体素子に 用いられている高誘電体薄膜は、 K元素を含み、 化学構造式  Third Embodiment A high dielectric element according to a third embodiment of the present invention will be described. FIG. 4 shows a schematic cross-sectional view of the high dielectric element of the present example. The high-dielectric thin film used in the high-dielectric element of this embodiment contains the element K and has a chemical structural formula
( B a 0.5 S Γ 0 . 5 Τ i 03 ) の結晶構造をもつものである。 本実施例の 高誘電体素子についても、 第 1 の実施例と同様に製造する。 下地基板 4 4には、 3 0 0 °Cに加熱 しながら形成した厚み 2 0 0人の T i N層の バリ ア層及び熱酸化で作製した S i 02 層を含む S i ウェハを用いた。 次に、 この下地基板 4 4上に下部電極 4 3 を作製した。 下部電極 4 3は、 下地基板 4 4を 3 5 0 °Cに加熱しながらスパッタ リ ング法によ り P t薄 膜を 2 0 0人形成する ことで作製した。 この下部電極 4 3上に、 高誘電 体薄膜 4 2 を形成するために、 B a， S r , T r， K元素を (B a 0. 5 S Γ 0. 5 Τ i 0 3) are those having a crystal structure. The high dielectric element of this embodiment is also manufactured in the same manner as in the first embodiment. For the base substrate 44, a Si wafer including a 200- layer thick TiN layer barrier layer formed by heating at 300 ° C. and a SiO 2 layer formed by thermal oxidation was used. Was. Next, a lower electrode 43 was formed on the base substrate 44. The lower electrode 43 was formed by heating the base substrate 44 to 350 ° C. and forming 200 thin Pt films by sputtering. Ba, Sr, Tr, and K elements are formed on the lower electrode 43 to form a high dielectric thin film 42.
(B a 0. 5 S r o . s ) T i 03 の 1 0 0重量部に対して K2 C 03を K元素で みて 5重量部の割合で添加したタ一ゲッ トを用いてスパッタ リ ング法で 成膜した。 スパッタ ガスはアルゴンガス、 成膜圧力は 2 P a、 R Fパヮ —は 2 0 0 Wと し、 膜厚 2 5 n mを得た。 その後、 l atm の空気中又は 酸素中、 温度 4 5 0 °Cで 1 〜 3 0分間熱処理を行った。 以上の操作によ リ 、 K元素を含む高誘電体層 （ B a。.5 S r。.5) T i 03 を得た。 (B a 0. 5 S ro. S) T i 0 3 1 0 0 parts by weight of K 2 C 0 3 with data one Getting bets added at a ratio of 5 parts by weight as seen in the K element relative to sputtering The film was formed by the ring method. The sputtering gas was argon gas, the film formation pressure was 2 Pa, the RF power was 200 W, and a film thickness of 25 nm was obtained. After that, heat treatment was performed in air or oxygen at l atm at a temperature of 450 ° C for 1 to 30 minutes. Li by the above operation, the high dielectric layer comprising a K element (B a .. 5 S r .. 5) to give the T i 0 3.
I C P分析の結果、 得られた高誘電体層には 1 0 0重量部の  As a result of the ICP analysis, 100 parts by weight
( B a 0. 5 S Γ 。· 5) Τ i 03 に対して 5. 0重量部の K元素が含有されて いた。 次に、 高誘電体薄膜 4 2の上に上部電極 4 1 の P t薄膜を室温で スパッタ リ ング法によ り 2 0 0 A形成して、 高誘電体素子を作製した。 この K元素を含む （ B a 0. 5 S r 0 . 5) T i 03高誘電体素子の熱処理温度 と ε特性の関係を第 6図に示す。 第 6図の縦軸は、 4 5 0 °Cで作製した 高誘電体素子の εで規格化した値 （ ε ε (4 5 0) ) と した。 第 6図に 示されているよ う に、 2 5 0 °C以上の温度範囲で ε / ε ( 4 5 0 ) > 0. 9 5 と非常に優れた特性を示した。 (B a 0. 5 S Γ. · 5) Τ i 0 3 K elements 5.0 parts by weight to have been contained. Next, a Pt thin film of the upper electrode 41 was formed on the high dielectric thin film 42 at 200 A by a sputtering method at room temperature to produce a high dielectric element. Shows the relationship between the heat treatment temperature and ε characteristics of the containing K element (B a 0. 5 S r 0 . 5) T i 0 3 high dielectric element in Figure 6. The vertical axis in FIG. 6 is the value (εε (450)) normalized by ε of the high dielectric element manufactured at 450 ° C. As shown in FIG. 6, very excellent characteristics of ε / ε (450)> 0.95 were exhibited in a temperature range of 250 ° C. or higher.
本実施例において、 （ B a。.5 S r。.5) T i 03 1 0 0重量部に対して K2 C 03を K元素でみて 0. 5 重量部以上 1 0重量部以下の範囲で添加 すれば、 ε > 2 5 0の電気特性を示した。 K2 C 03の代わ り に Li2C03 , N a 2 C 03 , M g C 03 , C a C 03を添加した場合においても、 上記と 同様の方法で成膜すると、 ε > 2 5 0の電気特性を示した。 In the present embodiment, (B a .. 5 S r .. 5) T i 0 3 1 0 0 K 2 C 0 3 a viewed with K elements 0.5 parts by weight or more 1 0 parts by weight or less relative to parts by weight When it was added in the range described above, it showed electrical characteristics of ε> 250. K 2 C 0 3 of instead Ri to Li 2 C0 3, N a 2 C 0 3, M g C 03, even when the C a C 0 3 was added and deposited in the same manner as described above, epsilon> The electrical characteristics of 250 were shown.
ま た、 結晶構造 （ B a !-x S r x) T i O 3の高誘電体において、 xが 0 の場合の B a T i O においても、 上記と同様に 4 5 0 °Cで作製した高 誘電体素子の ε値は、 K2 C 03 を Κ元素でみて 0. 5 重量部以上 1 0重 量部以下の範囲で添加すれば、 ε > 4 0 0の電気特性を示した。 結晶構 造 （ B a ^ S r j T i Os の高誘電体において、 Xが 1 の場合の S r T i O 3 においても、 上記と同様に 4 5 0 °Cで作製した高誘電体素 子の ε値は、 K2 C 03 を Κ元素でみて 0. 5 重量部以上 1 0重量部以下 の範囲で添加すれば、 ε > 1 8 0の電気特性を示した。 Also, the crystal structure (B a -! X S r x) in the high dielectric T i O 3, x is 0 Also in B a T i O in the case of, epsilon value of the high dielectric element manufactured in the same manner as described above 4 5 0 ° C is, K 2 C 0 3 a viewed in Κ element 0.5 parts by weight or more 1 0 When added in a range of not more than the weight part, electric characteristics of ε> 400 were exhibited. In high dielectric crystal structure (B a ^ S rj T i Os, also in S r T i O 3 when X is 1, similarly to the above 4 5 0 high dielectric element manufactured ° C shall of epsilon values, if added K 2 C 0 3 1 0 parts by weight or less of the range 0.5 parts by weight or more as viewed in Κ element showed epsilon> 1 8 0 electrical characteristics.
〔実施例 4〕  (Example 4)
第 7図は、 本発明による強誘電体素子を用いた半導体装置の略断面図 である。 作製方法を以下に示す。 まず、 S i ウェハ 7 5にイオン打ち込 みと熱処理によ り拡散層 7 7 を形成し、 次に表面酸化によ り S i 02 ゲ — ト膜 7 9 を、 さ らにその上にゲー ト電極 7 8 を形成した。 トランジス タ とキャパシタ の素子分離と して S i 02 膜 7 6 を形成した後に、 強誘 電体素子 7 3， 7 2， 7 2 を形成した。 その後、 S i 02 膜 7 4を形成 した後にアルミ配線 7 1 0 を形成して、 上部電極 7 1 と拡散層 7 7 を接 続している。 強誘電体素子と して、 実施例 1 で説明 した P t電極 7 1 , S r B i 2 T a 209 薄膜 7 2， P t電極 7 3からなる構造を形成する こ とで、 強誘電体メモリ 素子を含む半導体装置を得た。 得られた強誘電体 メモリ 素子の半導体装置は、 3 Vの電圧で得られた蓄積電化容量の変化 で検出できる半導体装置である。 FIG. 7 is a schematic sectional view of a semiconductor device using a ferroelectric element according to the present invention. The fabrication method is described below. First, a diffusion layer 77 is formed on the Si wafer 75 by ion implantation and heat treatment, and then a SiO 2 gate film 79 is formed on the Si wafer 75 by surface oxidation. Gate electrodes 78 were formed. After forming the SiO 2 film 76 as an element separation between the transistor and the capacitor, the strong dielectric elements 73, 72, and 72 were formed. Thereafter, after forming the SiO 2 film 74, an aluminum wiring 7 10 is formed, and the upper electrode 71 and the diffusion layer 77 are connected. As the ferroelectric elements, in the arc forming the P t electrodes 7 1, S r B i 2 T a 2 0 9 thin film 7 2, P t electrode 7 a three structure described in Example 1, strong A semiconductor device including a dielectric memory element was obtained. The obtained ferroelectric memory element semiconductor device is a semiconductor device that can be detected by a change in the storage charge capacity obtained at a voltage of 3 V.
こ こでは、 P t電極 7 1 ， S r B i 2 T a209 強誘電体薄膜 7 2， P t電極 7 3からなる構造を用いて説明 したが、 P t電極， （ B a 0.5 S r。.5) T i 03 等の高誘電体薄膜、 P t電極からなる構造の高誘電体 メモリ 素子を形成 しても よい。 こ う して得られる高誘電体メモリ 素子の 半導体装置は、 3 Vの電圧で 3 0 f F蓄積電化容量を有する半導体装置 である。 This Kodewa has been described with reference to P t electrodes 7 1, S r B i 2 T a 2 0 9 ferroelectric thin 7 2, P t consists electrode 7 3 structure, P t electrodes, (B a 0 . 5 S r .. 5) high dielectric thin film such as T i 0 3, may be formed of high dielectric memory device having a structure consisting of P t electrodes. The semiconductor device of the high-dielectric memory element obtained in this way is a semiconductor device having a storage capacitance of 30 fF at a voltage of 3 V. It is.
ま た、 F e R AMや D RAMなどの半導体装置について、 本発明の誘 電体素子を用いれば、 大容量化およびよ リ低い電圧での動作が可能にな る。  Further, for semiconductor devices such as FeRAM and DRAM, if the dielectric element of the present invention is used, it is possible to increase the capacity and operate at a lower voltage.
以上の実施例では、 S i 基板上に形成されるバリ ア層と して、 T i N 層を用いたが、 T i ， T i A I N , T aなどを用いてもよい。 上部電極 および下部電極には、 P t以外に、 W， P t T i ， R u , I r , A 1 , C u , R u 02， l r 02 などを用いる こ とができる。 ま た、 誘電体膜を 作る方法は、 スパッタ リ ング法以外に、 酸素あるいは励起した酸素中で 行う MO C V D法、 金属アルコ キシ ドあるいは有機酸塩を出発原料と し たスピンコー ト法， ディ ヅプコー ト法を適宜選択してよい。 In the above embodiment, the TiN layer is used as the barrier layer formed on the Si substrate, but Ti, TiAIN, Ta, or the like may be used. The upper and lower electrodes, in addition to P t, W, P t T i, R u, I r, A 1, C u, it is the this the like R u 0 2, lr 0 2 . In addition to the sputtering method, a MOCVD method using oxygen or excited oxygen, a spin coating method using a metal alkoxide or an organic acid salt as a starting material, and a dip coating method can be used to form a dielectric film. May be appropriately selected.
〔実施例 5 〕  (Example 5)
本発明の第 5の実施例である非接触型メモリ ーカー ド 5 0を説明する。 第 1 1 図に示す本実施例の非接触型メモリ 一カー ド 5 0は、 データ を記 憶しておく データ用 R O M 5 1 , F e R AM素子 5 2 ， 非接触用イ ンタ —フ ェイス 5 3、 およびアンテナ 5 4がカー ドに設けられている。  A non-contact type memory card 50 according to a fifth embodiment of the present invention will be described. The non-contact memory card 50 of the present embodiment shown in FIG. 11 includes a data ROM 51 for storing data, a FeRAM device 52, and a non-contact interface. 53 and antenna 54 are provided on the card.
F e RAM素子 5 2 には、 第 1 〜第 4の実施例で説明 した強誘電体素子 を用いる。 データ用 R OM 5 1 ， F e R AM素子 5 2、 および非接触用 イ ンタ一フ ェイ ス 5 3は、 データが行き来する信号線で相互に接続され ている。 非接触用ィ ンターフ ェイ ス 5 3 にはアンテナ 5 4が信号線が接 続されている。  As the Fe RAM element 52, the ferroelectric element described in the first to fourth embodiments is used. The data ROM 51, the FeRAM element 52, and the non-contact interface 53 are interconnected by signal lines through which data flows. An antenna 54 is connected to a signal line to the non-contact interface 53.
外部からの情報は、 アンテナ 5 4から非接触用イ ンタ一フ ェイス 5 3 に送られ、 電圧信号に変換される。 この電圧信号によ って、 F e RAM 素子 5 2 を駆動し、 情報を書き込んだり 、 データ用 R OM 5 1 から情報 を読み出した り する ことができる。 従来のメモリ ーカー ドでは、 EEPR0M素子の不揮発性素子を利用 してい たので 1 6 Vの印加電圧が必要であった。 本実施例では、 F e R A M素 子を用いるので、 電圧信号を 5 V以下に低電圧化できる。 Information from the outside is sent from the antenna 54 to the non-contact interface 53 and converted into a voltage signal. With this voltage signal, the FeRAM element 52 can be driven to write information or read information from the data ROM 51. In the conventional memory card, an applied voltage of 16 V was required because a nonvolatile element of the EEPR0M element was used. In this embodiment, since the Fe RAM element is used, the voltage signal can be reduced to 5 V or less.
本発明によれば、 誘電体が I a族元素， M g元素、 ま たは C a元素を 含むことによ り 、 低い温度で結晶化のための熱処理を行う ことができる ので、 このと きに誘電体と誘電体に接する電極とが反応する ことな く 、 誘電体を形成する ことができ、 健全に機能する誘電体素子を得る ことが できる。  According to the present invention, since the dielectric contains the group Ia element, the Mg element, or the Ca element, the heat treatment for crystallization can be performed at a low temperature. The dielectric can be formed without reacting between the dielectric and the electrode in contact with the dielectric, and a dielectric element that functions properly can be obtained.
ま た、 誘電体が、 化学構造式 （ A O ) 2 + ( B y—】 C y 03 y + 1)2— (但し、 Aは T l ， H g， P b， B i 、 ま たは希土類元素であ り 、 Bは B i ， P b， C a， S r 、 ま たは B aであ り 、 かつ、 Cは T i ， N b， T a , W, M o， F e， C o， C r 、 ま たは Z r である。 ） の結晶構造をもて ば、 ま たは、 化学構造式 （ P b n Ax) ( Z r ,— y T i y) 03 (但し、 Aは L a， B a、 ま たは N b であ り 、 0 ≤ x ≤ 0 . 2 、 かつ、 0 < y ≤ l で ある。 ） の結晶構造をもてば、 誘電体は強誘電体であ り 、 強誘電体素子 が得られる。 この強誘電体素子は、 高い残留分極 P r値を維持し、 低い 抗電界 E c値をもち、 かつ、 膜疲労が抑制された、 健全に機能する強誘 電体素子である。 In addition, when the dielectric substance has the chemical structural formula (AO) 2 + (B y —) C y 0 3 y + 1 ) 2 — (where A is T l, H g, P b, B i, or R is a rare earth element, B is Bi, Pb, Ca, Sr, or Ba, and C is Ti, Nb, Ta, W, Mo, Fe, C o, C r, was or is Z r if Mote crystal structure), was or chemical structural formula (P bn a x) (Z r, -. y T i y) 0 3 ( where , A is L a, B a, or N b, and 0 ≤ x ≤ 0.2 and 0 <y ≤ l). And a ferroelectric element is obtained. This ferroelectric element has a high remanent polarization Pr value, has a low coercive electric field Ec value, and is a soundly functioning ferroelectric element in which film fatigue is suppressed.
ま た、 誘電体が、 化学構造式 （ B a ,-x S r x) T i 03 (但し、 0 ≤ x ≤ 1 である。 ） の結晶構造をもてば、 誘電体は高誘電体であ り 、 高強誘 電体素子が得られる。 この高強誘電体素子は、 静電容量が大き く 、 高い 残留分極 P r値を維持し、 かつ、 耐電圧特性がよい、 健全に機能する高 強誘電体素子である。 Also, dielectric, chemical structural formulas (B a, - x S r x) T i 0 3 (. Provided that 0 ≤ x ≤ 1) If Mote the crystal structure of the dielectric is a high dielectric Therefore, a high-strength dielectric element can be obtained. This high ferroelectric element has a large capacitance, maintains a high remanent polarization Pr value, has a good withstand voltage characteristic, and functions satisfactorily.
ま た、 本発明の他の特徴によれば、 アルカ リ 金属ま たはアルカ リ 土類 金属が含まれている誘電体は結晶化温度が低く 、 2 5 0 °C以上 5 0 0 °C 以下の温度で成膜を行う こ とができるので、 誘電体と誘電体に接する電 極との反応を抑制する こ とができる。 したがって、 健全な誘電体を形成 する ことができ、 健全に機能する誘電体素子を得る こ とができる。 Further, according to another feature of the present invention, a dielectric containing an alkali metal or an alkaline earth metal has a low crystallization temperature, and is 250 ° C. or more and 500 ° C. or more. Since the film can be formed at the following temperature, the reaction between the dielectric and the electrode in contact with the dielectric can be suppressed. Therefore, a sound dielectric can be formed, and a dielectric element that functions soundly can be obtained.
誘電体が強誘電体である場合は、 3 5 0 °Cよ り低い温度で、 I a族元 素， M g元素、 ま たは C a元素を含む非晶質な強誘電体を設ける ことが でき、 非晶質な強誘電体を結晶化する熱処理は 3 5 0 °C以上 5 0 0 °C以 下で行う ことができる。 これらの温度範囲であれば、 強誘電体と強誘電 体に接する電極との反応を抑制する ことができる。 したがって、 健全な 強誘電体を形成する こ とができ、 高い残留分極 P r値を維持し、 低い抗 電界 E c値をもち、 かつ、 膜疲労が抑制された、 健全に機能する誘電体 素子を得る ことができる。  If the dielectric is a ferroelectric, provide an amorphous ferroelectric containing Group Ia, Mg, or Ca elements at a temperature lower than 350 ° C. The heat treatment for crystallizing the amorphous ferroelectric can be performed at 350 ° C. or more and 500 ° C. or less. Within these temperature ranges, the reaction between the ferroelectric and the electrode in contact with the ferroelectric can be suppressed. Therefore, a healthy ferroelectric material can be formed, a high remanent polarization Pr value is maintained, a low coercive electric field Ec value is achieved, and a soundly functioning dielectric element in which film fatigue is suppressed is provided. Can be obtained.
誘電体が高誘電体である場合は、 2 5 0 °Cよ り低い温度で、 I a族元 素， M g元素、 ま たは C a元素を含む非晶質な高誘電体を設ける ことが でき、 非晶質な高誘電体を結晶化する熱処理は 2 5 0 °C以上 4 5 0 °C以 下で行う こ とができる。 これらの温度範囲であれば、 高誘電体と高誘電 体に接する電極との反応を抑制する ことができる。 したがって、 健全な 高誘電体を形成する こ とができ、 静電容量が大き く 、 高い残留分極 P r 値を維持し、 かつ、 耐電圧特性がよい、 健全に機能する誘電体素子を得 'る ことができる。  If the dielectric is a high dielectric, provide an amorphous high dielectric containing Group Ia, Mg, or Ca elements at a temperature lower than 250 ° C. The heat treatment for crystallizing the amorphous high dielectric substance can be performed at 250 ° C. or higher and 450 ° C. or lower. Within these temperature ranges, the reaction between the high dielectric and the electrode in contact with the high dielectric can be suppressed. Therefore, it is possible to form a sound high-dielectric material, obtain a dielectric element that has a large capacitance, maintains a high remanent polarization Pr value, and has good withstand voltage characteristics and a sound function. It can be.
また、 半導体装置が、 誘電体が I a族元素， M g元素、 または C a元 素を含む誘電体素子を有すれば、 低い温度で熱処理を行う ことができる ので、 誘電体と誘電体に接する電極とが反応する ことなく 、 誘電体を形 成する ことができ、 健全に機能する誘電体素子を得る ことができる。 F e R A Mや D R A Mなどの半導体装置についてこのよ う な誘電体素子 を用いれば、 大容量化およびよ リ低い電圧での動作が可能になる。 産業上の利用可能性 In addition, if the semiconductor device has a dielectric element containing a group Ia element, a Mg element, or a Ca element as a dielectric, the heat treatment can be performed at a low temperature. The dielectric can be formed without reacting with the contacting electrode, and a healthy dielectric element can be obtained. If such a dielectric element is used for a semiconductor device such as a Fe RAM or a DRAM, it is possible to increase the capacity and operate at a lower voltage. Industrial applicability
本発明の I a族元素， M g元素、 ま たは C a元素を含む誘電体を、 上 部電極と下部電極との間に形成して、 F e RAMなどの強誘電体素子ま たは D R A Mなどの高誘電体素子を製作する ことができる。  The dielectric containing the Ia group element, the Mg element, or the Ca element of the present invention is formed between the upper electrode and the lower electrode to form a ferroelectric element such as FeRAM or the like. High dielectric elements such as DRAM can be manufactured.

Claims

請 求 の 範 囲 The scope of the claims
1 . 誘電体と、 前記誘電体に電圧を与える 2つの電極とを備える誘電体 素子において、  1. A dielectric element comprising: a dielectric; and two electrodes for applying a voltage to the dielectric,
前記誘電体は、 I a族元素， M g元素、 ま たは C a元素を含むことを 特徴とする誘電体素子。  The dielectric element, wherein the dielectric contains a Group Ia element, a Mg element, or a Ca element.
2. 前記 I a族元素は L i ， N a , Kである こと を特徴とする請求項 1 の誘電体素子。  2. The dielectric element according to claim 1, wherein the group Ia element is Li, Na, K.
3. 前記誘電体は、 前記誘電体 1 0 0重量部に対して、 0. 5 重量部以 上 1 0重量部以下の割合で、 l a族元素， M g元素、 ま たは C a元素を 含むことを特徴とする請求項 1 の誘電体素子。  3. The dielectric is composed of the la group element, the Mg element, or the Ca element in a proportion of 0.5 to 10 parts by weight with respect to 100 parts by weight of the dielectric. The dielectric element according to claim 1, wherein the dielectric element comprises:
4. 前記誘電体は、 化学構造式 （ A 0)2 + (By— , Cy 03y )2一 （但し、 Aは T l ， H g， P b， B i 、 ま たは希土類元素であ り Bは B i ， P b， C a , S r 、 ま たは B aであ り 、 かつ、 Cは T i N b , T a， W, M o， F e， C o， C r、 ま たは Z rである。 ） 4. The dielectric structure of formula (A 0) 2 + (B y -, C y 0 3y) 2 i (where, A is T l, H g, P b , B i, or rare earth elements And B is Bi, Pb, Ca, Sr, or Ba, and C is TiNb, Ta, W, Mo, Fe, Co, C r, or Zr.)
の結晶構造をもつこ と を特徴とする請求項 1 の誘電体素子。 2. The dielectric element according to claim 1, wherein the dielectric element has the following crystal structure.
5. 前記誘電体は、 化学構造式 （ P b i xAxHZ r , yT i y) 03 (但し、 Aは L a， B a、 ま たは N bであ り 、 0≤ x≤ 0. 2 、 かつ、 0 < y≤ 1である。 ） 5. The dielectric has a chemical structural formula (P bi xAxHZ r, y Ti y ) 0 3 (where A is La, Ba, or Nb, and 0≤x≤0.2 , And 0 <y ≤ 1.)
の結晶構造をもつこ と を特徴とする請求項 1 の誘電体素子。 2. The dielectric element according to claim 1, wherein the dielectric element has the following crystal structure.
6. 前記誘電体は、 化学構造式 （ B a !-x S r J T i Os (但し、 0 ≤ x ≤ 1 である。 ）  6. The dielectric has a chemical structural formula (Ba! -XSrJTios (where 0≤x≤1)).
の結晶構造をもつこ と を特徴とする請求項 1 の誘電体素子。  2. The dielectric element according to claim 1, wherein the dielectric element has the following crystal structure.
7. 誘電体と、 前記誘電体に電圧を与える 2つの電極と を備える誘電体 素子の製造方法において、  7. In a method for manufacturing a dielectric element, comprising: a dielectric; and two electrodes for applying a voltage to the dielectric,
l a族元素， M g元素、 ま たは C a元素を含む誘電体の形成を 2 5 0 °C以上 5 0 0 °C以下で行う こ と を特徴とする誘電体素子の製造方法。 The formation of dielectrics containing la group elements, Mg elements, or Ca elements A method for producing a dielectric element, which is carried out at a temperature of at least 500 ° C and at most 500 ° C.
8 . 前記 I a族元素、 前記 M g元素、 ま たは前記 C a元素を含む非晶質 な前記誘電体を設けるステップと、 8. providing the amorphous dielectric containing the Ia group element, the Mg element, or the Ca element;
非晶質な前記誘電体を結晶化する熱処理を、 2 5 0 °C以上 5 0 0 °C以 下で行う ステップと を含むこと を特徴とする請求項 7 の誘電体素子の製 造方法。  8. The method according to claim 7, further comprising: performing a heat treatment for crystallizing the amorphous dielectric at a temperature of 250 ° C. or more and 500 ° C. or less.
9 . 前記誘電体の材料に、 I a族元素， M g元素、 ま たは C a元素を添 加するステップを含むこと を特徴とする請求項 7 の誘電体素子の製造方 法。  9. The method according to claim 7, further comprising a step of adding a Group Ia element, a Mg element, or a Ca element to the dielectric material.
1 0 . 誘電体と、 前記誘電体に電圧を与える 2つの電極とを備える誘電 体素子を有する半導体装置において、  10. A semiconductor device having a dielectric element including a dielectric and two electrodes for applying a voltage to the dielectric,
前記誘電体は、 I a族元素， M g元素、 ま たは C a元素を含むことを 特徴とする半導体装置。  The semiconductor device, wherein the dielectric contains a Group Ia element, a Mg element, or a Ca element.
PCT/JP1999/004679 1998-09-03 1999-08-30 Dielectric element and production method thereof and semiconductor device WO2000014804A1 (en)

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JPH0982906A (en) * 1995-09-08 1997-03-28 Sharp Corp Ferroelectric thin film element
JPH09139474A (en) * 1995-11-14 1997-05-27 Murata Mfg Co Ltd Dielectric thin film element and its manufacture
JPH1093050A (en) * 1996-02-22 1998-04-10 Toshiba Corp Thin-film capacitor and manufacture thereof
JPH10229080A (en) * 1996-12-10 1998-08-25 Sony Corp Processing method of oxide, deposition method of amorphous oxide film and amorphous tantalun oxide film

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JPH0982906A (en) * 1995-09-08 1997-03-28 Sharp Corp Ferroelectric thin film element
JPH09139474A (en) * 1995-11-14 1997-05-27 Murata Mfg Co Ltd Dielectric thin film element and its manufacture
JPH1093050A (en) * 1996-02-22 1998-04-10 Toshiba Corp Thin-film capacitor and manufacture thereof
JPH10229080A (en) * 1996-12-10 1998-08-25 Sony Corp Processing method of oxide, deposition method of amorphous oxide film and amorphous tantalun oxide film

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