WO2000014600A1 - Active matrix liquid crystal device and method for producing the same - Google Patents

Active matrix liquid crystal device and method for producing the same Download PDF

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Publication number
WO2000014600A1
WO2000014600A1 PCT/JP1999/004606 JP9904606W WO0014600A1 WO 2000014600 A1 WO2000014600 A1 WO 2000014600A1 JP 9904606 W JP9904606 W JP 9904606W WO 0014600 A1 WO0014600 A1 WO 0014600A1
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WIPO (PCT)
Prior art keywords
video signal
scanning signal
signal wiring
switching elements
liquid crystal
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Application number
PCT/JP1999/004606
Other languages
French (fr)
Japanese (ja)
Inventor
Hiraaki Yonekura
Shinichiro Ishihara
Original Assignee
Matsushita Electric Industrial Co., Ltd.
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Application filed by Matsushita Electric Industrial Co., Ltd. filed Critical Matsushita Electric Industrial Co., Ltd.
Priority to KR1020017002769A priority Critical patent/KR20010079729A/en
Publication of WO2000014600A1 publication Critical patent/WO2000014600A1/en

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Classifications

    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362—Active matrix addressed cells
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362—Active matrix addressed cells
    • G02F1/136286—Wiring, e.g. gate line, drain line
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333—Constructional arrangements; Manufacturing methods
    • G02F1/133345—Insulating layers
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362—Active matrix addressed cells
    • G02F1/136227—Through-hole connection of the pixel electrode to the active element through an insulation layer
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362—Active matrix addressed cells
    • G02F1/1368—Active matrix addressed cells in which the switching element is a three-electrode device
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B32—LAYERED PRODUCTS
    • B32B—LAYERED PRODUCTS, i.e. PRODUCTS BUILT-UP OF STRATA OF FLAT OR NON-FLAT, e.g. CELLULAR OR HONEYCOMB, FORM
    • B32B2457/00—Electrical equipment
    • B32B2457/20—Displays, e.g. liquid crystal displays, plasma displays
    • B32B2457/202—LCD, i.e. liquid crystal displays

Definitions

  • the present invention relates to an active matrix type liquid crystal display device that displays an image by driving a liquid crystal by a switching element, and a method of manufacturing the same.
  • an active matrix type liquid crystal display device (hereinafter, referred to as an AMT LCD device) has a switching element composed of a thin film transistor (hereinafter, referred to as TFT) for each pixel arranged in a matrix, and the switching element. Drives the liquid crystal to display an image.
  • the AMT LCD device is used for a display of a notebook computer navigation system and the like, since it can provide a clear image display with little crosstalk, and has been rapidly used in recent years.
  • FIG. 2 is a cross-sectional view of an array portion having a FT of a conventional AM T 1_ ⁇ 0 device. As shown in Fig. 2, the conventional AMT LCD device
  • a scanning signal wiring 2 which also serves as a gate electrode of a TFT arranged in a matrix on a glass substrate 1 and supplies a scanning signal to the gate electrode of the TFT;
  • a first insulating film forming a first insulating layer laminated on the scanning signal wiring 2;
  • a gate insulating film 3 for the gate electrode of T
  • a video signal wiring 5 which also serves as a source electrode connected to the TFT amorphous silicon film 4 and supplies a video signal;
  • the plurality of pixel electrodes 7 are arranged in a matrix.
  • a plurality of TFTs are also arranged in a matrix in correspondence with the pixel electrodes 7.
  • the video signal wiring 5 doubles as a source electrode connected to the TFT amorphous silicon film 4 and supplies a video signal to the pixel electrode 7 via the drain electrode 11.
  • the second insulating film 6 is a passivation insulating film acting as a protective film of the TFT, and forms a second insulating layer. The operation of the AMT LCD device configured as described above will be described below.
  • an array process step for forming a TFT on the glass substrate 1 is as follows.
  • an AMTLCD device and a method for manufacturing the same which can reduce costs in the entire manufacturing process.
  • an AMTLCD device and a method of manufacturing the same according to the present invention include (a) forming a pattern for removing an opening in a second insulating layer for mounting and wiring a scanning signal wiring and a video signal wiring;
  • the number of cycles of the photolithography step in the TFT array process is five. Further, the invention is characterized in that the scanning signal wiring layer and the video signal wiring layer are electrically connected using the pixel electrode layer.
  • the liquid crystal is driven by a scanning signal and a video signal corresponding to a display image to display an image on the screen.
  • the configuration of an array portion in which a plurality of pixels for image display are arranged in a matrix on the insulating transparent substrate is as follows:
  • the active matrix liquid crystal display device of the present invention is
  • a part of the pixel electrode is electrically connected to the video signal wiring via a contact tree pattern formed on the video signal wiring and the second insulating layer; Formed so as to be electrically conductive via contact hole patterns formed in the first and second insulating layers, and (c) the switching element based on the scanning signal and the video signal.
  • the liquid crystal is driven through the pixel electrode to display an image.
  • FIG. 1 is a cross-sectional configuration diagram illustrating an AMTLC device and a method of manufacturing the same according to an embodiment of the present invention.
  • FIG. 2 is a cross-sectional configuration diagram showing a conventional AMTLC device and a method of manufacturing the same.
  • Embodiment 1 an AMT LCD device and a method of manufacturing the same according to an embodiment of the present invention will be specifically described with reference to the drawings.
  • FIG. 1 is a partial cross-sectional view of an AMT LCD device according to the present embodiment, and the same portions as those in FIG.
  • the AMT LCD device of the present embodiment As shown in FIG. 1, the AMT LCD device of the present embodiment
  • a scanning signal wiring 2 which also serves as a TFT gate electrode arranged in a matrix on a glass substrate 1 and supplies a scanning signal to the TFT gate electrode;
  • a gate insulating film 3 for the gate electrode of T
  • a video signal wiring 5 which also serves as a source electrode connected to the TFT amorphous silicon film 4 and supplies a video signal;
  • a second insulating film 6 serving as a passivation insulating film acting as a TFT protective film, forming a second insulating layer
  • a plurality of pixel electrodes 7 are arranged in a matrix.
  • a plurality of TFTs are also arranged in a matrix corresponding to the pixel electrodes 7.
  • the video signal wiring 5 doubles as a source electrode connected to the TFT amorphous silicon film 4 and supplies a video signal to the pixel electrode 7 via the drain electrode 11.
  • the second insulating film 6 is, for example, SiNx, Si02, acrylic resin, polyimide, polyamide, polycarbonate, or a laminated film of these.
  • FIG. 1 showing the present embodiment The pixel electrode 7 and the drain electrode 11 are electrically connected via the contact hole pattern 8.
  • FIG. 1 showing the present embodiment The difference between FIG. 1 showing the present embodiment and FIG. 2 showing the conventional example is as follows.
  • the layer of the scanning signal wiring 2 and the layer of the video signal wiring 5 are electrically connected.
  • the contact hole pattern 10 is provided after the opening of the layer of the first insulating film 3 is removed. Then, the scanning signal wiring 2 and the video signal wiring 5 were directly electrically connected.
  • the opening on the surface of the scanning signal wiring 2 is formed by the first insulating film 3 and the second insulating This is performed by removing the film 6 at the same time.
  • the contact hole pattern 9 is formed between the pixel electrode 7 and the scanning signal wiring 2 so that a part of the pixel electrode 7 is electrically connected to the scanning signal wiring 2 in the surface opening. With this formation, the scanning signal wiring 2 and the video signal wiring 5 are electrically connected indirectly via the pixel electrode 7.
  • the number of cycles of the photolithography process can be set to five.
  • the lead time in the whole manufacturing process can be shortened, and the cost in the whole process is reduced.
  • a scanning signal wiring 2 is thin-film deposited on a glass substrate 1 by a sputtering film forming method
  • the step of the present invention is:
  • the surface opening of the scanning signal wiring 2 in the wiring conversion unit is formed by simultaneously removing the first insulating film 3 and the second insulating film 6 after the deposition of the second insulating film 6.
  • the scanning signal wiring 2 and the video signal wiring 5 are configured to be electrically connected indirectly via the pixel electrode 7.
  • the scanning signal wiring 2 and the video signal wiring 5 are mounted and mounted.
  • the photolitho cycle can be set to 5 times.
  • a pattern for removing an opening in the second insulating layer for mounting and wiring the scanning signal wiring and the video signal wiring is formed, and the scanning signal wiring layer and the video signal wiring are formed.
  • a pattern for removing the opening of the first insulating layer is formed (one time) in order to convert the layers of the TFT and the layers of the TFT array.
  • the scanning signal wiring layer and the video signal wiring layer can be electrically connected using the electrode layer.
  • the number of cycles of the photolithography process in the TFT array process can be reduced, the entire process lead time including that process can be shortened, and the cost in the entire TFT array manufacturing process can be reduced.

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  • Physics & Mathematics (AREA)
  • Nonlinear Science (AREA)
  • Mathematical Physics (AREA)
  • Chemical & Material Sciences (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • General Physics & Mathematics (AREA)
  • Optics & Photonics (AREA)
  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Liquid Crystal (AREA)
  • Thin Film Transistor (AREA)

Abstract

A pattern formation for partly removing a second insulating film (6) to make an opening so as to lay a scanning signal wiring (2) and a video signal wiring (5) and a pattern formation for partly removing a first insulating film (3) to make an opening so as to carry out layer conversion of the layer for the scanning signal wiring (2) and the layer for the video signal wiring (5) are simultaneously conducted. Hence the number of cycles in the photolithography processing of a TFT array process is five. The layer for the scanning signal wiring (2) and the layer for the video signal wiring (5) are electrically interconnected through the layer for a pixel electrode (7).

Description

明 細 害  Harm
ァクティブマ卜リクス方式液晶表示装置およびその製造方法 Active matrix liquid crystal display device and method of manufacturing the same
技術分野 Technical field
本発明は、 スイッチング素子により液晶を駆動して画像を表示するアクティブ マトリクス方式の液晶表示装置およびその製造方法に関するものである。 背景技術  The present invention relates to an active matrix type liquid crystal display device that displays an image by driving a liquid crystal by a switching element, and a method of manufacturing the same. Background art
近年では、 画像表示のために液晶を利用した表示装置が、 薄型および軽量でか つ低電力という従来の C R Tなどを利用したディスプレイにない特徴を有してい ることから、 広く使用されている。 中でも、 アクティブマトリクス方式の液晶表 示装置 （以降 AMT L CD装置と記す） は、 マトリクス状に配列された画素毎に 薄膜トランジスタ （以下、 T FTと記す） からなるスイッチング素子をもち、 そ のスイッチング素子により液晶を駆動して画像を表示する。 この AMT LCD装 置は、 クロストークの少ない鮮明な画像表示が得られることから、 ノー卜バソコ ンゃカーナビゲーシヨン装置のディスプレイ等に使用され、 近年、 急速に利用さ れるようになってきた。 以下、 従来の AMT L C D装置の一例について、 図面を用いて説明する。 図 2は従来の AM T 1_〇0装置の丁 FTを有するアレー部分の断面図である。 図 2に示すように、 従来の AMT L C D装置は、  In recent years, display devices that use liquid crystal for image display have been widely used because they have features that are not thin and light, and that have low power consumption, unlike conventional displays that use a CRT or the like. Among them, an active matrix type liquid crystal display device (hereinafter, referred to as an AMT LCD device) has a switching element composed of a thin film transistor (hereinafter, referred to as TFT) for each pixel arranged in a matrix, and the switching element. Drives the liquid crystal to display an image. The AMT LCD device is used for a display of a notebook computer navigation system and the like, since it can provide a clear image display with little crosstalk, and has been rapidly used in recent years. Hereinafter, an example of a conventional AMT LCD device will be described with reference to the drawings. FIG. 2 is a cross-sectional view of an array portion having a FT of a conventional AM T 1_〇0 device. As shown in Fig. 2, the conventional AMT LCD device
(a) T FTアレー部分における絶縁性透明基板であるガラス基板 1と、 (a) a glass substrate 1 which is an insulating transparent substrate in a TFT array portion,
(b)ガラス基板 1上にマ卜リクス状に配列された T FTのゲ一卜電極を 兼ね、その T F Tのゲー卜電極に走査信号を供給する走査信号配線 2 と、 (c)走査信号配線 2上に積層した第 1の絶縁層を成す第 1絶縁膜で、 T F(b) a scanning signal wiring 2 which also serves as a gate electrode of a TFT arranged in a matrix on a glass substrate 1 and supplies a scanning signal to the gate electrode of the TFT; (c) a first insulating film forming a first insulating layer laminated on the scanning signal wiring 2;
Tのゲー卜電極に対するゲー卜絶縁膜 3と、 A gate insulating film 3 for the gate electrode of T;
( 丁 丁の第1絶縁膜 （ゲート絶縁膜） 3の上に形成された T F Tのチ ャンネル領域を形成するァモルファスシリコン膜 4と、  (Amorphous silicon film 4 forming a TFT channel region formed on the first insulating film (gate insulating film) 3 of the
(e) T F Tのアモルファスシリコン膜 4に接続したソース電極を兼ね、 映 像信号を供給する映像信号配線 5と、  (e) a video signal wiring 5 which also serves as a source electrode connected to the TFT amorphous silicon film 4 and supplies a video signal;
(f) T F Tの保護膜として作用するパッシベーシヨン絶縁膜であり、 第 2 の絶縁体層を成す第 2絶縁膜 6と、  (f) a passivation insulating film acting as a protective film of TFT, a second insulating film 6 forming a second insulator layer,
(g)複数個がマトリクス状に配列された画素電極 7と、  (g) a plurality of pixel electrodes 7 arranged in a matrix,
(h)第 2絶縁膜 6であるパッシベーシヨン絶縁膜を開口除去した後に形 成したコンタク卜ホールパターン 8と、  (h) a contact hole pattern 8 formed after removing the opening of the passivation insulating film which is the second insulating film 6,
( i )第 1絶縁膜 3の層を開口除去した後にコンタク卜ホールパターン 1 0と、  (i) a contact hole pattern 10 after removing the opening of the first insulating film 3 layer;
(j )ドレイン電極 1 1  (j) Drain electrode 1 1
から構成されている。 It is composed of
上記の構成において、  In the above configuration,
(a)複数個の画素電極 7は、 マ卜リクス状に配列されている。  (a) The plurality of pixel electrodes 7 are arranged in a matrix.
(b)画素電極 7に対応して、 複数個の T F Tも、 マトリクス状に配列され ている。  (b) A plurality of TFTs are also arranged in a matrix in correspondence with the pixel electrodes 7.
(c)映像信号配線 5は、 T F Tのアモルファスシリコン膜 4に接続したソ ース電極を兼ね、 ドレイン電極 1 1を介して画素電極 7に映像信号を 供給する。  (c) The video signal wiring 5 doubles as a source electrode connected to the TFT amorphous silicon film 4 and supplies a video signal to the pixel electrode 7 via the drain electrode 11.
(d)第 2絶縁膜 6は、 T F Tの保護膜として作用するパッシベーション絶 縁膜であり、 第 2の絶縁層を成す。 以上のように構成された AMT LCD装置について、 その動作を以下に説明す る。 (d) The second insulating film 6 is a passivation insulating film acting as a protective film of the TFT, and forms a second insulating layer. The operation of the AMT LCD device configured as described above will be described below.
従来の AMT L CD装置は、  Conventional AMT LCD device
(a)まず、 走査信号配線 2に電圧が印加され、  (a) First, a voltage is applied to the scanning signal wiring 2,
(b)その電圧により、 アモルファスシリコン膜 4に T FTのチャンネルが 形成され、  (b) The voltage forms a TFT channel in the amorphous silicon film 4,
(c)チャンネルが形成されると、 映像信号配線 5から映像信号のが、 T F Tのチャンネルを通過してドレイン電極 1 1に流れ込み、 (c) When the channel is formed, the video signal from the video signal wiring 5 flows into the drain electrode 11 through the TFT channel,
(d)さらに、 映像信号は、 画素電極 7に伝わり、 (d) Further, the video signal is transmitted to the pixel electrode 7,
(e)その画素電極 7と平行に対向するカラーフィルタ （図示せず）部分に 設けられた対向電極 （図示せず） との間の電界により、 画素電極 7と 対向電極との間に注入され挟持された液晶の配向を任意に可変し、 (f)液晶の配向を任意に可変することによって、 光透過率を調整する ように動作する。  (e) An electric field is injected between the pixel electrode 7 and the counter electrode by an electric field between the pixel electrode 7 and a counter electrode (not shown) provided in a color filter (not shown) facing the pixel electrode 7 in parallel. (F) arbitrarily changing the orientation of the interposed liquid crystal, and (f) arbitrarily changing the orientation of the liquid crystal to adjust the light transmittance.
この動作によって、 所望の画像を作り出し、 AMT L CD装置の画面に画像を 表示する。 このような AMT L C D装置において、 ガラス基板 1上に T FTを形成するた めのアレープロセス工程は、  By this operation, a desired image is created and the image is displayed on the screen of the AMT LCD device. In such an AMT LCD apparatus, an array process step for forming a TFT on the glass substrate 1 is as follows.
(a)薄膜を形成した後、  (a) After forming a thin film,
(b)フォトリソ工程により、 レジス卜パターンを形成し、  (b) forming a resist pattern by a photolithography process;
(c)不要な薄膜部分をエッチング除去した後に、  (c) After removing unnecessary thin film portions by etching,
(d)レジス卜パターンを除去する  (d) Remove the resist pattern
という作業を、 サイクル的に繰り返す長く複雑な工程である。  This is a long and complicated process that is repeated in a cycle.
このフ才卜リソ工程のサイクル数を低減して全製造工程のリード夕ィ厶を短縮 することが、 製品のコス卜及び不良率の低減につながる。 上記のような A M T L C D装置の製造工程中のフ才卜リソ工程は、 Reducing the number of cycles in this lithography process and shortening the lead time for all manufacturing processes This leads to lower product costs and lower reject rates. The lithography process in the manufacturing process of the AMTLCD device as described above
(a)走査信号配線 2を形成するためのパターン形成し、  (a) forming a pattern for forming the scanning signal wiring 2;
(b)映像信号配線 5及びドレイン電極 1 1を形成するためのパターン形 成し、  (b) forming a pattern for forming the video signal wiring 5 and the drain electrode 11;
(c)アモルファスシリコン膜 4を形成するためのパターン形成し、  (c) forming a pattern for forming the amorphous silicon film 4,
(d)画素電極 7を形成するためのバタ一ン形成し、  (d) forming a pattern for forming the pixel electrode 7;
(e)走査信号配線 2および映像信号配線 5を実装配線するためにパッシ ベーション絶緣膜 6を開口除去するためのパターン形成し、  (e) forming a pattern for removing the opening of the passivation insulating film 6 for mounting and wiring the scanning signal wiring 2 and the video signal wiring 5;
(f)さらに、走査信号配線 2の層と映像信号配線 5の層とを層変換するた めに第 1絶縁膜 （ゲート絶縁膜） 3を開口除去するためのパターンを 形成する、  (f) Further, a pattern for removing an opening in the first insulating film (gate insulating film) 3 to convert a layer of the scanning signal wiring 2 and a layer of the video signal wiring 5 is formed.
の計 6回繰リ返されることになる。 しかしながら上記のような従来の A M T L C D装置を製造するための製造方法 では、 上述のように、 フォトリソ工程のサイクル数は 6回必要である。 そのフ才 卜リソ工程が、 全体の工程リードタイムを非常に長くするため、 全製造プロセス におけるコス卜を引き上げる要因となるという問題点を有していた。 発明の関示 Will be repeated six times in total. However, in the conventional manufacturing method for manufacturing an AMTLC device as described above, the number of photolithography process cycles is six as described above. The lithographic process has a problem in that the overall process lead time becomes very long, which causes a rise in cost in the entire manufacturing process. Guidance of invention
本発明は、 上記従来の問題点を解決するもので、 T F Tアレープロセスにおけ るフォ卜リソ工程のサイクル数を低減し、 その工程を含む全体のプロセスリード タイムを短縮することができ、 T F Tアレーの全製造プロセスにおけるコス卜を 削減することができる A M T L C D装置およびその製造方法を提供する。 上記の課題を解決するために本発明の A M T L C D装置およびその製造方法は、 (a)走査信号配線および映像信号配線を実装配線するために第 2の絶縁 層を開口除去するためのパターン形成と、 The present invention solves the above-mentioned conventional problems, and can reduce the number of photolithography process cycles in a TFT array process, shorten the overall process lead time including that process, and provide a TFT array. Provided is an AMTLCD device and a method for manufacturing the same, which can reduce costs in the entire manufacturing process. In order to solve the above problems, an AMTLCD device and a method of manufacturing the same according to the present invention include (a) forming a pattern for removing an opening in a second insulating layer for mounting and wiring a scanning signal wiring and a video signal wiring;
(b)走査信号配線の層と映像信号配線の層とを層変換するために第 1の 絶緣層を開口除去するためのパターン形成  (b) Pattern formation for removing the opening of the first insulating layer in order to convert between the scanning signal wiring layer and the video signal wiring layer
を同時に （〗回で） 行う。 Are performed simultaneously (同時 に times).
したがって、 T F Tアレープロセスにおけるフォ卜リソ工程のサイクル数は、 5回になる。 また、 画素電極の層を利用して走査信号配線層と映像信号配線層と の間を電気的に接続することを特徴とする。  Therefore, the number of cycles of the photolithography step in the TFT array process is five. Further, the invention is characterized in that the scanning signal wiring layer and the video signal wiring layer are electrically connected using the pixel electrode layer.
本発明の A M T L C D装置は、  The AMTLCD device of the present invention
(a)対向する絶縁性透明基板間に液晶を挟持し、  (a) sandwiching liquid crystal between opposing insulating transparent substrates,
(b)その液晶を表示画像に対応する走査信号および映像信号により駆動 して、 前記画面上に画像を表示する。  (b) The liquid crystal is driven by a scanning signal and a video signal corresponding to a display image to display an image on the screen.
その A M T L C D装置において、 画像表示のための複数の画素が前記絶縁性透 明基板上にマ卜リクス状に配列されたアレー部分の構成は、  In the AMTLCD device, the configuration of an array portion in which a plurality of pixels for image display are arranged in a matrix on the insulating transparent substrate is as follows:
(a)少なくとも、前記画素毎に対応してマトリクス状に配列された複数の 画素電極と、  (a) at least a plurality of pixel electrodes arranged in a matrix corresponding to each pixel;
(b)前記画素電極毎に対応して配列された薄膜トランジスタからなる複 数のスイッチング素子と、  (b) a plurality of switching elements composed of thin film transistors arranged corresponding to each of the pixel electrodes,
(c)前記複数のスィツチング素子の各ゲー卜電極に前記走査信号を供給 する複数の走査信号配線と、  (c) a plurality of scanning signal lines for supplying the scanning signal to each gate electrode of the plurality of switching elements;
(d)前記複数のスィツチング素子の各ソース電極およびドレイン電極を 介して前記画素電極に前記映像信号を供給する複数の映像信号配線 と、 (e)前記複数の走査信号配線上に積層して前記複数のスィツチング素子 のゲー卜電極に対する絶縁膜となる第 1の絶縁層と、 (d) a plurality of video signal wirings for supplying the video signal to the pixel electrode via each source electrode and drain electrode of the plurality of switching elements; (e) a first insulating layer laminated on the plurality of scanning signal wirings and serving as an insulating film for the gate electrodes of the plurality of switching elements;
(f)前記複数の映像信号配線上に積層して前記複数のスイッチング素子 に対する保護膜となる第 2の絶縁層と  (f) a second insulating layer laminated on the plurality of video signal wirings and serving as a protective film for the plurality of switching elements;
を備えている。 It has.
上記のように構成することにより、 本発明のァクティブマ卜リクス方式の液晶 表示装置は、  With the above configuration, the active matrix liquid crystal display device of the present invention is
(a)前記画素電極を、 その一部が、 映像信号配線と第 2の絶縁層に形成さ れたコンタク卜木一ルパターンを介して電気的に導通し、 (b)かつ走査信号配線と第 1 および第 2の絶縁層に形成されたコンタク 卜ホールパターンを介して電気的に導通するよう形成し、 (c)前記走査信号および映像信号による前記スィツチング素子の才ン才 フによリ、 前記画素電極を通じて前記液晶を駆動し画像を表示する。 以上により、 T F Tアレープロセスにおけるフォトリソ工程のサイクル数を低 減し、 その工程を含む全体のプロセスリードタイムを短縮することができ、 T F Tアレーの全製造プロセスにおけるコス卜を削減することができる。 図面の簡単な説明  (a) a part of the pixel electrode is electrically connected to the video signal wiring via a contact tree pattern formed on the video signal wiring and the second insulating layer; Formed so as to be electrically conductive via contact hole patterns formed in the first and second insulating layers, and (c) the switching element based on the scanning signal and the video signal. The liquid crystal is driven through the pixel electrode to display an image. As described above, the number of photolithography process cycles in the TFT array process can be reduced, the overall process lead time including that process can be shortened, and costs in the entire TFT array manufacturing process can be reduced. BRIEF DESCRIPTION OF THE FIGURES
【図 1】 本発明の実施の形態の A M T L C D装置およびその製造方法を示 す断面構成図  FIG. 1 is a cross-sectional configuration diagram illustrating an AMTLC device and a method of manufacturing the same according to an embodiment of the present invention.
【図 2】 従来の A M T L C D装置およびその製造方法を示す断面構成図 発明を実施するための最良の形態  FIG. 2 is a cross-sectional configuration diagram showing a conventional AMTLC device and a method of manufacturing the same.
実施の形態 1 以下、 本発明の実施の形態を示す AMT LCD装置およびその製造方法につい て、 図面を参照しながら具体的に説明する。 Embodiment 1 Hereinafter, an AMT LCD device and a method of manufacturing the same according to an embodiment of the present invention will be specifically described with reference to the drawings.
図 1は本実施の形態の AMT LCD装置における一部断面図であり、 従来例を 示す図 2と同じ部分については同一の符号を付す。  FIG. 1 is a partial cross-sectional view of an AMT LCD device according to the present embodiment, and the same portions as those in FIG.
図 1 に示すように、 本実施の形態の AMT L C D装置は、  As shown in FIG. 1, the AMT LCD device of the present embodiment
(a)絶縁性透明基板であるガラス基板 1 と、  (a) a glass substrate 1 which is an insulating transparent substrate,
(b)ガラス基板 1上にマトリクス状に配列された T FTのゲー卜電極を 兼ね、 その T F Tのゲート電極に走査信号を供給する走査信号配線 2 と、  (b) a scanning signal wiring 2 which also serves as a TFT gate electrode arranged in a matrix on a glass substrate 1 and supplies a scanning signal to the TFT gate electrode;
(c)走査信号配線 2上に積層した第 1の絶縁層を成す第 1絶縁膜で、 T F (c) a first insulating film forming a first insulating layer laminated on the scanning signal wiring 2;
Tのゲー卜電極に対するゲ一卜絶縁膜 3と、 A gate insulating film 3 for the gate electrode of T;
(d) T FTの第 1絶縁膜 （ゲー卜絶縁膜） 3の上に形成された T FTのチ ャンネル領域を形成するアモルファスシリコン膜 4と、 (d) an amorphous silicon film 4 forming a TFT channel region formed on a first insulating film (gate insulating film) 3 of the TFT;
(e) T FTのアモルファスシリコン膜 4に接続したソース電極を兼ね、 映 像信号を供合する映像信号配線 5と、 (e) a video signal wiring 5 which also serves as a source electrode connected to the TFT amorphous silicon film 4 and supplies a video signal;
(f) T FTの保護膜として作用するパッシベーシヨン絶縁膜であり、 第 2 の絶縁体層を成す第 2絶縁膜 6と、  (f) a second insulating film 6 serving as a passivation insulating film acting as a TFT protective film, forming a second insulating layer;
(g)複数個がマトリクス状に配列された画素電極 7と、  (g) a plurality of pixel electrodes 7 arranged in a matrix,
(h)第 2絶縁膜 6であるパッシベ一シヨン絶縁膜を開口除去した後に形 成したコンタクトホールパターン 8と、  (h) a contact hole pattern 8 formed after removing the opening of the passivation insulating film as the second insulating film 6,
(i)画素電極 7と走査信号配線 2間にコンタク卜ホールパターン 9と、 (j) T F Tのァモルファスシリコン膜 4に接続したドレイン電極 1 1 から構成されている。  (i) a contact hole pattern 9 between the pixel electrode 7 and the scanning signal wiring 2; and (j) a drain electrode 11 connected to the amorphous silicon film 4 of TFT.
上記の構成において、  In the above configuration,
(a)複数個の画素電極 7がマトリクス状に配列されている。 (b)画素電極 7に対応して、 複数個の T F Tも、 マトリクス状に配列され ている。 (a) A plurality of pixel electrodes 7 are arranged in a matrix. (b) A plurality of TFTs are also arranged in a matrix corresponding to the pixel electrodes 7.
(c)映像信号配線 5は、 T F Tのアモルファスシリコン膜 4に接続したソ ース電極を兼ね、 ドレイン電極 1 1を介して画素電極 7に映像信号を 供給する。  (c) The video signal wiring 5 doubles as a source electrode connected to the TFT amorphous silicon film 4 and supplies a video signal to the pixel electrode 7 via the drain electrode 11.
(d)第 2絶縁膜 6は、 例えば S i N x、 S i 02、 アクリル樹脂、 ポリイ ミド、 ポリアミド、 ポリカーボネー卜、 またはこれらの積層膜である。  (d) The second insulating film 6 is, for example, SiNx, Si02, acrylic resin, polyimide, polyamide, polycarbonate, or a laminated film of these.
(e)画素電極 7とドレイン電極 1 1は、コンタク卜ホールパターン 8を介 して電気的に接続する。 本実施の形態を示す図 1が従来例を示す図 2と異なるところは以下の通りであ る。  (e) The pixel electrode 7 and the drain electrode 11 are electrically connected via the contact hole pattern 8. The difference between FIG. 1 showing the present embodiment and FIG. 2 showing the conventional example is as follows.
相違点は、 走査信号配線 2の層と映像信号配線 5の層とを電気的に接続する点 である。 従来では、 図 2に示すように、 コンタクトホールパターン 1 0は、 第 1 絶縁膜 3の層を開口除去した後に設けていた。 そして、 走査信号配線 2と映像信 号配線 5とを直接電気的に接続していた。  The difference is that the layer of the scanning signal wiring 2 and the layer of the video signal wiring 5 are electrically connected. Conventionally, as shown in FIG. 2, the contact hole pattern 10 is provided after the opening of the layer of the first insulating film 3 is removed. Then, the scanning signal wiring 2 and the video signal wiring 5 were directly electrically connected.
これに対し、 本実施の形態では、 図 1の配線変換部に示すように、 走査信号配 線 2の表面における開口は、 第 2絶縁膜 6の堆積以降に第 1絶縁膜 3と第 2絶縁 膜 6とを同時に除去することにより行う。 その表面開口部において、 画素電極 7 の一部が走査信号配線 2と導通するように、 コンタクトホールパターン 9は、 画 素電極 7と走査信号配線 2間に形成する。 この形成によって、 走査信号配線 2と 映像信号配線 5は、 画素電極 7を介して間接的に電気的接続がなされる。  On the other hand, in the present embodiment, as shown in the wiring conversion section in FIG. 1, the opening on the surface of the scanning signal wiring 2 is formed by the first insulating film 3 and the second insulating This is performed by removing the film 6 at the same time. The contact hole pattern 9 is formed between the pixel electrode 7 and the scanning signal wiring 2 so that a part of the pixel electrode 7 is electrically connected to the scanning signal wiring 2 in the surface opening. With this formation, the scanning signal wiring 2 and the video signal wiring 5 are electrically connected indirectly via the pixel electrode 7.
本実施の形態では、  In the present embodiment,
(a)走査信号配線 2及び映像信号配線 5を実装するための第 2絶縁膜 6 であるパッシベーション絶縁膜を開口除去するパターンの形成と、 (b)走査信号配線 2の層と映像信号配線 5の層を層変換するための第 1 絶縁膜 3であるゲー卜絶縁膜を開口除去するパターンの形成 は同時に （1回で） 行われる。 (a) formation of a pattern for removing an opening in a passivation insulating film which is a second insulating film 6 for mounting the scanning signal wiring 2 and the video signal wiring 5, (b) The pattern for opening and removing the gate insulating film, which is the first insulating film 3, for converting the layer of the scanning signal wiring 2 and the layer of the video signal wiring 5 is performed simultaneously (one time).
したがって、上記のフォ卜リソ工程のサイクル数は、 5回にすることができる。 全製造プロセスにおけるリードタイムは短縮することができ、 全プロセスにおけ るコス卜は削減される。  Therefore, the number of cycles of the photolithography process can be set to five. The lead time in the whole manufacturing process can be shortened, and the cost in the whole process is reduced.
このような構成の A M T L C D装置のアレー基板作成方法としては、  As a method of making an array substrate of an AMLTC device having such a configuration,
(a)まず、ガラス基板 1上に走査信号配線 2をスパッタリング成膜法にて 薄膜堆積を行い、  (a) First, a scanning signal wiring 2 is thin-film deposited on a glass substrate 1 by a sputtering film forming method,
(b)フ才卜リソ工程、エッチング工程にて走査信号配線 2のパターニング を行う。  (b) Patterning of the scanning signal wiring 2 is performed in a lithography process and an etching process.
このような薄膜堆積、 フォ卜リソ工程、エッチング工程のパターニングを繰り 返すことにより、 本発明の工程は、  By repeating such patterning of thin film deposition, photolithography step and etching step, the step of the present invention is:
(a)アモルファスシリコン膜 4を形成し、  (a) An amorphous silicon film 4 is formed,
(b)映像信号配線 5を形成し、  (b) forming the video signal wiring 5,
(c)及びドレイン電極〗 1を形成し、  (c) and forming a drain electrode〗 1,
(d)画素電極 7を形成する。  (d) The pixel electrode 7 is formed.
このように、 配線変換部における走査信号配線 2の表面開口部は、 第 2絶縁膜 6の堆積以降に、 第 1絶縁膜 3と第 2絶縁膜 6とを同時に除去することにより、 形成する。 走査信号配線 2と映像信号配線 5は、 画素電極 7を介して間接的に電 気的接続がなされるように構成する。 このように構成した A M T L C D装置で は、 走査信号配線 2及び映像信号配線 5を実装配線するために、  As described above, the surface opening of the scanning signal wiring 2 in the wiring conversion unit is formed by simultaneously removing the first insulating film 3 and the second insulating film 6 after the deposition of the second insulating film 6. The scanning signal wiring 2 and the video signal wiring 5 are configured to be electrically connected indirectly via the pixel electrode 7. In the AMTLC device thus configured, the scanning signal wiring 2 and the video signal wiring 5 are mounted and mounted.
(a)パッシベ一ション絶緣膜を開口除去するためのパターンの形成と、 (a) forming a pattern for removing an opening in the passivation insulating film;
(b)走査信号配線 2の層と映像信号配線 5の層とを層変換するためにゲ 一卜絶縁膜を開口除去するためのパターンの形成 は、 同時に （ 1回で） 行われる。 (b) Forming a pattern for removing an opening in the gate insulating film in order to convert between the layer of the scanning signal wiring 2 and the layer of the video signal wiring 5 Are done simultaneously (once).
したがって、 フォトリソサイクルは 5回にすることができる。  Therefore, the photolitho cycle can be set to 5 times.
その結果、 アレープロセスにおいて、 薄膜堆積、 フォトリソ工程、 エッチング 工程、 その他洗浄工程等の多くの工程が必要であったものを大幅に低減すること ができる。 また、 アレープロセスリードタイムも大幅に短縮することができると ともに、 プロセスコス卜をも削減することができる。 産業上の利用可能性  As a result, it is possible to significantly reduce the number of steps required for the array process, such as thin film deposition, photolithography, etching, and other cleaning steps. In addition, the array process lead time can be significantly reduced, and the process cost can be reduced. Industrial applicability
以上のように本発明によれば、 走査信号配線および映像信号配線を実装配線す るために第 2の絶縁層を開口除去するためのパ夕一ン形成、 走査信号配線の層と 映像信号配線の層とを層変換するために第 1の絶縁層を開口除去するためのバタ ーン形成を同時に （1回で） 行い、 T F Tアレープロセスにおけるフォトリソェ 程のサイクル数を 5回にするとともに、 画素電極の層を利用して走査信号配線層 と映像信号配線層との間を電気的に接続することができる。  As described above, according to the present invention, a pattern for removing an opening in the second insulating layer for mounting and wiring the scanning signal wiring and the video signal wiring is formed, and the scanning signal wiring layer and the video signal wiring are formed. At the same time, a pattern for removing the opening of the first insulating layer is formed (one time) in order to convert the layers of the TFT and the layers of the TFT array. The scanning signal wiring layer and the video signal wiring layer can be electrically connected using the electrode layer.
そのため、 T F Tアレープロセスにおけるフォ卜リソ工程のサイクル数を低減 し、 その工程を含む全体のプロセスリードタイムを短縮することができ、 T F T アレーの全製造プロセスにおけるコストを削減することができる。  Therefore, the number of cycles of the photolithography process in the TFT array process can be reduced, the entire process lead time including that process can be shortened, and the cost in the entire TFT array manufacturing process can be reduced.

Claims

請求の範囲 The scope of the claims
1 . アクティブマトリクス方式の液晶表示装置であって、 1. An active matrix liquid crystal display device,
(a) 複数のスィツチング素子の各ゲー卜電極に走査信号を供給する複 数の走査信号配線と、  (a) a plurality of scanning signal wirings for supplying a scanning signal to each gate electrode of a plurality of switching elements;
(b) 前記複数のスィツチング素子の各ソース電極およびドレイン電極 を介して画素電極に映像信号を供給する複数の映像信号配線と、 (b) a plurality of video signal wirings for supplying a video signal to a pixel electrode via each source electrode and drain electrode of the plurality of switching elements;
(c) 前記複数の走査信号配線上に積層して前記複数のスィツチング素 子のゲー卜電極に対する第 1の絶縁層と、 (c) a first insulating layer for the gate electrodes of the plurality of switching elements stacked on the plurality of scanning signal wirings,
(d) 前記複数の映像信号配線上に積層して前記複数のスィツチング素 子に対する第 2の絶縁層と  (d) a second insulating layer laminated on the plurality of video signal wirings and corresponding to the plurality of switching elements;
を備え、 With
(e) 前記画素電極の一部が、 映像信号配線と第 2の絶縁層に形成され たコンタクトホールパターンを介して電気的に導通し、 かつ、 走査信号 配線と第 1および第 2の絶縁層に形成されたコンタク卜ホールパターン を介して電気的に導通する  (e) a part of the pixel electrode is electrically connected to the video signal wiring via a contact hole pattern formed in the second insulating layer, and the scanning signal wiring is connected to the first and second insulating layers. Conduction through the contact hole pattern formed in the
よう形成したことを特徴とする。 It is characterized in that it is formed as follows.
2 . 請求項 1記載のァクティブマ卜リクス方式の液晶表示装置であって、第 1 の絶縁層が、 半導体層を含む積層構造であることを特徴とする。 2. The active matrix liquid crystal display device according to claim 1, wherein the first insulating layer has a laminated structure including a semiconductor layer.
3 . 請求項 1または請求項 2いずれかに記載のアクティブマトリクス方式の液晶 表示装置であって、 第 2の絶縁層が、 アクリル樹脂、 ポリイミド、 ポリアミド、 ポリカーボネー卜等の透明樹脂か、 これらを含む積層構造であることを特徴とす る。 3. The active matrix liquid crystal display device according to claim 1 or 2, wherein the second insulating layer is a transparent resin such as an acrylic resin, a polyimide, a polyamide, or a polycarbonate. It is characterized by having a laminated structure including.
4 . アクティブマトリクス方式の液晶表示装置の製造方法であって、 画像表示の ための複数の画素が、 絶縁性透明基板上にマ卜リクス状に配列されたアレー部分 の複数のスィツチング素子を含む構成要素の形成工程として、 4. A method of manufacturing an active matrix liquid crystal display device, wherein a plurality of pixels for displaying an image includes a plurality of switching elements in an array portion arranged in a matrix on an insulating transparent substrate. As the element formation process,
(a) 少なくとも、 前記複数のスイッチング素子の各ゲ一卜電極に走査 信号を供給する複数の走査信号配線および前記各ゲ一卜電極となる ゲ一卜ダミー配線を選択エッチングして形成する第 1 の工程と、 (b) 前記複数のスィツチング素子の各チャンネル部を規定する第 2の 工程と、  (a) A first method in which at least a plurality of scanning signal wirings for supplying a scanning signal to each gate electrode of the plurality of switching elements and a gate dummy wiring serving as each of the gate electrodes are formed by selective etching. (B) a second step of defining each channel of the plurality of switching elements;
(c) 前記複数のスイッチング素子の各ソース電極およびドレイン電極 を介して前記画素電極に前記映像信号を供給する複数の映像信号配 線、 および前記各ソース電極となるソースダミー配線を選択エツチ ングして形成する第 3の工程と、  (c) selecting and etching a plurality of video signal lines for supplying the video signals to the pixel electrodes via the respective source electrodes and drain electrodes of the plurality of switching elements, and a source dummy line serving as the respective source electrodes; A third step of forming
(d) 前記複数の走査信号配線上に積層して前記複数のスィツチング素 子のゲート電極に対する絶縁膜、 および前記複数の映像信号配線上 に積層して前記複数のスィツチング素子に対する保護膜となる各絶 縁層を選択エッチングし、 前記複数の走査信号配線および複数の映 像信号配線を同時に表面に開口する第 4の工程と、  (d) an insulating film laminated on the plurality of scanning signal wirings to form a gate electrode of the plurality of switching elements and a protective film laminated to the plurality of video signal wirings on the plurality of switching elements; A fourth step of selectively etching the insulating layer and simultaneously opening the plurality of scanning signal wirings and the plurality of video signal wirings on the surface;
(e) 前記画素電極を選択ェッチングして形成する第 5の工程と、 (f ) 前記走査信号配線または映像信号配線のいずれか一方の層で実装 端子を形成し、 その上に前記画素電極の層を積層し、 その上に異方 性導電膜等の導電膜を用いて圧着実装する第 6の工程と を有することを特徴とする。  (e) a fifth step of forming the pixel electrode by selective etching, and (f) forming a mounting terminal on one of the layers of the scanning signal wiring or the video signal wiring, and forming a mounting terminal thereon. A sixth step of laminating the layers and pressure-bonding the layers using a conductive film such as an anisotropic conductive film.
5 . 請求項 4記載のアクティブマトリクス方式の液晶表示装置の製造方法で 訂正された用紙 （規則 91 ) あって、 前記第 1から第 6の工程を、 その順序で実行することを特徴とする。 5. Paper corrected by the method of manufacturing an active matrix liquid crystal display device according to claim 4 (Rule 91) The first to sixth steps are performed in that order.
PCT/JP1999/004606 1998-09-04 1999-08-26 Active matrix liquid crystal device and method for producing the same WO2000014600A1 (en)

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8736780B2 (en) 2001-05-16 2014-05-27 Samsung Display Co., Ltd. Thin film transistor array substrate for liquid crystal display

Families Citing this family (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB0126720D0 (en) * 2001-11-07 2002-01-02 Koninkl Philips Electronics Nv Active matrix pixel device
KR100525437B1 (en) * 2002-04-19 2005-11-02 엘지.필립스 엘시디 주식회사 Liquid crystal display device and method for fabricating the same
TWI358053B (en) 2002-12-06 2012-02-11 Samsung Electronics Co Ltd Liquid crystal display device having a thin film t
KR100965175B1 (en) * 2002-12-06 2010-06-24 삼성전자주식회사 Thin film transistor substrate, method of manufacturing the same and liquid crystal display device having the same
CN100403359C (en) * 2003-07-10 2008-07-16 友达光电股份有限公司 Film electric crystal array having spare signal line
TWI282001B (en) * 2003-09-19 2007-06-01 Sharp Kk Active substrate, display apparatus and method for producing display apparatus
JP2005215275A (en) * 2004-01-29 2005-08-11 Quanta Display Japan Inc Liquid crystal display and its manufacturing method
US7579224B2 (en) * 2005-01-21 2009-08-25 Semiconductor Energy Laboratory Co., Ltd. Method for manufacturing a thin film semiconductor device
CN101359669B (en) * 2007-07-31 2010-06-16 北京京东方光电科技有限公司 TFT LCD array substrate construction and manufacturing method thereof
JP6335652B2 (en) 2014-05-27 2018-05-30 三菱電機株式会社 Display device and thin film transistor manufacturing method

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH05243333A (en) * 1992-02-26 1993-09-21 Nec Corp Thin film field-effect transistor substrate
JPH06208137A (en) * 1993-01-13 1994-07-26 Fujitsu Ltd Manufacture of thin film transistor matrix
JPH0850308A (en) * 1994-06-03 1996-02-20 Furontetsuku:Kk Production of electrooptical element
JPH09113932A (en) * 1995-10-19 1997-05-02 Fujitsu Ltd Wiring board and its production
JPH10232409A (en) * 1996-12-18 1998-09-02 Nec Corp Thin film transistor array substrate and its manufacture

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH04333828A (en) * 1991-05-09 1992-11-20 Sony Corp Liquid crystal display device
KR100190041B1 (en) * 1995-12-28 1999-06-01 윤종용 Method of fabricating liquid crystal display device
KR100552286B1 (en) * 1998-05-29 2006-05-11 삼성전자주식회사 Thin film transistor liquid crystal display device and manufacturing method thereof

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH05243333A (en) * 1992-02-26 1993-09-21 Nec Corp Thin film field-effect transistor substrate
JPH06208137A (en) * 1993-01-13 1994-07-26 Fujitsu Ltd Manufacture of thin film transistor matrix
JPH0850308A (en) * 1994-06-03 1996-02-20 Furontetsuku:Kk Production of electrooptical element
JPH09113932A (en) * 1995-10-19 1997-05-02 Fujitsu Ltd Wiring board and its production
JPH10232409A (en) * 1996-12-18 1998-09-02 Nec Corp Thin film transistor array substrate and its manufacture

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8736780B2 (en) 2001-05-16 2014-05-27 Samsung Display Co., Ltd. Thin film transistor array substrate for liquid crystal display

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