WO1997036464A1 - Production de plaquettes a circuits electriques - Google Patents

Production de plaquettes a circuits electriques Download PDF

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Publication number
WO1997036464A1
WO1997036464A1 PCT/GB1997/000883 GB9700883W WO9736464A1 WO 1997036464 A1 WO1997036464 A1 WO 1997036464A1 GB 9700883 W GB9700883 W GB 9700883W WO 9736464 A1 WO9736464 A1 WO 9736464A1
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WO
WIPO (PCT)
Prior art keywords
layer
resist
conductive
resist layer
substrate
Prior art date
Application number
PCT/GB1997/000883
Other languages
English (en)
Inventor
Wrenford John Thatcher
Original Assignee
Coates Brothers Plc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Coates Brothers Plc filed Critical Coates Brothers Plc
Priority to AU21718/97A priority Critical patent/AU2171897A/en
Priority to GB9723848A priority patent/GB2315164B/en
Publication of WO1997036464A1 publication Critical patent/WO1997036464A1/fr

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Classifications

    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/22—Secondary treatment of printed circuits
    • H05K3/24—Reinforcing the conductive pattern
    • H05K3/245—Reinforcing conductive patterns made by printing techniques or by other techniques for applying conductive pastes, inks or powders; Reinforcing other conductive patterns by such techniques
    • H05K3/247—Finish coating of conductors by using conductive pastes, inks or powders
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/22—Secondary treatment of printed circuits
    • H05K3/24—Reinforcing the conductive pattern
    • H05K3/241—Reinforcing the conductive pattern characterised by the electroplating method; means therefor, e.g. baths or apparatus
    • H05K3/242—Reinforcing the conductive pattern characterised by the electroplating method; means therefor, e.g. baths or apparatus characterised by using temporary conductors on the printed circuit for electrically connecting areas which are to be electroplated
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/46—Manufacturing multilayer circuits
    • H05K3/4644—Manufacturing multilayer circuits by building the multilayer layer by layer, i.e. build-up multilayer circuits
    • H05K3/465—Manufacturing multilayer circuits by building the multilayer layer by layer, i.e. build-up multilayer circuits by applying an insulating layer having channels for the next circuit layer
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/09—Use of materials for the conductive, e.g. metallic pattern
    • H05K1/092—Dispersed materials, e.g. conductive pastes or inks
    • H05K1/095—Dispersed materials, e.g. conductive pastes or inks for polymer thick films, i.e. having a permanent organic polymeric binder
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/03—Conductive materials
    • H05K2201/0332—Structure of the conductor
    • H05K2201/0364—Conductor shape
    • H05K2201/0376—Flush conductors, i.e. flush with the surface of the printed circuit
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/05—Patterning and lithography; Masks; Details of resist
    • H05K2203/0502—Patterning and lithography
    • H05K2203/054—Continuous temporary metal layer over resist, e.g. for selective electroplating
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/0011—Working of insulating substrates or insulating layers
    • H05K3/0017—Etching of the substrate by chemical or physical means
    • H05K3/0023—Etching of the substrate by chemical or physical means by exposure and development of a photosensitive insulating layer
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/02—Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding
    • H05K3/04—Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding the conductive material being removed mechanically, e.g. by punching
    • H05K3/045—Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding the conductive material being removed mechanically, e.g. by punching by making a conductive layer having a relief pattern, followed by abrading of the raised portions
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/02—Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding
    • H05K3/06—Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding the conductive material being removed chemically or electrolytically, e.g. by photo-etch process
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/02—Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding
    • H05K3/06—Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding the conductive material being removed chemically or electrolytically, e.g. by photo-etch process
    • H05K3/061—Etching masks
    • H05K3/064—Photoresists
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/10—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern
    • H05K3/107—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern by filling grooves in the support with conductive material
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/10—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern
    • H05K3/108—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern by semi-additive methods; masks therefor
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/38—Improvement of the adhesion between the insulating substrate and the metal
    • H05K3/386—Improvement of the adhesion between the insulating substrate and the metal by the use of an organic polymeric bonding layer, e.g. adhesive
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
    • H05K3/4038—Through-connections; Vertical interconnect access [VIA] connections
    • H05K3/4053—Through-connections; Vertical interconnect access [VIA] connections by thick-film techniques
    • H05K3/4069—Through-connections; Vertical interconnect access [VIA] connections by thick-film techniques for via connections in organic insulating substrates
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/46—Manufacturing multilayer circuits
    • H05K3/4644—Manufacturing multilayer circuits by building the multilayer layer by layer, i.e. build-up multilayer circuits

Definitions

  • the present invention relates to a process for forming a conductive path during the production of electrical circuit boards, such as printed circuit boards.
  • electrically conductive paths upon printed circuit boards and the like have generally been manufactured by a subtractive method (i.e. by etching away undesired portions of a layer of electrically conductive material - typically copper extending over the surface of a board).
  • the subtractive method normally begins with a substrate to which a conductive layer of copper or some other metal has been applied.
  • the conductive paths which interconnect the circuit components are produced by masking the areas of copper or metal required to make up the circuit with a protective layer, usually referred to as resist.
  • a protective layer usually referred to as resist.
  • the substrate is sprayed with a corrosive etchant solution the unprotected areas are etched away. Those areas beneath the resist however are protected by it and so remain on the substrate.
  • the resist layer is then stripped away using a suitable solvent or caustic stripping solution to reveal the desired circuit pattern.
  • the resist layer pattern may for example be defined using a silk printing screen.
  • the resist pattern may also be produced by exposing a photosensitive resist layer to UV radiation through a suitable piece of art-work, such that the pattern required to define the circuit is rendered insoluble in dilute alkaline solutions.
  • the areas not required to define the circuit are soluble in the dilute alkaline solution and so may be washed away, leaving or "developing" the resist in the pattern of the circuit required.
  • the resists used in this application are then generally stripped in caustic solutions.
  • conductive polymer thick film This utilises metal filled (PTF) inks to define conductive circuit tracks.
  • PPF metal filled
  • the conductive polymer inks are however very limited in their electrical conductivity and the process is therefore limited to a few specific applications.
  • Some other additive processes include the use of metal filled inks.
  • the need to ensure that such metallic inks are firmly bonded to the substrates employed means that an adhesive resin normally needs to be included in the ink composition to effect the bonding.
  • a typical ink of this kind is disclosed in WO 93/06943.
  • This ink is a mixture of a relatively high melting point metal powder, solder powder, a cross linking flux and a reactive monomer or polymer.
  • the reactive monomer or polymer system acts as an adhesive for bonding the ink to the substrate after curing/drying.
  • the flux may be selected so as only to be activated at a predetermined elevated temperature.
  • Some additive processes are suitable not only for forming a single conductive path (wiring line) on a substrate but also for fabricating more complicated wiring patterns comprising a network of wiring lines included at two or more layers known as a "multilayer circuit".
  • wiring lines in one layer may be insulated from, or make contact with respective wiring layers as an adjacent layer in accordance with the circuit design. This is effected by arranging the wiring line topography and presence or absence of insulation between wiring lines in adjacent layers as desired.
  • a flash coating 3 of a metal having a few microns thickness On a substrate 1 is formed a "flash" coating 3 of a metal having a few microns thickness, by electroless deposition A patterned resist 5 is formed on the flash coating 3, as shown in Figure IA
  • metal conductive tracts 7 are formed by electroplating, using the flash coating 3 as an electrode Obviously, the tracks 7 are only formed between the portions of the resist pattern 5
  • the present invention now provides a process for producing a circuit board which process comprises the steps of forming a conductive layer and a resist layer above a substrate, patterning the resist layer to define a wiring pattem and forming conductive tracks in the wiring pattem by electrolysis using the conductive layer as an electrode, characterized in that the conductive layer is formed as a coating of a conductive ink formed over the patterned resist.
  • an adhesive layer is applied to the substrate and the resist layer is applied over the adhesive layer.
  • the primary desirability for such an adhesive layer is to assist adhesion of the conductive ink coating rather than the resist layer per se Use of such an adhesive coating is disclosed in our International Patent Application No. PCT/GB96/00105, unpublished before the priority date of the present application
  • the adhesive is applied to a thickness of 8 - 12 microns by screen printing, using a fine mesh typically 150T/cm
  • the coating may also be applied by other means such as roller coating, dip coating or spray. It is unlikely that under most conditions, curtain coating could render a sufficiently thin film reliably, although this is not excluded from the ambit of the present invention.
  • Preferred adhesive materials for this purpose are those which show good thermal stability and a degree of reactivity to epoxy, phenolic or carboxyiic acid group containing materials.
  • Materials which typically may be used in this application are; epoxy resins, epoxy acrylates or carboxylates, high melting point polyamide resins mixed with epoxy resins, together with a suitable cure catalyst.
  • These epoxy resins may be materials such as epoxy novolaks or bisphenol-A epoxy resins. These materials are dissolved in organic solvents to render them coatable.
  • the adhesive may be a single component adhesive or a two-component adhesive system.
  • Third components are as recited in the preceding paragraph but in any event, generally speaking epoxy resin, novolak resins, epoxy novolak resins, acrylate resins and polyamide resins are generally preferred, together with a catalyst for effecting curing of said resin at an elevated temperature.
  • Most preferred are carboxylated epoxy acrylate resins, such as those used for the preparation of solder masks.
  • High melting point polyamides are also much preferred, such as Versamid
  • epoxy novolak resins such as Quatrex 2410 produced by Dow Chemicals.
  • Altematively bisphenol-A type epoxy resins such as Epikote 1001 (Shell Chemicals), dissolved in propylene glycol diacetate or other suitable solvent.
  • the adhesive composition is made up of a 60 to 70% solids solution of the adhesive resin in solvent.
  • Suitable thermal cure catalysts for the polyamide-epoxy mixture are dicyandiamide and Epikure 143FF (Shell Chemicals).
  • the thickness of adhesive coating needs to be limited so that it forms a suitable dielectric layer if a conductive base or substrate (such as aluminium) is used but not so thick that it penetrates to an excessive extent into the conductive ink formed thereon and reduces the electrical conductivity of that ink.
  • Preferred adhesive coating thicknesses are in the range of from 4 to 15 most preferably from 8 to 12 microns.
  • the resist layer may be applied in the form of a dry film resist or more preferably, as a liquid resist composition of a photoimageable resist material which is preferably dried but not cured prior to any subsequent steps of the process.
  • a photoimageable resist material which is preferably dried but not cured prior to any subsequent steps of the process.
  • those photoimageable resists which are developable by application of a solution of an alkali or, of an organic solvent, or both.
  • Typical photoimageable resist materials are those used for the preparation of photoimageable solder masks, many of which are commercially available, include the liquid products sold as ImagecureTM by Coates, ProbimerTM by Ciba and PSR 4000TM by Taiyo or dry film products sold, for example, by Dupont, Morton Thiokol, Hitachi and others.
  • the liquid products are supplied as two pack systems although single pack systems such as those described in patent GB-1-2 032 939 may also be used.
  • a typical formulation for this type of material comprises from 50 to 60% epoxy novolak acrylate resin solution, from 3 to 5% photoreactive monomers, from 4 to 6% photoinitiators, from 25 to 30% inorganic fillers, optionally from 2 to 5% pigment and optionally from 0 5 to 2% defoamers and flow aids Wherever used herein, unless indicated to the contrary, all percentages are percentages by weight
  • a second cross linking component may be added
  • a typical cross linking agent is made up of an unreacted epoxy resin and cure catalyst dissolved in a solvent and optionally filled with one or a number of inorganic filler materials
  • Alkali soluble versions of such resists are typically based on a carboxylated epoxy novolak acrylate resin, produced by reacting an epoxy novolak resin with a mixture of saturated and unsaturated monocarboxylic acids The hydroxyl groups formed by this reaction are then used to react dicarboxylic acid anhydrides onto the polymer, ring opening them to give free carboxyiic acid groups. These confer solubility in mild alkali solutions on the material.
  • This resin is dissolved in an organic solvent in a mixture with radiation sensitive oligomeric materials, photoinitiators, fillers, flow aids, pigments an defoamers.
  • the carboxylated epoxy novolak acrylate resin referred to in the preceding paragraph may be the reaction product of an epoxy phenol or cresol novolak with a mixture of acrylic, methacrylic, hexanoic or benzoic acids, which may have been carboxylated with maleic, succinic, thetrahydro- or hexahydrophthalic anhydrides. Properties may be further enhanced by the inco ⁇ oration of further organic acids.
  • the resin being dissolved in a suitable solvent such as propylene glycol diacetate, propylene glycol methyl ether acetate, ethyl ethoxy propionate or dipropylene glycol methyl ether acetate.
  • the thermal hardening component of the resist typically comprises from 35 to 50% epoxy resin, from 15 to 30% inorganic filler and from 1 to 7% thermal curing catalyst, the balance being solvent.
  • the epoxy resin may be an epoxy novolak resin or a bis-phenol A type epoxy resin like Epikote 1004 (Shell Chemicals)
  • Inorganic fillers which may be used are barium sulphate, talc and silica
  • the thermal cure catalyst may be an amine compound such as diamino diphenylmethane or dicyandiamide and the solvent may be a glycol ether or ester such as propylene glycol monomethyl ether acetate
  • Formulations for suitable photoimageable systems also include those described in GB-A-2 175 908.
  • the photoimageable resist layer may be applied by a variety of means including screen printing, roller coating, dry film lamination, curtain coating or airless spraying, depending of course on the kind of resist in question
  • a photoimageable resist material will usually comprise a photoinitiator, especially one of a type which preferentially hardens the surface of the photoimageable layer.
  • a photoinitiator especially one of a type which preferentially hardens the surface of the photoimageable layer.
  • the use of such materials helps to emphasis the definition of the undercut in the track formed in the developed photoimageable material.
  • Another way of forming a relatively hardened "skin" over the upper surface and undercut walls of the developed photoresist layer is to incorporate therein, a pigment or other solid material for limiting penetration of UV radiation into the body of the layer
  • the tracks formed in such developed photoimageable layer are formed with side walls which become further apart, the greater the depth from the upper surface of the photoimageable layer.
  • the track is formed with an "undercut" This provides a dovetail anchor for the solid conductive material formed after sintering of the ink. This is also described in our International Patent Application No. PCT/GB96/00105, unpublished at the priority date of this application.
  • the photoimageable material can be formed with intrinsic adhesive properties and with a sufficient quality of undercut, it is possible to dispense with the adhesive layer used in the first aspect of the present invention.
  • the conductive ink this can be applied for example, by silk-screen printing process or better by atomised spray application.
  • the conductive ink is made up of metal powders rendered to a printable consistency by the addition of liquid resins
  • the conductive ink material typically contains about 75% total metal powder (which may be silver, copper, bronze, or carbon, or other suitable conductive materials) and 25% resin, although variations ranging from 60% to 90% metal or carbon powders have been found to be beneficial.
  • the metal powders used typically have a particle size range of 2-20 microns preferably as small as possible.
  • the resin component used in the formulation of the conductive ink is solubilized in a suitable solvent which will evaporate readily at temperatures under 100°C but will not present or promote undue health hazards.
  • Typical solvents include ethane, propylene methyl ether acetate or a high boiling point aromatic solvent.
  • the resin might comprise a single or two pack epoxy, epoxy novolac, PVB, melamine, phenolic resole, cresilic resole, alkyd or combination of these or other suitable resins.
  • the ratio of sizes of the metal powders as well as their composition is of particular significance; this relates to the surface area to be wetted out by the resin and consequently influences the final conductivity of the metal ink.
  • a suitable surfactant and/or adhesion promoter such as a silicone resin may also be included to enhance bonding to the adhesive layer (or FR4) and enable the dried conductive ink to resist attack during the plating process.
  • a further resist layer is applied over the conductive ink coating.
  • This may be of any resist type suitable for the purpose, e.g. as hereinbefore defined. However, preferably it is a photoimageable resist.
  • the further resist layer is selectively removed to leave regions thereof remaining above the patterned resist and thereafter, the electrolysis operation is effected. After this electrolysis, the remaining regions of the further resist layer are then removed, together with any conductive ink which has not been covered by the electroplating process.
  • the process of the present invention can then be used to form a multilayer circuit by repeating the equivalent steps used to form the first layer, sta ⁇ ing with the optional application of the adhesive layer. It is important to note that if the electrical connection is required between two conductive tracks in adjacent layers, either the optional adhesive layer must be omitted between layers, or else it must be selectively removed to permit electrical contact to take place.
  • the process of the present invention may also be utilised for the plating of a through-hole in a double-sided circuit board.
  • a region of the substrate which includes at least one through-hole is subjected on both sides thereof, to the process of the present invention.
  • Figures 1 A to IE show the basic steps a known electrolysis-based technique for forming single or multilayer circuit boards
  • Figures 2A to 2H show the steps of a preferred embodiment of a method according to the present invention
  • Figure 3 shows the formation of an undercut in a resist layer to assist adhesion of a conductive ink layer applied in one stage of the method of Figure 2A to 2H;
  • Figure 4 shows how the method described with respect to Figures 2A to 2H can be applied to plating of a through-hole in a double sided circuit board.
  • Figures 2 A - 2H show the basic steps of a preferred embodiment of a process according to the present invention and in particular, Figure 2A shows the first stage, whereby upon a substrate 21, is first formed an adhesive layer 23. Over the adhesive layer, a photoimageable resist layer is formed which is patterned and developed to leave a resist pattem 25.
  • a conductive ink layer 27 is formed over the resist pattem 25 and the spaces 29 between respective parts of the resist layer, as well as to the outside edges 31.
  • This conductive ink layer is dried but not cured.
  • a relatively thick layer of etch resist or plating resist 33 is formed over the resist pattem 25 and spaces 29, therebetween but not over the outside edges 31 In this way, only the resist pattem 25 and the gaps 29 defining the intended wiring pattem are covered by this resist layer 33 As with the conductive ink, the plating/etch resist layer 33 is dried but not cured
  • the etch/plating resist is developed so that the parts 35 of the plating/etch resist layer 33 above the underlying resist pattem 25 are only those that remained and the other parts overlying the tracks 29 between the resist pattem 25 are selectively removed
  • An electroplating step is used to deposit copper tracks 37 over those parts of the conductive ink layer 31 which are not covered by the remnant portions 35 of the plating etch resist.
  • the remnant parts 35 of the plating/etch resist layer 33 are removed, e.g. by mechanical means (abrasion) or using a solvent or alkali or acid medium, as appropriate This is shown in Figure 2G
  • Figure 2H shows the first stage of how a multilayer circuit wiring pattem may be formed
  • another adhesive layer 39 On top of this adhesive layer 39, is formed another resist layer which is patterned to form a second resist pattem 41 It will be seen that the adhesive layer 39 and resist pattem 41 correspond to the adhesive layer 23 and resist pattem 25 shown in Figure 2A.
  • Figure 3 shows how adhesion/retention of a wiring track 37 with its underlying remnant portion of the conductive ink layer 31 may be assisted
  • This drawing corresponds to a view of one wiring track of the structure shown in Figure 2G
  • the developing/processing of the image resist pattem 25 to leave tracks 29, is formed such that respective side walls 45, 47 become further apart, the deeper the distance from the upper surface 49 of the resist pattem 25, towards the adhesive layer 23
  • undercuts 51, 53 are defined by these side walls 15, 17 to form a "dove tail" physical retention feature for the wiring track 37 and remnant underlying part of the conductive mk 31
  • Figure 4 shows how a conductive through-hole 61 can be formed in a double sided circuit board 63, using the aforementioned process
  • the same reference numerals used in Figures 2A-2H denote that the same integers as in the latter figures
  • both sides of the substrate 21 are subjected to the same series of steps described above with respect to Figures 2A-2F
  • the resist pattem 25 is formed to extend to the respective edges 65, 67 of the hole 61 but no further
  • the conductive ink layer 31 then extends from one side to the other of the board, continuously around the wall 69 of the hole 61
  • the upper plating/etch resist layer 33 is imaged and removed so also to extend to the edges 65, 67 of the hole 61 but not to extend across the hole 61 itself
  • the electrode plating leaves a cylindrical conductive portion 71 extending through the hole 61
  • a through-lead or component connection (as appropriate) can be made contact to this conductive wall portion 71 by soldering. If it is desired to make further connection, e g to a wiring track on top of or below the board, a relevant part of the upper plating resist layer 35 can be selectively removed so that the electroplating makes continuous connection with the conductive through-hole wall portion 71 as approp ⁇ ate
  • Example 1 but conductive ink comprising Epikure 1009 epoxy resin in place of PVB/Phenolic resin.
  • Example 1 but conductive ink comprising Melamine/Alkyd resin combination in place of PVB/Phenolic resin.
  • Example 1 As Example 1 but with silver powder replaced by carbon graphite powders in the ratio carbon/graphite 35%.
  • Example 1 As Example 1 but with silver powder replaced by a bronze powder of 10 micron particle size.
  • Example 1 but with a silicon surfactant/adhesive promotor ex Dow Chemicals used to provide adhesion and prevent plating damage to conductive ink.

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  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Manufacturing Of Printed Wiring (AREA)

Abstract

L'invention concerne un procédé pour produire des plaquettes à circuits. Une couche conductrice (27) et une couche protectrice (25) sont formées sur un substrat (21). La couche protectrice (25) forme un motif, ce motif définissant un motif de conducteurs. Une électrolyse est utilisée pour définir le motif (37) des conducteurs, en utilisant la couche conductrice (27) comme électrode de galvanoplastie. La couche conductrice (27) est formée en tant que revêtement d'une encre conductrice, sur la couche protectrice (25) formant un motif.
PCT/GB1997/000883 1996-03-27 1997-03-27 Production de plaquettes a circuits electriques WO1997036464A1 (fr)

Priority Applications (2)

Application Number Priority Date Filing Date Title
AU21718/97A AU2171897A (en) 1996-03-27 1997-03-27 Production of electrical circuit boards
GB9723848A GB2315164B (en) 1996-03-27 1997-03-27 Production of electrical circuit boards

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
GB9606497.7 1996-03-27
GBGB9606497.7A GB9606497D0 (en) 1996-03-27 1996-03-27 Production of electrical circuit boards

Publications (1)

Publication Number Publication Date
WO1997036464A1 true WO1997036464A1 (fr) 1997-10-02

Family

ID=10791156

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/GB1997/000883 WO1997036464A1 (fr) 1996-03-27 1997-03-27 Production de plaquettes a circuits electriques

Country Status (3)

Country Link
AU (1) AU2171897A (fr)
GB (2) GB9606497D0 (fr)
WO (1) WO1997036464A1 (fr)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB2336161A (en) * 1998-04-06 1999-10-13 John Michael Lowe Providing conductive tracks on a printed circuit
US6939447B2 (en) 1998-04-06 2005-09-06 Tdao Limited Method of providing conductive tracks on a printed circuit and apparatus for use in carrying out the method
CN113923881A (zh) * 2020-07-10 2022-01-11 安诺电子股份有限公司 导电线路选镀方法

Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2425790A1 (fr) * 1978-05-08 1979-12-07 Limours Const Meca Elect El Perfectionnements aux circuits imprimes et a leurs procedes de fabrication
DE2856888A1 (de) * 1978-12-30 1980-07-17 Licentia Gmbh Verfahren zur herstellung von leiterplatten
EP0071375A2 (fr) * 1981-07-25 1983-02-09 Kazuo Kay Procédé de fabrication d'une plaquette de circuit comportant un trou transversale
US4581301A (en) * 1984-04-10 1986-04-08 Michaelson Henry W Additive adhesive based process for the manufacture of printed circuit boards
US4756929A (en) * 1983-11-10 1988-07-12 Sullivan Donald F High density printing wiring
EP0335565A2 (fr) * 1988-03-28 1989-10-04 Hitachi Chemical Co., Ltd. Procédé de fabrication de circuits imprimés
WO1990012482A2 (fr) * 1989-04-11 1990-10-18 Coates Brothers Plc Plaquettes de circuit imprime

Patent Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2425790A1 (fr) * 1978-05-08 1979-12-07 Limours Const Meca Elect El Perfectionnements aux circuits imprimes et a leurs procedes de fabrication
DE2856888A1 (de) * 1978-12-30 1980-07-17 Licentia Gmbh Verfahren zur herstellung von leiterplatten
EP0071375A2 (fr) * 1981-07-25 1983-02-09 Kazuo Kay Procédé de fabrication d'une plaquette de circuit comportant un trou transversale
US4756929A (en) * 1983-11-10 1988-07-12 Sullivan Donald F High density printing wiring
US4581301A (en) * 1984-04-10 1986-04-08 Michaelson Henry W Additive adhesive based process for the manufacture of printed circuit boards
EP0335565A2 (fr) * 1988-03-28 1989-10-04 Hitachi Chemical Co., Ltd. Procédé de fabrication de circuits imprimés
WO1990012482A2 (fr) * 1989-04-11 1990-10-18 Coates Brothers Plc Plaquettes de circuit imprime

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB2336161A (en) * 1998-04-06 1999-10-13 John Michael Lowe Providing conductive tracks on a printed circuit
US6524462B1 (en) 1998-04-06 2003-02-25 Technology Development Associate Operations Limited Method of providing conductive tracks on a printed circuit and apparatus for use in carrying out the method
GB2336161B (en) * 1998-04-06 2003-03-26 John Michael Lowe Method of providing conductive tracks on a printed circuit and apparatus for use in carrying out the method
US6939447B2 (en) 1998-04-06 2005-09-06 Tdao Limited Method of providing conductive tracks on a printed circuit and apparatus for use in carrying out the method
US6949171B2 (en) 1998-04-06 2005-09-27 Tdao Limited Method of providing conductive tracks on a printed circuit and apparatus for use in carrying out the method
CN113923881A (zh) * 2020-07-10 2022-01-11 安诺电子股份有限公司 导电线路选镀方法

Also Published As

Publication number Publication date
GB2315164A (en) 1998-01-21
GB9606497D0 (en) 1996-06-05
GB9723848D0 (en) 1998-01-07
AU2171897A (en) 1997-10-17
GB2315164B (en) 2000-09-20

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