US3662458A - Electrical contact for silicon carbide members - Google Patents

Electrical contact for silicon carbide members Download PDF

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US3662458A
US3662458A US835017A US3662458DA US3662458A US 3662458 A US3662458 A US 3662458A US 835017 A US835017 A US 835017A US 3662458D A US3662458D A US 3662458DA US 3662458 A US3662458 A US 3662458A
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gold
tantalum
silicon carbide
aluminum
layer
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Napolean P Formigoni
John S Roberts
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CBS Corp
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Westinghouse Electric Corp
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/40Electrodes ; Multistep manufacturing processes therefor
    • H01L29/43Electrodes ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
    • H01L29/45Ohmic electrodes
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/48Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/482Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of lead-in layers inseparably applied to the semiconductor body
    • H01L23/485Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of lead-in layers inseparably applied to the semiconductor body consisting of layered constructions comprising conductive layers and insulating layers, e.g. planar contacts
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/0002Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10STECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S438/00Semiconductor device manufacturing: process
    • Y10S438/931Silicon carbide semiconductor

Definitions

  • Thin films of tantalum and gold are alternately deposited on the exposed surface of the silicon carbide. Any tantalum and gold deposited on the aluminum forms an alloy which is readily removed by an etchant which attacks tantalum-gold-aluminum intermetallics but will not attack the tantalum-gold alloy electrical contact of i the body.
  • This invention relates to the making of ohmic electrical contacts to bodies of silicon carbide particularly for producing semiconductor devices, and specifically, to an electrical contact consisting of an alloy produced by applying to the silicon carbide alternate layers of tantalum and gold, and methods for producing the same.
  • One known method of contacting silicon carbide electrically is to alloy a pellet of silicon to the silicon carbide body and then affix an electrical contact to silicon. This method is accomplished in a vacuum at a temperature of from 1,500 to l,800 C. However, this method is impractical for small devices wherein the contact is of the order of 1 mil and tolerances encountered vary from I to 1% mil. All contacts preferably should be made at the same time. Equally spaced contacts requiring an array of pellets of silicon are impractical.
  • a second known method electrically contacting the silicon carbide body is to prepare a molten metal mixture consisting of 90 percent by weight tantalum and the balance gold.
  • a cast is made of the molten metal mixture and preforms are prepared from the cast. These preforms are then alloyed at a high temperature to the silicon carbide body to form an electrical contact.
  • this method is of limited utility since it is suitable only for making microscopic electrical contacts to silicon carbide and it is impractical for making electrical contacts in the microscopic range required for microelectronic size devices where clearances of 1 mil and tolerances between sections often are from b to 1 mil.
  • An object of this invention is to provide a method to provide an electrical contact consisting of an alloy of tantalum and gold affixed to selected areas and in precise configuration with close tolerances to a body of silicon carbide material.
  • a body of silicon carbide having at least one ohmic electrical contact consisting of a gold-tantalum alloy affixed to a selected portion of the surface of the body.
  • the electrical contact is initially of a laminated construction before heat treatment and consists of at least four alternate vacuum deposited thin film layers of tantalum and gold which are subsequently alloyed with each other and with the silicon carbide of the body.
  • the alloy contact is from about 1,000 to 10,000 A in thickness.
  • the process for applying the electrical contact is:
  • a thin silicon oxide coating on the silicon carbide body preferably by oxidizing the body on the face perpendicular to the C-axis of a hexagonal crystal, the oxide being about 1,000 to 3,000 A thick,
  • a tantalum layer being the first applied to the silicon carbide, at least to provide a total of four layers, suitable overall thickness being about 3,000 A,
  • FIGS. 1 and 2 are elevation views in cross-section of portion of a body of silicon carbide semiconductor material being processed in accordance with the teachings of this invention.
  • the electrical contact of this invention is suitable for use with any body of silicon carbide and is particularly suitable for semiconductor devices whether or not the body has any p-n junction contained therein.
  • the invention In order to describe the invention more particularly the invention will be described relative to the afiixing of electrical contacts to a portion of a junctiongate type unipolar transistor.
  • FIG. 1 there is shown a portion 10 of junction gate type unipolar transistor.
  • the portion 10 is made of hexagonal single crystal silicon carbide semiconductor material suitably doped to form regions 12, 14 and 16 of p-type semiconductivity and region 18 of n-type semiconductivity.
  • pn junctions 20, 22 and 24 are between the respective regions 12 and l8, l4 and 18, and 16 and 18. All the p-n junctions 20, 22 and 24 have end portions exposed in a planar surface 26 which is also the top surface of the transistor.
  • a bottom surface 28 of the transistor and the surface 26 are opposed major surfaces of the transistor.
  • a layer 30 of silicon oxide is formed by suitable means on at least the surface 26 of the portion 10.
  • the layer 30 of silicon oxide may be formed by vapor deposition on the surface 26 or by thermal conversion of a part of the surface 26 from silicon carbide to silicon oxide. Either method is suitable and is well known to those skilled in the art.
  • the layer 30 must be continuous but need not be uniform in thickness. A thickness of 1,000 to 3,000 A has been found to be sufficient for the layer 30 for the process of this invention. Employing known photolithographical masking techniques followed by selective etching, windows are open in the layer 30 to expose one or more selected surface areas of silicon carbide of regions 14, 16 and 18 to which electrical contacts are to be made.
  • the layer 30 of silicon oxide enables one to form the electrical contacts easier than if the layer 30 was not present. This layer is also essential to protect and isolate the surface of the silicon carbide device during subsequent processing.
  • the silicon oxide of the layer confines the tantalum and gold to the selected contact areas only during the alloying process step.
  • masking the surface 26 include, such for example, metal masks and photoresist materials, and in some cases could be employed instead of oxide layer 30.
  • the portion 10 with the layer 30 of silicon oxide having windows therein is disposed in a vacuum metal deposition chamber and a thin layer 32 of aluminum is deposited over at least the entire oxide layer 30, exposed surfaces of the regions 14, 16 and 18.
  • the thickness of the aluminum layer 32 is important. Sufiicient aluminum is required to form an intermetallic mixture with the gold and tantalum metals of the electrical contact having properties which enable the selective removal of the metals from the non-contact fonning areas. If the aluminum layer 32 is too thin, all of the gold-tantalum, metal is not completely stripped away from the areas where it is not desired, and if the layer 32 is too thick then the gold-tantalum alloy at the electrical contact areas may be attacked by the etchants. It has been determined that where the gold tantalum layer has an overall thickness of 3,000 A, the layer 32 of aluminum should preferably be approximately 10,000 A, and may be from about 5,000 to 20,000 A.
  • the thickness of the aluminum layer 32 is small enough that the pattern of the exposed contact areas etched in the layer 30 is visible through the layer 32. This enables accurate placement of masks by photolithographical techniques and selective etching so that the aluminum is removed from the windows in the layer 30 of silicon oxide to again expose the selected electrical contact areas of the regions 14, 16 and 18.
  • the portion of the unipolar transistor is disposed in a vacuum metal deposition chamber and alternate layers 34 and 36 of first tantalum and then gold are deposited on at least the aluminum layer 32 and the exposed selective surface areas of the regions 14, 16 and 18 without breaking the vacuum.
  • the ratio of the total of tantalum to gold is from 1:5 to 1:15 by volume. It has been determined that a minimum total number of four alternate layers 34 and 36 is sufficient, but the best results were obtained when the total number of layers were from 8 to 10.
  • the total thickness of the deposited gold and tantalum layers 34 and 36 may range from 1,000 to 10,000 A.
  • the vacuum system is equipped with facilities for sputtering gold and tantalum, for example, from separate crucibles, with movable covers according to a suitable alternating sequence without breaking the vacuum.
  • the silicon carbide bodies are subjected to considerable heat during the metal deposition process. However, the amount of heat the body is subjected to can be varied considerably without affecting appreciably the metal deposition rates.
  • the tantalum and gold plated portion 10 is removed from the vacuum evaporation chamber and any excess tantalum and gold over the aluminized areas and all of the aluminum are removed by any one of several methods.
  • One method consists of disposing the plated portion 10 in a concentrated solution of sodium hydroxide. It appears that the sodium hydroxide rapidly attacks the aluminum, dissolving it, and the tantalum and gold deposited on the aluminum is so thin that is is readily removed by floating it away. As mentioned before, if the layer 32 is too thick then the tantalum-gold layers 34 and 36 deposited on the exposed surfaces of the regions 14, 16 and 18 may be also attacked by the sodium hydroxide solution.
  • An alternate method of removing the aluminum and any tantalum and gold from undesired areas when it is over aluminum is to first treat the portion 10 of the transistor with the deposited alternate layers at an elevated temperature either in a vacuum or in a controlled furnace atmosphere wherein the atmosphere may be nitrogen, oxygen or argon. During heat treatment at about 300 C. 20 C. for up to 16 hours, it appears that the gold difluses through the intervening layers 34 of tantalum of the stratified structure and into the layer 32 of aluminum where an aluminum-gold-tantalum interrnetallic compound is formed.
  • the chemical constitution of the intermetallic mixture is such that it is readily attacked and removed by etchants such, for example, as sodium hydroxide and phosphoric acid while leaving the stratified contact structure above the exposed silicon carbide surface intact.
  • the remaining portions of tantalum and gold layers 34 and 36 are disposed directly on the selected areas of silicon carbide are then subjected to an elevated temperature comprising an initial preheating for a period of some minutes followed by a brief flash or pulse heating for several seconds at 1,500 to l,700 C.
  • the initial preheating is from 850 to l,050 C in a vacuum, for example, from 10" torr to l0" torr.
  • a preferred temperature is 900 C. and a preferred vacuum is 10" torr.
  • the initial heating of the gold and tantalum metal layers is to promote the interdiffusing of metals into each other without melting the gold.
  • the heating in vacuum eliminates any complications which may arise from oxidation of any of the materials.
  • This heat treatment is for a period of time sufficient to allow extensive and thorough diffusion of gold throughout the tantalum thereby obtaining a sufficient homogeneity of the metals to fonn an alloy with themselves and to be alloyed to the silicon carbide.
  • This preheating step was found to be necessary to avoid the segregation of the gold when alloying of the contact to the silicon carbide is perfonned.
  • the portion 10 is heated first a temperature of from 850 to l,050 C. for a period of at least 10 minutes. A period of from 14 to 16 minutes is found to be sufficient.
  • the heating at the higher temperature varies with apparatus design and heating means is performed for a pulse of time of the order of 10 seconds and not exceeding about 15 seconds at a maximum temperature of from l,500 to l,700 C.
  • the resulting structure is shown in FIG. 2 in which electrical contacts 38, 40, and 42 are the alloyed electrical contacts to the respective regions l8, l4 and 18.
  • the heating at the higher temperature for the short duration is desirable, because it has been found that this process step improves the ohmic characteristics of the tantalum-gold electrical contacts.
  • the temperature is reduced immediately to below the solidification temperature of gold to prevent its loss by evaporation.
  • the electrical contacts of this invention exhibit a more linear l-V characteristic and have a lower contact resistance than the prior art electrical contacts, and in particular the tantalum-gold electrical contacts of the prior art.
  • the electrical contacts of this invention have good physical adhesion to the silicon carbide material, low contact resistance, and resistance to oxidation even when the silicon carbide devices are operated at temperatures of 500 C. Additionally, gold wire leads may be bonded to the electrical contacts of this invention by the conventional thermocompression bonding process more easily than prior art devices.-
  • Ohmic tantalum-gold electrical contacts were affixed to a Junction-Gate Unipolar Transistor, a portion of the same design being shown in FIG. 2. Five electrical contacts were required, the contacts consisting of two source, two gate and one drain.
  • the wafer After formation of the required regions in an initial n-type semiconductivity wafer of silicon carbide, the wafer was heated to a temperature of l,l70 C. 2 20 C. for 30 minutes in the presence of argon gas saturated with water vapor at l00 C. Oxidation of the wafer was continued for 30 minutes.
  • the layer of silicon oxide thermally grown was 2,500 A in thickness.
  • the wafer was then placed in a vacuum system equipped with facilities for the vapor deposition of aluminum.
  • a vacuum of torr was established and a layer of aluminum 10,000 A in thickness was vapor deposited on the oxide coated surface of the wafer including the windows for the contacts to the wafer.
  • the wafer was then placed in a vacuum system equipped with facilities for sputtering gold and tantalum according to a predetermined alternate deposition technique.
  • a vacuum of 10' torr was established in the system and five layers of tantalum alternated with four layers of gold was sputtered onto at least the surface areas of the silicon wafer to which electrical contacts are made and the aluminum layer about each of the windows.
  • the proportion of gold to tantalum was 86% Au to 14% Ta by volume (approximately 6:1) and each layer was deposited to provide its prorata amount of metal for the overall contact.
  • the deposition process took 40 minutes.
  • the overall thickness of the deposited tantalum and gold layers was 3,000 A.
  • the wafer was then placed in a saturated solution of sodium hydroxide. ln 3 minutes all the aluminum and the excess tantalum and gold had been removed from the wafer. Tantalum and gold remained in the windows of the silicon oxide layer.
  • the wafer was then placed in a vacuum system and a vacuum of the order of 10 torr was established.
  • the wafer was then heated in the vacuum to 900 C. 50 C. for 15 minutes.
  • the temperature of the wafer was then rapidly increased to l,600 C. 100 C. and held at maximum temperature for about 10 seconds, after which the wafer was cooled to room temperature and removed from the vacuum system.
  • the wafer was sectioned and mounted for examination of some of the contacts. All contacts exhibited a sound structure alloyed to the silicon carbide wafer. The gold had diffused through the tantalum layers. The silicon oxide had confined the tantalum and gold to the contact windows during alloying. The remaining contacts were checked for physical bonding to the wafer. The physical bond proved to be excellent with the material of the wafer being removed with the contacts when they were stripped from the wafer.
  • the thickness of the layer of aluminum is 10,000 A.

Abstract

Tantalum and gold alloy electrical contacts are applied to selected areas of a body of silicon carbide. An oxidized surface is first produced on the silicon carbide body and removed from those portions of the surface to which the alloy contact of the body is to be applied. A thin layer of aluminum is deposited on only the oxidized surface. Thin films of tantalum and gold are alternately deposited on the exposed surface of the silicon carbide. Any tantalum and gold deposited on the aluminum forms an alloy which is readily removed by an etchant which attacks tantalum-gold-aluminum intermetallics but will not attack the tantalum-gold alloy electrical contact of the body.

Description

United States Patent Formigoni et a1.
[ 51 May 16,1972
[72] Inventors: Napolean P. Formigoni, Pittsburgh; John S. Roberts, Export, both of Pa.
Westinghouse Electric Corporation, Pittsburgh, Pa.
[22] Filed: June 20,1969
[21] Appl.No.: 835,017
[73] Assignee:
[56] References Cited UNITED STATES PATENTS 3,492,719 2/1970 Zeitman et a1 ..29/590 3,516,914 6/1970 Hall ..l56/l7 Primary Examiner.lohn F. Campbell Assistant Examiner-D. M. Heist Att0rneyF. Shapoe and C. L. Menzemer ABS'I RACT Tantalum and gold alloy electrical contacts are applied to selected areas of a body of silicon carbide. An oxidized surface is first produced on the silicon carbide body and removed from those portions of the surface to which the alloy contact of the body is to be applied. A thin layer of aluminum is deposited on only the oxidized surface. Thin films of tantalum and gold are alternately deposited on the exposed surface of the silicon carbide. Any tantalum and gold deposited on the aluminum forms an alloy which is readily removed by an etchant which attacks tantalum-gold-aluminum intermetallics but will not attack the tantalum-gold alloy electrical contact of i the body.
7 Claims, 2 Drawing Figures ELECTRICAL CONTACT FOR SILICON CARBIDE MEMBERS GOVERNMENT CONTRACT The invention herein described was made in the course of, or under a contract or subcontract thereunder, with NASA. The contract is NAS 8-1 1861.
BACKGROUND OF THE INVENTION 1. Field of the Invention This invention, relates to the making of ohmic electrical contacts to bodies of silicon carbide particularly for producing semiconductor devices, and specifically, to an electrical contact consisting of an alloy produced by applying to the silicon carbide alternate layers of tantalum and gold, and methods for producing the same.
2. Description of the Prior Art The formation of ohmic contacts on bodies of silicon carbide semiconductor material encounters the problems of the high temperature requirements for metallurgically alloying metals to silicon carbide as well as the tendency of the contacts to exhibit non-linear I-V characteristics and high contact resistance approaching an order of l megohm.
One known method of contacting silicon carbide electrically is to alloy a pellet of silicon to the silicon carbide body and then affix an electrical contact to silicon. This method is accomplished in a vacuum at a temperature of from 1,500 to l,800 C. However, this method is impractical for small devices wherein the contact is of the order of 1 mil and tolerances encountered vary from I to 1% mil. All contacts preferably should be made at the same time. Equally spaced contacts requiring an array of pellets of silicon are impractical.
A second known method electrically contacting the silicon carbide body is to prepare a molten metal mixture consisting of 90 percent by weight tantalum and the balance gold. A cast is made of the molten metal mixture and preforms are prepared from the cast. These preforms are then alloyed at a high temperature to the silicon carbide body to form an electrical contact. However this method is of limited utility since it is suitable only for making microscopic electrical contacts to silicon carbide and it is impractical for making electrical contacts in the microscopic range required for microelectronic size devices where clearances of 1 mil and tolerances between sections often are from b to 1 mil.
OBJECTS OF THE INVENTION An object of this invention is to provide a method to provide an electrical contact consisting of an alloy of tantalum and gold affixed to selected areas and in precise configuration with close tolerances to a body of silicon carbide material.
Other objects of this invention will, in part, be obvious and will, in part, appear hereinafter.
SUMMARY OF THE INVENTION In accordance with the teachings of this invention there is provided a body of silicon carbide having at least one ohmic electrical contact consisting of a gold-tantalum alloy affixed to a selected portion of the surface of the body. The electrical contact is initially of a laminated construction before heat treatment and consists of at least four alternate vacuum deposited thin film layers of tantalum and gold which are subsequently alloyed with each other and with the silicon carbide of the body. The alloy contact is from about 1,000 to 10,000 A in thickness. Briefly the process for applying the electrical contact is:
1. Provide a thin silicon oxide coating on the silicon carbide body, preferably by oxidizing the body on the face perpendicular to the C-axis of a hexagonal crystal, the oxide being about 1,000 to 3,000 A thick,
2. Mask the oxide to expose selected areas where the alloy contacts are to be applied, and etch away or otherwise remove the silicon oxide from the exposed selected areas, and remove the mask,
3. Apply a vacuum deposited layer of aluminum on the silicon oxide coating remaining on the silicon carbide; if the aluminum is applied to all the surfaces, it may be removed from the exposed selected areas free of silicon oxide by appropriate masking and etching,
4. Deposit upon the surfaces of the aluminized silicon carbide body thin alternate layers of gold and tantalum, a tantalum layer being the first applied to the silicon carbide, at least to provide a total of four layers, suitable overall thickness being about 3,000 A,
5. Etching away the aluminum layer in an etchant, with or without a prior heat treatment at about 300 C., leaving only gold-tantalum layers at the selected areas, and
6. Heat the silicon carbide body at an elevated temperature to alloy the gold and tantalum layers, including metallurgical bonding of the alloy to the exposed silicon carbide to provide good ohmic contacts at the selected areas.
DRAWINGS In order to more completely understand the nature and objects of this invention reference should be had to the drawings in which FIGS. 1 and 2 are elevation views in cross-section of portion of a body of silicon carbide semiconductor material being processed in accordance with the teachings of this invention.
DESCRIPTION OF THE INVENTION The electrical contact of this invention is suitable for use with any body of silicon carbide and is particularly suitable for semiconductor devices whether or not the body has any p-n junction contained therein. In order to describe the invention more particularly the invention will be described relative to the afiixing of electrical contacts to a portion of a junctiongate type unipolar transistor.
Referring now to FIG. 1 there isshown a portion 10 of junction gate type unipolar transistor. The portion 10 is made of hexagonal single crystal silicon carbide semiconductor material suitably doped to form regions 12, 14 and 16 of p-type semiconductivity and region 18 of n-type semiconductivity. pn junctions 20, 22 and 24 are between the respective regions 12 and l8, l4 and 18, and 16 and 18. All the p-n junctions 20, 22 and 24 have end portions exposed in a planar surface 26 which is also the top surface of the transistor. A bottom surface 28 of the transistor and the surface 26 are opposed major surfaces of the transistor.
A layer 30 of silicon oxide is formed by suitable means on at least the surface 26 of the portion 10. The layer 30 of silicon oxide may be formed by vapor deposition on the surface 26 or by thermal conversion of a part of the surface 26 from silicon carbide to silicon oxide. Either method is suitable and is well known to those skilled in the art. The layer 30 must be continuous but need not be uniform in thickness. A thickness of 1,000 to 3,000 A has been found to be sufficient for the layer 30 for the process of this invention. Employing known photolithographical masking techniques followed by selective etching, windows are open in the layer 30 to expose one or more selected surface areas of silicon carbide of regions 14, 16 and 18 to which electrical contacts are to be made.
The layer 30 of silicon oxide enables one to form the electrical contacts easier than if the layer 30 was not present. This layer is also essential to protect and isolate the surface of the silicon carbide device during subsequent processing. The silicon oxide of the layer confines the tantalum and gold to the selected contact areas only during the alloying process step.
Other suitable methods of masking the surface 26 include, such for example, metal masks and photoresist materials, and in some cases could be employed instead of oxide layer 30.
The portion 10 with the layer 30 of silicon oxide having windows therein is disposed in a vacuum metal deposition chamber and a thin layer 32 of aluminum is deposited over at least the entire oxide layer 30, exposed surfaces of the regions 14, 16 and 18. The thickness of the aluminum layer 32 is important. Sufiicient aluminum is required to form an intermetallic mixture with the gold and tantalum metals of the electrical contact having properties which enable the selective removal of the metals from the non-contact fonning areas. If the aluminum layer 32 is too thin, all of the gold-tantalum, metal is not completely stripped away from the areas where it is not desired, and if the layer 32 is too thick then the gold-tantalum alloy at the electrical contact areas may be attacked by the etchants. It has been determined that where the gold tantalum layer has an overall thickness of 3,000 A, the layer 32 of aluminum should preferably be approximately 10,000 A, and may be from about 5,000 to 20,000 A.
The thickness of the aluminum layer 32 is small enough that the pattern of the exposed contact areas etched in the layer 30 is visible through the layer 32. This enables accurate placement of masks by photolithographical techniques and selective etching so that the aluminum is removed from the windows in the layer 30 of silicon oxide to again expose the selected electrical contact areas of the regions 14, 16 and 18.
The portion of the unipolar transistor is disposed in a vacuum metal deposition chamber and alternate layers 34 and 36 of first tantalum and then gold are deposited on at least the aluminum layer 32 and the exposed selective surface areas of the regions 14, 16 and 18 without breaking the vacuum. The ratio of the total of tantalum to gold is from 1:5 to 1:15 by volume. It has been determined that a minimum total number of four alternate layers 34 and 36 is sufficient, but the best results were obtained when the total number of layers were from 8 to 10. The total thickness of the deposited gold and tantalum layers 34 and 36 may range from 1,000 to 10,000 A.
Preferably, the vacuum system is equipped with facilities for sputtering gold and tantalum, for example, from separate crucibles, with movable covers according to a suitable alternating sequence without breaking the vacuum. The silicon carbide bodies are subjected to considerable heat during the metal deposition process. However, the amount of heat the body is subjected to can be varied considerably without affecting appreciably the metal deposition rates.
The tantalum and gold plated portion 10 is removed from the vacuum evaporation chamber and any excess tantalum and gold over the aluminized areas and all of the aluminum are removed by any one of several methods. One method consists of disposing the plated portion 10 in a concentrated solution of sodium hydroxide. It appears that the sodium hydroxide rapidly attacks the aluminum, dissolving it, and the tantalum and gold deposited on the aluminum is so thin that is is readily removed by floating it away. As mentioned before, if the layer 32 is too thick then the tantalum- gold layers 34 and 36 deposited on the exposed surfaces of the regions 14, 16 and 18 may be also attacked by the sodium hydroxide solution.
An alternate method of removing the aluminum and any tantalum and gold from undesired areas when it is over aluminum is to first treat the portion 10 of the transistor with the deposited alternate layers at an elevated temperature either in a vacuum or in a controlled furnace atmosphere wherein the atmosphere may be nitrogen, oxygen or argon. During heat treatment at about 300 C. 20 C. for up to 16 hours, it appears that the gold difluses through the intervening layers 34 of tantalum of the stratified structure and into the layer 32 of aluminum where an aluminum-gold-tantalum interrnetallic compound is formed. The chemical constitution of the intermetallic mixture is such that it is readily attacked and removed by etchants such, for example, as sodium hydroxide and phosphoric acid while leaving the stratified contact structure above the exposed silicon carbide surface intact.
After selective removal of the undesired metal, the remaining portions of tantalum and gold layers 34 and 36 are disposed directly on the selected areas of silicon carbide are then subjected to an elevated temperature comprising an initial preheating for a period of some minutes followed by a brief flash or pulse heating for several seconds at 1,500 to l,700 C. The initial preheating is from 850 to l,050 C in a vacuum, for example, from 10" torr to l0" torr. A preferred temperature is 900 C. and a preferred vacuum is 10" torr. The initial heating of the gold and tantalum metal layers is to promote the interdiffusing of metals into each other without melting the gold. The heating in vacuum eliminates any complications which may arise from oxidation of any of the materials. This heat treatment is for a period of time sufficient to allow extensive and thorough diffusion of gold throughout the tantalum thereby obtaining a sufficient homogeneity of the metals to fonn an alloy with themselves and to be alloyed to the silicon carbide. This preheating step was found to be necessary to avoid the segregation of the gold when alloying of the contact to the silicon carbide is perfonned.
It has been found that a very rapid and a high increase of temperature for the second heating step is desirable to obtain a good ohmic characteristic for the alloyed electrical contacts. Dwell times at the high elevated temperature of more than a few seconds are avoided since gold may be lost by evaporation.
As specific illustration, in alloying the stratified tantalum and gold electrical contact with itself and to the exposed silicon carbide surfaces of the regions 14, 16 and 18, the portion 10 is heated first a temperature of from 850 to l,050 C. for a period of at least 10 minutes. A period of from 14 to 16 minutes is found to be sufficient. The heating at the higher temperature varies with apparatus design and heating means is performed for a pulse of time of the order of 10 seconds and not exceeding about 15 seconds at a maximum temperature of from l,500 to l,700 C. The resulting structure is shown in FIG. 2 in which electrical contacts 38, 40, and 42 are the alloyed electrical contacts to the respective regions l8, l4 and 18.
The heating at the higher temperature for the short duration is desirable, because it has been found that this process step improves the ohmic characteristics of the tantalum-gold electrical contacts. As soon as alloying of the tantalum diffused gold with the silicon carbide occurs, the temperature is reduced immediately to below the solidification temperature of gold to prevent its loss by evaporation. The electrical contacts of this invention exhibit a more linear l-V characteristic and have a lower contact resistance than the prior art electrical contacts, and in particular the tantalum-gold electrical contacts of the prior art. The electrical contacts of this invention have good physical adhesion to the silicon carbide material, low contact resistance, and resistance to oxidation even when the silicon carbide devices are operated at temperatures of 500 C. Additionally, gold wire leads may be bonded to the electrical contacts of this invention by the conventional thermocompression bonding process more easily than prior art devices.-
An example illustrating the process of making an electrical contact in accordance with the teachings of this invention is as follows:
Ohmic tantalum-gold electrical contacts were affixed to a Junction-Gate Unipolar Transistor, a portion of the same design being shown in FIG. 2. Five electrical contacts were required, the contacts consisting of two source, two gate and one drain.
After formation of the required regions in an initial n-type semiconductivity wafer of silicon carbide, the wafer was heated to a temperature of l,l70 C. 2 20 C. for 30 minutes in the presence of argon gas saturated with water vapor at l00 C. Oxidation of the wafer was continued for 30 minutes. The layer of silicon oxide thermally grown was 2,500 A in thickness.
Employing photolithographical techniques followed by selective etching employing an etchant consisting of 7 parts by volume ammonium fluoride to 1 part by volume 49 percent hydrofluoric acid, windows were opened in the thermally grown silicon oxide layer thereby exposing preselected surface areas of the wafer.
The wafer was then placed in a vacuum system equipped with facilities for the vapor deposition of aluminum. A vacuum of torr was established and a layer of aluminum 10,000 A in thickness was vapor deposited on the oxide coated surface of the wafer including the windows for the contacts to the wafer. Employing photolithographical techniques and the etchant H PO the aluminum was removed from the windows in the layer of silicon oxide thereby exposing the surfaces of the silicon carbide wafer to which the electrical contacts were to be affixed.
The wafer was then placed in a vacuum system equipped with facilities for sputtering gold and tantalum according to a predetermined alternate deposition technique. A vacuum of 10' torr was established in the system and five layers of tantalum alternated with four layers of gold was sputtered onto at least the surface areas of the silicon wafer to which electrical contacts are made and the aluminum layer about each of the windows. The proportion of gold to tantalum was 86% Au to 14% Ta by volume (approximately 6:1) and each layer was deposited to provide its prorata amount of metal for the overall contact. The deposition process took 40 minutes. The overall thickness of the deposited tantalum and gold layers was 3,000 A. The wafer was then placed in a saturated solution of sodium hydroxide. ln 3 minutes all the aluminum and the excess tantalum and gold had been removed from the wafer. Tantalum and gold remained in the windows of the silicon oxide layer.
The wafer was then placed in a vacuum system and a vacuum of the order of 10 torr was established. The wafer was then heated in the vacuum to 900 C. 50 C. for 15 minutes. The temperature of the wafer was then rapidly increased to l,600 C. 100 C. and held at maximum temperature for about 10 seconds, after which the wafer was cooled to room temperature and removed from the vacuum system.
A visual examination of the contacts showed the contacts to be of a uniform sound structure having a good surface. Electrical tests were performed and the contacts exhibited a near linear l-V characteristic and a low contact resistance of 10 ohms.
The wafer was sectioned and mounted for examination of some of the contacts. All contacts exhibited a sound structure alloyed to the silicon carbide wafer. The gold had diffused through the tantalum layers. The silicon oxide had confined the tantalum and gold to the contact windows during alloying. The remaining contacts were checked for physical bonding to the wafer. The physical bond proved to be excellent with the material of the wafer being removed with the contacts when they were stripped from the wafer.
We claim as our invention:
1. ln theprocess of applying an ohmic electrical contact of gold-tantalum alloy to selected areas of a silicon carbide body, the steps comprising a. applying to the silicon carbide body, at other than the selected areas, a thin layer of silicon oxide and a superposed layer thereon of aluminum of a thickness of from about 5,000 to 20,000 A,
b. applying by vacuum evaporation a plurality of alternate thin layers of tantalum and gold, a tantalum layer being the initial layer in contact with exposed silicon carbide of the selected areas;
c. heating the silicon carbide body at about 300 C. for a period of time of up to 16 hours;
d. etching the treated silicon carbide body with an etchant capable of dissolving aluminum whereby the gold-tantalum deposited over the aluminum layer is removed; and
e. heat treating the silicon carbide body with gold-tantalum layers present only on the selected areas to a temperature of at least 850 C. but not exceeding about 1,700 C. to alloy the gold with the tantalum and to the silicon carbide with which said layers are in direct contact.
2. The process of claim 1 wherein the heat treating of the silicon carbide body with gold-tantalum layers present only on the selected areas is accomplished at a irst elevated temperature of from 850 to 1,050 C. for a period of about 10 minutes and then heat treating the body at a second elevated temperature of from l,500 to 1,700 C. for a period not exceeding about 15 seconds at the maximum temperature to alloy the tantalum, the gold, and the silicon carbide. 3. The process of claim 2 wherein the etchant is a saturated solution of sodium hydroxide. 4. The process of claim 3 including the process step prior to etching the silicon carbide body of heat treating the silicon carbide body at an elevated temperature of from 280 to 320 C. for a period of time of up to 16 hours. 5. The process of claim 4 wherein the heat treating is performed in a vacuum.
6. The process of claim 5 wherein the heat treating is carried out in a controlled atmosphere of a gas inert to the body.
7. The process of claim 2 wherein at least two layers of tantalum and two layers of gold are deposited on the selected areas of the silicon carbide body; the total thickness of the layers of tantalum and gold is from 1,000 to 10,000 A, the volume ratio of tantalum to gold is from about 1:5 to
1:15, and the thickness of the layer of aluminum is 10,000 A.

Claims (6)

  1. 2. The process of claim 1 wherein the heat treating of the silicon carbide body with gold-tantalum layers present only on the selected areas is accomplished at a first elevated temperature of from 850* to 1,050* C. for a period of about 10 minutes and then heat treating the body at a second elevated temperature of from 1,500* to 1,700* C. for a period not exceeding about 15 seconds at the maximum temperature to alloy the tantalum, the gold, and the silicon carbide.
  2. 3. The process of claim 2 wherein the etchant is a saturated solution of sodium hydroxide.
  3. 4. The process of claim 3 including the process step prior to etching the silicon carbide body of heat treating the silicon carbide body at an elevated temperature of from 280* to 320* C. for a period of time of up to 16 hours.
  4. 5. The process of claim 4 wherein the heat treating is performed in a vacuum.
  5. 6. The process of claim 5 wherein the heat treating is carried out in a controlled atmosphere of a gas inert to the body.
  6. 7. The process of claim 2 wherein at least two layers of tantalum and two layers of gold are deposited on the selected areas of the silicon carbide body; the total thickness of the layers of tantalum and gold is from 1,000 to 10,000 A, the volume ratio of tantalum to gold is from about 1:5 to 1:15, and the thickness of the layer of aluminum is 10,000 A.
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Cited By (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0000743A1 (en) * 1977-08-06 1979-02-21 International Business Machines Corporation Method for fabricating tantalum contacts on a N-type conducting silicon semiconductor substrate
WO1989004056A1 (en) * 1987-10-26 1989-05-05 North Carolina State University Mosfet in silicon carbide
US4947218A (en) * 1987-11-03 1990-08-07 North Carolina State University P-N junction diodes in silicon carbide
US4966860A (en) * 1983-12-23 1990-10-30 Sharp Kabushiki Kaisha Process for producing a SiC semiconductor device
US4994413A (en) * 1988-10-12 1991-02-19 Fujitsu Limited Method of manufacturing a semiconductor device having a silicon carbide layer
US5200805A (en) * 1987-12-28 1993-04-06 Hughes Aircraft Company Silicon carbide:metal carbide alloy semiconductor and method of making the same
US5270252A (en) * 1988-10-25 1993-12-14 United States Of America As Represented By The Secretary Of The Navy Method of forming platinum and platinum silicide schottky contacts on beta-silicon carbide
US6667495B2 (en) * 1998-06-08 2003-12-23 Sciced Electronics Development Gmbh & Co. Kg Semiconductor configuration with ohmic contact-connection and method for contact-connecting a semiconductor configuration
DE102009010891A1 (en) * 2009-02-27 2010-08-12 Siced Electronics Development Gmbh & Co. Kg Method for producing MOSFET contacts on surface of silicon carbide semiconductor material of e.g. semiconductor element, involves heating metal layer to specific temperature, and removing metal layer from region of insulation layer
DE10051049B4 (en) * 2000-10-14 2011-04-07 Cree, Inc. Aluminum-nickel contact metallization for p-doped SiC and manufacturing process therefor

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3492719A (en) * 1967-03-10 1970-02-03 Westinghouse Electric Corp Evaporated metal contacts for the fabrication of silicon carbide devices
US3516914A (en) * 1968-02-26 1970-06-23 United Aircraft Corp Aluminum masking of active components during tantalum/nitride sputtering

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3492719A (en) * 1967-03-10 1970-02-03 Westinghouse Electric Corp Evaporated metal contacts for the fabrication of silicon carbide devices
US3516914A (en) * 1968-02-26 1970-06-23 United Aircraft Corp Aluminum masking of active components during tantalum/nitride sputtering

Cited By (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0000743A1 (en) * 1977-08-06 1979-02-21 International Business Machines Corporation Method for fabricating tantalum contacts on a N-type conducting silicon semiconductor substrate
US4966860A (en) * 1983-12-23 1990-10-30 Sharp Kabushiki Kaisha Process for producing a SiC semiconductor device
WO1989004056A1 (en) * 1987-10-26 1989-05-05 North Carolina State University Mosfet in silicon carbide
US4947218A (en) * 1987-11-03 1990-08-07 North Carolina State University P-N junction diodes in silicon carbide
US5200805A (en) * 1987-12-28 1993-04-06 Hughes Aircraft Company Silicon carbide:metal carbide alloy semiconductor and method of making the same
US4994413A (en) * 1988-10-12 1991-02-19 Fujitsu Limited Method of manufacturing a semiconductor device having a silicon carbide layer
US5270252A (en) * 1988-10-25 1993-12-14 United States Of America As Represented By The Secretary Of The Navy Method of forming platinum and platinum silicide schottky contacts on beta-silicon carbide
US6667495B2 (en) * 1998-06-08 2003-12-23 Sciced Electronics Development Gmbh & Co. Kg Semiconductor configuration with ohmic contact-connection and method for contact-connecting a semiconductor configuration
DE10051049B4 (en) * 2000-10-14 2011-04-07 Cree, Inc. Aluminum-nickel contact metallization for p-doped SiC and manufacturing process therefor
DE102009010891A1 (en) * 2009-02-27 2010-08-12 Siced Electronics Development Gmbh & Co. Kg Method for producing MOSFET contacts on surface of silicon carbide semiconductor material of e.g. semiconductor element, involves heating metal layer to specific temperature, and removing metal layer from region of insulation layer

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