US20110241979A1 - Liquid crystal display - Google Patents
Liquid crystal display Download PDFInfo
- Publication number
- US20110241979A1 US20110241979A1 US13/162,156 US201113162156A US2011241979A1 US 20110241979 A1 US20110241979 A1 US 20110241979A1 US 201113162156 A US201113162156 A US 201113162156A US 2011241979 A1 US2011241979 A1 US 2011241979A1
- Authority
- US
- United States
- Prior art keywords
- pixel
- data line
- sub
- data
- disposed
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Abandoned
Links
- 239000004973 liquid crystal related substance Substances 0.000 title abstract description 55
- 239000010409 thin film Substances 0.000 claims description 9
- 230000007547 defect Effects 0.000 abstract description 24
- 230000008878 coupling Effects 0.000 abstract description 13
- 238000010168 coupling process Methods 0.000 abstract description 13
- 238000005859 coupling reaction Methods 0.000 abstract description 13
- 239000011159 matrix material Substances 0.000 abstract description 5
- 239000003990 capacitor Substances 0.000 description 13
- 239000003086 colorant Substances 0.000 description 5
- 238000010586 diagram Methods 0.000 description 5
- 238000000034 method Methods 0.000 description 5
- 230000001276 controlling effect Effects 0.000 description 3
- 230000005684 electric field Effects 0.000 description 3
- 230000003071 parasitic effect Effects 0.000 description 3
- 238000002834 transmittance Methods 0.000 description 3
- 230000008901 benefit Effects 0.000 description 2
- 230000008859 change Effects 0.000 description 2
- 239000012212 insulator Substances 0.000 description 2
- 230000010287 polarization Effects 0.000 description 2
- 230000001105 regulatory effect Effects 0.000 description 2
- 230000002123 temporal effect Effects 0.000 description 2
- 230000005540 biological transmission Effects 0.000 description 1
- 230000015556 catabolic process Effects 0.000 description 1
- 239000000470 constituent Substances 0.000 description 1
- 238000006731 degradation reaction Methods 0.000 description 1
- 239000003989 dielectric material Substances 0.000 description 1
- 230000002708 enhancing effect Effects 0.000 description 1
- 239000010408 film Substances 0.000 description 1
- 235000019557 luminance Nutrition 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 230000008569 process Effects 0.000 description 1
- 230000004044 response Effects 0.000 description 1
- 239000013589 supplement Substances 0.000 description 1
Images
Classifications
-
- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
- G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
- G09G3/3611—Control of matrices with row and column drivers
- G09G3/3614—Control of polarity reversal in general
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G2300/00—Aspects of the constitution of display devices
- G09G2300/08—Active matrix structure, i.e. with use of active elements, inclusive of non-linear two terminal elements, in the pixels together with light emitting or modulating elements
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G2310/00—Command of the display device
- G09G2310/02—Addressing, scanning or driving the display screen or processing steps related thereto
- G09G2310/0202—Addressing of scan or signal lines
- G09G2310/0218—Addressing of scan or signal lines with collection of electrodes in groups for n-dimensional addressing
Definitions
- the present disclosure relates to a liquid crystal display.
- a conventional liquid crystal display includes two display panels provided with pixel electrodes and a common electrode, and a liquid crystal layer interposed between the two panels and having dielectric anisotropy.
- the pixel electrodes are arranged in a matrix shape, and are connected to a switching element, such as a thin film transistor (TFT), so as to be sequentially applied with a data voltage row by row.
- TFT thin film transistor
- the common electrode is formed on an entire surface of the display panel and is applied with a common voltage.
- the pixel electrodes, the common electrode, and the liquid crystal layer therebetween form a liquid crystal capacitor an overall circuit, and the liquid crystal capacitor is a basic unit constituent of a pixel along with a switching element connected thereto.
- a high speed driving method driving at the speed of 120 frames per second is under development.
- a response speed of the liquid crystal should be two times the speed of 60 frames per second, and it is now estimated that this is possible.
- the column inversion changes the polarity of a data voltage of the same data line by one frame, and since the number of inversions of the data voltage is one in one frame, power consumption characteristics are substantially enhanced.
- the coupling defect is a phenomenon that the respective luminances of an upper portion and a lower portion of a liquid crystal panel assembly become different from each other since a data voltage of the same polarity is continuously applied for one frame because of parasitic capacitance generated by an overlap of the data lines and the pixel electrodes. More specifically, a vertical crosstalk phenomenon occurs, where, if a box having a higher gray value than a root image is displayed on the root image having a low gray value, portions above and below the box have different gray values from the root image.
- a ratio of the parasitic capacitance due to the overlap of the data line and the pixel electrode to an entire capacitance of the device should be less than or equal to 1%, and to achieve this is difficult.
- the stripe defect is a phenomenon where a stripe is formed when data voltages of the same polarity are applied in a vertical directions and there is a difference between data voltages of a positive polarity and a negative polarity.
- Exemplary embodiments of the present invention provide a liquid crystal display having the advantages of preventing the coupling defect and the stripe defect present in high speed driving of the display.
- An exemplary embodiment of the present invention provides a liquid crystal display including: a plurality of pixels arranged in a matrix shape, a switching element connected to each pixel; data lines and gate lines connected to the switching elements; and a data driver generating data voltages and applying the data voltages to the data lines.
- the data lines are disposed at both sides of the pixels in pairs, and data voltages of the same magnitude but with different polarities are applied to the pairs of data lines.
- the switching element of each pixel may be connected to only one of the pair of data lines, and the switching elements of two neighboring pixels in a vertical direction of a pixel column may be alternately connected to the pair of data lines.
- the data driver may perform an N ⁇ 2 inversion.
- a pixel disposition of even numbered columns among pixel columns and a pixel disposition of odd numbered pixel columns may form mirror symmetry with respect to the data line interposed therebetween, and the data driver may perform an N ⁇ 1 inversion.
- a liquid crystal display includes: a plurality of pixels arranged in a matrix shape and respectively including a first subpixel and a second subpixel; first and second switching elements connected to the first and second subpixels; data lines and gate lines connected to the first and second subpixels; and a data driver generating a data voltage and applying the data voltage to the data line.
- the data lines are disposed at both sides of the pixels in pairs, and data voltages of the same magnitude with different polarities are applied to the pairs of data lines.
- the first and second switching elements of the pixels may be respectively connected to different data lines of the pairs of data lines, and the data driver may perform an N ⁇ 2 inversion.
- the data driver may perform an N ⁇ 1 inversion.
- a pixel disposition of even numbered columns among pixel columns and a pixel disposition of odd numbered pixel columns may form mirror symmetry with respect to the data lines interposed therebetween.
- the first and second switching elements of the first and second subpixels of a neighboring pixel in a column direction may be connected to the same data line.
- a pixel disposition of even numbered columns among pixel columns and a pixel disposition of odd numbered pixel columns may form mirror symmetry with respect to the data lines interposed therebetween.
- FIG. 1 is a block diagram of a liquid crystal display according to an exemplary embodiment of the present invention.
- FIG. 2 is an equivalent circuit diagram of one pixel of a liquid crystal display according to an exemplary embodiment of the present invention.
- FIG. 3 is a drawing showing pixel disposition of a liquid crystal display according to an exemplary embodiment of the present invention.
- FIG. 4 is a drawing showing an example of pixel disposition of a liquid crystal display according to an exemplary embodiment of the present invention.
- FIG. 5 is a waveform diagram for explaining a principle of removing a coupling defect in the pixel disposition shown in FIG. 4 .
- FIG. 6A and FIG. 6B are drawings showing exemplary variations of the pixel disposition shown in FIG. 4 .
- FIG. 7 is a drawing showing pixel disposition of a liquid crystal display according to an exemplary embodiment of the present invention.
- FIG. 8A to FIG. 8D are drawings showing exemplary variations of the pixel disposition shown in FIG. 7 .
- a liquid crystal display according to an exemplary embodiment of the present invention will now be explained in detail with reference to FIG. 1 and FIG. 2 .
- FIG. 1 is a block diagram of a liquid crystal display according to an exemplary embodiment of the present invention
- FIG. 2 is an equivalent circuit diagram of one pixel of a liquid crystal display according to an exemplary embodiment of the present invention.
- a liquid crystal display includes a liquid crystal panel assembly 300 , a gate driver 400 and a data driver 500 connected to the liquid crystal panel assembly 300 , a gray voltage generator 800 connected to the data driver 500 , and a signal controller 600 controlling these elements.
- the liquid crystal panel assembly 300 includes a plurality of signal lines G 1 to G n and D 1 to D m , and a plurality of pixels PX connected to the signal lines and substantially arranged in a matrix shape.
- the liquid crystal panel assembly 300 of FIG. 1 includes lower and upper panels 100 and 200 that face each other, and a liquid crystal layer 3 (not shown) that is interposed between the panels 100 and 200 .
- the signal lines G 1 to G n and D 1 to D m include a plurality of gate lines G 1 to G n that transmit gate signals, also referred to as “scanning signals”, and a plurality of data lines D 1 to D m that transmit data signals.
- the gate lines G 1 to G n extend in a row direction to be substantially parallel to one another, and the data lines D 1 to D m extend in a column direction to be substantially parallel to one another.
- the switching element Q is a three terminal element, such as a thin film transistor, provided to the lower panel 100 , a control terminal thereof is connected to the gate line G i , an input terminal thereof is connected to the data line D j , and an output terminal thereof is connected to the liquid crystal capacitor Clc and the storage capacitor Cst.
- the liquid crystal capacitor Clc has two terminals, one connected to a pixel electrode 191 of the lower panel 100 , and the other connected to a common electrode 270 of the upper panel 200 .
- the liquid crystal layer 3 between the two electrodes 191 and 270 serves as a dielectric material.
- the pixel electrode 191 is connected to the switching element Q, and the common electrode 270 can be formed on the entire surface of the upper panel 200 .
- a common voltage Vcom is applied to the common electrode 270 .
- the common electrode 270 may be provided on the lower panel 100 . In this case, at least one of the two electrodes 191 and 270 can be formed in a linear or a bar shape.
- the storage capacitor Cst which supplements the liquid crystal capacitor Clc, has a separate signal line (not shown) and is formed when the pixel electrodes 191 provided on the lower panel 100 overlap each other with an insulator interposed therebetween. A fixed voltage such as the common voltage Vcom is applied to the separate signal line.
- the storage capacitor Cst may also be formed by the pixel electrode 191 and the overlying previous gate line arranged to overlap each other through the insulator.
- each pixel PX uniquely displays one of three primary colors (spatial division) or each pixel PX alternately displays the three primary colors (temporal division) as time lapses, and a desired color is recognized by a spatial or temporal sum of the primary colors.
- the three primary colors include red, green, and blue.
- FIG. 2 shows an example of spatial division.
- each pixel PX has a color filter 230 for one of the primary colors in a region of the upper panel 200 corresponding to the pixel electrode 191 . Unlike what is shown in FIG. 2 , the color filter 230 may be formed above or below the pixel electrode 191 of the lower panel 100 .
- At least one polarizer (not shown) for polarizing light is attached to an outer surface of the liquid crystal panel assembly 300 .
- the gray voltage generator 800 generates two sets of gray voltages related to the light transmittance of the pixel PX forming a set of reference gray voltages.
- the two sets of gray voltages have a positive value and a negative value with respect to the common voltage Vcom, respectively.
- the gate driver 400 is connected to the gate lines G 1 to G n of the liquid crystal panel assembly 300 , and applies the gate signals, which are combinations of a gate-on voltage Von and a gate-off voltage Voff, to the gate lines G 1 to G n .
- the data driver 500 is connected to the data lines D 1 to D m of the liquid crystal panel assembly 300 .
- the data driver 500 selects one of the gray voltages from the gray voltage generator 800 , and applies the selected gray voltage to the data lines D 1 to D m as a data signal.
- the gray voltage generator 800 supplies only a predetermined number of the reference gray voltages, rather than the voltages for all gray levels, the data driver 500 divides the reference gray voltage so as to generate the gray voltages for all gray levels and selects the data voltage from among these.
- the signal controller 600 controls the gate driver 400 , the data driver 500 , and other elements.
- Each of such display driving elements 400 , 500 , 600 , and 800 may be directly mounted on the liquid crystal panel assembly 300 in the form of at least one IC chip, may be attached to the liquid crystal panel assembly 300 while being mounted on a flexible printed circuit film (not shown) by a TCP (tape carrier package), or may be mounted on a separate printed circuit board (not shown).
- the driving elements 400 , 500 , 600 , or 800 may be integrated with the liquid crystal panel assembly 300 , together with the signal lines G 1 to G n and D 1 to D m and the thin film transistor switching element Q.
- the driving elements 400 , 500 , 600 , or 800 may be integrated into a single chip. In this case, at least one of the elements, or at least one circuit element constituting the elements, may be outside the single chip.
- the signal controller 600 receives input image signals R, G, and B and input control signals for controlling display of the input image signals R, G, and B.
- Examples of the input control signals include a vertical synchronization signal Vsync, a horizontal synchronizing signal Hsync, a main clock signal MCLK, a data enable signal DE, and the like.
- the signal controller 600 processes the input image signals R, G, and B according to the operating condition of the liquid crystal panel assembly 300 on the basis of the input image signals R, G, and B and the input control signals, and generates a gate control signal CONT 1 and a data control signal CONT 2 . Then, the signal controller 600 supplies the gate control signal CONT 1 to the gate driver 400 and supplies the data control signal CONT 2 and the processed image signal DAT to the data driver 500 .
- the gate control signal CONT 1 may include a scanning start signal that instructs to start scanning, and at least one gate clock signal controlling an output timing of a gate-on voltage Von.
- the gate control signal CONT 1 may further include an output enable signal limiting a duration time of the gate-on voltage Von.
- the data control signal CONT 2 includes a horizontal synchronization start signal that notifies transmission of the output image signal DAT to one row of pixels PX, a load signal instructing to apply the data signal to the data lines D 1 to D m , and a data clock signal.
- the data control signal CONT 2 may also further include an inversion signal for inverting the voltage polarity of the data signal relative to the common voltage Vcom, hereinafter, the voltage polarity of the data signal relative to the common voltage is simply referred to as the polarity of the data signal.
- the data driver 500 On the basis of the data control signal CONT 2 from the signal controller 600 , the data driver 500 receives the digital image signal DAT for one row [set] of pixels PX, and selects the gray voltage corresponding to each digital image signal DAT from the gray voltage generator. Then, the data driver 500 coverts the digital image signal DAT into an analog data signal, and applies the analog data signal to the corresponding data lines D 1 to D m .
- the gate driver 400 applies the gate-on voltage Von to the gate lines G 1 to G n on the basis of the gate control signal CONT 1 from the signal controller 600 so as to turn on the switching element Q connected to the gate lines G 1 to G n . Accordingly, the data signal applied to the data lines D 1 to D m is applied to the corresponding pixel PX through the turned-on switching element Q.
- the alignment of liquid crystal molecules varies according to the value of the pixel voltage and, thus, the polarization of light passing through the liquid crystal layer 3 is changed.
- the change in polarization causes a change in transmittance of light by the polarizers attached to the display panel assembly 300 .
- the gate-on voltage Von is sequentially applied to all of the gate lines G 1 to G n , and the data signal is applied to all of the pixels PX, so that an image corresponding to one frame is displayed.
- the state of the inversion signal to be applied to the data driver 500 is controlled such that the polarity of the data voltage to be applied to each pixel is opposite to the polarity thereof in the previous frame (“frame inversion”).
- the polarity of the data signal on one data line may be changed in one frame according to the characteristics of the inversion signal, for example, row inversion or dot inversion, or the polarity of the data signal applied to one pixel row may be different from each other, for example, column inversion or dot inversion.
- FIG. 3 is a drawing showing pixel disposition of a liquid crystal display according to an exemplary embodiment of the present invention.
- the data driver 500 performs a column inversion as shown by the polarities on the data lines D 1 D 7 .
- the column inversion can include repeating the same polarity in one time (not shown), as well as alternating a positive polarity and a negative polarity.
- the column inversion includes the case in which two polarities of the data voltage are alternately repeated such as ‘+, ⁇ , +, ⁇ , +, ⁇ , . .
- N ⁇ 1 inversion N ⁇ 1 inversion
- N ⁇ 2 inversion N ⁇ 2 inversion
- the case in which a separate voltage is applied only to the left-end data line and 1+N ⁇ 2 inversion driving is performed will simply be called the N ⁇ 2 inversion hereinafter.
- the switching elements Q of the pixels PX are connected to the data lines D 1 to D 7 and the gate lines D 1 to D 7 and G j ⁇ 1 to G j+2 , explanations will be made for the case that the pixels PX are connected to the two signal lines D i to D 7 and G j ⁇ 1 to G j+2 .
- respective pixels PX of one row are connected to the data lines D 1 to D 7 positioned at the left or the right thereof, and the pixels of one column are alternately connected to the data lines D 1 to D 7 positioned at the left and the right thereof.
- the polarity of data voltages appearing in the pixels PX hereinafter referred to as the polarity of the pixels, alternately shows a positive (+) polarity and a negative ( ⁇ ) polarity, and this results in the performing of dot inversion. Accordingly, the stripe defect that is generated when polarities of the pixels PX of one column are equal to one another can be prevented.
- FIG. 4 is a drawing showing an example of pixel disposition of a liquid crystal display according to an exemplary embodiment of the present invention.
- pairs of data lines D 1a and D 1b , D 2a and D 2b , D 3a and D 3b , D 4a and D 4b , D 5a and D 5b , and D 6a and D 6b are respectively disposed at the left and the right of the respective pixels PX, and the pixels PX are respectively connected to the data lines D 1b , D 2b , D 3b , D 4b , D 5b , and D 6b that are positioned at the right thereof.
- polarities of the pixels PX of one row are alternately changed, and polarities of the pixels PX of one column are all the same.
- the polarities of the data lines D 1a , D 2a , D 3a , D 4a , D 5a , and D 6a to which the pixels PX are not connected among the pairs of data lines D 1a and D 1b , D 2a and D 2b , D 3a and D 3b , D 4a and D 4b , D 5a and D 5b , and D 6a and D 6b are opposite to the polarities of the data lines D 1b , D 2b , D 3b , D 4b , D 5b , and D 6b to which the pixels PX are connected.
- the data voltage Vdtb of a negative polarity is applied to the right data line D 1b
- the data voltage Vdtb of a positive polarity is applied to the left data line D 1a
- These data voltages are shown with respect to the common voltage Vcom in FIG. 5 . That is, the data voltage of the same magnitude as the data voltage applied to the right data line D 1b but having the opposite polarity to that of the data voltage applied to the right data line D 1b is applied to the left data line D 1a . This causes voltages across parasitic capacitors in respective pixels PX to offset each other, so that the coupling defect does not occur.
- FIG. 6A and FIG. 6B are drawings showing exemplary variations of the pixel disposition shown in FIG. 4 .
- the pixels PX of the same row are respectively connected to the same data lines D 1b , D 2b , D 3b , D 4b , D 5b , and D 6b , or D 1a , D 2a , D 3a , D 4a , D 5a , and D 6a , and the pixels PX of the same column are respectively alternately connected to the pairs of data lines D 1a and D 1b , D 2a and D 2b , D 3a and D 3b , D 4a and D 4b , D 5a and D 5b , and D 6a and D 6b per row.
- the pixels PX of the same row are respectively connected to the same data lines D 1b , D 2b , D 3b , D 4b , D 5a and D 5b , and D 6a and D 6b per row.
- the pixel disposition in the odd numbered columns is equal to the pixel disposition shown in FIG. 6A , and the pixel disposition in the even numbered columns and the pixel disposition in the odd numbered columns form mirror symmetry with respect to the data lines interposed therebetween.
- the pixel disposition of the second column and the pixel disposition of the first column form mirror symmetry with respect to the data lines D 1b and D 2a .
- the stripe defect may occur in the pixel disposition shown in FIG. 4 , since polarities of the data voltages applied to the pixels PX of one column are the same.
- the pixel dispositions shown in FIG. 6A and FIG. 6B can prevent not only the coupling defect but also the stripe defect.
- FIG. 7 is a drawing showing pixel disposition of a liquid crystal display according to an exemplary embodiment of the present invention
- FIG. 8A to FIG. 8D are drawings showing exemplary variations of the pixel disposition shown in FIG. 7 .
- FIG. 7 shows a pixel structure obtained by dividing respective pixels PX in the pixel structure shown in FIG. 4 , FIG. 6A , and FIG. 6B into two subpixels PXa and PXb with respect to the gate lines G j ⁇ 1 to G j+2 .
- This is a structure for enhancing side visibility, and is mainly used in a liquid crystal display of a vertical alignment (VA) mode.
- VA vertical alignment
- Two subpixels PXa and PXb constituting one pixel PX are respectively connected to different data lines D 1a and D 1b , D 2a and D 2b , D 3a and D 3b , D 4a and D 4b , D 5a and D 5b , or D 6a and D 6b , and this structure is repeated in the row direction and in the column direction, so that polarities of the pixels PX as shown in the drawing are formed.
- the pixel disposition shown in FIG. 8A is equal to the pixel disposition shown in FIG. 7 . They differ, however, in the polarities of the applied data voltages, and thereby polarities of the pixels PX become different even in the same structure. That is, although polarities of the pixels PX show a positive polarity and a negative polarity in the row direction and in the column direction in the pixel disposition shown in FIG. 7 , polarities of the pixels PX are the same in the row direction in the pixel disposition shown in FIG. 8A .
- the coupling defect or the stripe defect can be prevented even in this case.
- two subpixels PXa and PXb constituting one pixel PX are respectively connected to different data lines D 1a and D 1b , D 2a and D 2b , D 3a and D 3b , D 4a and D 4b , D 5a and D 5b , or D 6a and D 6b .
- Two neighboring subpixels of two neighboring pixels in the column direction are connected to the same data line D 1a or D 1b , D 2a or D 2b , D 3a or D 3b , D 4a or D 4b , D 5a or D 5b , or D 6a or D 6b .
- the lower subpixel PXb in the (j ⁇ 1)-th row of the first column and the upper subpixel PXa in the neighboring j-th row of the first column are connected to the same data line D 1a
- the lower subpixel PXb in the j-th row and the upper subpixel PXa in the neighboring (j+1)-th row are connected to the same data line D 1b .
- the pixel disposition of the odd numbered columns is the same as the pixel disposition shown in FIG. 8B , and the pixel disposition of the even numbered columns and the pixel disposition of the odd numbered columns form mirror symmetry with respect to the data lines interposed therebetween.
- the pixel disposition of the second column and the pixel disposition of the first column form mirror symmetry with respect to the data lines D 1b and D 2a .
- the pixel disposition of the odd numbered columns is to the same as the pixel disposition shown in FIG. 7A . That is, two subpixels PXa and PXb constituting one pixel PX are respectively connected to different data lines D 1a and D 1b , D 2a and D 2b , D 3a and D 3b , D 4a and D 4b , D 5a and D 5b , or D 6a and D 6b , and this structure is repeated in the column direction.
- the pixel disposition of the even numbered columns and the pixel disposition of the odd numbered columns form mirror symmetry with respect to the data lines interposed therebetween, just like the pixel disposition shown in FIG. 8C .
Landscapes
- Physics & Mathematics (AREA)
- Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Crystallography & Structural Chemistry (AREA)
- Chemical & Material Sciences (AREA)
- Theoretical Computer Science (AREA)
- Computer Hardware Design (AREA)
- Nonlinear Science (AREA)
- Liquid Crystal (AREA)
- Mathematical Physics (AREA)
- Optics & Photonics (AREA)
- Control Of Indicators Other Than Cathode Ray Tubes (AREA)
- Liquid Crystal Display Device Control (AREA)
- Devices For Indicating Variable Information By Combining Individual Elements (AREA)
Abstract
A liquid crystal display having specific dispositions of pixels of a liquid crystal display so as to prevent the coupling defect and the stripe defect in high speed driving. The liquid crystal display includes a plurality of pixels arranged in a matrix shape, a switching element connected to each pixel, data lines and gate lines connected to the switching elements, and a data driver generating data voltages and applying the data voltages to the data lines. The data lines are disposed at both sides of the pixels in pairs, and data voltages of the same magnitude with different polarities are applied to the pairs of data lines. In this manner, preventing the coupling defect and the stripe defect, high speed driving can be performed.
Description
- This application is a Continuation Application of U.S. patent application Ser. No. 11/560,559 filed Nov. 16, 2006, which claims priority to and the benefit of Korean Patent Application No. 10-2005-0118067 filed in the Korean Intellectual Property Office on Dec. 6, 2005, the entire contents of which are incorporated herein by reference.
- (a) Technical Field
- The present disclosure relates to a liquid crystal display.
- (b) Discussion of the Related Art
- A conventional liquid crystal display (LCD) includes two display panels provided with pixel electrodes and a common electrode, and a liquid crystal layer interposed between the two panels and having dielectric anisotropy. The pixel electrodes are arranged in a matrix shape, and are connected to a switching element, such as a thin film transistor (TFT), so as to be sequentially applied with a data voltage row by row. The common electrode is formed on an entire surface of the display panel and is applied with a common voltage. The pixel electrodes, the common electrode, and the liquid crystal layer therebetween form a liquid crystal capacitor an overall circuit, and the liquid crystal capacitor is a basic unit constituent of a pixel along with a switching element connected thereto.
- In such a liquid crystal display, voltages are applied to the two electrodes so as to form an electric field in the liquid crystal layer, and transmittance of light passing through the liquid crystal layer is regulated by regulating an amplitude of the electric field so as to obtain a desired image. In order to prevent a degradation phenomenon caused by the application of an electric field in one direction to a liquid crystal layer for a long period of time, the polarity of the data voltage with respect to the common voltage is inverted for respective frames, respective rows, or respective pixels.
- Various methods are presently being tried as an effort to improve motion picture display characteristics of such a liquid crystal display, for example, a high speed driving method driving at the speed of 120 frames per second is under development. For high speed driving, a response speed of the liquid crystal should be two times the speed of 60 frames per second, and it is now estimated that this is possible.
- In addition, since a large amount of electrical power is consumed as a result of the high frame speed used in the high speed driving technique, an attempt to minimize power consumption has been tried by adopting a column inversion in an inversion driving method.
- The column inversion changes the polarity of a data voltage of the same data line by one frame, and since the number of inversions of the data voltage is one in one frame, power consumption characteristics are substantially enhanced.
- There are two problems with the column inversion, however. One of the problems is a coupling defect, and the other is a stripe defect.
- The coupling defect is a phenomenon that the respective luminances of an upper portion and a lower portion of a liquid crystal panel assembly become different from each other since a data voltage of the same polarity is continuously applied for one frame because of parasitic capacitance generated by an overlap of the data lines and the pixel electrodes. More specifically, a vertical crosstalk phenomenon occurs, where, if a box having a higher gray value than a root image is displayed on the root image having a low gray value, portions above and below the box have different gray values from the root image. In order to solve this coupling problem, a ratio of the parasitic capacitance due to the overlap of the data line and the pixel electrode to an entire capacitance of the device should be less than or equal to 1%, and to achieve this is difficult.
- The stripe defect is a phenomenon where a stripe is formed when data voltages of the same polarity are applied in a vertical directions and there is a difference between data voltages of a positive polarity and a negative polarity.
- The above information disclosed in this Background section is only for enhancement of understanding of the background of the invention and, therefore, it may contain information that does not form the prior art that is already known in this country to a person of ordinary skill in the art.
- Exemplary embodiments of the present invention provide a liquid crystal display having the advantages of preventing the coupling defect and the stripe defect present in high speed driving of the display.
- An exemplary embodiment of the present invention provides a liquid crystal display including: a plurality of pixels arranged in a matrix shape, a switching element connected to each pixel; data lines and gate lines connected to the switching elements; and a data driver generating data voltages and applying the data voltages to the data lines. The data lines are disposed at both sides of the pixels in pairs, and data voltages of the same magnitude but with different polarities are applied to the pairs of data lines.
- The switching element of each pixel may be connected to only one of the pair of data lines, and the switching elements of two neighboring pixels in a vertical direction of a pixel column may be alternately connected to the pair of data lines.
- The data driver may perform an N×2 inversion.
- A pixel disposition of even numbered columns among pixel columns and a pixel disposition of odd numbered pixel columns may form mirror symmetry with respect to the data line interposed therebetween, and the data driver may perform an N×1 inversion.
- A liquid crystal display according to an exemplary embodiment of the present invention includes: a plurality of pixels arranged in a matrix shape and respectively including a first subpixel and a second subpixel; first and second switching elements connected to the first and second subpixels; data lines and gate lines connected to the first and second subpixels; and a data driver generating a data voltage and applying the data voltage to the data line. The data lines are disposed at both sides of the pixels in pairs, and data voltages of the same magnitude with different polarities are applied to the pairs of data lines.
- The first and second switching elements of the pixels may be respectively connected to different data lines of the pairs of data lines, and the data driver may perform an N×2 inversion.
- Alternatively, the data driver may perform an N×1 inversion.
- A pixel disposition of even numbered columns among pixel columns and a pixel disposition of odd numbered pixel columns may form mirror symmetry with respect to the data lines interposed therebetween.
- The first and second switching elements of the first and second subpixels of a neighboring pixel in a column direction may be connected to the same data line.
- A pixel disposition of even numbered columns among pixel columns and a pixel disposition of odd numbered pixel columns may form mirror symmetry with respect to the data lines interposed therebetween.
- The accompanying drawings briefly described below illustrate exemplary embodiments of the present invention and, together with the description, serve to explain the principles of the present invention.
-
FIG. 1 is a block diagram of a liquid crystal display according to an exemplary embodiment of the present invention. -
FIG. 2 is an equivalent circuit diagram of one pixel of a liquid crystal display according to an exemplary embodiment of the present invention. -
FIG. 3 is a drawing showing pixel disposition of a liquid crystal display according to an exemplary embodiment of the present invention. -
FIG. 4 is a drawing showing an example of pixel disposition of a liquid crystal display according to an exemplary embodiment of the present invention. -
FIG. 5 is a waveform diagram for explaining a principle of removing a coupling defect in the pixel disposition shown inFIG. 4 . -
FIG. 6A andFIG. 6B are drawings showing exemplary variations of the pixel disposition shown inFIG. 4 . -
FIG. 7 is a drawing showing pixel disposition of a liquid crystal display according to an exemplary embodiment of the present invention. -
FIG. 8A toFIG. 8D are drawings showing exemplary variations of the pixel disposition shown inFIG. 7 . - The present invention will now be described more fully hereinafter with reference to the accompanying drawings, in which exemplary embodiments of the invention are shown.
- A liquid crystal display according to an exemplary embodiment of the present invention will now be explained in detail with reference to
FIG. 1 andFIG. 2 . -
FIG. 1 is a block diagram of a liquid crystal display according to an exemplary embodiment of the present invention, andFIG. 2 is an equivalent circuit diagram of one pixel of a liquid crystal display according to an exemplary embodiment of the present invention. - As shown in
FIG. 1 , a liquid crystal display according to an exemplary embodiment of the present invention includes a liquidcrystal panel assembly 300, agate driver 400 and adata driver 500 connected to the liquidcrystal panel assembly 300, agray voltage generator 800 connected to thedata driver 500, and asignal controller 600 controlling these elements. In a point of view of an equivalent circuit, the liquidcrystal panel assembly 300 includes a plurality of signal lines G1 to Gn and D1 to Dm, and a plurality of pixels PX connected to the signal lines and substantially arranged in a matrix shape. Meanwhile, in a structure shown inFIG. 2 , the liquidcrystal panel assembly 300 ofFIG. 1 includes lower andupper panels panels - The signal lines G1 to Gn and D1 to Dm, include a plurality of gate lines G1 to Gn that transmit gate signals, also referred to as “scanning signals”, and a plurality of data lines D1 to Dm that transmit data signals. The gate lines G1 to Gn extend in a row direction to be substantially parallel to one another, and the data lines D1 to Dm extend in a column direction to be substantially parallel to one another.
- Each pixel PX, for example, the pixel PX connected to the i-th (i=1, 2, . . . , n) gate line Gi and the j-th (j=1, 2, . . . , m) data line Dj includes a switching element Q connected to the signal lines Gi and Dj and a liquid crystal capacitor Clc and a storage capacitor Cst connected to the switching element Q. If desired, the storage capacitor Cst can be omitted.
- The switching element Q is a three terminal element, such as a thin film transistor, provided to the
lower panel 100, a control terminal thereof is connected to the gate line Gi, an input terminal thereof is connected to the data line Dj, and an output terminal thereof is connected to the liquid crystal capacitor Clc and the storage capacitor Cst. - The liquid crystal capacitor Clc has two terminals, one connected to a
pixel electrode 191 of thelower panel 100, and the other connected to acommon electrode 270 of theupper panel 200. Theliquid crystal layer 3 between the twoelectrodes pixel electrode 191 is connected to the switching element Q, and thecommon electrode 270 can be formed on the entire surface of theupper panel 200. A common voltage Vcom is applied to thecommon electrode 270. Unlike what is shown inFIG. 2 , thecommon electrode 270 may be provided on thelower panel 100. In this case, at least one of the twoelectrodes - The storage capacitor Cst, which supplements the liquid crystal capacitor Clc, has a separate signal line (not shown) and is formed when the
pixel electrodes 191 provided on thelower panel 100 overlap each other with an insulator interposed therebetween. A fixed voltage such as the common voltage Vcom is applied to the separate signal line. The storage capacitor Cst may also be formed by thepixel electrode 191 and the overlying previous gate line arranged to overlap each other through the insulator. - For color display, each pixel PX uniquely displays one of three primary colors (spatial division) or each pixel PX alternately displays the three primary colors (temporal division) as time lapses, and a desired color is recognized by a spatial or temporal sum of the primary colors. Examples of the three primary colors include red, green, and blue.
FIG. 2 shows an example of spatial division. In this example, each pixel PX has acolor filter 230 for one of the primary colors in a region of theupper panel 200 corresponding to thepixel electrode 191. Unlike what is shown inFIG. 2 , thecolor filter 230 may be formed above or below thepixel electrode 191 of thelower panel 100. - At least one polarizer (not shown) for polarizing light is attached to an outer surface of the liquid
crystal panel assembly 300. - Referring again to
FIG. 1 , thegray voltage generator 800 generates two sets of gray voltages related to the light transmittance of the pixel PX forming a set of reference gray voltages. The two sets of gray voltages have a positive value and a negative value with respect to the common voltage Vcom, respectively. - The
gate driver 400 is connected to the gate lines G1 to Gn of the liquidcrystal panel assembly 300, and applies the gate signals, which are combinations of a gate-on voltage Von and a gate-off voltage Voff, to the gate lines G1 to Gn. - The
data driver 500 is connected to the data lines D1 to Dm of the liquidcrystal panel assembly 300. Thedata driver 500 selects one of the gray voltages from thegray voltage generator 800, and applies the selected gray voltage to the data lines D1 to Dm as a data signal. In the case, however, that thegray voltage generator 800 supplies only a predetermined number of the reference gray voltages, rather than the voltages for all gray levels, thedata driver 500 divides the reference gray voltage so as to generate the gray voltages for all gray levels and selects the data voltage from among these. - The
signal controller 600 controls thegate driver 400, thedata driver 500, and other elements. - Each of such
display driving elements crystal panel assembly 300 in the form of at least one IC chip, may be attached to the liquidcrystal panel assembly 300 while being mounted on a flexible printed circuit film (not shown) by a TCP (tape carrier package), or may be mounted on a separate printed circuit board (not shown). Alternatively, the drivingelements crystal panel assembly 300, together with the signal lines G1 to Gn and D1 to Dm and the thin film transistor switching element Q. Alternatively, the drivingelements - The display operation of the liquid crystal display will now be described in detail.
- The
signal controller 600 receives input image signals R, G, and B and input control signals for controlling display of the input image signals R, G, and B. Examples of the input control signals include a vertical synchronization signal Vsync, a horizontal synchronizing signal Hsync, a main clock signal MCLK, a data enable signal DE, and the like. - The
signal controller 600 processes the input image signals R, G, and B according to the operating condition of the liquidcrystal panel assembly 300 on the basis of the input image signals R, G, and B and the input control signals, and generates a gate control signal CONT1 and a data control signal CONT2. Then, thesignal controller 600 supplies the gate control signal CONT1 to thegate driver 400 and supplies the data control signal CONT2 and the processed image signal DAT to thedata driver 500. - The gate control signal CONT1 may include a scanning start signal that instructs to start scanning, and at least one gate clock signal controlling an output timing of a gate-on voltage Von. The gate control signal CONT1 may further include an output enable signal limiting a duration time of the gate-on voltage Von.
- The data control signal CONT2 includes a horizontal synchronization start signal that notifies transmission of the output image signal DAT to one row of pixels PX, a load signal instructing to apply the data signal to the data lines D1 to Dm, and a data clock signal. The data control signal CONT2 may also further include an inversion signal for inverting the voltage polarity of the data signal relative to the common voltage Vcom, hereinafter, the voltage polarity of the data signal relative to the common voltage is simply referred to as the polarity of the data signal.
- On the basis of the data control signal CONT2 from the
signal controller 600, thedata driver 500 receives the digital image signal DAT for one row [set] of pixels PX, and selects the gray voltage corresponding to each digital image signal DAT from the gray voltage generator. Then, thedata driver 500 coverts the digital image signal DAT into an analog data signal, and applies the analog data signal to the corresponding data lines D1 to Dm. - The
gate driver 400 applies the gate-on voltage Von to the gate lines G1 to Gn on the basis of the gate control signal CONT1 from thesignal controller 600 so as to turn on the switching element Q connected to the gate lines G1 to Gn. Accordingly, the data signal applied to the data lines D1 to Dm is applied to the corresponding pixel PX through the turned-on switching element Q. - A difference between the voltage of the data signal applied to the pixel PX and the common voltage Vcom becomes a charge voltage of the liquid crystal capacitor Clc, that is, it becomes a pixel voltage. The alignment of liquid crystal molecules varies according to the value of the pixel voltage and, thus, the polarization of light passing through the
liquid crystal layer 3 is changed. The change in polarization causes a change in transmittance of light by the polarizers attached to thedisplay panel assembly 300. - By repeating this operation for every one horizontal period (referred to as “1H”), which is equal to one cycle of the horizontal synchronizing signal Hsync and the data enable signal DE, the gate-on voltage Von is sequentially applied to all of the gate lines G1 to Gn, and the data signal is applied to all of the pixels PX, so that an image corresponding to one frame is displayed.
- When one frame is completed, and a next frame starts, the state of the inversion signal to be applied to the
data driver 500 is controlled such that the polarity of the data voltage to be applied to each pixel is opposite to the polarity thereof in the previous frame (“frame inversion”). At this time, the polarity of the data signal on one data line may be changed in one frame according to the characteristics of the inversion signal, for example, row inversion or dot inversion, or the polarity of the data signal applied to one pixel row may be different from each other, for example, column inversion or dot inversion. - The pixel disposition of a liquid crystal display according to an exemplary embodiment of the present invention will now be explained in detail with reference to
FIG. 3 toFIG. 8D . -
FIG. 3 is a drawing showing pixel disposition of a liquid crystal display according to an exemplary embodiment of the present invention. - Here, for better comprehension and ease of description, only a portion (D1 to D7) of the data lines and only a portion (Gj−1 to Gj+2) of the gate lines are shown, and the
data driver 500 performs a column inversion as shown by the polarities on the data lines D1 D7. In this case, the column inversion can include repeating the same polarity in one time (not shown), as well as alternating a positive polarity and a negative polarity. For example, the column inversion includes the case in which two polarities of the data voltage are alternately repeated such as ‘+, −, +, −, +, −, . . .’, that is, N×1 inversion, and the case in which the same polarity is repeated in one time and then the polarity is inverted, N×2 inversion (not shown). Furthermore, the case in which a separate voltage is applied only to the left-end data line and 1+N×2 inversion driving is performed will simply be called the N×2 inversion hereinafter. In addition, although the switching elements Q of the pixels PX are connected to the data lines D1 to D7 and the gate lines D1 to D7 and Gj−1 to Gj+2, explanations will be made for the case that the pixels PX are connected to the two signal lines Di to D7 and Gj−1 to Gj+2. - As shown in
FIG. 3 , respective pixels PX of one row are connected to the data lines D1 to D7 positioned at the left or the right thereof, and the pixels of one column are alternately connected to the data lines D1 to D7 positioned at the left and the right thereof. Accordingly, the polarity of data voltages appearing in the pixels PX, hereinafter referred to as the polarity of the pixels, alternately shows a positive (+) polarity and a negative (−) polarity, and this results in the performing of dot inversion. Accordingly, the stripe defect that is generated when polarities of the pixels PX of one column are equal to one another can be prevented. -
FIG. 4 is a drawing showing an example of pixel disposition of a liquid crystal display according to an exemplary embodiment of the present invention. - Referring to
FIG. 4 , unlike what is shown inFIG. 3 , pairs of data lines D1a and D1b, D2a and D2b, D3a and D3b, D4a and D4b, D5a and D5b, and D6a and D6b are respectively disposed at the left and the right of the respective pixels PX, and the pixels PX are respectively connected to the data lines D1b, D2b, D3b, D4b, D5b, and D6b that are positioned at the right thereof. - Accordingly, polarities of the pixels PX of one row are alternately changed, and polarities of the pixels PX of one column are all the same. The polarities of the data lines D1a, D2a, D3a, D4a, D5a, and D6a to which the pixels PX are not connected among the pairs of data lines D1a and D1b, D2a and D2b, D3a and D3b, D4a and D4b, D5a and D5b, and D6a and D6b are opposite to the polarities of the data lines D1b, D2b, D3b, D4b, D5b, and D6b to which the pixels PX are connected.
- For example, in the pair of data lines D1a and D1b included in the first column, the data voltage Vdtb of a negative polarity is applied to the right data line D1b, and the data voltage Vdtb of a positive polarity is applied to the left data line D1a. These data voltages are shown with respect to the common voltage Vcom in
FIG. 5 . That is, the data voltage of the same magnitude as the data voltage applied to the right data line D1b but having the opposite polarity to that of the data voltage applied to the right data line D1b is applied to the left data line D1a. This causes voltages across parasitic capacitors in respective pixels PX to offset each other, so that the coupling defect does not occur. -
FIG. 6A andFIG. 6B are drawings showing exemplary variations of the pixel disposition shown inFIG. 4 . - In the pixel disposition shown in
FIG. 6A , the pixels PX of the same row are respectively connected to the same data lines D1b, D2b, D3b, D4b, D5b, and D6b, or D1a, D2a, D3a, D4a, D5a, and D6a, and the pixels PX of the same column are respectively alternately connected to the pairs of data lines D1a and D1b, D2a and D2b, D3a and D3b, D4a and D4b, D5a and D5b, and D6a and D6b per row. In the pixel disposition shown inFIG. 6B , the pixel disposition in the odd numbered columns is equal to the pixel disposition shown inFIG. 6A , and the pixel disposition in the even numbered columns and the pixel disposition in the odd numbered columns form mirror symmetry with respect to the data lines interposed therebetween. For example, the pixel disposition of the second column and the pixel disposition of the first column form mirror symmetry with respect to the data lines D1b and D2a. - The stripe defect may occur in the pixel disposition shown in
FIG. 4 , since polarities of the data voltages applied to the pixels PX of one column are the same. The pixel dispositions shown inFIG. 6A andFIG. 6B , however, can prevent not only the coupling defect but also the stripe defect. -
FIG. 7 is a drawing showing pixel disposition of a liquid crystal display according to an exemplary embodiment of the present invention, andFIG. 8A toFIG. 8D are drawings showing exemplary variations of the pixel disposition shown inFIG. 7 . -
FIG. 7 shows a pixel structure obtained by dividing respective pixels PX in the pixel structure shown inFIG. 4 ,FIG. 6A , andFIG. 6B into two subpixels PXa and PXb with respect to the gate lines Gj−1 to Gj+2. This is a structure for enhancing side visibility, and is mainly used in a liquid crystal display of a vertical alignment (VA) mode. - Two subpixels PXa and PXb constituting one pixel PX are respectively connected to different data lines D1a and D1b, D2a and D2b, D3a and D3b, D4a and D4b, D5a and D5b, or D6a and D6b, and this structure is repeated in the row direction and in the column direction, so that polarities of the pixels PX as shown in the drawing are formed.
- Since polarities of the data lines of the pairs of data lines D1a and D1b, D2a and D2b, D3a and D3b, D4a and D4b, D5a and D5b, and D6a and D6b between which the pixels PX are disposed are opposite to each other, the coupling defect does not occur. In addition, since polarities of the pixels PX in one column are alternately repeated, the stripe defect does not occur.
- The pixel disposition shown in
FIG. 8A is equal to the pixel disposition shown inFIG. 7 . They differ, however, in the polarities of the applied data voltages, and thereby polarities of the pixels PX become different even in the same structure. That is, although polarities of the pixels PX show a positive polarity and a negative polarity in the row direction and in the column direction in the pixel disposition shown inFIG. 7 , polarities of the pixels PX are the same in the row direction in the pixel disposition shown inFIG. 8A . The coupling defect or the stripe defect, however, can be prevented even in this case. - In the pixel disposition shown in
FIG. 8B , two subpixels PXa and PXb constituting one pixel PX are respectively connected to different data lines D1a and D1b, D2a and D2b, D3a and D3b, D4a and D4b, D5a and D5b, or D6a and D6b. Two neighboring subpixels of two neighboring pixels in the column direction, however, are connected to the same data line D1a or D1b, D2a or D2b, D3a or D3b, D4a or D4b, D5a or D5b, or D6a or D6b. For example, the lower subpixel PXb in the (j−1)-th row of the first column and the upper subpixel PXa in the neighboring j-th row of the first column are connected to the same data line D1a, and the lower subpixel PXb in the j-th row and the upper subpixel PXa in the neighboring (j+1)-th row are connected to the same data line D1b. - In the pixel disposition shown in
FIG. 8C , the pixel disposition of the odd numbered columns is the same as the pixel disposition shown inFIG. 8B , and the pixel disposition of the even numbered columns and the pixel disposition of the odd numbered columns form mirror symmetry with respect to the data lines interposed therebetween. For example, the pixel disposition of the second column and the pixel disposition of the first column form mirror symmetry with respect to the data lines D1b and D2a. - In the pixel disposition shown in
FIG. 8D , the pixel disposition of the odd numbered columns is to the same as the pixel disposition shown inFIG. 7A . That is, two subpixels PXa and PXb constituting one pixel PX are respectively connected to different data lines D1a and D1b, D2a and D2b, D3a and D3b, D4a and D4b, D5a and D5b, or D6a and D6b, and this structure is repeated in the column direction. The pixel disposition of the even numbered columns and the pixel disposition of the odd numbered columns form mirror symmetry with respect to the data lines interposed therebetween, just like the pixel disposition shown inFIG. 8C . - As such, data voltages of the same magnitude with different polarities are applied to the data lines of the respective pairs of data lines D1a and D1b, D2a and D2b, D3a and D3b, D4a and D4b, D5a and D5b, and D6a and D6b, and polarities of pixels in the column direction are alternately repeated, so that the coupling defect and the stripe defect can be prevented.
- In this manner, while preventing the coupling defect and the stripe defect, high speed driving can be performed.
- While this invention has been described in connection with what is presently considered to be practical exemplary embodiments, it is to be understood that the invention is not limited to the disclosed embodiments, but, on the contrary, is intended to cover various modifications and equivalent arrangements included within the spirit and scope of the appended claims.
Claims (32)
1. A display device comprising:
a pixel comprising:
a first sub-pixel having a first sub-pixel electrode and a first thin film transistor, and
a second sub-pixel having a second sub-pixel electrode and a second thin film transistor;
a gate line electrically connected to the first sub-pixel and the second sub-pixel, the gate line extending in a first direction and configured to transmit a gate signal;
a first data line electrically connected to the first sub-pixel, the first data line extending in a second direction and configured to transmit a first data voltage; and
a second data line electrically connected to the second sub-pixel, the second data line extending in the second direction and configured to transmit a second data voltage,
wherein the first sub-pixel electrode is spaced apart from the second sub-pixel electrode in plan view,
wherein one of the first thin film transistor and second thin film transistor is disposed at an upper side of the gate line and the other of the first thin film transistor and second thin film transistor is disposed at a lower side of the gate line, and
wherein the gate line is disposed between the first sub-pixel and the second sub-pixel.
2. The display device of claim 1 , wherein the first sub-pixel and the second sub-pixel are disposed to correspond to a first color filter.
3. The display device of claim 2 , wherein the first data voltage is different from the second data voltage and the first data voltage and the second data voltage are obtained from a single image information.
4. The display device of claim 3 , wherein the first data voltage has a polarity opposite to a polarity of the second data voltage.
5. The display device of claim 4 , wherein one of the first data line and second data line is disposed at a left side of the pixel and the other of the first data line and second data line is disposed at a right side of the pixel.
6. The display device of claim 5 , wherein the first sub-pixel and the second sub-pixel are disposed between the first data line and the second data line.
7. The display device of claim 4 , wherein the first sub-pixel and the second sub-pixel are disposed between the first data line and the second data line.
8. The display device of claim 3 , wherein one of the first data line and second data line is disposed at a left side of the pixel and the other of the first data line and second data line is disposed at a right side of the pixel.
9. The display device of claim 8 , wherein the first sub-pixel and the second sub-pixel are disposed between the first data line and the second data line.
10. The display device of claim 3 , wherein the first sub-pixel and the second sub-pixel are disposed between the first data line and the second data line.
11. The display device of claim 2 , wherein the first data voltage has a polarity opposite to a polarity of the second data voltage.
12. The display device of claim 11 , wherein one of the first data line and second data line is disposed at a left side of the pixel and the other of the first data line and second data line is disposed at a right side of the pixel.
13. The display device of claim 12 , wherein the first sub-pixel and the second sub-pixel are disposed between the first data line and the second data line.
14. The display device of claim 11 , wherein the first sub-pixel and the second sub-pixel are disposed between the first data line and the second data line.
15. The display device of claim 2 , wherein one of the first data line and second data line is disposed at a left side of the pixel and the other of the first data line and second data line is disposed at a right side of the pixel.
16. The display device of claim 15 , wherein the first sub-pixel and the second sub-pixel are disposed between the first data line and the second data line.
17. The display device of claim 2 , wherein the first sub-pixel and the second sub-pixel are disposed between the first data line and the second data line.
18. The display device of claim 1 , wherein the first data voltage is different from the second data voltage and the first data voltage and the second data voltage are obtained from a single image information.
19. The display device of claim 18 , wherein the first data voltage has a polarity opposite to a polarity of the second data voltage.
20. The display device of claim 19 , wherein one of the first data line and second data line is disposed at a left side of the pixel and the other of the first data line and second data line is disposed at a right side of the pixel.
21. The display device of claim 20 , wherein the first sub-pixel and the second sub-pixel are disposed between the first data line and the second data line.
22. The display device of claim 19 , wherein the first sub-pixel and the second sub-pixel are disposed between the first data line and the second data line.
23. The display device of claim 18 , wherein one of the first data line and second data line is disposed at a left side of the pixel and the other of the first data line and second data line is disposed at a right side of the pixel.
24. The display device of claim 23 , wherein the first sub-pixel and the second sub-pixel are disposed between the first data line and the second data line.
25. The display device of claim 18 , wherein the first sub-pixel and the second sub-pixel are disposed between the first data line and the second data line.
26. The display device of claim 1 , wherein the first data voltage has a polarity opposite to a polarity of the second data voltage.
27. The display device of claim 26 , wherein one of the first data line and second data line is disposed at a left side of the pixel and the other of the first data line and second data line is disposed at a right side of the pixel.
28. The display device of claim 27 , wherein the first sub-pixel and the second sub-pixel are disposed between the first data line and the second data line.
29. The display device of claim 26 , wherein the first sub-pixel and the second sub-pixel are disposed between the first data line and the second data line.
30. The display device of claim 1 , wherein one of the first data line and second data line is disposed at a left side of the pixel and the other of the first data line and second data line is disposed at a right side of the pixel.
31. The display device of claim 30 , wherein the first sub-pixel and the second sub-pixel are disposed between the first data line and the second data line.
32. The display device of claim 1 , wherein the first sub-pixel and the second sub-pixel are disposed between the first data line and the second data line.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US13/162,156 US20110241979A1 (en) | 2005-12-06 | 2011-06-16 | Liquid crystal display |
Applications Claiming Priority (4)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1020050118067A KR101189277B1 (en) | 2005-12-06 | 2005-12-06 | Liquid crystal display |
KR10-2005-0118067 | 2005-12-06 | ||
US11/560,559 US8633884B2 (en) | 2005-12-06 | 2006-11-16 | Liquid crystal display having data lines disposed in pairs at both sides of the pixels |
US13/162,156 US20110241979A1 (en) | 2005-12-06 | 2011-06-16 | Liquid crystal display |
Related Parent Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
US11/560,559 Continuation US8633884B2 (en) | 2005-12-06 | 2006-11-16 | Liquid crystal display having data lines disposed in pairs at both sides of the pixels |
Publications (1)
Publication Number | Publication Date |
---|---|
US20110241979A1 true US20110241979A1 (en) | 2011-10-06 |
Family
ID=38130524
Family Applications (2)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
US11/560,559 Active 2029-10-17 US8633884B2 (en) | 2005-12-06 | 2006-11-16 | Liquid crystal display having data lines disposed in pairs at both sides of the pixels |
US13/162,156 Abandoned US20110241979A1 (en) | 2005-12-06 | 2011-06-16 | Liquid crystal display |
Family Applications Before (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
US11/560,559 Active 2029-10-17 US8633884B2 (en) | 2005-12-06 | 2006-11-16 | Liquid crystal display having data lines disposed in pairs at both sides of the pixels |
Country Status (5)
Country | Link |
---|---|
US (2) | US8633884B2 (en) |
JP (2) | JP5025244B2 (en) |
KR (1) | KR101189277B1 (en) |
CN (2) | CN1979318B (en) |
TW (1) | TWI447687B (en) |
Cited By (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US20100123652A1 (en) * | 2008-11-14 | 2010-05-20 | Au Optronics Corporation | Liquid crystal display and liquid crystal display panel thereof |
US8687160B2 (en) | 2007-10-15 | 2014-04-01 | Nlt Technologies, Ltd. | Display device |
CN104730786A (en) * | 2013-12-18 | 2015-06-24 | 三星显示有限公司 | Liquid crystal display |
US9087472B2 (en) | 2012-11-30 | 2015-07-21 | Au Optronics Corporation | Array substrate of a display panel and the driving method thereof |
CN105609066A (en) * | 2015-12-31 | 2016-05-25 | 上海天马微电子有限公司 | Display panel and driving method thereof, display apparatus |
US20170323594A1 (en) * | 2016-05-09 | 2017-11-09 | Au Optronics Corporation | Pixel array and display device |
US11302274B2 (en) * | 2017-06-07 | 2022-04-12 | Samsung Display Co., Ltd. | Liquid crystal display device |
Families Citing this family (65)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO2008053609A1 (en) * | 2006-10-31 | 2008-05-08 | Sharp Kabushiki Kaisha | Liquid crystal display and method for driving the same |
JP2009092912A (en) * | 2007-10-09 | 2009-04-30 | Hitachi Displays Ltd | Liquid crystal display device |
TWI353472B (en) * | 2007-10-22 | 2011-12-01 | Au Optronics Corp | Lcd with data compensating function and method for |
US8179346B2 (en) * | 2007-11-16 | 2012-05-15 | Au Optronics Corporation | Methods and apparatus for driving liquid crystal display device |
WO2009084332A1 (en) * | 2007-12-27 | 2009-07-09 | Sharp Kabushiki Kaisha | Liquid crystal display, liquid crystal display driving method, and television receiver |
JP5512284B2 (en) * | 2007-12-27 | 2014-06-04 | シャープ株式会社 | Liquid crystal display device, driving method of liquid crystal display device, and television receiver |
JP2009168849A (en) * | 2008-01-10 | 2009-07-30 | Seiko Epson Corp | Electro-optical device, method of driving electro-optical device, and electronic apparatus |
JP2009175468A (en) * | 2008-01-25 | 2009-08-06 | Hitachi Displays Ltd | Display |
KR20100053949A (en) * | 2008-11-13 | 2010-05-24 | 삼성전자주식회사 | Liquid crystal display |
US8830411B2 (en) * | 2009-01-16 | 2014-09-09 | Samsung Display Co., Ltd. | Array substrate and method of manufacturing the same |
WO2010103726A1 (en) | 2009-03-13 | 2010-09-16 | シャープ株式会社 | Array substrate, liquid crystal panel, liquid crystal display device, and television receiver |
TW201035655A (en) * | 2009-03-24 | 2010-10-01 | Novatek Microelectronics Corp | Display pannel |
RU2488894C2 (en) | 2009-04-13 | 2013-07-27 | Шарп Кабусики Кайся | Display device, liquid crystal display device, method of driving display device and television receiver |
KR20110006770A (en) * | 2009-07-15 | 2011-01-21 | 삼성전자주식회사 | Display device |
WO2011049106A1 (en) * | 2009-10-22 | 2011-04-28 | シャープ株式会社 | Liquid crystal display device |
JP2011180548A (en) * | 2010-03-04 | 2011-09-15 | Sony Corp | Display device and electronic device |
KR101639308B1 (en) * | 2010-03-10 | 2016-07-14 | 삼성디스플레이 주식회사 | Method of driving display panel and display apparatus for performing the method |
CN102906806B (en) * | 2010-06-30 | 2015-04-01 | 夏普株式会社 | Display apparatus, liquid crystal display apparatus and television receiver |
US9111475B2 (en) * | 2011-02-18 | 2015-08-18 | Sharp Kabushiki Kaisha | Method of driving display device, program, and display device |
US20130027286A1 (en) * | 2011-07-28 | 2013-01-31 | Shenzhen China Star Optoelectronics Technology Co., Ltd. | Lcd panel |
WO2013042613A1 (en) * | 2011-09-20 | 2013-03-28 | シャープ株式会社 | Liquid crystal display device and drive method for liquid crystal panel |
JP2013068837A (en) * | 2011-09-22 | 2013-04-18 | Sony Corp | Display device, method of driving the same, and electronic unit |
TWI448885B (en) * | 2011-12-13 | 2014-08-11 | Au Optronics Corp | Common voltage supply circuit of display, method of supplying common voltage and liquied crystal display thereof |
US9245487B2 (en) * | 2012-03-14 | 2016-01-26 | Apple Inc. | Systems and methods for reducing loss of transmittance due to column inversion |
US9047832B2 (en) | 2012-03-14 | 2015-06-02 | Apple Inc. | Systems and methods for liquid crystal display column inversion using 2-column demultiplexers |
US9047826B2 (en) | 2012-03-14 | 2015-06-02 | Apple Inc. | Systems and methods for liquid crystal display column inversion using reordered image data |
US9047838B2 (en) | 2012-03-14 | 2015-06-02 | Apple Inc. | Systems and methods for liquid crystal display column inversion using 3-column demultiplexers |
US9368077B2 (en) | 2012-03-14 | 2016-06-14 | Apple Inc. | Systems and methods for adjusting liquid crystal display white point using column inversion |
TWI473065B (en) | 2012-04-23 | 2015-02-11 | Sitronix Technology Corp | The drive circuit of the flashing display panel can be eliminated |
CN102662286B (en) * | 2012-05-11 | 2015-04-08 | 京东方科技集团股份有限公司 | Array substrate, LCD (Liquid Crystal Display) panel and display device |
JP6040621B2 (en) | 2012-08-07 | 2016-12-07 | セイコーエプソン株式会社 | Image display device |
EP2897124B1 (en) * | 2012-09-13 | 2019-02-06 | Sharp Kabushiki Kaisha | Liquid crystal display device |
MY175398A (en) * | 2012-09-13 | 2020-06-24 | Sharp Kk | Liquid crystal display device |
CN103268044B (en) * | 2012-09-19 | 2016-04-20 | 上海天马微电子有限公司 | A kind of bore hole 3D Liquid crystal disply device and its preparation method |
KR101985682B1 (en) * | 2013-01-31 | 2019-06-04 | 엘지디스플레이 주식회사 | Liquid Crystal Display Device And Method Of Driving The Same |
JP2015075698A (en) * | 2013-10-10 | 2015-04-20 | セイコーエプソン株式会社 | Electro-optic device and electronic equipment |
WO2015083269A1 (en) | 2013-12-05 | 2015-06-11 | Necディスプレイソリューションズ株式会社 | Image display device, image display system, and image display method |
CN104252854A (en) * | 2014-09-28 | 2014-12-31 | 京东方科技集团股份有限公司 | Array substrate, driving method thereof, display panel and display device |
CN104317122B (en) * | 2014-10-10 | 2018-01-12 | 上海中航光电子有限公司 | Dot structure, array base palte, display panel and display device and its driving method |
KR102422555B1 (en) * | 2015-05-08 | 2022-07-21 | 삼성디스플레이 주식회사 | Display device |
CN104834138B (en) * | 2015-05-25 | 2018-01-30 | 深圳市华星光电技术有限公司 | High image quality liquid crystal display pixel circuit |
CN105158997A (en) * | 2015-08-31 | 2015-12-16 | 深超光电(深圳)有限公司 | Thin film transistor array substrate |
KR20170028464A (en) * | 2015-09-03 | 2017-03-14 | 삼성디스플레이 주식회사 | Display apparatus |
CN105278133A (en) * | 2015-10-27 | 2016-01-27 | 深超光电(深圳)有限公司 | Liquid crystal display device |
WO2017159664A1 (en) * | 2016-03-16 | 2017-09-21 | シャープ株式会社 | Liquid crystal display device and driving method therefor |
CN106125427B (en) * | 2016-06-27 | 2019-05-03 | 武汉华星光电技术有限公司 | Liquid crystal display panel and liquid crystal display device |
CN106019747A (en) * | 2016-07-26 | 2016-10-12 | 京东方科技集团股份有限公司 | Array substrate and driving method thereof and display panel |
CN106125433B (en) * | 2016-08-30 | 2019-05-28 | 武汉华星光电技术有限公司 | A kind of array substrate wire structures, liquid crystal display panel and liquid crystal display |
KR102576283B1 (en) * | 2016-12-27 | 2023-09-08 | 티씨엘 차이나 스타 옵토일렉트로닉스 테크놀로지 컴퍼니 리미티드 | Display device |
KR102505685B1 (en) | 2017-01-16 | 2023-03-02 | 가부시키가이샤 한도오따이 에네루기 켄큐쇼 | Display device and manufacturing method thereof |
KR102605992B1 (en) | 2017-02-17 | 2023-11-23 | 가부시키가이샤 한도오따이 에네루기 켄큐쇼 | Display device |
WO2018167605A1 (en) * | 2017-03-17 | 2018-09-20 | Semiconductor Energy Laboratory Co., Ltd. | Semiconductor device, display device, and electronic device |
JP7021407B2 (en) * | 2017-07-11 | 2022-02-17 | トライベイル テクノロジーズ, エルエルシー | Display device and its driving method |
CN109427250B (en) | 2017-08-31 | 2020-01-24 | 昆山国显光电有限公司 | Display panel and display device |
TWI632538B (en) | 2017-09-05 | 2018-08-11 | 友達光電股份有限公司 | Displaying device and driving method |
TWI657427B (en) * | 2017-12-29 | 2019-04-21 | 友達光電股份有限公司 | Display apparatus |
CN108153077A (en) * | 2018-01-26 | 2018-06-12 | 深圳市华星光电半导体显示技术有限公司 | A kind of display panel and liquid crystal display |
CN109212856B (en) * | 2018-10-24 | 2021-10-01 | 惠科股份有限公司 | Display panel, display device and display |
TWI686790B (en) * | 2018-12-11 | 2020-03-01 | 友達光電股份有限公司 | Display device and driving method thereof |
TWI685698B (en) * | 2019-01-03 | 2020-02-21 | 友達光電股份有限公司 | Pixel array substrate and driving method thereof |
CN112420735A (en) * | 2019-08-20 | 2021-02-26 | 友达光电股份有限公司 | Pixel array substrate |
CN114155816B (en) * | 2020-09-07 | 2023-02-03 | 咸阳彩虹光电科技有限公司 | Pixel matrix driving method and display device |
KR20220069675A (en) | 2020-11-20 | 2022-05-27 | 엘지디스플레이 주식회사 | Data driving circuit, controller and display device |
US11282467B1 (en) * | 2020-12-30 | 2022-03-22 | Himax Technologies Limited | Display device |
TWI756103B (en) * | 2021-04-12 | 2022-02-21 | 友達光電股份有限公司 | Pixel array substrate |
Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6552706B1 (en) * | 1999-07-21 | 2003-04-22 | Nec Corporation | Active matrix type liquid crystal display apparatus |
US20030222840A1 (en) * | 2002-04-15 | 2003-12-04 | Nec Lcd Technologies, Ltd. | Liquid crystal display device and driving method for liquid crystal display device |
US20050122441A1 (en) * | 2003-12-05 | 2005-06-09 | Fumikazu Shimoshikiryoh | Liquid crystal display |
Family Cites Families (26)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH05273522A (en) * | 1992-01-08 | 1993-10-22 | Matsushita Electric Ind Co Ltd | Display device and display device using the same |
JPH06266315A (en) | 1993-03-17 | 1994-09-22 | Fujitsu Ltd | Liquid crystal display device |
JP3406492B2 (en) | 1997-05-26 | 2003-05-12 | シャープ株式会社 | LCD panel |
KR100338007B1 (en) * | 1997-09-30 | 2002-10-11 | 삼성전자 주식회사 | Lcd and method for driving the same |
JP2000235371A (en) | 1999-02-15 | 2000-08-29 | Matsushita Electric Ind Co Ltd | Liquid crystal display device with built-in peripheral drive circuit |
JP2002023709A (en) | 2000-07-11 | 2002-01-25 | Seiko Epson Corp | Electrooptical device, and its driving method and electronic equipment using the method |
KR100350651B1 (en) | 2000-11-22 | 2002-08-29 | 삼성전자 주식회사 | Liquid Crystal Display Device with a function of multi-frame inversion and driving appatatus and method thereof |
KR100777705B1 (en) | 2001-09-07 | 2007-11-21 | 삼성전자주식회사 | Liquid crystal display device and a driving method thereof |
KR100806906B1 (en) | 2001-09-25 | 2008-02-22 | 삼성전자주식회사 | Liquid crystal display and driving apparatus and method thereof |
KR100825093B1 (en) | 2001-09-27 | 2008-04-25 | 삼성전자주식회사 | Liquid crystal device |
GB2383462B (en) | 2001-12-19 | 2004-08-04 | Lg Philips Lcd Co Ltd | Liquid crystal display |
KR100870003B1 (en) | 2001-12-24 | 2008-11-24 | 삼성전자주식회사 | a liquid crystal display |
JP3999081B2 (en) | 2002-01-30 | 2007-10-31 | シャープ株式会社 | Liquid crystal display |
JP3906090B2 (en) | 2002-02-05 | 2007-04-18 | シャープ株式会社 | Liquid crystal display |
KR100825103B1 (en) | 2002-05-16 | 2008-04-25 | 삼성전자주식회사 | A liquid crystal display and a driving method thereof |
KR100890022B1 (en) | 2002-07-19 | 2009-03-25 | 삼성전자주식회사 | Liquid crystal display and driving method thereof |
US6922183B2 (en) * | 2002-11-01 | 2005-07-26 | Chin-Lung Ting | Multi-domain vertical alignment liquid crystal display and driving method thereof |
KR100671515B1 (en) * | 2003-03-31 | 2007-01-19 | 비오이 하이디스 테크놀로지 주식회사 | The Dot Inversion Driving Method Of LCD |
TW594656B (en) | 2003-08-08 | 2004-06-21 | Vastview Tech Inc | High-resolution-quality liquid crystal display device and driving method thereof |
JP4241238B2 (en) * | 2003-08-29 | 2009-03-18 | 株式会社 日立ディスプレイズ | Liquid crystal display |
CN100478744C (en) | 2003-12-05 | 2009-04-15 | 夏普株式会社 | Liquid crystal display device |
KR101030694B1 (en) | 2004-02-19 | 2011-04-26 | 삼성전자주식회사 | Liquid crystal display panel and liquid crystal display apparatus having the same |
KR20050089298A (en) | 2004-03-04 | 2005-09-08 | 삼성전자주식회사 | Thin film transistor array panel having reduced data lines |
KR101039023B1 (en) | 2004-04-19 | 2011-06-03 | 삼성전자주식회사 | Liquid crystal display |
JP4394512B2 (en) | 2004-04-30 | 2010-01-06 | 富士通株式会社 | Liquid crystal display device with improved viewing angle characteristics |
JP4622652B2 (en) | 2005-04-22 | 2011-02-02 | エプソンイメージングデバイス株式会社 | Electro-optical device, driving method, and electronic apparatus |
-
2005
- 2005-12-06 KR KR1020050118067A patent/KR101189277B1/en active IP Right Grant
-
2006
- 2006-11-16 US US11/560,559 patent/US8633884B2/en active Active
- 2006-11-22 TW TW095143187A patent/TWI447687B/en active
- 2006-12-04 JP JP2006327062A patent/JP5025244B2/en active Active
- 2006-12-05 CN CN2006101645396A patent/CN1979318B/en active Active
- 2006-12-05 CN CN201210390814.1A patent/CN102914924B/en active Active
-
2011
- 2011-06-16 US US13/162,156 patent/US20110241979A1/en not_active Abandoned
-
2012
- 2012-04-02 JP JP2012083989A patent/JP5571117B2/en active Active
Patent Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6552706B1 (en) * | 1999-07-21 | 2003-04-22 | Nec Corporation | Active matrix type liquid crystal display apparatus |
US20030222840A1 (en) * | 2002-04-15 | 2003-12-04 | Nec Lcd Technologies, Ltd. | Liquid crystal display device and driving method for liquid crystal display device |
US20050122441A1 (en) * | 2003-12-05 | 2005-06-09 | Fumikazu Shimoshikiryoh | Liquid crystal display |
Cited By (13)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US9104079B2 (en) | 2007-10-15 | 2015-08-11 | Nlt Technologies, Ltd. | Display device and terminal device |
US8687160B2 (en) | 2007-10-15 | 2014-04-01 | Nlt Technologies, Ltd. | Display device |
US8964157B2 (en) | 2007-10-15 | 2015-02-24 | Nlt Technologies, Ltd. | Display device |
US9244319B2 (en) | 2007-10-15 | 2016-01-26 | Nlt Technnologies, Ltd. | Display device and terminal device |
US8299992B2 (en) | 2008-11-14 | 2012-10-30 | Au Optronics Corporation | Liquid crystal display and liquid crystal display panel thereof |
US20100123652A1 (en) * | 2008-11-14 | 2010-05-20 | Au Optronics Corporation | Liquid crystal display and liquid crystal display panel thereof |
US9087472B2 (en) | 2012-11-30 | 2015-07-21 | Au Optronics Corporation | Array substrate of a display panel and the driving method thereof |
CN104730786A (en) * | 2013-12-18 | 2015-06-24 | 三星显示有限公司 | Liquid crystal display |
US9989807B2 (en) * | 2013-12-18 | 2018-06-05 | Samsung Display Co., Ltd. | Liquid crystal display |
CN105609066A (en) * | 2015-12-31 | 2016-05-25 | 上海天马微电子有限公司 | Display panel and driving method thereof, display apparatus |
US20170323594A1 (en) * | 2016-05-09 | 2017-11-09 | Au Optronics Corporation | Pixel array and display device |
US10762822B2 (en) * | 2016-05-09 | 2020-09-01 | Au Optronics Corporation | Pixel array and display device |
US11302274B2 (en) * | 2017-06-07 | 2022-04-12 | Samsung Display Co., Ltd. | Liquid crystal display device |
Also Published As
Publication number | Publication date |
---|---|
KR20070059340A (en) | 2007-06-12 |
JP5025244B2 (en) | 2012-09-12 |
JP2012163972A (en) | 2012-08-30 |
US20070132684A1 (en) | 2007-06-14 |
TW200723219A (en) | 2007-06-16 |
KR101189277B1 (en) | 2012-10-09 |
CN102914924A (en) | 2013-02-06 |
JP5571117B2 (en) | 2014-08-13 |
CN1979318A (en) | 2007-06-13 |
JP2007156483A (en) | 2007-06-21 |
US8633884B2 (en) | 2014-01-21 |
CN102914924B (en) | 2016-01-20 |
CN1979318B (en) | 2012-12-05 |
TWI447687B (en) | 2014-08-01 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
US8633884B2 (en) | Liquid crystal display having data lines disposed in pairs at both sides of the pixels | |
JP4943505B2 (en) | Liquid crystal display | |
US7791577B2 (en) | Liquid crystal display device and method for driving the same | |
US8174519B2 (en) | Liquid crystal display and driving method thereof | |
KR101189272B1 (en) | Display device and driving method thereof | |
US20060044301A1 (en) | Display device and driving method thereof | |
US20100118013A1 (en) | Liquid crystal display device, liquid crystal display device drive method, and television receiver | |
US20060038759A1 (en) | Liquid crystal display and driving method thereof | |
JP2006292854A (en) | Electrooptical device, method for driving the same, and electronic appliance | |
JP4449784B2 (en) | Electro-optical device, driving method, and electronic apparatus | |
JP4428255B2 (en) | Electro-optical device, driving method, and electronic apparatus | |
KR20070039759A (en) | Liquid crystal display | |
KR101074381B1 (en) | A in-plain switching liquid crystal display device | |
US7760196B2 (en) | Impulsive driving liquid crystal display and driving method thereof | |
KR101272338B1 (en) | Liquid crystal display | |
US20120194567A1 (en) | Liquid crystal display, and device and method for modifying image signal | |
WO2010125716A1 (en) | Display device and drive method for display devices | |
US7812911B2 (en) | Liquid crystal display | |
JP4874731B2 (en) | Liquid crystal display | |
KR20070063168A (en) | Liquid crystal display and driving method thereof | |
KR20060082104A (en) | Liquid crystal display and driving method thereof | |
KR101359924B1 (en) | Display device | |
KR20070063944A (en) | Display device | |
US20070030226A1 (en) | Liquid crystal display | |
KR20070006072A (en) | Liquid crystal display and driving method thereof |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
AS | Assignment |
Owner name: SAMSUNG DISPLAY CO., LTD., KOREA, REPUBLIC OF Free format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNOR:SAMSUNG ELECTRONICS CO., LTD.;REEL/FRAME:029045/0860 Effective date: 20120904 |
|
STCB | Information on status: application discontinuation |
Free format text: ABANDONED -- FAILURE TO RESPOND TO AN OFFICE ACTION |