US20100041317A1 - Workpiece processing method - Google Patents
Workpiece processing method Download PDFInfo
- Publication number
- US20100041317A1 US20100041317A1 US12/497,826 US49782609A US2010041317A1 US 20100041317 A1 US20100041317 A1 US 20100041317A1 US 49782609 A US49782609 A US 49782609A US 2010041317 A1 US2010041317 A1 US 2010041317A1
- Authority
- US
- United States
- Prior art keywords
- crystal silicon
- grinding
- columns
- abrasive
- workpiece
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Abandoned
Links
- 238000003672 processing method Methods 0.000 title description 9
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims abstract description 33
- 239000013078 crystal Substances 0.000 claims abstract description 33
- 229910052710 silicon Inorganic materials 0.000 claims abstract description 33
- 239000010703 silicon Substances 0.000 claims abstract description 33
- 229910021421 monocrystalline silicon Inorganic materials 0.000 claims abstract description 31
- 238000000034 method Methods 0.000 claims abstract description 7
- 238000005498 polishing Methods 0.000 claims abstract description 7
- 239000004575 stone Substances 0.000 description 9
- 239000004065 semiconductor Substances 0.000 description 7
- 238000010586 diagram Methods 0.000 description 2
- 239000000463 material Substances 0.000 description 2
- 229910052782 aluminium Inorganic materials 0.000 description 1
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 1
- 239000004020 conductor Substances 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
Images
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
- H01L21/304—Mechanical treatment, e.g. grinding, polishing, cutting
Definitions
- the present invention relates to a processing method for processing a workpiece having a plurality of multi-crystal silicon columns embedded in single-crystal silicon so as to expose the heads of the multi-crystal silicon columns.
- a semiconductor device manufacture step the front surface of a generally disklike semiconductor wafer is sectioned by predetermined dividing lines called streets arranged in a lattice-like pattern into a plurality of areas, in which devices such as ICs, LSIs or the like are formed. Then, the semiconductor wafer is cut along the predetermined dividing lines to divide the areas formed with the devices, whereby individual semiconductor chips are manufactured.
- a module structure is made practicable in which a plurality of semiconductor chips are laminated and the electrodes of the semiconductor chips thus laminated are connected together.
- through holes are formed at respective positions where the electrodes are formed in the semiconductor wafer and conductive material such as multi-crystal silicon, aluminum or the like to be connected to the electrodes is embedded in a columnar manner into the through holes.
- conductive material such as multi-crystal silicon, aluminum or the like to be connected to the electrodes is embedded in a columnar manner into the through holes.
- a grinding process using a grinding tool having grinding stones is conceivable. Grinding may be performed using grinding stones with a large grain diameter in order to expose the heads of the multi-crystal silicon columns. In such a case, however, high-precision head-exposure cannot be performed. Even so, if grinding stones with a small grain diameter are used to perform grinding, a problem arises as below. When a multi-crystal silicon portion different in hardness from single-crystal silicon is to be ground, grinding burn or clogging of grinding stones may occur so that the grinding cannot be done.
- the head positions of the multi-crystal silicon columns embedded in single-crystal silicon have a variation of approximately 5 ⁇ m. Therefore, a removal amount of as small as approximately 5 ⁇ m is needed to uniformly expose the heads of the multi-crystal silicon columns to the front surface of the single-crystal silicon.
- a large removal amount can be handled by forming a rough surface with good biting even by means of a grinding stone having rough grinding grains with a certain level of small diameter and then processing the surface by a grinding stone having grinding grains with a small diameter.
- a method of processing a workpiece having a plurality of multi-crystal silicon columns embedded in single-crystal silicon including an abrasive step of polishing the single-crystal silicon and the multi-crystal silicon columns by use of an abrasive tool in a dry manner to expose all heads of the multi-crystal silicon columns to a front surface of the single-crystal silicon.
- the workpiece processing method further includes a grinding step of grinding the single-crystal silicon by use of a grinding tool before the abrasive step.
- the processing method according to the present invention includes the abrasive step of concurrently polishing the single-crystal silicon and the plurality of multi-crystal silicon columns in a dry manner by use of the abrasive tool to expose the heads of the multi-crystal silicon columns to the front surface of the single-crystal silicon. Therefore, even if the workpiece contains materials different in hardness from each other, it can uniformly be processed. Thus, the method can provide an effect of exposing the heads of the multi-crystal silicon columns embedded in the single-crystal silicon to the front surface of the single-crystal silicon with ease and with a high degree of accuracy.
- FIGS. 1A to 1D are step diagrams illustrating a processing method according to an embodiment of the present invention.
- FIGS. 1A to 1D are step diagrams illustrating a processing method of an embodiment.
- a workpiece 10 to be processed is first prepared as illustrated in FIG. 1A .
- This workpiece 10 has a plurality of multi-crystal silicon columns 12 embedded in single-crystal silicon 11 .
- the head positions of the multi-crystal silicon columns 12 have a variation of h, approximately 5 ⁇ m. Therefore, a removal amount of at least 5 ⁇ m is needed to uniformly expose the heads of the multi-crystal silicon columns 12 .
- a grinding step in which only the single-crystal silicon 11 is ground using a grinding tool 20 is performed on such a workpiece 10 .
- the grinding tool 20 is configured such that a plurality of grinding stones 23 are provided on the lower end face of a grinding wheel 22 mounted to a spindle 21 drivingly rotated by a motor not illustrated.
- the grinding tool 20 and a chuck table (not shown) holding the workpiece 10 are rotated relatively to each other at a given speed to grind the single-crystal silicon 11 .
- a dimension h 1 corresponding to a ground amount in this case is controlled to reach a position close to the head of a multi-crystal silicon column 12 located at a highest position in the workpiece 10 as much as possible in a range not reaching the head of this multi-crystal silicon column 12 .
- the grinding processing by the grinding tool 20 in this grinding step is performed satisfactorily because an object is only the single-crystal silicon 11 , which contains no materials different in hardness.
- the grinding step is performed by being divided into two steps: rough grinding performed by use of grinding stones 23 having rough grinding grains in the most part thereof and finish grinding performed by use of grinding stones 23 having small grinding grains in the last half of the dimension h 1 .
- the processing efficiency of the grinding step (a reduction in processing time) is increased and flatness is enhanced at the time of shift to the next step.
- the single-crystal silicon 11 and the multi-crystal silicon columns 12 are concurrently polished in a dry manner by use of an abrasive tool 30 as illustrated in FIG. 1C .
- an abrasive step is performed to expose the heads of the multi-crystal silicon columns 12 .
- the abrasive tool 30 is configured such that an abrasive pad 33 is provided on the full surface of the lower end surface of a polishing wheel 32 mounted to a spindle 31 drivingly rotated by a motor not illustrated.
- the abrasive pad 33 is composed of felt having a given density or more and a given hardness or more and grinding grains scattered in the felt as disclosed in e.g. Japanese Patent Laid-open No.
- a dimension h 2 corresponding to the polishing amount in this case is equal to or greater than the dimension h mentioned above.
- the dimension h 2 is set at e.g. approximately 7 ⁇ m or more in view of the variations in the dimension h.
- the abrasive processing by the abrasive tool 30 in this abrasive step is processing for a portion containing the single-crystal silicon 11 and the multi-crystal silicon columns 12 which are different in hardness from each other.
- the abrasive processing is dry polishing using the abrasive tool 30 , the single-crystal silicon 11 and the multi-crystal silicon columns 12 can uniformly be processed without any problem as illustrated in FIG. 1D .
- the heads of the multi-crystal silicon columns 12 embedded into the single-crystal silicon 11 can be exposed with ease and with a high degree of accuracy.
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- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Mechanical Treatment Of Semiconductor (AREA)
- Finish Polishing, Edge Sharpening, And Grinding By Specific Grinding Devices (AREA)
- Grinding Of Cylindrical And Plane Surfaces (AREA)
Abstract
A method of processing a workpiece having a plurality of multi-crystal silicon columns embedded in single-crystal silicon includes a grinding step for grinding only the single-crystal silicon by use of a grinding tool and an abrasive step for concurrently polishing the single-crystal silicon and the multi-crystal silicon columns by use of an abrasive tool in a dry manner to expose all the heads of the multi-crystal silicon columns to the front surface of the single-crystal silicon.
Description
- 1. Field of the Invention
- The present invention relates to a processing method for processing a workpiece having a plurality of multi-crystal silicon columns embedded in single-crystal silicon so as to expose the heads of the multi-crystal silicon columns.
- 2. Description of the Related Art
- In a semiconductor device manufacture step, the front surface of a generally disklike semiconductor wafer is sectioned by predetermined dividing lines called streets arranged in a lattice-like pattern into a plurality of areas, in which devices such as ICs, LSIs or the like are formed. Then, the semiconductor wafer is cut along the predetermined dividing lines to divide the areas formed with the devices, whereby individual semiconductor chips are manufactured. In order to downsize and sophisticate devices, a module structure is made practicable in which a plurality of semiconductor chips are laminated and the electrodes of the semiconductor chips thus laminated are connected together. In the module structure, through holes (via holes) are formed at respective positions where the electrodes are formed in the semiconductor wafer and conductive material such as multi-crystal silicon, aluminum or the like to be connected to the electrodes is embedded in a columnar manner into the through holes. (See e.g. Japanese Patent Laid-open No. 2003-163323.)
- As a processing method for exposing multi-crystal silicon columns in a work piece having a plurality of the multi-crystal silicon columns embedded in a single-crystal silicon, a grinding process using a grinding tool having grinding stones is conceivable. Grinding may be performed using grinding stones with a large grain diameter in order to expose the heads of the multi-crystal silicon columns. In such a case, however, high-precision head-exposure cannot be performed. Even so, if grinding stones with a small grain diameter are used to perform grinding, a problem arises as below. When a multi-crystal silicon portion different in hardness from single-crystal silicon is to be ground, grinding burn or clogging of grinding stones may occur so that the grinding cannot be done.
- Incidentally, the head positions of the multi-crystal silicon columns embedded in single-crystal silicon have a variation of approximately 5 μm. Therefore, a removal amount of as small as approximately 5 μm is needed to uniformly expose the heads of the multi-crystal silicon columns to the front surface of the single-crystal silicon. In general, a large removal amount can be handled by forming a rough surface with good biting even by means of a grinding stone having rough grinding grains with a certain level of small diameter and then processing the surface by a grinding stone having grinding grains with a small diameter. However, it is difficult for the grinding method as mentioned above to cope with such a slight removal amount.
- Accordingly, it is an object of the present invention to provide a processing method capable of exposing the heads of a plurality of multi-crystal silicon columns embedded in single-crystal silicon with ease and with a high degree of accuracy.
- In accordance with an aspect of the present invention, there is provided a method of processing a workpiece having a plurality of multi-crystal silicon columns embedded in single-crystal silicon, including an abrasive step of polishing the single-crystal silicon and the multi-crystal silicon columns by use of an abrasive tool in a dry manner to expose all heads of the multi-crystal silicon columns to a front surface of the single-crystal silicon.
- Preferably, the workpiece processing method further includes a grinding step of grinding the single-crystal silicon by use of a grinding tool before the abrasive step.
- The processing method according to the present invention includes the abrasive step of concurrently polishing the single-crystal silicon and the plurality of multi-crystal silicon columns in a dry manner by use of the abrasive tool to expose the heads of the multi-crystal silicon columns to the front surface of the single-crystal silicon. Therefore, even if the workpiece contains materials different in hardness from each other, it can uniformly be processed. Thus, the method can provide an effect of exposing the heads of the multi-crystal silicon columns embedded in the single-crystal silicon to the front surface of the single-crystal silicon with ease and with a high degree of accuracy.
- The above and other objects, features and advantages of the present invention and the manner of realizing them will become more apparent, and the invention itself will best be understood from a study of the following description and appended claims with reference to the attached drawings showing some preferred embodiments of the invention.
-
FIGS. 1A to 1D are step diagrams illustrating a processing method according to an embodiment of the present invention. - Preferred embodiments for performing a processing method according to the present invention will hereinafter be described with reference to the drawings. The present invention is not limited to the embodiments but can be modified in various ways without departing from the gist of the present invention.
FIGS. 1A to 1D are step diagrams illustrating a processing method of an embodiment. Aworkpiece 10 to be processed is first prepared as illustrated inFIG. 1A . Thisworkpiece 10 has a plurality ofmulti-crystal silicon columns 12 embedded in single-crystal silicon 11. The head positions of themulti-crystal silicon columns 12 have a variation of h, approximately 5 μm. Therefore, a removal amount of at least 5 μm is needed to uniformly expose the heads of themulti-crystal silicon columns 12. - Referring to
FIG. 1B , a grinding step in which only the single-crystal silicon 11 is ground using agrinding tool 20 is performed on such aworkpiece 10. Thegrinding tool 20 is configured such that a plurality ofgrinding stones 23 are provided on the lower end face of a grindingwheel 22 mounted to aspindle 21 drivingly rotated by a motor not illustrated. Thegrinding tool 20 and a chuck table (not shown) holding theworkpiece 10 are rotated relatively to each other at a given speed to grind the single-crystal silicon 11. A dimension h1 corresponding to a ground amount in this case is controlled to reach a position close to the head of amulti-crystal silicon column 12 located at a highest position in theworkpiece 10 as much as possible in a range not reaching the head of thismulti-crystal silicon column 12. - The grinding processing by the
grinding tool 20 in this grinding step is performed satisfactorily because an object is only the single-crystal silicon 11, which contains no materials different in hardness. The grinding step is performed by being divided into two steps: rough grinding performed by use of grindingstones 23 having rough grinding grains in the most part thereof and finish grinding performed by use of grindingstones 23 having small grinding grains in the last half of the dimension h1. Thus, the processing efficiency of the grinding step (a reduction in processing time) is increased and flatness is enhanced at the time of shift to the next step. - After the grinding step as described above, the single-
crystal silicon 11 and themulti-crystal silicon columns 12 are concurrently polished in a dry manner by use of anabrasive tool 30 as illustrated inFIG. 1C . In this way, an abrasive step is performed to expose the heads of themulti-crystal silicon columns 12. Theabrasive tool 30 is configured such that anabrasive pad 33 is provided on the full surface of the lower end surface of apolishing wheel 32 mounted to aspindle 31 drivingly rotated by a motor not illustrated. Theabrasive pad 33 is composed of felt having a given density or more and a given hardness or more and grinding grains scattered in the felt as disclosed in e.g. Japanese Patent Laid-open No. 2002-283243, etc. Theabrasive tool 30 and a chuck table holding theworkpiece 10 are rotated relatively to each other at a given speed. Thus, the single-crystal silicon 11 and themulti-crystal silicon columns 12 are concurrently polished in a dry manner. In this case, the processing rate is set slower than that at the time of the grinding step described above. A dimension h2 corresponding to the polishing amount in this case is equal to or greater than the dimension h mentioned above. In the present embodiment, the dimension h2 is set at e.g. approximately 7 μm or more in view of the variations in the dimension h. - The abrasive processing by the
abrasive tool 30 in this abrasive step is processing for a portion containing the single-crystal silicon 11 and themulti-crystal silicon columns 12 which are different in hardness from each other. However, since the abrasive processing is dry polishing using theabrasive tool 30, the single-crystal silicon 11 and themulti-crystal silicon columns 12 can uniformly be processed without any problem as illustrated inFIG. 1D . Thus, the heads of themulti-crystal silicon columns 12 embedded into the single-crystal silicon 11 can be exposed with ease and with a high degree of accuracy. - The present invention is not limited to the details of the above described preferred embodiments. The scope of the invention is defined by the appended claims and all changes and modifications as fall within the equivalence of the scope of the claims are therefore to be embraced by the invention.
Claims (2)
1. A method of processing a workpiece having a plurality of multi-crystal silicon columns embedded in single-crystal silicon, comprising:
an abrasive step of polishing the single-crystal silicon and the multi-crystal silicon columns by use of an abrasive tool in a dry manner to expose all heads of the multi-crystal silicon columns to a front surface the single-crystal silicon.
2. The method according to claim 1 , further comprising:
a grinding step of grinding the single-crystal silicon by use of a grinding tool before the abrasive step.
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2008210076A JP5215773B2 (en) | 2008-08-18 | 2008-08-18 | Processing method |
JP2008-210076 | 2008-08-18 |
Publications (1)
Publication Number | Publication Date |
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US20100041317A1 true US20100041317A1 (en) | 2010-02-18 |
Family
ID=41681594
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
US12/497,826 Abandoned US20100041317A1 (en) | 2008-08-18 | 2009-07-06 | Workpiece processing method |
Country Status (2)
Country | Link |
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US (1) | US20100041317A1 (en) |
JP (1) | JP5215773B2 (en) |
Families Citing this family (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2012151411A (en) * | 2011-01-21 | 2012-08-09 | Disco Abrasive Syst Ltd | Grinding method of hard substrate |
JP5912311B2 (en) * | 2011-06-30 | 2016-04-27 | 株式会社ディスコ | Workpiece grinding method |
Citations (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5096854A (en) * | 1988-06-28 | 1992-03-17 | Japan Silicon Co., Ltd. | Method for polishing a silicon wafer using a ceramic polishing surface having a maximum surface roughness less than 0.02 microns |
US20010036738A1 (en) * | 1998-06-30 | 2001-11-01 | Masanobu Hatanaka | Semiconductor device manufacturing method |
US6416397B2 (en) * | 1999-08-09 | 2002-07-09 | Micron Technology, Inc. | Apparatus and methods for substantial planarization of solder bumps |
US20020096994A1 (en) * | 2000-07-18 | 2002-07-25 | Toshiaki Iwafuchi | Image display unit and method of producing image display unit |
US20090250790A1 (en) * | 2003-05-06 | 2009-10-08 | Sumitomo Electric Industries, Ltd. | Nitride semiconductor wafer and method of processing nitride semiconductor wafer |
Family Cites Families (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2534673B2 (en) * | 1986-07-04 | 1996-09-18 | 日本電気株式会社 | Method for manufacturing dielectric isolation substrate |
JP2541884B2 (en) * | 1991-08-31 | 1996-10-09 | 信越半導体株式会社 | Method for manufacturing dielectric isolation substrate |
JPH07161811A (en) * | 1993-12-13 | 1995-06-23 | Sony Corp | Method of forming semiconductor thin film |
JPH07335742A (en) * | 1994-06-15 | 1995-12-22 | Nippondenso Co Ltd | Semiconductor substrate and its manufacture |
JPH10156707A (en) * | 1996-11-26 | 1998-06-16 | Sony Corp | Machining method and its device, and flattening method in semiconductor process using this machining method |
JP2005034972A (en) * | 2003-07-18 | 2005-02-10 | North:Kk | Dry abrasive and dry polishing device using it |
JP4872208B2 (en) * | 2004-11-18 | 2012-02-08 | 富士電機株式会社 | Manufacturing method of semiconductor device |
-
2008
- 2008-08-18 JP JP2008210076A patent/JP5215773B2/en active Active
-
2009
- 2009-07-06 US US12/497,826 patent/US20100041317A1/en not_active Abandoned
Patent Citations (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5096854A (en) * | 1988-06-28 | 1992-03-17 | Japan Silicon Co., Ltd. | Method for polishing a silicon wafer using a ceramic polishing surface having a maximum surface roughness less than 0.02 microns |
US20010036738A1 (en) * | 1998-06-30 | 2001-11-01 | Masanobu Hatanaka | Semiconductor device manufacturing method |
US6326309B2 (en) * | 1998-06-30 | 2001-12-04 | Fujitsu Limited | Semiconductor device manufacturing method |
US6416397B2 (en) * | 1999-08-09 | 2002-07-09 | Micron Technology, Inc. | Apparatus and methods for substantial planarization of solder bumps |
US20020096994A1 (en) * | 2000-07-18 | 2002-07-25 | Toshiaki Iwafuchi | Image display unit and method of producing image display unit |
US20090250790A1 (en) * | 2003-05-06 | 2009-10-08 | Sumitomo Electric Industries, Ltd. | Nitride semiconductor wafer and method of processing nitride semiconductor wafer |
Also Published As
Publication number | Publication date |
---|---|
JP5215773B2 (en) | 2013-06-19 |
JP2010045310A (en) | 2010-02-25 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
AS | Assignment |
Owner name: DISCO CORPORATION,JAPAN Free format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNOR:MIYAI, TOSHIKI;REEL/FRAME:022914/0295 Effective date: 20090623 |
|
STCB | Information on status: application discontinuation |
Free format text: ABANDONED -- FAILURE TO RESPOND TO AN OFFICE ACTION |