US20100003813A1 - Semiconductor device and method of fabricating the same - Google Patents
Semiconductor device and method of fabricating the same Download PDFInfo
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- US20100003813A1 US20100003813A1 US12/585,334 US58533409A US2010003813A1 US 20100003813 A1 US20100003813 A1 US 20100003813A1 US 58533409 A US58533409 A US 58533409A US 2010003813 A1 US2010003813 A1 US 2010003813A1
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- 239000004065 semiconductor Substances 0.000 title claims abstract description 126
- 238000004519 manufacturing process Methods 0.000 title description 8
- 239000000758 substrate Substances 0.000 claims abstract description 125
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 claims description 68
- 238000000137 annealing Methods 0.000 claims description 56
- 230000015572 biosynthetic process Effects 0.000 claims description 52
- 238000005121 nitriding Methods 0.000 claims description 45
- 229910052757 nitrogen Inorganic materials 0.000 claims description 34
- 238000000034 method Methods 0.000 claims description 24
- CEPICIBPGDWCRU-UHFFFAOYSA-N [Si].[Hf] Chemical compound [Si].[Hf] CEPICIBPGDWCRU-UHFFFAOYSA-N 0.000 claims description 23
- 229910052735 hafnium Inorganic materials 0.000 claims description 20
- VBJZVLUMGGDVMO-UHFFFAOYSA-N hafnium atom Chemical compound [Hf] VBJZVLUMGGDVMO-UHFFFAOYSA-N 0.000 claims description 20
- BPQQTUXANYXVAA-UHFFFAOYSA-N Orthosilicate Chemical compound [O-][Si]([O-])([O-])[O-] BPQQTUXANYXVAA-UHFFFAOYSA-N 0.000 claims description 17
- 229910052760 oxygen Inorganic materials 0.000 claims description 15
- 239000001301 oxygen Substances 0.000 claims description 15
- 239000011261 inert gas Substances 0.000 claims description 13
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 claims description 12
- 229910052751 metal Inorganic materials 0.000 claims description 12
- 239000002184 metal Substances 0.000 claims description 12
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 claims description 10
- 239000000377 silicon dioxide Substances 0.000 claims description 5
- 239000007772 electrode material Substances 0.000 claims description 4
- QJGQUHMNIGDVPM-UHFFFAOYSA-N nitrogen group Chemical group [N] QJGQUHMNIGDVPM-UHFFFAOYSA-N 0.000 claims description 4
- 238000005389 semiconductor device fabrication Methods 0.000 claims description 3
- 235000012239 silicon dioxide Nutrition 0.000 claims description 3
- 238000000151 deposition Methods 0.000 claims 1
- 239000012299 nitrogen atmosphere Substances 0.000 claims 1
- 229910052710 silicon Inorganic materials 0.000 claims 1
- 239000010703 silicon Substances 0.000 claims 1
- OKTJSMMVPCPJKN-UHFFFAOYSA-N Carbon Chemical compound [C] OKTJSMMVPCPJKN-UHFFFAOYSA-N 0.000 abstract description 6
- 229910052799 carbon Inorganic materials 0.000 abstract description 6
- 230000007246 mechanism Effects 0.000 description 25
- 230000001590 oxidative effect Effects 0.000 description 20
- 230000015556 catabolic process Effects 0.000 description 12
- 239000007789 gas Substances 0.000 description 10
- 230000000052 comparative effect Effects 0.000 description 9
- XKRFYHLGVUSROY-UHFFFAOYSA-N Argon Chemical compound [Ar] XKRFYHLGVUSROY-UHFFFAOYSA-N 0.000 description 8
- 238000002955 isolation Methods 0.000 description 7
- 230000007547 defect Effects 0.000 description 6
- 229910021420 polycrystalline silicon Inorganic materials 0.000 description 6
- 229920005591 polysilicon Polymers 0.000 description 6
- 229910052786 argon Inorganic materials 0.000 description 4
- 230000007423 decrease Effects 0.000 description 4
- 230000006866 deterioration Effects 0.000 description 4
- 150000004767 nitrides Chemical class 0.000 description 3
- KRHYYFGTRYWZRS-UHFFFAOYSA-N Fluorane Chemical compound F KRHYYFGTRYWZRS-UHFFFAOYSA-N 0.000 description 2
- BLRPTPMANUNPDV-UHFFFAOYSA-N Silane Chemical compound [SiH4] BLRPTPMANUNPDV-UHFFFAOYSA-N 0.000 description 2
- 238000000231 atomic layer deposition Methods 0.000 description 2
- 239000003054 catalyst Substances 0.000 description 2
- 238000010586 diagram Methods 0.000 description 2
- VBCSQFQVDXIOJL-UHFFFAOYSA-N diethylazanide;hafnium(4+) Chemical compound [Hf+4].CC[N-]CC.CC[N-]CC.CC[N-]CC.CC[N-]CC VBCSQFQVDXIOJL-UHFFFAOYSA-N 0.000 description 2
- 238000009826 distribution Methods 0.000 description 2
- 239000002019 doping agent Substances 0.000 description 2
- 238000001020 plasma etching Methods 0.000 description 2
- 230000036962 time dependent Effects 0.000 description 2
- ZOXJGFHDIHLPTG-UHFFFAOYSA-N Boron Chemical compound [B] ZOXJGFHDIHLPTG-UHFFFAOYSA-N 0.000 description 1
- 229910000577 Silicon-germanium Inorganic materials 0.000 description 1
- QCWXUUIWCKQGHC-UHFFFAOYSA-N Zirconium Chemical compound [Zr] QCWXUUIWCKQGHC-UHFFFAOYSA-N 0.000 description 1
- LEVVHYCKPQWKOP-UHFFFAOYSA-N [Si].[Ge] Chemical compound [Si].[Ge] LEVVHYCKPQWKOP-UHFFFAOYSA-N 0.000 description 1
- 229910021417 amorphous silicon Inorganic materials 0.000 description 1
- 229910052796 boron Inorganic materials 0.000 description 1
- 238000005229 chemical vapour deposition Methods 0.000 description 1
- 150000001875 compounds Chemical class 0.000 description 1
- 238000005520 cutting process Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 230000005684 electric field Effects 0.000 description 1
- CJNBYAVZURUTKZ-UHFFFAOYSA-N hafnium(iv) oxide Chemical compound O=[Hf]=O CJNBYAVZURUTKZ-UHFFFAOYSA-N 0.000 description 1
- 239000011368 organic material Substances 0.000 description 1
- 238000000059 patterning Methods 0.000 description 1
- 238000000206 photolithography Methods 0.000 description 1
- 238000004544 sputter deposition Methods 0.000 description 1
- 239000000126 substance Substances 0.000 description 1
- 238000005406 washing Methods 0.000 description 1
- 229910052726 zirconium Inorganic materials 0.000 description 1
Images
Classifications
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- C—CHEMISTRY; METALLURGY
- C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
- C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
- C23C16/00—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
- C23C16/22—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the deposition of inorganic material, other than metallic material
- C23C16/30—Deposition of compounds, mixtures or solid solutions, e.g. borides, carbides, nitrides
- C23C16/40—Oxides
- C23C16/401—Oxides containing silicon
-
- C—CHEMISTRY; METALLURGY
- C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
- C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
- C23C16/00—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
- C23C16/56—After-treatment
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02296—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer
- H01L21/02318—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer post-treatment
- H01L21/02321—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer post-treatment introduction of substances into an already existing insulating layer
- H01L21/02329—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer post-treatment introduction of substances into an already existing insulating layer introduction of nitrogen
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/314—Inorganic layers
- H01L21/3143—Inorganic layers composed of alternated layers or of mixtures of nitrides and oxides or of oxinitrides, e.g. formation of oxinitride by oxidation of nitride layers
- H01L21/3145—Inorganic layers composed of alternated layers or of mixtures of nitrides and oxides or of oxinitrides, e.g. formation of oxinitride by oxidation of nitride layers formed by deposition from a gas or vapour
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
- H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
- H01L21/02172—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing at least one metal element, e.g. metal oxides, metal nitrides, metal oxynitrides or metal carbides
- H01L21/02175—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing at least one metal element, e.g. metal oxides, metal nitrides, metal oxynitrides or metal carbides characterised by the metal
- H01L21/02181—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing at least one metal element, e.g. metal oxides, metal nitrides, metal oxynitrides or metal carbides characterised by the metal the material containing hafnium, e.g. HfO2
Definitions
- the present invention relates to a semiconductor device and a method of fabricating the same.
- a method which uses, as a gate insulating film, a high-dielectric-constant film having a relative dielectric constant higher than that of a silicon dioxide (SiO 2 ) film is proposed.
- a hafnium silicon oxynitride (HfSiON) film is an example of this high-dielectric-constant film.
- the hafnium silicon oxynitride (HfSiON) film is formed by, e.g., forming a hafnium silicate (HfSiO x ) film on a semiconductor substrate, and nitriding the hafnium silicate (HfSiO x ) film by doping nitrogen (N) into it.
- HfSiON hafnium silicon oxynitride
- hafnium silicate (HfSiO x ) film however, the bonding force between atoms is weak. Therefore, when nitrogen (N) is doped, bonding hands for bonding atoms are disconnected, and a large number of defects (holes) are formed.
- hafnium silicon oxynitride (HfSiON) film When this hafnium silicon oxynitride (HfSiON) film is exposed to an oxidizing ambient or the atmosphere, atmospheric oxygen (O 2 ) or the like is activated by hafnium (Hf) as a catalyst, and oxygen radicals are produced. These oxygen radicals easily invade the hafnium silicon oxynitride (HfSiON) film or a semiconductor substrate.
- an interface insulating film having a low dielectric constant is formed between the hafnium silicon oxynitride (HfSiON) film and semiconductor substrate. This decreases the effective relative dielectric constant of the gate insulating film or increases the electrical thickness of the film.
- oxygen (O) replaces nitrogen (N) in the hafnium silicon oxynitride (HfSiON) film
- nitrogen (N) is released from the hafnium silicon oxynitride (HfSiON) film.
- hafnium silicon oxynitride (HfSiON) film is separated into silicon dioxide (SiO 2 ) and hafnium dioxide (HfO 2 ), and these compounds crystallize. This decreases the heat resistance. Also, boron as a dopant readily breaks through the hafnium silicon oxynitride (HfSiON) film and diffuses into the semiconductor substrate. Furthermore, dielectric breakdown easily occurs, and this shortens the life of the gate insulating film.
- a reference concerning a method of forming an insulating film having a high dielectric constant is as follows.
- a semiconductor device fabrication method comprising;
- a second insulating film containing at least a metal, oxygen, and nitrogen by nitriding the first insulating film by doping nitrogen into it;
- an ambient selected from the group consisting of a reduced-pressure ambient at about 10 ⁇ 3 Torr, an inert gas ambient, and a nitrogen ambient is formed in the transfer chamber.
- a semiconductor device fabrication method comprising;
- a second insulating film containing at least a metal, oxygen, and nitrogen by nitriding the first insulating film by doping nitrogen into it;
- an ambient selected from the group consisting of a reduced-pressure ambient at about 10 ⁇ 3 Torr, an inert gas ambient, and a nitrogen ambient is formed in the transfer box.
- a semiconductor device comprising:
- a gate insulating film selectively formed on a predetermined region of a semiconductor substrate
- a source region and drain region formed, in a surface portion of said semiconductor substrate, on two sides of a channel region positioned below said gate electrode,
- a carbon concentration in an interface where said gate insulating film is in contact with said gate electrode is not more than 5 ⁇ 10 22 atoms/cm 3 .
- FIG. 1 is a block diagram showing the arrangement of a gate insulating film/gate electrode formation apparatus according to the first embodiment of the present invention
- FIG. 2 is a longitudinal sectional view showing an element sectional structure in a predetermined step of a MOSFET fabrication method according to the embodiment of the present invention
- FIG. 3 is a longitudinal sectional view showing an element sectional structure in a predetermined step of the same MOSFET fabrication method
- FIG. 4 is a longitudinal sectional view showing an element sectional structure in a predetermined step of the same MOSFET fabrication method
- FIG. 5 is a longitudinal sectional view showing an element sectional structure in a predetermined step of the same MOSFET fabrication method
- FIG. 6 is a longitudinal sectional view showing an element sectional structure in a predetermined step of the same MOSFET fabrication method
- FIG. 7 is a graph showing the distributions of the gate threshold voltages of MOSFETs in this embodiment in which a semiconductor substrate was not exposed to an oxidizing ambient or the atmosphere, and in a comparative example in which a semiconductor substrate was exposed to an oxidizing ambient or the atmosphere;
- FIG. 8 is a graph showing the time-dependent dielectric breakdown (TDDB) characteristics of the MOSFETs in this embodiment in which the semiconductor substrate was not exposed to an oxidizing ambient or the atmosphere, and in the comparative example in which the semiconductor substrate was exposed to an oxidizing ambient or the atmosphere; and
- TDDB time-dependent dielectric breakdown
- FIG. 9 is a block diagram showing the arrangement of a gate insulating film/gate electrode formation apparatus according to the second embodiment of the present invention.
- FIG. 1 shows the arrangement of a gate insulating film/gate electrode formation apparatus 10 according to the first embodiment of the present invention.
- a transfer chamber 20 formed into a substantially octagonal shape is placed near a central portion of the gate insulating film/gate electrode formation apparatus 10 .
- a loading chamber 30 , unloading chamber 40 , film formation chamber 50 , nitriding chamber 60 , annealing chamber 70 , and gate insulating film/gate electrode formation chamber 80 are arranged.
- the loading chamber 30 loads a semiconductor substrate into the transfer chamber 20 of the gate insulating film/gate electrode formation apparatus 10 from the outside.
- the unloading chamber 40 unloads a semiconductor substrate to the outside from the transfer chamber 20 of the gate insulating film/gate electrode formation apparatus 10 .
- a transfer mechanism 90 such as an arm is placed near a central portion of the transfer chamber 20 , and transfers a semiconductor substrate between the chambers 30 to 80 .
- the transfer chamber 20 also has an exhausting mechanism (not shown), so the interior of the transfer chamber 20 can be adjusted to a desired pressure.
- a gas supply source (not shown) is connected to the transfer chamber 20 and supplies a desired gas.
- a semiconductor substrate can be transferred to a desired one of the chambers 30 to 80 without being exposed to an oxidizing ambient or the atmosphere.
- the film formation chamber 50 forms a hafnium silicate (HfSiO x ) film on a semiconductor substrate.
- the nitriding chamber 60 forms a hafnium silicon oxynitride (HfSiON) film by nitriding the hafnium silicate (HfSiO x ) film by doping nitrogen (N) into it.
- the annealing chamber 70 performs predetermined annealing on the film formed on the semiconductor substrate.
- the gate insulating film/gate electrode formation chamber 80 deposits a film of a gate electrode material on the hafnium silicon oxynitride (HfSiON) film formed on the semiconductor substrate.
- each of the chambers 30 to 80 has an exhausting mechanism and gas supply source (neither is shown). Therefore, different ambients can be independently formed in the chambers 20 to 80 of the gate insulating film/gate electrode formation apparatus 10 .
- FIGS. 2 to 6 illustrate a method of forming a gate insulating film and gate electrode by using the gate insulating film/gate electrode formation apparatus 10 according to this embodiment.
- element isolation insulating films 110 A and 110 B are formed on a semiconductor substrate 100 , and a natural oxide film formed on the semiconductor substrate 100 is removed by washing using dilute hydrofluoric acid.
- the transfer mechanism 90 of the transfer chamber 20 unloads the semiconductor substrate 100 from the loading chamber 30 .
- a reduced-pressure ambient at, e.g., about 10 ⁇ 3 Torr is formed in the transfer chamber 20 by the exhausting mechanism (not shown).
- an inert gas ambient or nitrogen ambient in the transfer chamber 20 by supplying an inert gas such as argon or supplying nitrogen to the transfer chamber 20 from the gas supply source (not shown).
- the transfer mechanism 90 loads the semiconductor substrate 100 into the film formation chamber 50 .
- tetrakisdiethylaminohafnium (TDEAH), tetrakisdimethylaminosilicon (TDMAS), and oxygen are supplied to the film formation chamber 50 , and the film formation chamber 50 forms a hafnium silicate (HfSiO x ) film 120 about 5 nm thick on the surface of the semiconductor substrate 100 by using MOCVD (Metal Organic Chemical Vapor Deposition).
- MOCVD Metal Organic Chemical Vapor Deposition
- the hafnium silicate (HfSiO X ) film 120 may also be formed by, e.g., sputtering or ALD (Atomic Layer Deposition), instead of MOCVD.
- the transfer mechanism 90 unloads the semiconductor substrate 100 from the film formation chamber 50 , and loads the semiconductor substrate 100 into the annealing chamber 70 .
- the annealing chamber 70 anneals the hafnium silicate (HfSiO x ) film 120 in an oxidizing ambient at, e.g., 600 to 800° C., thereby improving the quality of the hafnium silicate (HfSiO x ) film 120 . Note that this annealing may also be omitted.
- the transfer mechanism 90 unloads the semiconductor substrate 100 from the annealing chamber 70 , and loads the semiconductor substrate 100 into the nitriding chamber 60 .
- the nitriding chamber 60 nitrides the hafnium silicate (HfSiO X ) film 120 by supplying nitrogen at 10 to 25 at % by using a nitrogen-containing plasma, thereby forming a hafnium silicon oxynitride (HfSiON) film 120 . Note that at % represents an atomic composition ratio.
- nitrogen is supplied by using a nitrogen-containing plasma in this embodiment, nitrogen may also be supplied to the hafnium silicate (HfSiO x ) film 120 by annealing by using a nitrogen-containing gas.
- the transfer mechanism 90 unloads, the semiconductor substrate 100 from the nitriding chamber 60 , and loads the semiconductor substrate 100 into the annealing chamber 70 .
- the bonding force between atoms is weak.
- nitrogen (N) is supplied, therefore, bonding hands for bonding atoms are disconnected, and a large number of defects are formed.
- the annealing chamber 70 anneals the semiconductor substrate 100 in a nitrogen ambient at, e.g., 800 to 1,000° C., thereby restoring a number of defects formed in the hafnium silicon oxynitride (HfSiON) film 120 .
- a nitrogen ambient e.g. 800 to 1,000° C.
- hafnium silicon oxynitride (HfSiON) film 120 having a large number of defects is exposed to an oxidizing ambient or the atmosphere, oxygen radicals activated by hafnium (Hf) as a catalyst invade the hafnium silicon oxynitride (HfSiON) film or semiconductor substrate to deteriorate the transistor characteristics.
- a reduced-pressure ambient at about 10 ⁇ 3 Torr, an inert gas ambient, or a nitrogen ambient is formed in the transfer chamber 20 . Therefore, when the transfer mechanism 90 of the transfer chamber 20 transfers the semiconductor substrate 100 from the nitriding chamber 60 to the annealing chamber 70 , the semiconductor substrate 100 is not exposed to an oxidizing ambient or the atmosphere.
- a reduced-pressure ambient at about 10 ⁇ 3 Torr, an inert gas ambient, or a nitrogen ambient need only be formed in the transfer chamber 20 at least while the semiconductor substrate 100 is transferred from the nitriding chamber 60 to the annealing chamber 70 .
- the transfer mechanism 90 unloads the semiconductor substrate 100 from the annealing chamber 70 , and loads the semiconductor substrate 100 into the gate insulating film/gate electrode formation chamber 80 .
- the gate insulating film/gate electrode formation chamber 80 heats the semiconductor substrate 100 to about 700° C., and forms a polysilicon film 130 about 150 nm thick on the hafnium silicon oxynitride (HfSiON) film 120 by using monosilane (SiH 4 ) gas.
- the gate electrode material is not limited to polysilicon, and it is also possible to use, e.g., amorphous silicon, silicon germanium, or a metal.
- the transfer mechanism 90 unloads the semiconductor substrate 100 from the gate insulating film/gate electrode formation chamber 80 , and places the semiconductor substrate 100 in the unloading chamber 40 .
- the semiconductor substrate 100 is then taken out from the gate insulating film/gate electrode formation apparatus 10 , and patterned.
- HfSiON hafnium silicon oxynitride
- a dopant is ion-implanted into the surfaces of the gate electrode 150 and semiconductor substrate 100 , and annealing is performed to form a source region 160 A and drain region 160 B.
- the element isolation insulating films 110 A and 110 B for element isolation are formed in the surface portion of the semiconductor substrate 100 , and the gate electrode 150 made of the polysilicon film is formed, via the gate insulating film 140 formed by the hafnium silicon oxynitride (HfSiON) film on the surface of the semiconductor substrate 100 , near a central portion of an element region isolated by the element isolation insulating films 110 A and 110 B.
- HfSiON hafnium silicon oxynitride
- the carbon concentration in the interface where the gate electrode 140 is in contact with the gate electrode 150 is 5 ⁇ 10 22 atoms/cm 3 or less.
- a reduced-pressure ambient at about 10 ⁇ 3 Torr, an inert gas ambient, or a nitrogen ambient is formed in the transfer chamber 20 .
- the semiconductor substrate 100 is exposed to the atmosphere or the like, it is possible to suppress adhesion of organic materials discharged from substances in the clean room and floating, and decrease the carbon concentration in the interface where the gate insulating film 140 is in contact with the gate electrode.
- a channel region 170 is formed below the gate electrode 150 and close to the surface of the semiconductor substrate 100 .
- the source region 160 A is formed between the channel region 170 and element isolation insulating film 110 A, and the drain region 160 B is formed between the channel region 170 and element isolation insulating film 110 B.
- FIG. 7 shows the distributions of the gate threshold voltages of MOSFETs fabricated by cutting the semiconductor substrate 100 in this embodiment in which the semiconductor substrate 100 was not exposed to an oxidizing ambient or the atmosphere when it was transferred from the nitriding chamber 60 to the annealing chamber 70 , and in a comparative example in which the semiconductor substrate 100 was exposed to an oxidizing ambient or the atmosphere.
- the gate threshold voltage of each MOSFET fabricated from the semiconductor substrate 100 existed within the range of ⁇ 0.62 V to ⁇ 0.54 V. That is, the variation was very large, and accordingly the yield was low.
- FIG. 8 shows the time-dependent dielectric breakdown (TDDB) characteristics of MOSFETs fabricated as they were cut from the semiconductor substrate 100 in this embodiment in which the semiconductor substrate 100 was not exposed to an oxidizing ambient or the atmosphere when it was transferred from the nitriding chamber 60 to the annealing chamber 70 , and in the comparative example in which the semiconductor substrate 100 was exposed to an oxidizing ambient or the atmosphere.
- TDDB time-dependent dielectric breakdown
- the dielectric breakdown times of many MOSFETs fabricated from the semiconductor substrate 100 were short, and the life of the gate insulating film 140 was also short.
- the variation in dielectric breakdown time was large, so the reliability of the transistors was low.
- the dielectric breakdown times of many MOSFETs were longer than those of the comparative example, and the life of the gate insulating film 140 was long accordingly.
- the variation in dielectric breakdown time was smaller than that of the comparative example, so the reliability of the transistors was high.
- FIG. 9 shows the arrangement of a gate insulating film/gate electrode formation apparatus 300 according to the second embodiment of the present invention.
- a film formation chamber 310 , nitriding chamber 320 , annealing chamber 330 , and gate insulating film/gate electrode formation chamber 340 are arranged in predetermined positions, and transfer chambers 350 , 360 , 370 , and 380 are connected to the chambers 310 , 320 , 330 , and 340 , respectively.
- Transfer mechanisms 390 , 400 , 410 , and 420 are arranged in the transfer chambers 350 , 360 , 370 , and 380 , respectively, and load/unload a semiconductor substrate 100 into/from the chambers 310 , 320 , 330 , and 340 , respectively.
- the transfer chambers 350 to 380 each have an exhausting mechanism (not shown), so the interior of each of the transfer chambers 350 to 380 can be adjusted to a desired pressure.
- a gas supply source (not shown) is connected to each of the transfer chambers 350 to 380 , and supplies a desired gas.
- the semiconductor substrate 100 can be loaded/unloaded into/from each of the chambers 310 to 340 without being exposed to an oxidizing ambient or the atmosphere.
- a transfer box 430 transfers the semiconductor substrate 100 to a desired one of the transfer chambers 350 to 380 . Similar to the transfer chambers 350 to 380 , the transfer box 430 has an exhausting mechanism (not shown), so the interior of the transfer box 430 can be adjusted to a desired pressure. In addition, a gas supply source (not shown) is connected to the transfer box 430 , and supplies a desired gas.
- the semiconductor substrate 100 can be transferred to a desired one of the chambers 350 to 380 without being exposed to an oxidizing ambient or the atmosphere.
- a method of forming a gate insulating film and gate electrode by using the gate insulating film/gate electrode formation apparatus 300 according to this embodiment will be described below with reference to FIGS. 2 to 6 used in the explanation of the first embodiment. Note that processes executed in the chambers 310 to 340 are the same as the processes executed in the corresponding chambers 50 to 80 of the gate insulating film/gate electrode formation apparatus 10 according to the first embodiment.
- a semiconductor substrate 100 in which element isolation insulating films 110 A and 110 B are formed and from which a natural oxide film is removed is put in the transfer box 430 , and the transfer box 430 is moved to and connected to the transfer chamber 350 .
- the transfer mechanism 390 of the transfer chamber 350 unloads the semiconductor substrate 100 from the transfer box 430 , and loads the semiconductor substrate 100 into the film formation chamber 310 .
- the film formation chamber 310 forms a hafnium silicate (HfSiO X ) film 120 on the surface of the semiconductor substrate 100 by using, e.g., MOCVD.
- the transfer mechanism 390 unloads the semiconductor substrate 100 from the film formation chamber 310 , and puts the semiconductor substrate 100 in the transfer box 430 .
- the transfer box 430 is moved to and connected to the transfer chamber 370 .
- the transfer mechanism 410 of the transfer chamber 370 unloads the semiconductor substrate 100 from the transfer box 430 , and loads the semiconductor substrate 100 into the annealing chamber 330 .
- the annealing chamber 330 improves the quality of the hafnium silicate (HfSiO x ) film 120 by annealing it. Note that this annealing may also be omitted.
- the transfer mechanism 410 unloads the semiconductor substrate 100 from the annealing chamber 330 , and puts the semiconductor substrate 100 in the transfer box 430 .
- the transfer box 430 is moved to and connected to the transfer chamber 360 .
- the transfer mechanism 400 of the transfer chamber 360 unloads the semiconductor substrate 100 from the transfer box 430 , and loads the semiconductor substrate 100 into the nitriding chamber 320 .
- the nitriding chamber 320 nitrides the hafnium silicate (HfSiO x ) film 120 by supplying nitrogen to it, thereby forming a hafnium silicon oxynitride (HfSiON) film 120 .
- the transfer mechanism 400 unloads the semiconductor substrate 100 from the nitriding chamber 320 , and puts the semiconductor substrate 100 in the transfer box 430 .
- the transfer box 430 is moved to and connected to the transfer chamber 370 .
- the transfer mechanism 410 of the transfer chamber 370 unloads the semiconductor substrate 100 from the transfer box 430 , and loads the semiconductor substrate 100 into the annealing chamber 330 .
- a reduced-pressure ambient at about 10 ⁇ 3 Torr, an inert gas ambient, or a nitrogen ambient is formed in the transfer box 430 and the transfer chambers 360 and 370 . Therefore, the semiconductor substrate 100 can be transferred from the nitriding chamber 320 to the annealing chamber 330 without being exposed to an oxidizing ambient or the atmosphere.
- a reduced-pressure ambient at about 10 ⁇ 3 Torr, an inert gas ambient, or a nitrogen ambient need only be formed in the transfer chamber 360 , transfer box 430 , and transfer chamber 370 at least while the semiconductor substrate 100 is transferred from the nitriding chamber 320 to the annealing chamber 330 .
- the annealing chamber 330 restores a large number of defects formed in the hafnium silicon oxynitride (HfSiON) film 120 by annealing the semiconductor substrate 100 in a nitrogen ambient.
- HfSiON hafnium silicon oxynitride
- the transfer mechanism 410 unloads the semiconductor substrate 100 from the annealing chamber 330 , and puts the semiconductor substrate 100 in the transfer box 430 .
- the transfer box 430 is moved to and connected to the transfer chamber 380 .
- the transfer mechanism 420 of the transfer chamber 380 unloads the semiconductor substrate 100 from the transfer box 430 , and loads the semiconductor substrate 100 into the gate insulating film/gate electrode formation chamber 340 .
- the gate insulating film/gate electrode formation chamber 340 forms a polysilicon film 130 on the hafnium silicon oxynitride (HfSiON) film 120 .
- the transfer mechanism 420 unloads the semiconductor substrate 100 from the gate insulating film/gate electrode formation chamber 340 , and puts the semiconductor substrate 100 in the transfer box 430 . Then, the semiconductor substrate 100 is taken out from the gate insulating film/gate electrode formation apparatus 300 .
- a gate insulating film 140 and gate electrode 150 are formed by patterning the polysilicon film 130 and hafnium silicon oxynitride (HfSiON) film 120 . After that, a source region 160 A and drain region 160 B are formed as shown in FIG. 6 , thereby fabricating a MOSFET 200 .
- the carbon concentration in the interface where the gate insulating film 140 is in contact with the gate electrode 150 is 5 ⁇ 10 22 atoms/cm 3 or less. This achieves the same effects as in the first embodiment.
- the semiconductor devices and their fabrication methods of the embodiments described above can suppress variations in transistor characteristics and increase the yield.
- hafnium Hf
- zirconium another metal such as zirconium may also be used. That is, it is also possible to form an insulating film containing at least a metal and oxygen on a semiconductor substrate, and nitride this insulating film to form an insulating film containing at least the metal, oxygen, and nitrogen.
- the film formation chambers 50 and 310 and nitriding chambers 60 and 320 are different reaction chambers. However, these chambers may also be one reaction chamber.
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Abstract
According to the present invention, there is provided a semiconductor device comprising:
-
- a gate insulating film selectively formed on a predetermined region of a semiconductor substrate;
- a gate electrode formed on said gate insulating film; and
- a source region and drain region formed, in a surface portion of said semiconductor substrate, on two sides of a channel region positioned below said gate electrode,
- wherein a carbon concentration in an interface where said gate insulating film is in contact with said gate electrode is not more than 5×1022 atoms/cm3.
Description
- This application is based upon and claims benefit of priority under 35 USC § 119 from the Japanese Patent Application No. 2004-317773, filed on Nov. 1, 2004, the entire contents of which are incorporated herein by reference.
- The present invention relates to a semiconductor device and a method of fabricating the same.
- Recently, the electrical thickness of a gate insulating film decreases as the micropatterning of MOSFETs advances, and this poses the problem that a gate leakage current increases. To suppress this gate leakage current, therefore, a method which uses, as a gate insulating film, a high-dielectric-constant film having a relative dielectric constant higher than that of a silicon dioxide (SiO2) film is proposed. A hafnium silicon oxynitride (HfSiON) film is an example of this high-dielectric-constant film.
- The hafnium silicon oxynitride (HfSiON) film is formed by, e.g., forming a hafnium silicate (HfSiOx) film on a semiconductor substrate, and nitriding the hafnium silicate (HfSiOx) film by doping nitrogen (N) into it.
- In the hafnium silicate (HfSiOx) film, however, the bonding force between atoms is weak. Therefore, when nitrogen (N) is doped, bonding hands for bonding atoms are disconnected, and a large number of defects (holes) are formed.
- When this hafnium silicon oxynitride (HfSiON) film is exposed to an oxidizing ambient or the atmosphere, atmospheric oxygen (O2) or the like is activated by hafnium (Hf) as a catalyst, and oxygen radicals are produced. These oxygen radicals easily invade the hafnium silicon oxynitride (HfSiON) film or a semiconductor substrate.
- Consequently, an interface insulating film having a low dielectric constant is formed between the hafnium silicon oxynitride (HfSiON) film and semiconductor substrate. This decreases the effective relative dielectric constant of the gate insulating film or increases the electrical thickness of the film.
- In addition, since oxygen (O) replaces nitrogen (N) in the hafnium silicon oxynitride (HfSiON) film, nitrogen (N) is released from the hafnium silicon oxynitride (HfSiON) film.
- As a consequence, the hafnium silicon oxynitride (HfSiON) film is separated into silicon dioxide (SiO2) and hafnium dioxide (HfO2), and these compounds crystallize. This decreases the heat resistance. Also, boron as a dopant readily breaks through the hafnium silicon oxynitride (HfSiON) film and diffuses into the semiconductor substrate. Furthermore, dielectric breakdown easily occurs, and this shortens the life of the gate insulating film.
- These problems produce fluctuation in gate threshold voltage and variations in transistor characteristics.
- A reference concerning a method of forming an insulating film having a high dielectric constant is as follows.
- Japanese Patent Laid-Open No. 2004-71696
- According to one aspect of the present invention, there is provided a semiconductor device fabrication method, comprising;
- forming, in a film formation chamber, a first insulating film containing at least a metal and oxygen on a surface of a semiconductor substrate;
- transferring the semiconductor substrate from the film formation chamber to a nitriding chamber via a transfer chamber;
- forming, in the nitriding chamber, a second insulating film containing at least a metal, oxygen, and nitrogen by nitriding the first insulating film by doping nitrogen into it;
- transferring the semiconductor substrate from the nitriding chamber to an annealing chamber via the transfer chamber;
- performing predetermined annealing on the second insulating film in the annealing chamber; and
- transferring the semiconductor substrate from the annealing chamber to the transfer chamber,
- wherein when at least the semiconductor substrate is transferred from the nitriding chamber to the annealing chamber via the transfer chamber, an ambient selected from the group consisting of a reduced-pressure ambient at about 10−3 Torr, an inert gas ambient, and a nitrogen ambient is formed in the transfer chamber.
- According to one aspect of the present invention, there is provided a semiconductor device fabrication method, comprising;
- moving a transfer box containing a semiconductor substrate to a film formation chamber, and connecting the transfer box to the film formation chamber;
- transferring the semiconductor substrate from the transfer box to the film formation chamber;
- forming, in the film formation chamber, a first insulating film containing at least a metal and oxygen on a surface of the semiconductor substrate;
- transferring the semiconductor substrate from the film formation chamber to the transfer box;
- moving the transfer box containing the semiconductor substrate to a nitriding chamber, and connecting the transfer box to the nitriding chamber;
- transferring the semiconductor substrate from the transfer box to the nitriding chamber;
- forming, in the nitriding chamber, a second insulating film containing at least a metal, oxygen, and nitrogen by nitriding the first insulating film by doping nitrogen into it;
- transferring the semiconductor substrate from the nitriding chamber to the transfer box;
- moving the transfer box containing the semiconductor substrate to an annealing chamber, and connecting the transfer box to the annealing chamber;
- transferring the semiconductor substrate from the transfer box to the annealing chamber;
- performing predetermined annealing on the second insulating film in the annealing chamber; and
- transferring the semiconductor substrate from the annealing chamber to the transfer box,
- wherein when at least the semiconductor substrate is transferred from the nitriding chamber to the transfer box, the transfer box containing the semiconductor substrate is moved to the annealing chamber and the transfer box is connected to the annealing chamber, and the semiconductor substrate is transferred from the transfer box to the annealing chamber, an ambient selected from the group consisting of a reduced-pressure ambient at about 10−3 Torr, an inert gas ambient, and a nitrogen ambient is formed in the transfer box.
- According to one aspect of the present invention, there is provided a semiconductor device, comprising:
- a gate insulating film selectively formed on a predetermined region of a semiconductor substrate;
- a gate electrode formed on said gate insulating film; and
- a source region and drain region formed, in a surface portion of said semiconductor substrate, on two sides of a channel region positioned below said gate electrode,
- wherein a carbon concentration in an interface where said gate insulating film is in contact with said gate electrode is not more than 5×1022 atoms/cm3.
-
FIG. 1 is a block diagram showing the arrangement of a gate insulating film/gate electrode formation apparatus according to the first embodiment of the present invention; -
FIG. 2 is a longitudinal sectional view showing an element sectional structure in a predetermined step of a MOSFET fabrication method according to the embodiment of the present invention; -
FIG. 3 is a longitudinal sectional view showing an element sectional structure in a predetermined step of the same MOSFET fabrication method; -
FIG. 4 is a longitudinal sectional view showing an element sectional structure in a predetermined step of the same MOSFET fabrication method; -
FIG. 5 is a longitudinal sectional view showing an element sectional structure in a predetermined step of the same MOSFET fabrication method; -
FIG. 6 is a longitudinal sectional view showing an element sectional structure in a predetermined step of the same MOSFET fabrication method; -
FIG. 7 is a graph showing the distributions of the gate threshold voltages of MOSFETs in this embodiment in which a semiconductor substrate was not exposed to an oxidizing ambient or the atmosphere, and in a comparative example in which a semiconductor substrate was exposed to an oxidizing ambient or the atmosphere; -
FIG. 8 is a graph showing the time-dependent dielectric breakdown (TDDB) characteristics of the MOSFETs in this embodiment in which the semiconductor substrate was not exposed to an oxidizing ambient or the atmosphere, and in the comparative example in which the semiconductor substrate was exposed to an oxidizing ambient or the atmosphere; and -
FIG. 9 is a block diagram showing the arrangement of a gate insulating film/gate electrode formation apparatus according to the second embodiment of the present invention. - Embodiments of the present invention will be described below with reference to the accompanying drawings.
-
FIG. 1 shows the arrangement of a gate insulating film/gateelectrode formation apparatus 10 according to the first embodiment of the present invention. Atransfer chamber 20 formed into a substantially octagonal shape is placed near a central portion of the gate insulating film/gateelectrode formation apparatus 10. Around thetransfer chamber 20, aloading chamber 30, unloadingchamber 40,film formation chamber 50,nitriding chamber 60, annealingchamber 70, and gate insulating film/gateelectrode formation chamber 80 are arranged. - The
loading chamber 30 loads a semiconductor substrate into thetransfer chamber 20 of the gate insulating film/gateelectrode formation apparatus 10 from the outside. The unloadingchamber 40 unloads a semiconductor substrate to the outside from thetransfer chamber 20 of the gate insulating film/gateelectrode formation apparatus 10. - A
transfer mechanism 90 such as an arm is placed near a central portion of thetransfer chamber 20, and transfers a semiconductor substrate between thechambers 30 to 80. Thetransfer chamber 20 also has an exhausting mechanism (not shown), so the interior of thetransfer chamber 20 can be adjusted to a desired pressure. In addition, a gas supply source (not shown) is connected to thetransfer chamber 20 and supplies a desired gas. - Accordingly, by forming, e.g., a reduced-pressure ambient at, e.g., about 10−3 Torr, an inert gas ambient such as argon, or a nitrogen ambient in the
transfer chamber 20, a semiconductor substrate can be transferred to a desired one of thechambers 30 to 80 without being exposed to an oxidizing ambient or the atmosphere. - The
film formation chamber 50 forms a hafnium silicate (HfSiOx) film on a semiconductor substrate. Thenitriding chamber 60 forms a hafnium silicon oxynitride (HfSiON) film by nitriding the hafnium silicate (HfSiOx) film by doping nitrogen (N) into it. - The
annealing chamber 70 performs predetermined annealing on the film formed on the semiconductor substrate. The gate insulating film/gateelectrode formation chamber 80 deposits a film of a gate electrode material on the hafnium silicon oxynitride (HfSiON) film formed on the semiconductor substrate. - Note that similar to the
transfer chamber 20, each of thechambers 30 to 80 has an exhausting mechanism and gas supply source (neither is shown). Therefore, different ambients can be independently formed in thechambers 20 to 80 of the gate insulating film/gateelectrode formation apparatus 10. -
FIGS. 2 to 6 illustrate a method of forming a gate insulating film and gate electrode by using the gate insulating film/gateelectrode formation apparatus 10 according to this embodiment. First, as shown inFIG. 2 , elementisolation insulating films semiconductor substrate 100, and a natural oxide film formed on thesemiconductor substrate 100 is removed by washing using dilute hydrofluoric acid. - When the
semiconductor substrate 100 from which the natural oxide film is thus removed is placed in theloading chamber 30 of the gate insulating film/gateelectrode formation apparatus 10, thetransfer mechanism 90 of thetransfer chamber 20 unloads thesemiconductor substrate 100 from theloading chamber 30. In this state, a reduced-pressure ambient at, e.g., about 10−3 Torr is formed in thetransfer chamber 20 by the exhausting mechanism (not shown). It is also possible to form an inert gas ambient or nitrogen ambient in thetransfer chamber 20 by supplying an inert gas such as argon or supplying nitrogen to thetransfer chamber 20 from the gas supply source (not shown). - The
transfer mechanism 90 loads thesemiconductor substrate 100 into thefilm formation chamber 50. As shown inFIG. 3 , tetrakisdiethylaminohafnium (TDEAH), tetrakisdimethylaminosilicon (TDMAS), and oxygen, for example, are supplied to thefilm formation chamber 50, and thefilm formation chamber 50 forms a hafnium silicate (HfSiOx)film 120 about 5 nm thick on the surface of thesemiconductor substrate 100 by using MOCVD (Metal Organic Chemical Vapor Deposition). Note that the hafnium silicate (HfSiOX)film 120 may also be formed by, e.g., sputtering or ALD (Atomic Layer Deposition), instead of MOCVD. - The
transfer mechanism 90 unloads thesemiconductor substrate 100 from thefilm formation chamber 50, and loads thesemiconductor substrate 100 into theannealing chamber 70. Theannealing chamber 70 anneals the hafnium silicate (HfSiOx)film 120 in an oxidizing ambient at, e.g., 600 to 800° C., thereby improving the quality of the hafnium silicate (HfSiOx)film 120. Note that this annealing may also be omitted. - The
transfer mechanism 90 unloads thesemiconductor substrate 100 from theannealing chamber 70, and loads thesemiconductor substrate 100 into thenitriding chamber 60. Thenitriding chamber 60 nitrides the hafnium silicate (HfSiOX)film 120 by supplying nitrogen at 10 to 25 at % by using a nitrogen-containing plasma, thereby forming a hafnium silicon oxynitride (HfSiON)film 120. Note that at % represents an atomic composition ratio. - Although nitrogen is supplied by using a nitrogen-containing plasma in this embodiment, nitrogen may also be supplied to the hafnium silicate (HfSiOx)
film 120 by annealing by using a nitrogen-containing gas. - The
transfer mechanism 90 unloads, thesemiconductor substrate 100 from thenitriding chamber 60, and loads thesemiconductor substrate 100 into theannealing chamber 70. - In the hafnium silicate (HfSiOx)
film 120, the bonding force between atoms is weak. When nitrogen (N) is supplied, therefore, bonding hands for bonding atoms are disconnected, and a large number of defects are formed. - Accordingly, the
annealing chamber 70 anneals thesemiconductor substrate 100 in a nitrogen ambient at, e.g., 800 to 1,000° C., thereby restoring a number of defects formed in the hafnium silicon oxynitride (HfSiON)film 120. - Note that if the hafnium silicon oxynitride (HfSiON)
film 120 having a large number of defects is exposed to an oxidizing ambient or the atmosphere, oxygen radicals activated by hafnium (Hf) as a catalyst invade the hafnium silicon oxynitride (HfSiON) film or semiconductor substrate to deteriorate the transistor characteristics. - In this embodiment, however, a reduced-pressure ambient at about 10−3 Torr, an inert gas ambient, or a nitrogen ambient is formed in the
transfer chamber 20. Therefore, when thetransfer mechanism 90 of thetransfer chamber 20 transfers thesemiconductor substrate 100 from thenitriding chamber 60 to theannealing chamber 70, thesemiconductor substrate 100 is not exposed to an oxidizing ambient or the atmosphere. - This makes it possible to suppress deterioration and variations of the transistor characteristics, and thereby increase the yield.
- To suppress deterioration of the transistor characteristics, a reduced-pressure ambient at about 10−3 Torr, an inert gas ambient, or a nitrogen ambient need only be formed in the
transfer chamber 20 at least while thesemiconductor substrate 100 is transferred from thenitriding chamber 60 to theannealing chamber 70. - The
transfer mechanism 90 unloads thesemiconductor substrate 100 from theannealing chamber 70, and loads thesemiconductor substrate 100 into the gate insulating film/gateelectrode formation chamber 80. As shown inFIG. 4 , the gate insulating film/gateelectrode formation chamber 80 heats thesemiconductor substrate 100 to about 700° C., and forms apolysilicon film 130 about 150 nm thick on the hafnium silicon oxynitride (HfSiON)film 120 by using monosilane (SiH4) gas. Note that the gate electrode material is not limited to polysilicon, and it is also possible to use, e.g., amorphous silicon, silicon germanium, or a metal. - The
transfer mechanism 90 unloads thesemiconductor substrate 100 from the gate insulating film/gateelectrode formation chamber 80, and places thesemiconductor substrate 100 in the unloadingchamber 40. Thesemiconductor substrate 100 is then taken out from the gate insulating film/gateelectrode formation apparatus 10, and patterned. - As shown in
FIG. 5 , photolithography, RIE (Reactive Ion Etching), or the like is executed to form agate insulating film 140 made of the hafnium silicon oxynitride (HfSiON) film and agate electrode 150 made of the polysilicon film. - As shown in
FIG. 6 , a dopant is ion-implanted into the surfaces of thegate electrode 150 andsemiconductor substrate 100, and annealing is performed to form asource region 160A and drainregion 160B. - In a
MOSFET 200 fabricated by the above method, as shown inFIG. 6 , the elementisolation insulating films semiconductor substrate 100, and thegate electrode 150 made of the polysilicon film is formed, via thegate insulating film 140 formed by the hafnium silicon oxynitride (HfSiON) film on the surface of thesemiconductor substrate 100, near a central portion of an element region isolated by the elementisolation insulating films - In this structure, the carbon concentration in the interface where the
gate electrode 140 is in contact with thegate electrode 150 is 5×1022 atoms/cm3 or less. - As described above, when the
semiconductor substrate 100 is transferred from thenitriding chamber 60 to theannealing chamber 70, a reduced-pressure ambient at about 10−3 Torr, an inert gas ambient, or a nitrogen ambient is formed in thetransfer chamber 20. Compared to a case in which thesemiconductor substrate 100 is exposed to the atmosphere or the like, it is possible to suppress adhesion of organic materials discharged from substances in the clean room and floating, and decrease the carbon concentration in the interface where thegate insulating film 140 is in contact with the gate electrode. - This makes it possible to prevent dielectric breakdown of the gate insulating film, and improve the reliability of the
gate insulating film 140. - Especially in devices from the 65-nm generation, the influence of defects such as dielectric breakdown caused by carbon in the interface is large. Therefore, the reliability of devices can be improved by applying this embodiment.
- Also, a
channel region 170 is formed below thegate electrode 150 and close to the surface of thesemiconductor substrate 100. - The
source region 160A is formed between thechannel region 170 and elementisolation insulating film 110A, and thedrain region 160B is formed between thechannel region 170 and elementisolation insulating film 110B. -
FIG. 7 shows the distributions of the gate threshold voltages of MOSFETs fabricated by cutting thesemiconductor substrate 100 in this embodiment in which thesemiconductor substrate 100 was not exposed to an oxidizing ambient or the atmosphere when it was transferred from thenitriding chamber 60 to theannealing chamber 70, and in a comparative example in which thesemiconductor substrate 100 was exposed to an oxidizing ambient or the atmosphere. - As shown in
FIG. 7 , in the comparative example in which thesubstrate 100 was exposed to an oxidizing ambient or the atmosphere when it was transferred from thenitriding chamber 60 to theannealing chamber 70, the gate threshold voltage of each MOSFET fabricated from thesemiconductor substrate 100 existed within the range of −0.62 V to −0.54 V. That is, the variation was very large, and accordingly the yield was low. - By contrast, in this embodiment in which the
substrate 100 was not exposed to an oxidizing ambient or the atmosphere when it was transferred from thenitriding chamber 60 to theannealing chamber 70, it was possible to make the variation in gate threshold voltage much smaller than that in the comparative example, and greatly increase the yield accordingly. - Also,
FIG. 8 shows the time-dependent dielectric breakdown (TDDB) characteristics of MOSFETs fabricated as they were cut from thesemiconductor substrate 100 in this embodiment in which thesemiconductor substrate 100 was not exposed to an oxidizing ambient or the atmosphere when it was transferred from thenitriding chamber 60 to theannealing chamber 70, and in the comparative example in which thesemiconductor substrate 100 was exposed to an oxidizing ambient or the atmosphere. - More specifically, electrons were injected from the
semiconductor substrate 100 to thegate insulating film 140, and a stress electric field of 12 MV/cm was applied to thegate insulating film 140. After that, the dielectric breakdown time of each MOSFET was measured. Note that the abscissa indicates the dielectric breakdown time of each MOSFET, and the ordinate indicates a Weibull function (i.e., the dielectric breakdown probability). - As shown in
FIG. 8 , in the comparative example in which thesubstrate 100 was exposed to an oxidizing ambient or the atmosphere when it was transferred from thenitriding chamber 60 to theannealing chamber 70, the dielectric breakdown times of many MOSFETs fabricated from thesemiconductor substrate 100 were short, and the life of thegate insulating film 140 was also short. In addition, the variation in dielectric breakdown time was large, so the reliability of the transistors was low. - By contrast, in this embodiment in which the
substrate 100 was not exposed to an oxidizing ambient or the atmosphere when it was transferred from thenitriding chamber 60 to theannealing chamber 70, the dielectric breakdown times of many MOSFETs were longer than those of the comparative example, and the life of thegate insulating film 140 was long accordingly. In addition, the variation in dielectric breakdown time was smaller than that of the comparative example, so the reliability of the transistors was high. -
FIG. 9 shows the arrangement of a gate insulating film/gateelectrode formation apparatus 300 according to the second embodiment of the present invention. In the gate insulating film/gateelectrode formation apparatus 300, afilm formation chamber 310,nitriding chamber 320, annealingchamber 330, and gate insulating film/gateelectrode formation chamber 340 are arranged in predetermined positions, and transferchambers chambers -
Transfer mechanisms transfer chambers semiconductor substrate 100 into/from thechambers - The
transfer chambers 350 to 380 each have an exhausting mechanism (not shown), so the interior of each of thetransfer chambers 350 to 380 can be adjusted to a desired pressure. In addition, a gas supply source (not shown) is connected to each of thetransfer chambers 350 to 380, and supplies a desired gas. - Accordingly, by forming, e.g., a reduced-pressure ambient at, e.g., about 10−3 Torr, an inert gas ambient such as argon, or a nitrogen ambient in each of the
transfer chambers 350 to 380, thesemiconductor substrate 100 can be loaded/unloaded into/from each of thechambers 310 to 340 without being exposed to an oxidizing ambient or the atmosphere. - A
transfer box 430 transfers thesemiconductor substrate 100 to a desired one of thetransfer chambers 350 to 380. Similar to thetransfer chambers 350 to 380, thetransfer box 430 has an exhausting mechanism (not shown), so the interior of thetransfer box 430 can be adjusted to a desired pressure. In addition, a gas supply source (not shown) is connected to thetransfer box 430, and supplies a desired gas. - Accordingly, by forming, e.g., a reduced-pressure ambient at, e.g., about 10−3 Torr, an inert gas ambient such as argon, or a nitrogen ambient in the
transfer box 430, thesemiconductor substrate 100 can be transferred to a desired one of thechambers 350 to 380 without being exposed to an oxidizing ambient or the atmosphere. - A method of forming a gate insulating film and gate electrode by using the gate insulating film/gate
electrode formation apparatus 300 according to this embodiment will be described below with reference toFIGS. 2 to 6 used in the explanation of the first embodiment. Note that processes executed in thechambers 310 to 340 are the same as the processes executed in the correspondingchambers 50 to 80 of the gate insulating film/gateelectrode formation apparatus 10 according to the first embodiment. - First, a
semiconductor substrate 100 in which elementisolation insulating films transfer box 430, and thetransfer box 430 is moved to and connected to thetransfer chamber 350. - The
transfer mechanism 390 of thetransfer chamber 350 unloads thesemiconductor substrate 100 from thetransfer box 430, and loads thesemiconductor substrate 100 into thefilm formation chamber 310. As shown inFIG. 3 , thefilm formation chamber 310 forms a hafnium silicate (HfSiOX)film 120 on the surface of thesemiconductor substrate 100 by using, e.g., MOCVD. - The
transfer mechanism 390 unloads thesemiconductor substrate 100 from thefilm formation chamber 310, and puts thesemiconductor substrate 100 in thetransfer box 430. Thetransfer box 430 is moved to and connected to thetransfer chamber 370. - The
transfer mechanism 410 of thetransfer chamber 370 unloads thesemiconductor substrate 100 from thetransfer box 430, and loads thesemiconductor substrate 100 into theannealing chamber 330. Theannealing chamber 330 improves the quality of the hafnium silicate (HfSiOx)film 120 by annealing it. Note that this annealing may also be omitted. - The
transfer mechanism 410 unloads thesemiconductor substrate 100 from theannealing chamber 330, and puts thesemiconductor substrate 100 in thetransfer box 430. Thetransfer box 430 is moved to and connected to thetransfer chamber 360. - The
transfer mechanism 400 of thetransfer chamber 360 unloads thesemiconductor substrate 100 from thetransfer box 430, and loads thesemiconductor substrate 100 into thenitriding chamber 320. Thenitriding chamber 320 nitrides the hafnium silicate (HfSiOx)film 120 by supplying nitrogen to it, thereby forming a hafnium silicon oxynitride (HfSiON)film 120. - The
transfer mechanism 400 unloads thesemiconductor substrate 100 from thenitriding chamber 320, and puts thesemiconductor substrate 100 in thetransfer box 430. Thetransfer box 430 is moved to and connected to thetransfer chamber 370. Thetransfer mechanism 410 of thetransfer chamber 370 unloads thesemiconductor substrate 100 from thetransfer box 430, and loads thesemiconductor substrate 100 into theannealing chamber 330. - In this embodiment, a reduced-pressure ambient at about 10−3 Torr, an inert gas ambient, or a nitrogen ambient is formed in the
transfer box 430 and thetransfer chambers semiconductor substrate 100 can be transferred from thenitriding chamber 320 to theannealing chamber 330 without being exposed to an oxidizing ambient or the atmosphere. - This makes it possible to suppress deterioration and variations of the transistor characteristics, and thereby increase the yield.
- To suppress deterioration of the transistor characteristics, a reduced-pressure ambient at about 10−3 Torr, an inert gas ambient, or a nitrogen ambient need only be formed in the
transfer chamber 360,transfer box 430, andtransfer chamber 370 at least while thesemiconductor substrate 100 is transferred from thenitriding chamber 320 to theannealing chamber 330. - The
annealing chamber 330 restores a large number of defects formed in the hafnium silicon oxynitride (HfSiON)film 120 by annealing thesemiconductor substrate 100 in a nitrogen ambient. - The
transfer mechanism 410 unloads thesemiconductor substrate 100 from theannealing chamber 330, and puts thesemiconductor substrate 100 in thetransfer box 430. Thetransfer box 430 is moved to and connected to thetransfer chamber 380. - The
transfer mechanism 420 of thetransfer chamber 380 unloads thesemiconductor substrate 100 from thetransfer box 430, and loads thesemiconductor substrate 100 into the gate insulating film/gateelectrode formation chamber 340. As shown inFIG. 4 , the gate insulating film/gateelectrode formation chamber 340 forms apolysilicon film 130 on the hafnium silicon oxynitride (HfSiON)film 120. - The
transfer mechanism 420 unloads thesemiconductor substrate 100 from the gate insulating film/gateelectrode formation chamber 340, and puts thesemiconductor substrate 100 in thetransfer box 430. Then, thesemiconductor substrate 100 is taken out from the gate insulating film/gateelectrode formation apparatus 300. - As shown in
FIG. 5 , agate insulating film 140 andgate electrode 150 are formed by patterning thepolysilicon film 130 and hafnium silicon oxynitride (HfSiON)film 120. After that, asource region 160A and drainregion 160B are formed as shown inFIG. 6 , thereby fabricating aMOSFET 200. - In the MOSFET fabricated by the above method, as in the first embodiment, the carbon concentration in the interface where the
gate insulating film 140 is in contact with thegate electrode 150 is 5×1022 atoms/cm3 or less. This achieves the same effects as in the first embodiment. - The semiconductor devices and their fabrication methods of the embodiments described above can suppress variations in transistor characteristics and increase the yield.
- Note that the above embodiments are merely examples and do not limit the present invention. For example, instead of hafnium (Hf), another metal such as zirconium may also be used. That is, it is also possible to form an insulating film containing at least a metal and oxygen on a semiconductor substrate, and nitride this insulating film to form an insulating film containing at least the metal, oxygen, and nitrogen.
- Also, in the above embodiments, the
film formation chambers nitriding chambers
Claims (9)
1-17. (canceled)
18. A semiconductor device fabrication method, comprising:
transferring a semiconductor substrate from a transfer chamber or a transfer box to a film formation chamber;
forming, in the film formation chamber, a first insulating film containing at least a metal and oxygen on a surface of the semiconductor substrate;
transferring the semiconductor substrate from the film formation chamber to a nitriding chamber;
forming, in the nitriding chamber, a second insulating film containing at least a metal, oxygen, and nitrogen by nitriding the first insulating film by doping nitrogen into it;
transferring the semiconductor substrate from the nitriding chamber to an annealing chamber;
performing predetermined annealing on the second insulating film in the annealing chamber; and
transferring the semiconductor substrate from the annealing chamber to the transfer chamber or the transfer box,
transferring the semiconductor substrate from the transfer chamber or the transfer box to a gate insulating film/gate electrode formation chamber;
depositing, in the gate insulating film/gate electrode formation chamber, a gate electrode material on the second insulating film to form a film,
wherein at least when the semiconductor substrate is transferred from the film formation chamber to the nitriding chamber and when the semiconductor substrate is transferred from the nitriding chamber to the annealing chamber, an ambient selected from the group consisting of a reduced-pressure ambient at about 10−3 Torr, an inert gas ambient, and a nitrogen ambient is formed in the transfer chamber or the transfer box:
19. The method of claim 18 , wherein a temperature on the semiconductor substrate before being transferred to the gate insulating film/gate electrode formation chamber is set lower than the temperature on the semiconductor substrate when the gate electrode material is deposited.
20. The method of claim 18 , wherein when performing predetermined annealing on the second insulating film, the annealing is performed under nitrogen atmosphere.
21. The method of claim 18 , further comprising:
transferring the semiconductor substrate to the annealing chamber before the semiconductor substrate is transferred from the film formation chamber to the nitriding chamber; and
transferring the semiconductor substrate to the nitriding chamber after predetermined annealing is performed on the first insulating film.
22. The method of claim 18 , wherein when the first insulating film is formed, the first insulating film containing a metal, oxygen, and silicon is formed on the surface of the semiconductor substrate in the film formation chamber.
23. The method of claim 18 , wherein when the first insulating film is formed, a hafnium silicate film is formed on the surface of the semiconductor substrate in the film formation chamber, and when the second insulating film is formed, a hafnium silicon oxynitride film is formed in the nitriding chamber by nitriding the hafnium silicate film by doping nitrogen into it.
24. The method of claim 18 , wherein when the second insulating film is formed, the first insulating film is nitrided by doping nitrogen by using a nitrogen-containing plasma.
25. The method of claim 18 , wherein when the second insulating film is formed, the second insulating film having a specific dielectric constant higher than that of a silicon dioxide film is formed.
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US12/585,334 US20100003813A1 (en) | 2004-11-01 | 2009-09-11 | Semiconductor device and method of fabricating the same |
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JP2004317773A JP2006128547A (en) | 2004-11-01 | 2004-11-01 | Semiconductor and manufacturing method thereof |
US11/049,671 US7220681B2 (en) | 2004-11-01 | 2005-02-04 | Semiconductor device and method of fabricating the same |
US11/785,606 US20070197048A1 (en) | 2004-11-01 | 2007-04-19 | Semiconductor device and method of fabricating the same |
US12/585,334 US20100003813A1 (en) | 2004-11-01 | 2009-09-11 | Semiconductor device and method of fabricating the same |
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US11/049,671 Expired - Fee Related US7220681B2 (en) | 2004-11-01 | 2005-02-04 | Semiconductor device and method of fabricating the same |
US11/785,606 Abandoned US20070197048A1 (en) | 2004-11-01 | 2007-04-19 | Semiconductor device and method of fabricating the same |
US12/585,334 Abandoned US20100003813A1 (en) | 2004-11-01 | 2009-09-11 | Semiconductor device and method of fabricating the same |
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US11/785,606 Abandoned US20070197048A1 (en) | 2004-11-01 | 2007-04-19 | Semiconductor device and method of fabricating the same |
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US7789738B2 (en) | 2006-07-03 | 2010-09-07 | San Fang Chemical Industry Co., Ltd. | Sheet for mounting polishing workpiece and method for making the same |
US7316605B1 (en) | 2006-07-03 | 2008-01-08 | San Fang Chemical Industry Co., Ltd. | Sheet for mounting polishing workpiece and method for making the same |
JP5590886B2 (en) * | 2006-09-26 | 2014-09-17 | アプライド マテリアルズ インコーポレイテッド | Fluorine plasma treatment for high-K gate stacks for defect passivation |
US20080242114A1 (en) * | 2007-04-02 | 2008-10-02 | Texas Instruments Incorporated | Thermal anneal method for a high-k dielectric |
US9418864B2 (en) * | 2008-01-30 | 2016-08-16 | Infineon Technologies Ag | Method of forming a non volatile memory device using wet etching |
KR101599162B1 (en) * | 2011-08-15 | 2016-03-02 | 킹 압둘라 유니버시티 오브 사이언스 앤드 테크놀로지 | Method for producing mechlnically flexible silicon substrate |
US9425622B2 (en) | 2013-01-08 | 2016-08-23 | Infineon Technologies Austria Ag | Power converter circuit with AC output and at least one transformer |
US9484746B2 (en) | 2012-01-17 | 2016-11-01 | Infineon Technologies Austria Ag | Power converter circuit with AC output |
US9401663B2 (en) | 2012-12-21 | 2016-07-26 | Infineon Technologies Austria Ag | Power converter circuit with AC output |
US9461474B2 (en) | 2012-01-17 | 2016-10-04 | Infineon Technologies Austria Ag | Power converter circuit with AC output |
US9478989B2 (en) | 2012-01-17 | 2016-10-25 | Infineon Technologies Austria Ag | Power converter circuit with AC output |
US9041116B2 (en) | 2012-05-23 | 2015-05-26 | International Business Machines Corporation | Structure and method to modulate threshold voltage for high-K metal gate field effect transistors (FETs) |
TW202326907A (en) * | 2021-11-03 | 2023-07-01 | 美商蘭姆研究公司 | Substrate processing tool with rapid and selective control of partial pressure of water vapor and oxygen |
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Also Published As
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US20070197048A1 (en) | 2007-08-23 |
US20060094255A1 (en) | 2006-05-04 |
JP2006128547A (en) | 2006-05-18 |
TW200616084A (en) | 2006-05-16 |
TWI272676B (en) | 2007-02-01 |
US7220681B2 (en) | 2007-05-22 |
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