US20080066866A1

US20080066866A1 - Method and apparatus for reducing plasma-induced damage in a semiconductor device

Info

Publication number: US20080066866A1
Application number: US11/531,959
Authority: US
Inventors: Martin Kerber
Original assignee: Infineon Technologies AG
Current assignee: Infineon Technologies AG
Priority date: 2006-09-14
Filing date: 2006-09-14
Publication date: 2008-03-20
Also published as: DE102007043336A1

Abstract

Some embodiments discussed relate to an apparatus for etching a semiconductor wafer and method for fabricating it, comprising a plurality of electrodes coupled to a power supply for generating a plasma stream and at least one electromagnetic radiation source and a wafer support to position a wafer for etching using the plasma stream and the wafer support having a plurality of apertures to allow passage of electromagnetic radiation from an electromagnetic radiation source through the wafer support to impinge on a surface of the wafer during etching.

Description

TECHNICAL FIELD

Embodiments described herein relate generally to semiconductor devices and more particularly, to plasma etching during fabrication of semiconductor devices.

BACKGROUND

Plasma-induced damage is a design challenge faced during fabrication of integrated circuits. During plasma-etching, charged particles accelerated onto the wafer surface may charge conducting layers on the wafer surface to a high voltage which, when connected to a gate of a MOS field effect device, can degrade the insulating film. Insufficient protection from plasma-induced damage of a semiconductor wafer can lead to loss in yield and reduces gate reliability and reduction of flicker noise is desired.

BRIEF DESCRIPTION OF THE DRAWINGS

FIG. 1 illustrates a schematic view of a system for etching a semiconductor wafer according to some embodiments of the invention.

FIGS. 2A and 2B are illustrations of a top view of a wafer support according to some embodiments of the invention.

FIG. 3 illustrates a cross-sectional drawing of a partially completed semiconductor wafer according to some embodiments of the invention showing illumination of electromagnetic radiation (photons) on the top surface of the semiconductor wafer.

FIG. 4 illustrates a cross-sectional drawing of a partially completed semiconductor wafer according to some embodiments of the invention showing illumination of electromagnetic radiation on the bottom surface of the semiconductor wafer.

FIG. 5 illustrates a flow chart representing the method of operation of the some embodiments of the invention where illumination of electromagnetic radiation is performed during the entire plasma etching process.

FIG. 6 illustrates a flow chart representing the method of operation of some embodiments of the invention where illumination is performed selectively during the over-etching phase of the plasma etching process.

FIG. 7 shows a table listing various optical absorption lengths in a silicon crystal as a function of the wavelength.

DETAILED DESCRIPTION

The following detailed description refers to the accompanying drawings that show, by way of illustration, specific details and embodiments in which the invention may be practiced. These embodiments are described in sufficient detail to enable those skilled in the art to practice the invention. Other embodiments may be utilized and structural, logical, and electrical changes may be made without departing from the scope of the invention. The various embodiments are not necessarily mutually exclusive, as some embodiments can be combined with one or more other embodiments to form new embodiments.
In the following description, the terms “wafer” and “substrate” may be used interchangeably to refer generally to any structure on which integrated circuits are formed and also to such structures during various stages of integrated circuit fabrication. The term “substrate” is understood to include a semiconductor wafer. The term “substrate” is also used to refer to semiconductor structures during processing and may include other layers that have been fabricated thereupon. Both “wafer” and “substrate” include doped and un-doped semiconductors, epitaxial semiconductor layers supported by a base semiconductor or insulator, as well as other semiconductor structures well known to one skilled in the art.
The term “conductor” is understood to generally include n-type and p-type semiconductors and the term “insulator” or “dielectric” is defined to include any material that is less electrically conductive than the materials referred to as “conductors.” The following detailed description is, therefore, not to be taken in a limiting sense.
Plasma etching and ion-beam etching are two types of dry etching processes that use gases and plasma energy to perform etching of a semiconductor wafer. The etching action is achieved either through a chemical or a physical mechanism. In a purely chemical mechanism, the generated plasma creates reactive species (free radicals and reactive atoms) that chemically react with the materials on the wafer surface. In an etching action using the physical mechanism, the plasma provides energetic species (bombarding positive ions) that are accelerated toward the wafer surface material by a sputter-etch action.
A major design consideration taken into account while performing the above mentioned etching techniques include the deleterious charging of dielectric surfaces (e.g., such as photo-resist layer, dielectric hard-mask materials) as a result of the plasma generated. Various types of substrate-damage occurs while using conventional techniques of plasma etching. Such damage includes rupture caused in gate insulating films due to high charge accumulation and induced EMF currents. Additionally, conducting filaments exposed to the plasma will act as an antenna that further multiplies the current density in the dielectric film. Generally, the breakdown voltage of a gate dielectric is usually lower than the breakdown voltage of the pn-junction. Consequently, dielectrics will degrade when subjected to the high voltage which is not limited by the reverse p-n junction. According to the tunneling I-V characteristics, high-density currents will result in degradation of the dielectric film. Degradation occurs in the dielectric due to the bonding disruption caused by the high current flow through these materials. The term “current damage” is used to characterize this degradation as it occurs in plasma-based processing of semiconductor wafers. This problem is more severe in the case of deeper junctions in the semiconductor wafer that can have a higher voltage drop across the junction. Therefore, it is necessary to shunt the charge accumulation created due to the plasma with ground in order to prevent the formation of high current densities that cause current damage to the dielectric films.
There are two scenarios under which current damage is manifested during a plasma etching process. Firstly, during the etching of an insulator to form a contact hole or a via opening, the insulating film is completely etched until the plasma reaches the conductive layer lying underneath. In this case there is an overexposure to the plasma which in turn results in current to flow to the gate and pass through the dielectric and affect the dielectric film. Secondly, during the etching of a metal layer, in situations where the metal layer is not continuous, the isolated metal areas result in the collection and accumulation of charge from the plasma. This affects the dielectric film under the gate. Any considerable accumulation of charge can result in current damage if they are not shunted to the substrate by contacts to pn-junctions. This shunting capability can be accomplished by a leakage current. If the natural leakage current, which increases with temperature, is not sufficient, it needs to be supported by a photo current. This operating principle is realized in the photo diode and other photo sensing devices.
FIG. 1 illustrates a schematic view of a system 100 for etching a semiconductor wafer 114. System 100 is illustratively a plasma etch system showing illumination of electromagnetic radiation on semiconductor wafer 114. System 100 comprises the semiconductor wafer 114 placed in a plasma chamber 102, electrodes 104 and 106, a power supply 108, an electromagnetic radiation source 110, input gas source 116, and output gas drain 118. Input gas source 116 is provided with reactive gas from a gas supply system that is not shown in FIG. 1. Output drain 118 is coupled to a vacuum system that is not shown in FIG. 1. Plasma chamber 102 is an enclosed container within which plasma etching is performed. Electrodes 104 and 106 are coupled to power supply 108 and are configured to produce a plasma field 120 within plasma chamber 102.
In some embodiments, electrode 106 performs the function of a wafer support. Wafer support 106 is connected to ground to drain excessive charge accumulation on the surface of semiconductor wafer 114.
In some embodiments, plasma chamber 102 has a window 107 placed at the bottom portion of the chamber. Window 107 facilitates the rays of electromagnetic radiation 112 generated at electromagnetic radiation source 110 to enter into plasma chamber 102. In some embodiments, window 107 is transparent to ultra-violet, visible and infra-red light.
In some embodiments, electromagnetic radiation source 110 generates rays having wavelengths in the infra-red region of the electromagnetic spectrum. In some embodiments, electromagnetic radiation source 112 generates rays having wavelengths between about 400 nm and about 1500 nm.
In some embodiments, illumination using electromagnetic radiation source 110 is performed during a plasma etching process in situations where the plasma etching does not rupture or damage the dielectric. In such situations the electromagnetic radiation does not have any effect on the etching process because the chemistry of the etching process is not changed by the incidence of electromagnetic radiation on semiconductor wafer 116.
FIGS. 2A and 2B are illustrations of a top view of a wafer support 106 according to some embodiments of the invention. Wafer support 106 shown in FIG. 2A and FIG. 2B includes an outer rim 202 that facilitates the positioning of semiconductor wafer 114 within plasma chamber 102. In some embodiments, wafer support 106 has circular openings 204A as shown in FIG. 2A. In some embodiments, wafer support 106 has hexagonal openings 204B as shown in FIG. 2B. Openings 204A and 204B allow rays of electromagnetic radiation 112 from electromagnetic radiation source 110 to illuminate the bottom surface of semiconductor wafer 114.
In operation, the semiconductor wafers are loaded within plasma chamber 102 and the pressure inside chamber 102 is reduced by a vacuum system (not shown in FIG. 1). After the vacuum is established, plasma chamber 102 is filled with a reactive gas such as Argon, CF₄, CHF₃, BCl₃, Nitrogen, Fluorine, Chlorine, Bromine, Oxygen and Sodium. In some embodiments, power supply 108 creates a radio frequency (RF) field through electrodes 104 and 106 in plasma chamber 102. The field energizes the gas mixture provided by gas source 116 into a plasma field 120. In the energized state, the excited ions attack the exposed area of the substrate and convert it into volatile components that are removed from plasma chamber 102 via output gas drain 118 by a vacuum system (not shown in FIG. 1).
In some embodiments, the pressure within plasma chamber during plasma-etching is between about 0.1 and about 10 torr. In some embodiments, the composition of gas used to generate plasma field 120 includes at least one of fluorine, chlorine, bromine, oxygen and argon. In some embodiments elements such as sodium are added to the gas mixture to generate electromagnetic radiation with longer wavelength than the light which is generated when Argon is used as the plasma carrier gas. In some embodiments, ion densities (measured by number of ions per cm³) achieved within the plasma chamber during the above mentioned plasma etching process are between about 3×10¹⁰ions/cm³and about 3×10¹²ions/cm³.
FIG. 3 illustrates a cross-sectional drawing of a partially completed semiconductor wafer 300 according to some embodiments of the invention showing illumination of a top surface of the wafer with electromagnetic radiation. Partially completed semiconductor wafer 300 includes a top surface 301, a substrate 302, a doped region 304, a well region 306 and rays of electromagnetic radiation 308 and 310. Top surface 301 of partially completed semiconductor wafer 300 is transparent to incident electromagnetic rays generated from an electromagnetic radiation source (not shown in figure). In some embodiments, well region 306 can be a p-well and/or an n-well.
As shown in FIG. 3, ray 308 has a shorter wavelength than ray 310 and ray 308 does not penetrate into the semiconductor wafer 114 to the depth that ray 310 penetrates in the semiconductor wafer 114. In some embodiments, ray 306 has a wavelength in the ultra-violet region of the electromagnetic spectrum. In some embodiments, ray 308 has a wavelength in the infra-red region of the electromagnetic spectrum.
In some embodiments, where plasma field 120 contains Argon, rays in the blue region of the electromagnetic spectrum are generated when a plasma field 120 is formed. These rays have a wavelength similar to that of ray 308 and are absorbed at the surface of semiconductor wafer 114. These rays are effective in generating minority carriers close to top surface 301 of wafer 114. Generation of minority carriers helps in shunting the charge within shallow junctions thereby helps in preventing plasma damage.
However, for deeper junctions within semiconductor substrate 114, or if the above mentioned shallow junctions are electrically isolated from the substrate by the depletion layer of these deep junctions, the rays in the blue region which have shorter wavelengths are not available to shunt the charge all the way through the substrate. Consequently, rays having short wavelengths that are generated in the plasma field 120 containing Argon are not sufficient to reduce the plasma-induced damage within the junctions buried deeper in semiconductor wafer 114. This problem can be solved by providing rays having longer wavelengths such as those within the infra-red region of the electromagnetic spectrum. In some embodiments, electromagnetic radiation source illuminates the top surface of the semiconductor wafer 114 with rays having a combination of wavelengths in the ultra-violet, visible, and infra-red regions of the electromagnetic spectrum.
The table shown in FIG. 7 lists the average penetration depth of light in crystalline silicon as a function of the wavelength. Blue light with short wave length of approximately 400 nm is absorbed within the first 100 nm of the surface of a silicon substrate, while red light penetrates deeper into the silicon substrate. Therefore, red light generates minority carriers deeper in the bulk of the silicon substrate and is effective in shunting current from the floating n-wells to the p-type silicon substrate. All minority carriers that are located within one minority carrier diffusion length around the depletion layer edges of the junction contribute to the shunting of the current. Since the minority carrier diffusion length increases with lower doping density, the photovoltaic effect becomes remarkable in the bulk of the substrate.
FIG. 4 illustrates a cross-sectional drawing of a partially completed semiconductor wafer 400 according to some embodiments of the invention showing illumination of a bottom surface of the wafer with electromagnetic radiation. Partially completed semiconductor wafer 400 includes a substrate 402, doped region 404, and a well region 406, a top surface 408, and a bottom surface 410. In some embodiments, top surface 408 of partially completed semiconductor wafer 400 is opaque to incident electromagnetic rays 401 as shown in FIG. 1. In some embodiments, top surface 401 is opaque to wavelengths in the ultra-violet, visible, and infra-red regions of the electromagnetic spectrum. This presents a challenge of not being able to reduce plasma damage within wafer 400 in a manner similar to that shown in FIG. 3. In some embodiments, this difficulty of not being able to pass electromagnetic radiations through the top surface of the wafer is solved by providing illumination to the bottom surface 410 of wafer 400 which is transparent to electromagnetic radiations. In some embodiments, electromagnetic radiation source illuminates the bottom surface of the semiconductor wafer 114 with rays having a combination of wavelengths in the ultra-violet, visible, and infra-red regions of the electromagnetic spectrum. The rays having longer wavelengths such as 412 propagate deeper into wafer 400 compared to rays having shorter wavelength such as 414. Consequently, rays having longer wavelengths generate minority carriers deeper in the bulk of the silicon substrate and is effective in shunting current from the floating n-wells to the p-type silicon substrate.
FIG. 5 illustrates a flow chart of a method 500 representing some embodiments of the invention showing illumination of the substrate being performed during the entire plasma etching process. Method 500 starts at block 502 and proceeds to block 504 and 512. At block 504, method 500 includes generating a plasma stream as described earlier under FIG. 1. At block 512, method 500 includes illuminating the substrate as described earlier under FIG. 3 and FIG. 4. At block 506, method 500 includes performing etching of semiconductor substrate 114. At block 508, method 500 includes determining whether an end-point of etching has been reached.
In some embodiments, at block 508 if it is determined that an end-point has been reached for the plasma etching process, then method 500 proceeds to block 510. In some embodiments, at block 508 if it is determined that an end-point has not been reached for the plasma etching process, then method 500 reverts back to block 506 to continue etching of the substrate.
At block 510, method 500 includes performing an overetch on semiconductor substrate 114. In some embodiments, the overetch phase within a plasma etch process helps in the removal of remaining residues and stringers of polysilicon. At block 514, method 500 includes termination of the method after performing overetch of the substrate in block 510.
FIG. 6 illustrates a flow chart of a method 600 representing some embodiments of the invention showing illumination of the substrate being performed selectively during an over-etch phase of the plasma etching process. Method 600 starts at block 602 and proceeds to block 604. At block 604, method 600 includes generating a plasma stream as described earlier under FIG. 1. At block 604, method 600 includes performing etching of semiconductor substrate 114.
In some embodiments, at block 608 if it is determined that an end-point has not been reached for the plasma etching process, then method 600 reverts back to block 606 to continue etching of the substrate. In some embodiments, at block 608 if it is determined that an end-point has been reached for the plasma etching process, then method 600 proceeds to block 610 and block 612. At block 610, method 600 includes performing an overetch on semiconductor substrate 114. At block 612, method 600 includes illuminating the substrate as described earlier under FIG. 3 and FIG. 4. Upon completion of the overetch phase performed in block 610 on semiconductor surface 114, method 600 proceeds to terminate at block 614.
In some embodiments, method 600 for fabricating an integrated circuit includes positioning a surface of semiconductor substrate 114 within the plasma stream. In some embodiments, method 600 includes mounting a surface of semiconductor substrate 114 on wafer support 106 having several apertures 202A, 202B thereby allowing electromagnetic radiation to pass through it. In some embodiments, the surface of the semiconductor wafer 114 being etched is exposed to electromagnetic radiation generated in the plasma stream as a result of the introduction of a gas such as Argon, CF₄, CHF₃, BCl₃, Nitrogen, Fluorine, Chlorine, Bromine, and Oxygen in plasma chamber 102. In some embodiments, gaseous additives such as sodium are introduced into plasma camber 102 in order to generate photons having wavelengths in the infra-red region. These photons propagate deep into the silicon substrate and generate minority carriers which are effective in shunting current from the floating n-wells to the p-type silicon substrate. In some embodiments, wafer support 106 that supports semiconductor wafer 114 is conductively coupled to a reference voltage.
In some embodiments, the light generated in the plasma chamber is configured to pass through the wafer support and impinge on the substrate using mirrors or light conducting devices to provide back side illumination using the plasma at the front side as the illumination source.
FIG. 7 shows a table 700 listing various optical absorption lengths in a silicon crystal as a function of the wavelength.
It should be noted that the methods described herein do not have to be executed in the order described, or in any particular order, unless it is otherwise specified that a particular order is required. Moreover, unless otherwise specified, various activities described with respect to the methods identified herein can be executed in repetitive, simultaneous, serial, or parallel fashion.
The accompanying drawings that form a part hereof show by way of illustration, and not of limitation, specific embodiments in which the subject matter may be practiced. The embodiments illustrated are described in sufficient detail to enable those skilled in the art to practice the teachings disclosed herein. Other embodiments may be utilized and derived therefrom, such that structural and logical substitutions and changes may be made without departing from the scope of this disclosure. This Detailed Description, therefore, is not to be taken in a limiting sense, and the scope of various embodiments is defined only by the appended claims, along with the full range of equivalents to which such claims are entitled.
Such embodiments of the inventive subject matter may be referred to herein, individually and/or collectively, by the term “invention” merely for convenience and without intending to voluntarily limit the scope of this application to any single invention or inventive concept if more than one is in fact disclosed. Thus, although specific embodiments have been illustrated and described herein, it should be appreciated that any arrangement calculated to achieve the same purpose may be substituted for the specific embodiments shown. This disclosure is intended to cover any and all adaptations or variations of various embodiments. Combinations of the above embodiments, and other embodiments not specifically described herein, will be apparent to those of skill in the art upon reviewing the above description. In the previous discussion and in the claims, the terms “including” and “comprising” are used in an open-ended fashion, and thus should be interpreted to mean “including, but not limited to . . . ”.
The Abstract of the Disclosure is provided to comply with 37 C.F.R. § 1.72(b), requiring an abstract that will allow the reader to quickly ascertain the nature of the technical disclosure. It is submitted with the understanding that it will not be used to interpret or limit the scope or meaning of the claims. In addition, in the foregoing Detailed Description, it can be seen that various features are grouped together in a single embodiment for the purpose of streamlining the disclosure. This method of disclosure is not to be interpreted as reflecting an intention that the claimed embodiments require more features than are expressly recited in each claim. Rather, as the following claims reflect, inventive subject matter lies in less than all features of a single disclosed embodiment. Thus the following claims are hereby incorporated into the Detailed Description, with each claim standing on its own as a separate embodiment.

Claims

1. An apparatus comprising:

a plurality of electrodes coupled to a power supply for generating a plasma stream for etching a semiconductor wafer;

at least one electromagnetic radiation source; and

a wafer support to position a wafer while etching using the plasma stream, the wafer support coupled to ground and configured to drain charge accumulation on a surface of the semiconductor wafer during etching and having a plurality of apertures configured to allow passage of electromagnetic radiation from the at least one electromagnetic radiation source through a window and the wafer support to impinge on a surface of the wafer during etching.

2. The apparatus of claim 1, wherein at least some of the electromagnetic radiation has a wavelength between about 400 nm and about 1500 nm.

3. The apparatus of claim 1, wherein the plasma stream is generated using a gas mixture comprising a material selected from the group consisting of Argon, CF₄, CHF₃, BCl₃, Nitrogen, Fluorine, Chlorine, Bromine, Oxygen and Sodium.

4. The apparatus of claim 1, wherein the electromagnetic radiation impinges on a bottom surface of the wafer.

5. The apparatus of claim 4, further comprising a mirror adapted to reflect the electromagnetic radiation generated by the plasma onto the surface of the wafer.

6. The apparatus of claim 4, wherein the wafer support is conductively coupled to a source of reference potential.

7. The apparatus of claim 4, wherein at least some apertures of the plurality of apertures are circular.

8. The apparatus of claim 4, wherein at least some apertures of the plurality of apertures are hexagonal.

9. The apparatus of claim 4, wherein at least some apertures of the plurality of apertures are rectangular.

10. An apparatus comprising:

a plasma stream generated in a chamber for etching a semiconductor wafer, the chamber having a gas mixture;

a wafer support supporting a substrate and coupled to around and configured to drain charge accumulation in the semiconductor wafer during etching, the substrate having a first surface positioned in the plasma stream and a second surface disposed over the wafer support;

a first electromagnetic radiation beam configured to illuminate the first surface of the substrate; and

a second electromagnetic radiation beam configured to illuminate the second surface of the substrate through a window in the chamber.

11. The apparatus of claim 10, wherein the wafer support has a plurality of apertures to allow passage of the second electromagnetic radiation beam through the window in the chamber and the wafer support to impinge on the second surface of the substrate during etching of the first surface of the substrate.

12. The apparatus of claim 10, wherein the plasma stream is generated using the gas mixture comprising a material selected from the group consisting of Argon, CF₄, CHF₃, BCl₃, Nitrogen, Fluorine, Chlorine, Bromine, Oxygen and Sodium.

13. The apparatus of claim 11, wherein at least some apertures of the plurality of apertures are circular.

14. The apparatus of claim 11, wherein at least some apertures of the plurality of apertures are hexagonal.

15. The apparatus of claim 11, wherein at least some apertures of the plurality of apertures are rectangular.

16-20. (canceled)

21. The apparatus of claim 10, wherein the first electromagnetic radiation beam comprising electromagnetic radiation having at least one of the wavelengths between about 400 nm and about 1500 nm.

22. The apparatus of claim 10, wherein the second electromagnetic radiation bean comprising electromagnetic radiation having at least one of the wavelengths between about 400 nm and about 1500 nm.

23. The apparatus of claim 10, wherein the wafer support including an electrode, wherein the electrode is coupled to a power supply.

24. The apparatus of claim 1, wherein the wafer support including an electrode, wherein the electrode is coupled to a power supply.

25. A system, comprising:

a plurality of electrodes coupled to a power supply and configured to generate a plasma stream in a chamber;

an electromagnetic radiation source; and

a wafer support configured to support a semiconductor substrate and coupled to ground and configured to drain charge accumulation on a surface of the semiconductor wafer during etching, wherein the wafer support includes a plurality of apertures adapted to provide illumination on a surface of the semiconductor substrate using the electromagnetic radiation source and the electromagnetic radiation generated by the electromagnetic radiation source passes through a window in the chamber.