TWM325611U - LED chip package structure with a high-efficiency light-emitting effect - Google Patents

LED chip package structure with a high-efficiency light-emitting effect Download PDF

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Publication number
TWM325611U
TWM325611U TW096213817U TW96213817U TWM325611U TW M325611 U TWM325611 U TW M325611U TW 096213817 U TW096213817 U TW 096213817U TW 96213817 U TW96213817 U TW 96213817U TW M325611 U TWM325611 U TW M325611U
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TW
Taiwan
Prior art keywords
light
emitting diode
package structure
efficiency
diode package
Prior art date
Application number
TW096213817U
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Chinese (zh)
Inventor
Bing-Lung Wang
Feng-Huei Juang
Wen-Kuei Wu
Original Assignee
Harvatek Corp
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Publication date
Application filed by Harvatek Corp filed Critical Harvatek Corp
Priority to TW096213817U priority Critical patent/TWM325611U/en
Priority to DE202007015105U priority patent/DE202007015105U1/en
Priority to JP2007008424U priority patent/JP3138755U/en
Publication of TWM325611U publication Critical patent/TWM325611U/en

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Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/48Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
    • H01L33/52Encapsulations
    • H01L33/56Materials, e.g. epoxy or silicone resin
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B29WORKING OF PLASTICS; WORKING OF SUBSTANCES IN A PLASTIC STATE IN GENERAL
    • B29CSHAPING OR JOINING OF PLASTICS; SHAPING OF MATERIAL IN A PLASTIC STATE, NOT OTHERWISE PROVIDED FOR; AFTER-TREATMENT OF THE SHAPED PRODUCTS, e.g. REPAIRING
    • B29C39/00Shaping by casting, i.e. introducing the moulding material into a mould or between confining surfaces without significant moulding pressure; Apparatus therefor
    • B29C39/003Shaping by casting, i.e. introducing the moulding material into a mould or between confining surfaces without significant moulding pressure; Apparatus therefor characterised by the choice of material
    • B29C39/006Monomers or prepolymers
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B29WORKING OF PLASTICS; WORKING OF SUBSTANCES IN A PLASTIC STATE IN GENERAL
    • B29CSHAPING OR JOINING OF PLASTICS; SHAPING OF MATERIAL IN A PLASTIC STATE, NOT OTHERWISE PROVIDED FOR; AFTER-TREATMENT OF THE SHAPED PRODUCTS, e.g. REPAIRING
    • B29C39/00Shaping by casting, i.e. introducing the moulding material into a mould or between confining surfaces without significant moulding pressure; Apparatus therefor
    • B29C39/02Shaping by casting, i.e. introducing the moulding material into a mould or between confining surfaces without significant moulding pressure; Apparatus therefor for making articles of definite length, i.e. discrete articles
    • B29C39/021Shaping by casting, i.e. introducing the moulding material into a mould or between confining surfaces without significant moulding pressure; Apparatus therefor for making articles of definite length, i.e. discrete articles by casting in several steps
    • FMECHANICAL ENGINEERING; LIGHTING; HEATING; WEAPONS; BLASTING
    • F21LIGHTING
    • F21KNON-ELECTRIC LIGHT SOURCES USING LUMINESCENCE; LIGHT SOURCES USING ELECTROCHEMILUMINESCENCE; LIGHT SOURCES USING CHARGES OF COMBUSTIBLE MATERIAL; LIGHT SOURCES USING SEMICONDUCTOR DEVICES AS LIGHT-GENERATING ELEMENTS; LIGHT SOURCES NOT OTHERWISE PROVIDED FOR
    • F21K9/00Light sources using semiconductor devices as light-generating elements, e.g. using light-emitting diodes [LED] or lasers
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181Encapsulation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2933/00Details relating to devices covered by the group H01L33/00 but not provided for in its subgroups
    • H01L2933/0091Scattering means in or on the semiconductor body or semiconductor body package

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • Mechanical Engineering (AREA)
  • Led Device Packages (AREA)

Abstract

An LED chip package structure with a high-efficiency light-emitting effect, includes a substrate unit, a light-emitting unit, and a package colloid unit. The substrate unit has a substrate body, and a positive electrode trace and a negative electrode trace respectively formed on the substrate body. The light-emitting unit has a plurality of LED chips disposed on the substrate body. Each LED chip has a positive electrode side and a negative electrode side respectively and electrically connected with the positive electrode trace and the negative electrode trace of the substrate unit. The package colloid unit has a plurality of package colloids covered on LED chips, respectively.

Description

M325611 八、新型說明: 【新型所屬之技術領域】 本創作係有關於一種發光二極體晶片封裝結構,尤指 種具有高效率發光效果之發光二極體晶片封裝結構。 【先前技術】 請參閱第一圖所示,其係為習知發光二極體之第一種 封袭方法之流程圖。由流程圖中可知,習知發光二極體之 第一種封裝方法,其步驟包括:首先,提供複數個封裝完 成之發光二極體(packaged LED) (S800 );接著,提供 條狀基板本體(stripped substrate body ),其上具有一正 逐導電軌跡(positive electrode trace)與一負極導電執跡 (negative electrode trace) (S802);最後,依序將每一 個封裝完成之發光二極體(packaged LED)設置在該條狀 基板本體上’並將每一個封裝完成之發光二極體 (packaged LED)之正、負極端分別電性連接於該 板本體之正、負極導電執跡(S804)。 請參閱第二圖所示,其係為習知發光二極體之第二種 封裝方法之流程圖。由流程圖中可知,習知發光二極體之 第二種封裝方法’其步驟包括:首先,提供一條狀基板本 體(stripped substrate body),其上具有一正極導電軌跡 (positive electrode trace)與一負極導電執跡(此糾― electrode trace) (S900);接著,依序將複數個發光二極 體晶片(LED chip)設置於該條狀基板本體上,並且將每 M325611 一個發光二極體晶片之正、負極端分別電性連接於該條狀 基板本體之正、負極導電軌跡(S902);最後,將—條狀 封裝膠體(stripped package colloid )覆蓋於該條狀基板本 體及該等發光二極體晶片上,以形成一帶有條狀發光區域 (stripped light_emitting area )之光棒(light bar ) (S904) 〇 然而,關於上述習知發光二極體之第一種封裝方法, 由於每一顆封裝完成之發光二極體(packaged LED )必須 先從一整塊發光二極體封裝切割下來,然後再以表面黏著 技術(SMT)製程,將每一顆封裝完成之發光二極體 (packaged LED)設置於該條狀基板本體上,因此無法有 效縮短其製程時間,再者,發光時,該等封裝完成之發光 二極體(packaged LED)之間會有暗帶(darkband)現象 存在,對於使用者視線仍然產生不佳的效果。 另外,關於上述習知發光二極體之第二種封裝方法, 由於所完成之光棒帶有條狀發光區域,因此第二種封裝方 法將不會產生暗帶(darkband)的問題。然而,因為該條 狀封装膠體(stripped package colloid)被激發的區域不 均,因而造成光棒之光效率不佳(亦即,靠近發光二極體 曰曰片的封裝膠體區域會產生較強的激發光源,而遠離發光 二極體晶片的封裝膠體區域則產生較弱的激發光源)。 是以,由上可知,目前習知之發光二極體的封裝方法 及其封裝結構,顯然具有不便與缺失存在,而待加以改善 者0 M325611 緣是,本創作人有感上述缺失之可改善,且依據多年 來從事此方面之相關經驗,悉心觀察且研究之,並配合學 理之運用,而提出一種設計合理且有效改善上述缺失之本 創作。 【新型内容】 本創作所要解決的技術問題,在於提供一種具有高效 率發光效果之發光二極體晶片封裝結構。本創作之發光二 極體結構於發光時,形成一連續之發光區域,而無亮度不 均的情況發生,並且本創作係透過晶片直接封裝(Chip On Board,COB )製程並利用壓模(die mold)的方式,以使 得本創作可有效地縮短其製程時間,而能進行大量生產。 再者,本創作之結構設計更適闬於各種光源,諸如背光模 組、裝飾燈條、照明用燈、或是掃描器光源等應用,皆為 本創作所應用之範圍與產品。 為了解決上述技術問題,根據本創作之其中一種方 案,提供一種具有高效率發光效果之發光二極體晶片封裝 結構,其包括:一基板單元、一發光單元、及一封裝膠體 單元。其中,該基板單元係具有一基板本體、及分別形成 於該基板本體上之一正極導電軌跡與一負極導電軌跡。該 發光單元係具有複數個設置於該基板本體上之發光二極 體晶片,其中每一個發光二極體晶片係具有分別電性連接 於該基板單元的正、負極導電執跡之一正極端與一負極 端。該封裝膠體單元係具有複數個分別覆蓋於該等發光二 M325611 極體晶片上之封裝膠體。 】:,本創作之發光二極體晶片封裝… 步包括下例兩種結構·· < ^種·—框架單元’其係為—層覆蓋於該基板本體 上及匕復母-個封裝膠體四周之 裝膠體之上表面。 乂路出母個封 狀膠:框木早70 ’其具有複數個分別圍繞該等封 】肢,以分別露出每—個封裝膠體之上表面,a 令以寻框肢係彼此分離地設置於該基板本體上。 - 因此,本創作之發光二極體結構於發光時,形成—择 先區域,而無亮度不均的情況發生。並 ; :過日^直接封裝(啊0nB㈣,)製程: 产杈(che mold)的方式,以使得本創 力 其製程時間,而能進行大量生產。—地视知 為了能更進-步瞭解本創作為達成預定目的 ,技術、手段及功效’請參閱以下有關本創作之詳細說明 舁附圖,相信本創作之㈣、特徵與特點,當可由此得一 深入且具體之瞭解,然而所附圖式僅提供參考與說明:, 並非用來對本創作加以限制者。 【實施方式】 —請參閱第三圖、第三a圖至第三廿圖、及第三入圖至 弟二D圖所示。第三圖係為本創作封裝方法一 >fej| 之流程圖’第三a圖至第三d圖分別為本創作封裝結構之 ^325611 第一實施例之封裝流程示意圖,第三A圖至第三D圖分別 為本創作封裝結構之第一實施例之封裝流程剖面示意 圖。由第三圖之流程圖可知,本創作之第一實施例係提供 種具有高效率發光效果之發光二極體晶片之封裝方 去’其包括下列步驟: ' ^ 首先,請配合第三a圖及第三A圖所示,提供一基板 、單兀(substrate unit) 1,其具有一基板本體(substrate ) 1 〇、及分別形成於該基板本體1 〇上之複數個正 極導電軌跡(positive electrode trace) 1 1與複數個負極 執跡(negativeelectrodetra.ee) 1 2 (S100)。 其中,該基板本體1 0係包括一金屬層(metal lay er ) 1〇Α及一成形在該金屬層l〇A上之電木層(bakelite layer) 1 〇 b (如第三a圖及第三A圖所示)。再者,依 不同的設計需求,該基板單元1係可為一印刷電路板 (PCB )、一 軟基板(flexible substrate )、一 銘基板 (aluminum substrate )、一陶瓷基板(ceramic substrate)、 , 或一銅基板(copper substrate)。此外,該正、負極導電 軌跡1 1、1 2係可採用銘線路(aluminum circuit)或銀 線路(silver circuit ),並且該正、負極導電軌跡1 1、1 2之佈局(layout)係可隨著不同的需要而有所改變。 接著,請配合第三b圖及第三B圖所示,透過矩陣 (matrix)的方式,分別設置複數個發光二極體晶片(LED chip) 2 0於該基板本體1 0上,以形成複數排縱向發光 二極體晶片排(longitudinal LED chip row) 2,其中每一 ίο M325611 個發光二極體晶片2 〇係具有分別電性連接於該基板單 元的正、負極導電軌跡丄]L、i 2之—正極端(p〇sitive electrode side)2 〇 1 與一負極端(negative 娜) 2 0 2 (si〇2) 〇 此外,以本創作之第一實施例而言,每一個發光二極 體昂片20之正、負極端20 1、2 0 2係透過兩相對應 之導線w並以打線(wire_bounding)的方式,以與該基板 單元1之正、負極導電軌跡11、12產生電性連接ΐ再 者每排縱向發光二極體晶片排(1〇ngitudina】C叫 row) 2係以一直線的排列方式設置於該基板單元丄之基 f本體1 0上’並且每—個發光二極體晶片2㈣可為一 藍色發光一極體晶片(blue LED )。 … 當然,上述該等發光二極體晶片2 0之電性連接方式 係非用以限定本創作,例如:請參閱第四圖所示(本創作 發光二極體晶片透過覆晶的方式達成電性連接之示音 圖),每一個發光二極體晶片? ’以 ,.0 n 0 . ; 日日月2 0之正、負極端2 〇 、Q2 #透過複數個相對應之錫球B並以覆晶 ==V以與該基板單元^之正、負極導 :叶:i ”上〗*生電性連接。另外,依據不同的 :二㈣光二極體晶片(圖未示)之 (pa^ 正、負極今電軌跡產生電性連接。 M325611 然後’请配合弟二c圖及第二C圖所示,透過一第一 模具單元(first mold unit) Μ 1,將複數條條狀封裝膠體 (stripped package colloid ) 3 分別縱向地(longitudinally) 覆I在母一排縱向發光二極體晶片排(longitudinal LED chip row) 2 上(S104)。 其中,該第一模具單元Ml係由一第一上模具(first uppermold) Μ 1 1及一用於承載該基板本體1 〇之第一 下模具(first lower mold) Ml 2所組成,並且該第一上 模具Μ 1 1係具有複數條相對應該等縱向發光二極體晶 片排(longitudinal LED chip row) 2 之第一通道(first channel) M 1 1 〇 ° 此外,該等第一通道M1 1 〇的高度及寬度係與該等 條狀封裝膠體(stripped package colloid) 3的高度及寬度 相同。再者,每一條條狀封裝膠體(stripped package colloid) 3係可依據不同的使用需求,而選擇為:由一石夕 膠(silicon)與一螢光粉(fluorescent powder)所混合形 成之螢光膠體(fluorescent resin )、或由一環氧樹脂 (epoxy)與一螢光粉(fluorescent powder)所混合形成 之螢光膠體(fluorescent resin)。 最後,請再參閱第三c圖,並配合第三d圖及第三D 圖所示,沿著每兩個縱向發光二極體晶片2 〇之間,横向 地(transversely )切割該等條狀封裝膠體(stripped package colloid) 3及該基板本體1 〇,以形成複數條光棒(light bar) L· 1 ’其中母一條光棒L 1係具有複數個彼此分開 12 M325611 请苓閱第五圖、第五3圖至第五C圖、及第五A圖至 第圖所,示。第五圖係為本創作封裝方法之第二實施例 之ML私圖第五a圖至第五c圖分別為本創作封裝結構之 第二實施例之部分封裝流程示意圖,第五A @至第ic圖 分別=本創作封裝結構之第二實施例之部分封袋流程剖 面示意圖。由第五圖之流程圖可知,第二實施例之步驟 S200至S204係分別與第一實施例之步驟sl〇〇至si〇4 相,。亦即,步驟S200係等同於第一實施例之第三a圖 及第二A圖之示意圖說明;步驟S202係等同於第一實施 例之第二b圖及第三B圖之示意圖說明;步驟S2〇4係等 同於第一實施例之第三c圖及第三c圖之示意圖說明 再者’於步驟S204之後,本創作之第二實施例更進 一步包括··首先,請參閱第五a圖及第五a圖所示,沿著 每兩個縱向發光二極體晶片2 〇之間,横向地 (tranSVersely )切割該等條狀封裝膠體(stripped package colloid) 3,以形成複數個彼此分開地覆蓋於每一個發光 一極脰曰日片2 0上之封裝膠體(package colloid) 3 〇 一 (S206) 〇 然後,請參閱第五b圖及第五B圖所示,透過一第二 模具單元(second mold unit) Μ 2,將一框架單元(frame unit) 4復蓋於该基板本體1 〇上並且填充於該等封裝膠 體3 0 —之間(S208)。其中,該第二模具單元从2係由 13 M325611 一第二上模具(second upper mold ) M2 1及一用於承載 該基板本體1 〇之第二下模具(second lower mold) M2 2所組成,並且該第二上模具M2 1係具有一條相對應該 框条單元4之第二通道(second channel) M2 1 〇,此 外该第二通道Μ 2 1 〇的高度係與該等封裝膠體 (package colloid) 3 0 /的高度相同,而該第二通道μ 2 1 0的寬度係與該框架單元4的寬度相同。 最後,请再茶閱第五]3圖,並配合第五^圖及第五c 圖所不,沿著每兩個縱向發光二極體晶片2 〇之間,横向 地(transversdy)切割該框架單元4及該基板本體丄/〇, 以形成複數條光棒(Hghtw) L2,並且使得該框架單 4被㈣成複數個分別包覆每—絲棒L 2上之所 =裝膠體3Q/的四周之框架層4〇 (s糊。其中,該 f框架層40係可為不透光框架層(opaque frame ayer &例如·白色框架層(純知fr_㈣打)。 第;六第六3圖至第以圖、及第六A圖至 = _方法之第三實施例 第二與γ柘丨夕立 圖刀別為本創作封裝結構之 分別為本創作封裝結構 $、A®至^』圖 面示意圖。由第六圖=二貫施例之部分封裝流程剖 相同,並且第三實施例之^例之步驟_至SU)4 之步驟S206相同。亦S306係分別與第二實施例 ’、17,步驟S300係等同於第一實施 14 M325611 例之第三a圖及第三A圖之示意圖說明;步驟S302係等 同於第一實施例之第三b圖及第三B圖之示意圖說明;步 驟S304係等同於第一實施例之第三c圖及第三C圖之示 意圖說明;步驟S306係等同於第二實施例之第五a圖及 第五A圖之示意圖說明。 再者,於步驟S306之後,本創作之第三實施例更進 一步包括:首先,請參閱第六a圖及第六A圖所示,透過 一第三模具單元(third mold unit) Μ 3,將複數條條狀 框架層(stripped frame layer) 4 /覆蓋於該基板本體1 0上並且縱向地填充於每一個封裝膠體3 0 /之間 (S308)。 其中,該第三模具單元Μ 3係由一第三上模具(third upper mold) M3 1及一用於承載該基板本體1 0之第三 下模具(third lower mold) Μ 3 2所組成,並且該第三上 模具M3 1係具有複數條相對應該等縱向發光二極體晶 片排(longitudinal LED chip row) 2 之第三通道(third channel) Μ 3 1 0,並且該第三通道Μ 3 1 0的高度係 與該等封裝膠體(package colloid) 3 0 >的高度相同, 而該第三通道Μ 3 1 0的寬度係大於每一個封裝膠體3 0 ’的寬度。 最後,請再參閱第六a圖,並配合第六b圖及第六Β 圖所示,沿著每兩個縱向發光二極體晶片2 0之間,横向 地(transversely )切割該等條狀框架層(stripped frame layer) 4 >及該基板本體1 0,以形成複數條光棒(light 15 M325611 bar)L 3 ’並且使得該等條狀框架層(strippedframeiaya) 4被切割成複數個分別包覆每一個封裝膠體3 >四 周之框體(frame body) 4 0 / (S310)。其中,該等框 體4 0 >係可為不透光框體(〇paqueframeb〇dy),例如: 白色框體(white frame body )。 、,=上所述,本創作之發光二極體結構於發光時,形成 -連績之發光區域’而無亮度不均的情況發生,並且本 作係透過晶片直接封裝(Chip 〇n B_d,c ⑽_ld)的方式,以使得糊作—縮 短/、衣叫間,而能進行A量生產,再者 ::更,二各種光源,諸如背光模組、裝飾燈條、: 與ί品 光源等應用,f為本創作所應用之範圍 惟’以上所述,僅為本創作最佳之 詳細說明與 二崎創作’本創作之所有範圍 二= 之^^ 本創作申4專利範圍之精神與其類似變化 之只苑例,皆應包含於本創作、 藝者在本創叙領辆,可㈣H任㈣悉該項技 蓋在《下本案之專利範圍及之變化或修飾皆可涵 【圖式簡單說明】 之,種封裝方法之流程圖; 之第二種封裝方法之流程圖; 第一圖係為習知發光二極體 第一圖係為習知發光二極體 16 M325611 第三圖係為本創作封裝方法之第一實施例之流程圖; 第三a圖至第三d圖分別為本創作封裝結構之第一實施 例之封裝流程立體示意圖; 第三A圖至第三D圖分別為本創作封裝結構之第一實施 例之封裝流程剖面示意圖; 第四圖係為本創作發光二極體晶片透過覆晶(flip-chip) 的方式達成電性連接之示意圖; 第五圖係為本創作封裝方法之第二實施例之流程圖; 第五a圖至第五c圖分別為本創作封裝結構之第二實施 例之部分封裝流程立體示意圖; 第五A圖至第五C圖分別為本創作封裝結構之第二實施 例之部分封裝流程剖面示意圖; 第六圖係為本創作封裝方法之第三實施例之流程圖; 第六a圖至第六b圖分別為本創作封裝結構之第三實施 例之部分封裝流程立體示意圖;以及 第六A圖至第六B圖分別為本創作封裝結構之第三實施 例之部分封裝流程剖面示意圖。 【主要元件符號說明】 基板單元 1 基板本體 10M325611 VIII. New Description: [New Technology Field] This creation is about a light-emitting diode package structure, especially a light-emitting diode package structure with high efficiency. [Prior Art] Please refer to the first figure, which is a flow chart of the first method of encapsulation of the conventional light-emitting diode. As can be seen from the flow chart, the first packaging method of the conventional light-emitting diode comprises the steps of: firstly providing a plurality of packaged completed LEDs (S800); and then providing a strip substrate body (stripped substrate body) having a positive electrode trace and a negative electrode trace (S802) thereon; finally, each packaged completed light-emitting diode (packaged) The LEDs are disposed on the strip substrate body and electrically connect the positive and negative ends of each packaged LED to the positive and negative conductive traces of the board body (S804). Please refer to the second figure, which is a flow chart of a second packaging method of a conventional light-emitting diode. As can be seen from the flow chart, the second method of packaging a conventional light-emitting diode includes the steps of: firstly, providing a stripped substrate body having a positive electrode trace and a Negative electrode trace (S900); then, a plurality of LED chips are sequentially disposed on the strip substrate body, and one LED wafer per M325611 The positive and negative ends are electrically connected to the positive and negative conductive tracks of the strip substrate body respectively (S902); finally, a stripped package colloid is overlaid on the strip substrate body and the light emitting two On the polar body wafer, a light bar (S904) having a stripped light_emitting area is formed. However, the first packaging method of the above-mentioned conventional light-emitting diodes is The packaged LED must be cut from a single LED package and then surface-bonded (SMT) process. A packaged LED is disposed on the strip substrate body, so that the process time cannot be effectively shortened. Further, when the light is emitted, the packaged LEDs are completed between the packages. There will be a darkband phenomenon, which still has a poor effect on the user's line of sight. Further, with regard to the second packaging method of the above conventional light-emitting diode, since the completed light bar has a strip-shaped light-emitting region, the second packaging method will not cause a problem of a dark band. However, because the stripped package colloid is not uniformly excited, the light efficiency of the light bar is poor (that is, the encapsulated colloid region near the light-emitting diode chip is strong. The source is excited, while the encapsulating colloidal region away from the LED chip produces a weaker excitation source). Therefore, it can be seen from the above that the conventional packaging method and package structure of the light-emitting diode are obviously inconvenient and lacking, and the one to be improved is 0 M325611. The creator feels that the above-mentioned deficiency can be improved. Based on years of experience in this field, and carefully observe and research, and with the use of academics, this paper proposes a design that is reasonable in design and effective in improving the above-mentioned defects. [New content] The technical problem to be solved by this creation is to provide a light-emitting diode package structure with high-efficiency light-emitting effect. The light-emitting diode structure of the present invention forms a continuous light-emitting area when light is emitted, and no uneven brightness occurs, and the present invention uses a chip on board (COB) process and utilizes a stamper (die). Mold) in such a way that this creation can effectively shorten the process time and enable mass production. Furthermore, the design of the creation is more suitable for various light sources, such as backlight modules, decorative light strips, lighting lamps, or scanner light sources, all of which are the scope and products of the application. In order to solve the above-mentioned technical problems, according to one of the embodiments of the present invention, a light-emitting diode package structure having a high-efficiency light-emitting effect is provided, comprising: a substrate unit, a light-emitting unit, and an encapsulant unit. The substrate unit has a substrate body and a positive conductive track and a negative conductive track formed on the substrate body. The illuminating unit has a plurality of illuminating diode chips disposed on the substrate body, wherein each of the illuminating diode chips has one of positive and negative conductive traces respectively electrically connected to the substrate unit and A negative terminal. The encapsulant unit has a plurality of encapsulants respectively covering the two-electrode M325611 polar body wafer. 】:, the light-emitting diode package of the present invention... The steps include the following two structures: · ^ ^ · frame unit ' is a layer covering the substrate body and the 匕 母 - a package of colloids The upper surface of the gel is placed around it.乂 出 出 个 : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : On the substrate body. - Therefore, the light-emitting diode structure of the present invention forms a selective region when light is emitted, and no uneven brightness occurs. And : : After the day ^ direct packaging (ah 0nB (four),) process: the method of mold (che mold), in order to make this process time, and can be mass produced. - In order to be able to learn more, step by step to understand the purpose of this creation, technology, means and efficacy. Please refer to the following detailed description of the creation, the drawings, and believe that (4), features and characteristics of this creation can be An in-depth and specific understanding is provided, however, the drawings are provided for reference and description only, and are not intended to limit the creation. [Embodiment] - Please refer to the third figure, the third a to the third drawing, and the third drawing to the second drawing. The third figure is a flow chart of the creation and packaging method of the present invention. The third to third figures are the package flow diagram of the first embodiment of the present invention, and the third embodiment is shown in FIG. The third D-figure is a schematic cross-sectional view of the packaging process of the first embodiment of the authoring package structure. As can be seen from the flow chart of the third figure, the first embodiment of the present invention provides a package of a light-emitting diode chip having a high-efficiency light-emitting effect, which includes the following steps: ' ^ First, please cooperate with the third a-map. As shown in FIG. 3A, a substrate, a substrate unit 1 having a substrate body 1 〇 and a plurality of positive electrode conductive tracks (positive electrodes) respectively formed on the substrate body 1 are provided. Trace) 1 1 and a plurality of negative electrodes (negativeelectrodetra.ee) 1 2 (S100). Wherein, the substrate body 10 includes a metal layer 1 and a bakelite layer 1 〇b formed on the metal layer 10 (eg, the third a diagram and the Figure 3A shows). Furthermore, the substrate unit 1 can be a printed circuit board (PCB), a flexible substrate, an aluminum substrate, a ceramic substrate, or A copper substrate. In addition, the positive and negative conductive traces 1 1 and 1 2 may adopt an aluminum circuit or a silver circuit, and the layout of the positive and negative conductive traces 1 1 and 1 2 may follow Changed with different needs. Next, in combination with the third b diagram and the third B diagram, a plurality of LED chips 20 are respectively disposed on the substrate body 10 by a matrix to form a plurality of LEDs. a longitudinal LED chip row 2, wherein each of the 325, 520 LED diodes has a positive and negative conductive track 丄L, i electrically connected to the substrate unit, respectively 2 - positive electrode end 2 〇 1 and a negative end 2 0 2 (si 〇 2) 〇 In addition, in the first embodiment of the present creation, each of the light-emitting diodes The positive and negative terminals 20 1 and 2 0 2 of the body sheet 20 are electrically connected to the positive and negative conductive tracks 11 and 12 of the substrate unit 1 by passing through two corresponding wires w and by wire_bounding. ΐ 者 每 每 每 每 每 每 每 每 每 每 每 每 每 每 每 每 每 每 每 每 每 每 每 每 每 每 每 每 每 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 The body wafer 2 (four) can be a blue light emitting diode chip (blue LED)... of course, the electrical connection manner of the above-mentioned light-emitting diode wafers 20 is not limited to the present invention. For example, please refer to the fourth figure (the present invention is realized by the flip-chip method of forming a light-emitting diode chip. The sound connection diagram of the sexual connection), each of the light-emitting diode chips? '以, .0 n 0 . ; day and month 2 0 positive, negative end 2 〇, Q2 # through a plurality of corresponding solder balls B and flip chip == V to the positive and negative with the substrate unit Guide: Leaf: i 『上〗 *Electrical connection. In addition, according to different: two (four) photodiode wafer (not shown) (pa^ positive and negative current electric trajectory to make electrical connection. M325611 then 'please As shown in the second and second C diagrams, a plurality of stripped package colloids 3 are longitudinally covered by a first mold unit Μ 1, respectively. a row of longitudinal LED chip rows 2 (S104), wherein the first mold unit M1 is composed of a first upper mold Μ 1 1 and a substrate for carrying the substrate The first lower mold M1 2 is composed of the body 1 and the first upper mold Μ 1 1 has a plurality of corresponding longitudinal LED chip rows 2 First channel M 1 1 〇° In addition, the first channels M1 1 are The height and width are the same as the height and width of the stripped package colloid 3. Furthermore, each stripped package colloid 3 can be selected according to different usage requirements: a fluorescent resin formed by mixing a silicon powder with a fluorescent powder, or a mixture of an epoxy resin and a fluorescent powder. Fluorescent resin. Finally, please refer to the third c-picture and, as shown in the third d and third D, along each of the two longitudinal light-emitting diode chips, laterally Transversely cutting the stripped package colloid 3 and the substrate body 1 以 to form a plurality of light bars L· 1 ' wherein the parent light bar L 1 has a plurality of separate 12 M325611 Please refer to the fifth figure, the fifth figure 3 to the fifth C picture, and the fifth picture A to the figure. The fifth picture is the ML private picture of the second embodiment of the creation and packaging method. Figures 5 through 5 are respectively Part of the package flow to a second embodiment of a schematic structure of the authoring package, the fifth through A @ ic view of a portion of a second embodiment of the present embodiment creation of a package structure sealed bag flow cross-sectional schematic view, respectively =. As can be seen from the flowchart of the fifth embodiment, steps S200 to S204 of the second embodiment are respectively associated with steps sl1 to si4 of the first embodiment. That is, step S200 is equivalent to the schematic diagrams of the third a diagram and the second diagram of the first embodiment; step S202 is equivalent to the schematic diagrams of the second b diagram and the third diagram of the first embodiment; S2〇4 is equivalent to the third c diagram and the third c diagram of the first embodiment. Note that after the step S204, the second embodiment of the present invention further includes: · First, please refer to the fifth a As shown in FIG. 5 and FIG. 5A, the stripped package colloids 3 are cut laterally (tranSVersely) along each of the two longitudinal light-emitting diode wafers 2 to form a plurality of stripped package colloids 3 Covering the package colloid on each of the light-emitting poles 20 (S206) 〇 Then, see the fifth b and the fifth B, through a second mold A second mold unit Μ 2, a frame unit 4 is overlaid on the substrate body 1 and filled between the encapsulants 30 (S208). Wherein, the second mold unit is composed of a 13 M325611 a second upper mold M2 1 and a second lower mold M2 2 for carrying the substrate body 1 . And the second upper mold M2 1 has a second channel M2 1 相对 corresponding to the frame unit 4, and the height of the second channel Μ 2 1 系 is related to the package colloid The height of 3 0 / is the same, and the width of the second channel μ 2 10 is the same as the width of the frame unit 4. Finally, please read the fifth]3 picture again, and in conjunction with the fifth and fifth c-pictures, cut the frame transversely (transversdy) between each of the two longitudinal light-emitting diode chips 2 The unit 4 and the substrate body 丄/〇 are formed to form a plurality of light bars (Hghtw) L2, and the frame sheets 4 are respectively (four) are respectively coated with the respective glue bodies 3Q/ on each of the wire rods L 2 The surrounding frame layer is 4 〇. The f frame layer 40 can be an opaque frame layer (opaque frame ayer & for example, white frame layer (purely known as fr_ (four) hit). The third embodiment and the γ 柘丨 立 立 刀 为本 为本 为本 为本 为本 为本 为本 为本 为本 为本 为本 为本 为本 为本 为本 为本 为本 为本 为本 为本 为本 为本 为本 为本 为本 为本 为本 为本 为本 为本 为本 为本 为本 为本 为本 为本 为本 为本 为本The partial packaging process is the same as that of the sixth embodiment of the second embodiment, and the steps S206 of the steps _ to SU) of the third embodiment are the same. S306 is also the second embodiment and the second embodiment respectively. Step S300 is equivalent to the schematic diagrams of the third a diagram and the third diagram A of the first implementation 14 M325611; the step S302 is equivalent to A schematic diagram of a third b diagram and a third B diagram of an embodiment; step S304 is equivalent to the schematic diagrams of the third c diagram and the third C diagram of the first embodiment; step S306 is equivalent to the second embodiment. A schematic diagram of the fifth and fifth diagrams A. After the step S306, the third embodiment of the present invention further includes: first, please refer to the sixth diagram and the sixth diagram, through a a third mold unit Μ 3, a plurality of stripped frame layers 4 / overlying the substrate body 10 and longitudinally filling each of the encapsulants 3 / / (S308 The third mold unit Μ 3 is composed of a third upper mold M3 1 and a third lower mold Μ 3 2 for carrying the substrate body 10 . And the third upper mold M3 1 has a plurality of third channels Μ 3 1 0 corresponding to the longitudinal LED chip row 2, and the third channel Μ 3 10 0 height and the package colloid 3 0 > has the same height, and the width of the third channel Μ 3 1 0 is greater than the width of each package colloid 3 0 '. Finally, please refer to the sixth a diagram, and cooperate with the sixth b and sixth As shown, between each of the two longitudinal light-emitting diode wafers 20, the stripped frame layer 4 > and the substrate body 10 are transversely cut to form a plurality Light bar (light 15 M325611 bar) L 3 ' and such strip-shaped frame layer (stripped frameiaya) 4 is cut into a plurality of frame bodies respectively covering each of the encapsulant 3 > (S310). The frame 4 0 > may be an opaque frame (,paqueframeb〇dy), for example, a white frame body. As described above, the light-emitting diode structure of the present invention forms a light-emitting region of a continuous performance when light is emitted without uneven brightness, and the film is directly packaged through a chip (Chip 〇n B_d, c (10) _ ld) way, so that the paste - shorten / clothing, and can be produced in A quantity, and then:: more, two kinds of light sources, such as backlight modules, decorative light strips,: and light source, etc. Application, f is the scope of application of the creation only 'above', only the best detailed description of this creation and the second scope of the creation of the second creation of the second generation of the creation of the second The only examples of changes should be included in this creation, and the artist will lead the vehicle in this creation. (4) H Ren (4) The technology is covered in the scope of the patent and the changes or modifications of the case can be covered. Description of the flow chart of the packaging method; the flow chart of the second packaging method; the first figure is a conventional light-emitting diode first figure is a conventional light-emitting diode 16 M325611 Flow chart of the first embodiment of the present packaging method; third FIG. 3D to FIG. 3D are respectively a perspective view of a package flow of a first embodiment of the present invention; FIG. 3A to FIG. 3D are respectively schematic cross-sectional views of a package process of the first embodiment of the present invention; The fourth figure is a schematic diagram of the electrical connection of the fabricated LED chip through a flip-chip method; the fifth figure is a flow chart of the second embodiment of the authoring packaging method; FIG. 5 is a perspective view showing a part of the packaging process of the second embodiment of the present invention; FIG. 5A to FIG. 5C are schematic cross-sectional views showing a part of the packaging process of the second embodiment of the present invention. The sixth figure is a flowchart of the third embodiment of the authoring packaging method; the sixth drawing to the sixth b are respectively a perspective view of a part of the packaging process of the third embodiment of the authoring package structure; and the sixth A FIG. 6B is a cross-sectional view showing a part of the packaging process of the third embodiment of the present invention. [Description of main component symbols] Substrate unit 1 Substrate body 10

金屬層 1 0 AMetal layer 1 0 A

電木層 1 0 B JL極導電執跡 11 負極導電軌跡 12 17 M325611 基板單元 1 正極導電執跡 負極導電執跡 縱向發光二極體晶片排2 發光二極體晶片 正極端 負極端 發光二極體晶片 正極端 條狀封裝膠體 框架單元 條狀框架層 導線 錫球 第一模具單元 第二模具單元 第三模具單元 負極端 3 封裝膠體 封裝膠體 4 框架層 4 框體 W B Ml 第一上模具 第一通道 第一下模具 Μ 2 第二上模具 第二通道 第二下模具 M3 第三上模具 第三通道 第三下模具 1 r 12、 2 0 2 0 1 2 0 2 2 0 ^ 2 0 1 2 0 2 3 0 3 0 ^ 4 0 4 0 ^Electric wood layer 1 0 B JL pole conductive trace 11 negative electrode conductive track 12 17 M325611 substrate unit 1 positive electrode conductive trace negative electrode conductive trace longitudinal light emitting diode chip row 2 light emitting diode chip positive terminal negative terminal light emitting diode Wafer positive end strip package colloid frame unit strip frame layer wire solder ball first mold unit second mold unit third mold unit negative end 3 encapsulant colloidal encapsulant 4 frame layer 4 frame WB Ml first upper mold first channel First lower mold Μ 2 second upper mold second passage second lower mold M3 third upper mold third passage third lower mold 1 r 12, 2 0 2 0 1 2 0 2 2 0 ^ 2 0 1 2 0 2 3 0 3 0 ^ 4 0 4 0 ^

Mil Μ 1 1 0 Μ 1 2 M2 1 M2 1 0 M2 2 Μ 3 1 Μ 3 1 0 Μ 3 2 光棒Mil Μ 1 1 0 Μ 1 2 M2 1 M2 1 0 M2 2 Μ 3 1 Μ 3 1 0 Μ 3 2 Light rod

18 M325611 光棒 光棒18 M325611 Light Bar Light Bar

Claims (1)

M325611 九、申請專利範圍: 1、 一種具有高效率發光效果之發光二極體晶片封裝結 構,其包括: 一基板單元; 一發光單元,其具有複數個電性連接地設置於該基板 單元上之發光二極體晶片;以及 一封裝膠體單元,其具有複數個分別覆蓋於該等發光 二極體晶片上之封裝膠體。 2、 如申請專利範圍第1項所述之具有高效率發光效果之 發光二極體晶片封裝結構,其中該基板單元係為一印 刷電路板、一軟基板、一銘基板、一陶兗基板、或一 銅基板。 3、 如申請專利範圍第1項所述之具有高效率發光效果之 發光二極體晶片封裝結構,其中該基板單元係具有一 基板本體、及分別形成於該基板本體上之一正極導電 軌跡與一負極導電軌跡。 4、 如申請專利範圍第3項所述之具有高效率發光效果之 發光二極體晶片封裝結構,其中該基板本體係包括一 金屬層及一成形在該金屬層上之電木層(bakelite layer) 〇 5、 如申請專利範圍第3項所述之具有高效率發光效果之 發光二極體晶片封裝結構,其中該正、負極導電軌跡 係為鋁線路或銀線路。 20 M325611 6、 如申請專利範圍第3項所述之具有高效率發光效果之 發光二極體晶片封裝結構,其中每一個發先二極體晶 片係具有分別電性連接於該基板單元的正、負極導電 軌跡之一正極端與一負極端。 7、 如申請專利範圍第6項所述之具有高效率發光效果之 發光二極體晶片封裝結構,其中每一個發光二極體晶 片之正、負極端係透過兩相對應之導線並以打線 (wire_bounding)的方式,以與該正、負極導電軌跡 產生電性連接。 8、 如申請專利範圍第6項所述之具有高效率發光效果之 發光二極體晶片封裝結構,其中每一個發光二極體晶 片之正、負極端係透過複數個相對應之錫球並以覆晶 (flip-chip )的方式,以與該正、負極導電執跡產生電 性連接。 9、 如申請專利範圍第1項所述之具有高效率發光效果之 發光二極體晶片封裝結構,其中該等發光二極體晶片 係以一直線的排列方式設置於該基板單元上。 1 0、如申請專利範圍第1項所述之具有高效率發光效果 之發光二極體晶片封裝結構,其中該等發光二極體晶 片係以複數條直線的排列方式設置於該基板單元上。 1 1、如申請專利範圍第1項所述之具有高效率發光效果 之發光二極體晶片封裝結構,其中每一個封裝膠體係 為由一石夕膠(silicon )與一螢光粉(fluorescent powder ) 所混合形成之螢光膠體(fluorescent resin)。 21 M325611 1 2、如申請專利範圍第1項所述之具有高效率發光效果 之發光二極體晶片封裝結構,其中每一個封裝膠體係 為由一環氧樹脂(epoxy )與一螢光粉(fluorescent powder)所混合形成之螢光膠體(fluorescent resin)。 1 3、如申請專利範圍第1項所述之具有高效率發光效果 之發光二極體晶片封裝結構,更進一步包括:一框架 單元,其係為一層覆蓋於該基板單元上及包覆每一個 封裝膠體四周之框架層,以露出每一個封裝膠體之上 表面。 1 4、如申請專利範圍第1 3項所述之具有高效率發光效 果之發光二極體晶片封裝結構,其中該框架層係為不 透光框架層(opaque frame layer)。 1 5、如申請專利範圍第1 4項所述之具有高效率發光效 果之發光二極體晶片封裝結構,其中該不透光框架層 係為白色框架層(white frame layer)。 1 6、如申請專利範圍第1項所述之具有高效率發光效果 之發光二極體晶片封裝結構,更進一步包括:一框架 單元,其具有複數個分別圍繞該等封裝膠體之框體’ 以分別露出每一個封裝膠體之上表面’其中該等框體 係彼此分離地(separately)設置於該基板單元上。 1 7、如申請專利範圍第1 6項所述之具有高效率發光效 果之發光二極體晶片封裝結構,其中該等框體係為不 透光框體(opaque frame body ) 〇 22 M325611 1 8、如申請專利範圍第1 7項所述之具有高效率發光效 果之發光二極體晶片封裝結構,其中該等不透光框體 係為白色框體(white frame body )。 23M325611 IX. Patent application scope: 1. A light-emitting diode package structure having a high-efficiency illuminating effect, comprising: a substrate unit; an illuminating unit having a plurality of electrical connections disposed on the substrate unit a light emitting diode chip; and an encapsulant unit having a plurality of encapsulants respectively covering the LED chips. 2. The light-emitting diode package structure having high-efficiency light-emitting effect according to claim 1, wherein the substrate unit is a printed circuit board, a flexible substrate, a substrate, a ceramic substrate, Or a copper substrate. 3. The light emitting diode package structure of claim 1, wherein the substrate unit has a substrate body and a positive conductive track formed on the substrate body and A negative conductive track. 4. The light-emitting diode package structure having high-efficiency light-emitting effect according to claim 3, wherein the substrate system comprises a metal layer and a bakelite layer formed on the metal layer. The light-emitting diode package structure having the high-efficiency light-emitting effect described in claim 3, wherein the positive and negative conductive traces are aluminum lines or silver lines. 20 M325611. The light-emitting diode package structure having the high-efficiency light-emitting effect according to claim 3, wherein each of the first-level diode chips has a positive connection to the substrate unit. One of the anode conductive traces has a positive terminal and a negative terminal. 7. The light-emitting diode package structure having high-efficiency light-emitting effect according to claim 6, wherein the positive and negative ends of each of the light-emitting diode chips pass through two corresponding wires and are wired ( Wire_bounding) is electrically connected to the positive and negative conductive traces. 8. The light-emitting diode package structure having high-efficiency light-emitting effect according to claim 6, wherein the positive and negative ends of each of the light-emitting diode chips pass through a plurality of corresponding solder balls and A flip-chip approach to electrically connect the positive and negative conductive traces. 9. A light emitting diode package structure having a high efficiency illuminating effect as described in claim 1, wherein the light emitting diode chips are disposed on the substrate unit in a line arrangement. A light-emitting diode package structure having a high-efficiency light-emitting effect as described in claim 1, wherein the light-emitting diode wafers are disposed on the substrate unit in a plurality of linear alignments. 1 1. A light-emitting diode package structure having a high-efficiency illuminating effect as described in claim 1, wherein each of the encapsulant systems is a silicon powder and a fluorescent powder. The formed fluorescent resin is mixed. 21 M325611 1 2. The light-emitting diode package structure with high-efficiency illuminating effect as described in claim 1, wherein each of the encapsulant systems is composed of an epoxy resin and a phosphor powder ( Fluorescent powder) A fluorescent resin formed by mixing. The illuminating diode package structure having the high-efficiency illuminating effect as described in claim 1, further comprising: a frame unit covering the substrate unit and covering each of the substrates A frame layer surrounding the encapsulant is exposed to expose the upper surface of each encapsulant. A light-emitting diode package structure having a high-efficiency luminescent effect as described in claim 13 of the patent application, wherein the frame layer is an opaque frame layer. A light-emitting diode package structure having a high-efficiency illuminating effect as described in claim 14 wherein the opaque frame layer is a white frame layer. The light-emitting diode package structure having the high-efficiency illuminating effect as described in claim 1, further comprising: a frame unit having a plurality of frames respectively surrounding the encapsulants The upper surface of each of the encapsulants is exposed, respectively, wherein the frame systems are separately disposed on the substrate unit. The light-emitting diode package structure having the high-efficiency light-emitting effect as described in claim 16 of the patent application, wherein the frame system is an opaque frame body 〇22 M325611 18 A light-emitting diode package structure having a high-efficiency light-emitting effect as described in claim 17 wherein the opaque frame system is a white frame body. twenty three
TW096213817U 2007-08-20 2007-08-20 LED chip package structure with a high-efficiency light-emitting effect TWM325611U (en)

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DE202007015105U DE202007015105U1 (en) 2007-08-20 2007-10-29 Packaging structure of LED chips with high light emission performance
JP2007008424U JP3138755U (en) 2007-08-20 2007-10-31 A light emitting diode chip sealing structure having a high efficiency light emitting effect.

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CN101562139B (en) * 2008-04-15 2011-09-28 宏齐科技股份有限公司 Luminescence chip encapsulating structure for avoiding reducing luminous efficiency and manufacture method thereof
CN105552067A (en) * 2016-02-02 2016-05-04 上海鼎晖科技股份有限公司 COB LED light source

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TWI389294B (en) * 2008-03-07 2013-03-11 Harvatek Corp A package structure for manufacturing a light emitting diode chip which reduces the luminous efficiency of a phosphor due to high temperature and a method of manufacturing the same
TW201024602A (en) * 2008-12-31 2010-07-01 Jess Link Products Co Ltd Fully-covered type LED lamp strip and method for manufacturing the same
TW201025675A (en) * 2008-12-31 2010-07-01 Jess Link Products Co Ltd Light emitting diode light strip and method of making the same
JP2016189488A (en) * 2016-07-07 2016-11-04 日亜化学工業株式会社 Light emitting device

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101562139B (en) * 2008-04-15 2011-09-28 宏齐科技股份有限公司 Luminescence chip encapsulating structure for avoiding reducing luminous efficiency and manufacture method thereof
CN105552067A (en) * 2016-02-02 2016-05-04 上海鼎晖科技股份有限公司 COB LED light source

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