TWI816699B - Substrate inspection device and substrate inspection method - Google Patents
Substrate inspection device and substrate inspection method Download PDFInfo
- Publication number
- TWI816699B TWI816699B TW107133334A TW107133334A TWI816699B TW I816699 B TWI816699 B TW I816699B TW 107133334 A TW107133334 A TW 107133334A TW 107133334 A TW107133334 A TW 107133334A TW I816699 B TWI816699 B TW I816699B
- Authority
- TW
- Taiwan
- Prior art keywords
- wiring
- capacitance
- inter
- line
- substrate
- Prior art date
Links
- 239000000758 substrate Substances 0.000 title claims abstract description 167
- 238000007689 inspection Methods 0.000 title claims abstract description 147
- 238000000034 method Methods 0.000 title claims abstract description 48
- 239000000523 sample Substances 0.000 claims abstract description 57
- 230000008569 process Effects 0.000 claims description 33
- 238000005259 measurement Methods 0.000 claims description 12
- 230000007547 defect Effects 0.000 description 55
- 239000010410 layer Substances 0.000 description 41
- 230000002950 deficient Effects 0.000 description 30
- 239000004020 conductor Substances 0.000 description 25
- 238000004519 manufacturing process Methods 0.000 description 15
- 238000010586 diagram Methods 0.000 description 14
- 230000008859 change Effects 0.000 description 10
- 238000001514 detection method Methods 0.000 description 8
- 238000003860 storage Methods 0.000 description 8
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 4
- 230000007246 mechanism Effects 0.000 description 4
- 239000004065 semiconductor Substances 0.000 description 4
- 239000011889 copper foil Substances 0.000 description 3
- 239000012792 core layer Substances 0.000 description 3
- 230000007423 decrease Effects 0.000 description 3
- 238000005401 electroluminescence Methods 0.000 description 3
- 239000011810 insulating material Substances 0.000 description 3
- 239000000463 material Substances 0.000 description 3
- 239000003990 capacitor Substances 0.000 description 2
- 238000009413 insulation Methods 0.000 description 2
- 239000004973 liquid crystal related substance Substances 0.000 description 2
- 238000004806 packaging method and process Methods 0.000 description 2
- 230000004044 response Effects 0.000 description 2
- 229910000679 solder Inorganic materials 0.000 description 2
- 230000007704 transition Effects 0.000 description 2
- 235000012431 wafers Nutrition 0.000 description 2
- 229910000838 Al alloy Inorganic materials 0.000 description 1
- 229910000881 Cu alloy Inorganic materials 0.000 description 1
- 239000004593 Epoxy Substances 0.000 description 1
- 229910001069 Ti alloy Inorganic materials 0.000 description 1
- RTAQQCXQSZGOHL-UHFFFAOYSA-N Titanium Chemical compound [Ti] RTAQQCXQSZGOHL-UHFFFAOYSA-N 0.000 description 1
- 229910052782 aluminium Inorganic materials 0.000 description 1
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 1
- 239000000919 ceramic Substances 0.000 description 1
- 239000011247 coating layer Substances 0.000 description 1
- 229910052802 copper Inorganic materials 0.000 description 1
- 239000010949 copper Substances 0.000 description 1
- 238000005520 cutting process Methods 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 239000003822 epoxy resin Substances 0.000 description 1
- 238000005530 etching Methods 0.000 description 1
- 239000012467 final product Substances 0.000 description 1
- 239000011521 glass Substances 0.000 description 1
- 239000003365 glass fiber Substances 0.000 description 1
- 239000011229 interlayer Substances 0.000 description 1
- 238000010030 laminating Methods 0.000 description 1
- 238000004020 luminiscence type Methods 0.000 description 1
- 229910052751 metal Inorganic materials 0.000 description 1
- 239000002184 metal Substances 0.000 description 1
- 230000002093 peripheral effect Effects 0.000 description 1
- 229920000647 polyepoxide Polymers 0.000 description 1
- 239000000047 product Substances 0.000 description 1
- 229920005989 resin Polymers 0.000 description 1
- 239000011347 resin Substances 0.000 description 1
- 230000001568 sexual effect Effects 0.000 description 1
- 238000005476 soldering Methods 0.000 description 1
- 239000010935 stainless steel Substances 0.000 description 1
- 229910001220 stainless steel Inorganic materials 0.000 description 1
- 239000010936 titanium Substances 0.000 description 1
- 229910052719 titanium Inorganic materials 0.000 description 1
Classifications
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/28—Testing of electronic circuits, e.g. by signal tracer
- G01R31/2801—Testing of printed circuits, backplanes, motherboards, hybrid circuits or carriers for multichip packages [MCP]
- G01R31/281—Specific types of tests or tests for a specific type of fault, e.g. thermal mapping, shorts testing
- G01R31/2812—Checking for open circuits or shorts, e.g. solder bridges; Testing conductivity, resistivity or impedance
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R27/00—Arrangements for measuring resistance, reactance, impedance, or electric characteristics derived therefrom
- G01R27/02—Measuring real or complex resistance, reactance, impedance, or other two-pole characteristics derived therefrom, e.g. time constant
- G01R27/26—Measuring inductance or capacitance; Measuring quality factor, e.g. by using the resonance method; Measuring loss factor; Measuring dielectric constants ; Measuring impedance or related variables
- G01R27/2605—Measuring capacitance
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/28—Testing of electronic circuits, e.g. by signal tracer
- G01R31/2801—Testing of printed circuits, backplanes, motherboards, hybrid circuits or carriers for multichip packages [MCP]
- G01R31/2806—Apparatus therefor, e.g. test stations, drivers, analysers, conveyors
- G01R31/2808—Holding, conveying or contacting devices, e.g. test adapters, edge connectors, extender boards
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/28—Testing of electronic circuits, e.g. by signal tracer
- G01R31/2801—Testing of printed circuits, backplanes, motherboards, hybrid circuits or carriers for multichip packages [MCP]
- G01R31/281—Specific types of tests or tests for a specific type of fault, e.g. thermal mapping, shorts testing
- G01R31/2813—Checking the presence, location, orientation or value, e.g. resistance, of components or conductors
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/28—Testing of electronic circuits, e.g. by signal tracer
- G01R31/2832—Specific tests of electronic circuits not provided for elsewhere
- G01R31/2836—Fault-finding or characterising
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Testing Of Short-Circuits, Discontinuities, Leakage, Or Incorrect Line Connections (AREA)
- Non-Metallic Protective Coatings For Printed Circuits (AREA)
- Testing Or Measuring Of Semiconductors Or The Like (AREA)
- Manufacturing Of Printed Wiring (AREA)
Abstract
本發明提供一種基板檢查裝置以及基板檢查方法。基板檢查裝置(1)是對形成有相互鄰接並相向的配線(P1)、配線(P2)的基板(100)進行檢查的基板檢查裝置，具備：第一探針(Pr)，用於接觸配線(P1)的一端部；第二探針(Pr)，用於接觸配線(P2)的一端部；電容測定部(31)，經由第一探針(Pr)及第二探針(Pr)，而將配線(P1)與配線(P2)之間的靜電電容作為線間電容(Cx)來測定；以及第一判定部(22)，根據線間電容(Cx)來判定配線(P1)、配線(P2)中的至少一個配線的狀態。The invention provides a substrate inspection device and a substrate inspection method. The substrate inspection device (1) is a substrate inspection device that inspects a substrate (100) on which wirings (P1) and wirings (P2) are formed that are adjacent to each other and face each other, and includes a first probe (Pr) for contacting the wirings. One end of (P1); the second probe (Pr) for contacting one end of the wiring (P2); the capacitance measuring part (31), via the first probe (Pr) and the second probe (Pr), The electrostatic capacitance between the wiring (P1) and the wiring (P2) is measured as the inter-line capacitance (Cx); and the first determination unit (22) determines the wiring (P1) and the wiring based on the inter-line capacitance (Cx). The status of at least one wiring in (P2).
Description
本發明是有關於一種對基板進行檢查的基板檢查裝置及基板檢查方法。The present invention relates to a substrate inspection device and a substrate inspection method for inspecting a substrate.
從前以來，已知有如下的技術：使檢查對象的電路基板密接在上表面黏貼有絕緣膜的平板狀的電極的所述絕緣膜上，以測定形成在電路基板上表面的焊盤（land）與電極之間的靜電電容，並對所測定的靜電電容與從良品基板獲得的檢查用基準數據進行比較，由此檢查電路基板上表面的焊盤與電路基板下表面的焊盤之間的導通狀態（例如，參照日本專利公開公報特開2001-13192號公報）。Conventionally, a technique has been known in which a circuit board to be inspected is brought into close contact with an insulating film of a flat electrode having an insulating film attached to its upper surface, and a land formed on the upper surface of the circuit board is measured. and the electrostatic capacitance between the electrodes, and compares the measured electrostatic capacitance with inspection reference data obtained from a good substrate to inspect the continuity between the pads on the upper surface of the circuit board and the pads on the lower surface of the circuit board. status (for example, refer to Japanese Patent Application Publication No. 2001-13192).
但是，在所述技術中，形成在電路基板上表面的配線圖案與電極，相隔了將電路基板的厚度與絕緣膜的厚度相加所得的厚度而相對向，因此，配線圖案與電極的距離變長。配線圖案和電極之間產生的靜電電容與配線圖案和電極的距離成反比，因此，若配線圖案與電極的距離變長，則配線圖案與電極之間產生的靜電電容減少。However, in the above-mentioned technology, the wiring pattern and the electrode formed on the upper surface of the circuit board face each other with a distance equal to the thickness of the circuit board and the thickness of the insulating film. Therefore, the distance between the wiring pattern and the electrode becomes smaller. long. The electrostatic capacitance generated between the wiring pattern and the electrode is inversely proportional to the distance between the wiring pattern and the electrode. Therefore, as the distance between the wiring pattern and the electrode becomes longer, the electrostatic capacitance generated between the wiring pattern and the electrode decreases.
因此，形成在電路基板上表面的配線圖案與電極之間產生的靜電電容，變得比形成在電路基板下表面的配線圖案與電極之間產生的靜電電容小。其結果是，與對於形成在電路基板下表面的配線圖案的檢查精度相比，對於形成在電路基板上表面的配線圖案的檢查精度會下降。Therefore, the electrostatic capacitance generated between the wiring pattern formed on the upper surface of the circuit board and the electrode becomes smaller than the electrostatic capacitance generated between the wiring pattern formed on the lower surface of the circuit board and the electrode. As a result, the inspection accuracy of the wiring pattern formed on the upper surface of the circuit board decreases compared with the inspection accuracy of the wiring pattern formed on the lower surface of the circuit board.
本發明的目的在於，提供一種基板檢查裝置及基板檢查方法，可減少由配線圖案的位置所引起的檢查精度的變化。An object of the present invention is to provide a substrate inspection device and a substrate inspection method that can reduce changes in inspection accuracy caused by the position of a wiring pattern.
本發明的基板檢查裝置是對形成有相互鄰接並相向的第一配線與第二配線的基板進行檢查的基板檢查裝置，具備：第一探針，用於接觸所述第一配線的一端部；第二探針，用於接觸所述第二配線的一端部；電容測定部，經由所述第一探針及所述第二探針，而將所述第一配線與所述第二配線之間的靜電電容作為線間電容來測定；以及第一判定部，根據所述線間電容，來判定所述第一配線與所述第二配線中的至少一個的配線的狀態。A substrate inspection device according to the present invention is a substrate inspection device for inspecting a substrate on which first wirings and second wirings are formed adjacent to each other and facing each other, and includes: a first probe for contacting one end of the first wirings; The second probe is used to contact one end of the second wiring; the capacitance measuring part measures the first wiring and the second wiring through the first probe and the second probe. The electrostatic capacitance between the first wiring and the second wiring is measured as a line-to-line capacitance; and a first determination unit determines a wiring state of at least one of the first wiring and the second wiring based on the line-to-line capacitance.
另外，本發明的基板檢查方法是對形成有相互鄰接並相向的第一配線與第二配線的基板進行檢查的基板檢查方法，包括：（a）使第一探針接觸所述第一配線的一端部的工序；（b）使第二探針接觸所述第二配線的一端部的工序；（c）經由所述第一探針及所述第二探針，而將所述第一配線與所述第二配線之間的靜電電容作為線間電容來測定的工序；以及（d）根據所述線間電容，來判定所述第一配線與所述第二配線中的至少一個的配線的狀態的工序。In addition, the substrate inspection method of the present invention is a substrate inspection method for inspecting a substrate on which first wirings and second wirings are formed adjacent to each other and facing each other, and includes: (a) bringing a first probe into contact with the first wirings; the process of one end portion; (b) the process of contacting a second probe to one end portion of the second wiring; (c) connecting the first wiring to the first probe through the first probe and the second probe and (d) determining the wiring of at least one of the first wiring and the second wiring based on the inter-line capacitance. status process.
根據這些結構，測定相互鄰接並相向的第一配線與第二配線之間的線間電容，並根據所述線間電容來判定配線的狀態。在此情況下，不存在如背景技術般，在基板上表面的配線與基板下表面的配線中靜電電容變化的情況，因此，可減少由配線圖案的位置所引起的檢查精度的變化。According to these structures, the inter-line capacitance between the first wiring and the second wiring that are adjacent to each other and facing each other is measured, and the state of the wiring is determined based on the inter-line capacitance. In this case, unlike the background art, the electrostatic capacitance does not change between the wiring on the upper surface of the substrate and the wiring on the lower surface of the substrate. Therefore, changes in inspection accuracy caused by the position of the wiring pattern can be reduced.
另外，優選的是，當所述線間電容大於作為事先設定的範圍的上限值的線間上限值時，所述第一判定部判定所述第一配線與所述第二配線中的至少一個的配線的線寬為粗。In addition, it is preferable that when the inter-line capacitance is greater than an inter-line upper limit value which is an upper limit value of a preset range, the first determination unit determines whether the first wiring or the second wiring is The line width of at least one wiring line is thick.
根據此結構，在第一配線與第二配線中的至少一個配線的粗度脫離事先設定的範圍而變粗的情況下，可判定線寬為粗。According to this structure, when the thickness of at least one of the first wiring and the second wiring deviates from the preset range and becomes thicker, it can be determined that the line width is thick.
另外，優選的是，當所述線間電容小於作為事先設定的範圍的下限值的線間下限值時，所述第一判定部判定所述第一配線與所述第二配線中的至少一個的配線的線寬為細或為斷線不良。In addition, it is preferable that when the inter-line capacitance is less than an inter-line lower limit value which is a lower limit value of a preset range, the first determination unit determines whether the first wiring or the second wiring is At least one of the wiring lines has a thin line width or a broken wire.
根據此結構，在第一配線與第二配線中的至少一個配線的粗度，變得比事先設定的範圍細的情況或已斷線的情況下，可判定線寬為細或為斷線不良。According to this structure, when the thickness of at least one of the first wiring and the second wiring becomes thinner than a preset range or is broken, it can be determined that the line width is thin or that the line is broken. .
另外，優選的是，當所述線間電容小於作為事先設定的範圍的下限值的線間下限值、且大於事先設定為比所述線間下限值小的值的線間辨別值時，所述第一判定部判定所述第一配線與所述第二配線中的至少一個的配線的線寬為細，當所述線間電容小於所述線間辨別值時，所述第一判定部判定所述第一配線與所述第二配線中的至少一個的配線為斷線不良。In addition, it is preferable that when the inter-line capacitance is less than an inter-line lower limit value which is a lower limit value of a preset range and is greater than an inter-line discrimination value which is preset to a value smaller than the inter-line lower limit value When, the first determination unit determines that the line width of at least one of the first wiring and the second wiring is thin, and when the inter-line capacitance is smaller than the inter-line discrimination value, the third A determination unit determines that at least one of the first wiring and the second wiring has a disconnection defect.
根據此結構，可針對第一配線與第二配線中的至少一個配線，判定線寬為細或為斷線不良。According to this structure, it can be determined whether the line width is thin or has a disconnection defect for at least one of the first wiring and the second wiring.
另外，優選的是，進而具備：第一斷線位置推斷部，根據所述線間電容來推斷斷線的位置。In addition, it is preferable to further include a first disconnection position estimating unit for estimating the disconnection position based on the inter-line capacitance.
根據此結構，在第一配線與第二配線中的至少一個配線已斷線的情況下，可推斷其斷線位置。According to this structure, when at least one of the first wiring and the second wiring is disconnected, the disconnection position can be estimated.
另外，優選的是，所述第一斷線位置推斷部根據所述線間電容與事先設定的線間基準電容的比，來推斷斷線的位置。In addition, it is preferable that the first disconnection position estimating unit estimates the position of the disconnection based on a ratio of the inter-line capacitance to a preset inter-line reference capacitance.
根據此結構，可根據線間電容與線間基準電容的比來推斷斷線的位置，因此容易推斷斷線的位置。According to this structure, the position of the disconnection can be estimated based on the ratio of the inter-line capacitance and the inter-line reference capacitance, so it is easy to estimate the position of the disconnection.
另外，優選的是，所述電容測定部進而將以覆蓋所述基板的一側的面的方式相向配置的導體板與所述第一配線之間的靜電電容作為配線電容來測定，且所述基板檢查裝置進而具備：第二判定部，根據所述配線電容來判定所述第一配線的狀態。In addition, it is preferable that the capacitance measuring unit further measures an electrostatic capacitance between a conductor plate and the first wiring that are opposed to each other so as to cover one surface of the substrate, and the The substrate inspection device further includes a second determination unit that determines the state of the first wiring based on the wiring capacitance.
另外，優選的是，進而包括：（e）將以覆蓋所述基板的一側的面的方式相向配置的導體板與所述第一配線之間的靜電電容作為配線電容來測定的工序；以及（f）根據所述配線電容來判定所述第一配線的狀態的工序。Preferably, the method further includes: (e) a step of measuring, as a wiring capacitance, an electrostatic capacitance between a conductor plate and the first wiring that are opposed to each other so as to cover one surface of the substrate; and (f) The step of determining the state of the first wiring based on the wiring capacitance.
根據這些結構，測定導體板與第一配線之間的配線電容，並根據配線電容來判定第一配線的好壞，因此可判定第一配線的好壞。According to these structures, the wiring capacitance between the conductor plate and the first wiring is measured, and the quality of the first wiring is determined based on the wiring capacitance. Therefore, the quality of the first wiring can be determined.
另外，優選的是，當所述配線電容大於作為事先設定的範圍的上限值的配線上限值時，所述第二判定部判定所述第一配線的線寬為粗。In addition, it is preferable that the second determination unit determines that the line width of the first wiring is thick when the wiring capacitance is greater than a wiring upper limit value which is an upper limit of a preset range.
根據此結構，在第一配線的粗度變得比事先設定的範圍粗的情況下，可判定第一配線的線寬為粗。According to this structure, when the thickness of the first wiring becomes thicker than a preset range, it can be determined that the line width of the first wiring is thick.
另外，優選的是，當所述配線電容小於作為事先設定的範圍的下限值的配線下限值時，所述第二判定部判定所述第一配線的線寬為細或為斷線不良。In addition, it is preferable that when the wiring capacitance is less than a wiring lower limit value which is a lower limit value of a preset range, the second determination unit determines that the line width of the first wiring is thin or that the line is defective. .
根據此結構，在第一配線的粗度變細的情況或已斷線的情況下，可判定第一配線的線寬為細或為斷線不良。According to this structure, when the thickness of the first wiring becomes thin or when the first wiring is disconnected, it can be determined that the line width of the first wiring is thin or the disconnection is defective.
另外，優選的是，當所述配線電容小於作為事先設定的範圍的下限值的配線下限值、且大於事先設定為比所述配線下限值小的值的配線辨別值時，所述第二判定部判定所述第一配線的線寬為細，當所述配線電容小於所述配線辨別值時，所述第二判定部判定所述第一配線為斷線不良。In addition, it is preferable that when the wiring capacitance is smaller than a wiring lower limit value which is a lower limit value of a previously set range and is larger than a wiring discrimination value that is previously set to a smaller value than the wiring lower limit value, the The second determination unit determines that the line width of the first wiring is thin, and when the wiring capacitance is smaller than the wiring discrimination value, the second determination unit determines that the first wiring has a disconnection defect.
根據此結構，可針對第一配線，判定其為線寬細或斷線不良中的任一個。According to this structure, it can be determined that the first wiring has either a thin line width or a disconnection defect.
另外，優選的是，進而具備：第三判定部，根據所述第一判定部的判定結果與所述第二判定部的判定結果，判定產生了由所述第一判定部所判定的狀態的配線。In addition, it is preferable to further include: a third determination unit that determines that the state determined by the first determination unit occurs based on the determination result of the first determination unit and the determination result of the second determination unit. wiring.
根據此結構，可根據第一判定部的判定結果與第二判定部的判定結果，判定在第一配線及第二配線中的哪一個配線中產生了不良。According to this configuration, it is possible to determine which of the first wiring and the second wiring has a defect based on the determination result of the first determination unit and the determination result of the second determination unit.
另外，優選的是，進而具備：第二斷線位置推斷部，根據所述配線電容來推斷斷線的位置。In addition, it is preferable to further include a second disconnection position estimating unit for estimating the disconnection position based on the wiring capacitance.
根據此結構，在第一配線已斷線的情況下可推斷其斷線位置。According to this structure, when the first wiring is disconnected, the disconnection position can be estimated.
另外，優選的是，進而具備：存儲部，事先存儲將所述第一配線的斷線位置與對應於此斷線位置的所述配線電容建立對應的斷線電容信息，且所述第二斷線位置推斷部根據所述配線電容與所述斷線電容信息，來推斷斷線的位置。In addition, it is preferable to further include: a storage unit that stores in advance disconnection capacitance information that associates the disconnection position of the first wiring with the wiring capacitance corresponding to the disconnection position, and the second disconnection The line position estimation unit estimates the position of the broken line based on the wiring capacitance and the broken line capacitance information.
根據此結構，通過斷線電容信息來取得與由電容測定部所測定的配線電容建立了對應的斷線位置，由此可推斷斷線的位置，因此容易推斷斷線的位置。According to this configuration, the disconnection position associated with the wiring capacitance measured by the capacitance measuring unit is obtained from the disconnection capacitance information, and thereby the disconnection position can be estimated. Therefore, the disconnection position can be easily estimated.
另外，優選的是，進而具備：第三探針，用於接觸所述導體板，且所述導體板經由絕緣層而附著在所述基板的另一側的面上。In addition, it is preferable to further include a third probe for contacting the conductor plate, and the conductor plate is attached to the other surface of the substrate through an insulating layer.
根據此結構，所述導體板作為所述基板的一部分而附著，因此容易使導體板與第一配線之間的距離穩定。其結果是，容易提升配線電容的測定精度並提升好壞判定的精度。According to this structure, since the conductor plate is attached as a part of the substrate, the distance between the conductor plate and the first wiring can be easily stabilized. As a result, it is easy to improve the measurement accuracy of wiring capacitance and improve the accuracy of quality determination.
另外，優選的是，所述基板是不具有核心層的無核基板，且所述導體板是支撐所述基板的配線層的載體。In addition, it is preferable that the substrate is a coreless substrate without a core layer, and the conductor plate is a carrier that supports a wiring layer of the substrate.
另外，優選的是，進而包括：（1）將所述導體板用作載體，將所述導體板、絕緣層、所述第一配線及所述第二配線按此順序層疊，來形成基板的工序；以及（2）從所述基板去除所述導體板的工序；且在執行所述工序（1）之後、並在執行所述工序（2）之前，執行所述工序（e）。In addition, preferably, the method further includes: (1) using the conductor plate as a carrier, stacking the conductor plate, the insulating layer, the first wiring and the second wiring in this order to form a substrate the process; and (2) the process of removing the conductor plate from the substrate; and the process (e) is performed after performing the process (1) and before performing the process (2).
根據這些結構，在無核基板的製造過程中，可對去除載體前的製造途中的基板進行檢查。According to these structures, in the manufacturing process of a coreless substrate, it is possible to inspect the substrate in the middle of manufacturing before removing the carrier.
此種結構的基板檢查裝置及基板檢查方法，可減少由配線圖案的位置所引起的檢查精度的變化。The substrate inspection device and substrate inspection method with such a structure can reduce changes in inspection accuracy caused by the position of the wiring pattern.
以下，根據圖式對本發明的實施方式進行說明。另外，在各圖中標注同一個符號的結構表示同一個結構，並省略其說明。圖1是概略性地表示使用本發明的一實施方式的基板檢查方法的基板檢查裝置的結構的概念圖。圖1中所示的基板檢查裝置1是用以檢查形成在作為檢查對象物的一例的基板100上的電路圖案的裝置。Hereinafter, embodiments of the present invention will be described based on the drawings. In addition, the structures marked with the same symbols in each figure represent the same structure, and the description thereof will be omitted. FIG. 1 is a conceptual diagram schematically showing the structure of a substrate inspection apparatus using a substrate inspection method according to an embodiment of the present invention. The substrate inspection apparatus 1 shown in FIG. 1 is an apparatus for inspecting a circuit pattern formed on a substrate 100 which is an example of an inspection object.
基板100例如可為以下的各種基板：半導體封裝用的封裝基板或膜載體（film carrier）、印刷配線基板、玻璃環氧基板、柔性基板、陶瓷多層配線基板、液晶顯示器或電致發光（Electro-Luminescence，EL）顯示器等的顯示器用的電極板、觸控面板用等的透明導電板、半導體晶圓（wafer）或半導體晶片或晶片尺寸封裝（Chip Size Package，CSP）等的半導體基板。在基板100上形成有配線圖案、焊墊（pad）、焊盤、焊料凸塊（solder bump）、及端子等的檢查點。The substrate 100 may be, for example, any of the following substrates: a packaging substrate or film carrier for semiconductor packaging, a printed wiring substrate, a glass epoxy substrate, a flexible substrate, a ceramic multilayer wiring substrate, a liquid crystal display, or an electroluminescence (electro-luminescence) substrate. Electrode plates for displays such as Luminescence (EL) displays, transparent conductive plates for touch panels, etc., semiconductor wafers or semiconductor substrates such as semiconductor wafers or Chip Size Packages (CSP). Inspection points such as wiring patterns, pads, pads, solder bumps, and terminals are formed on the substrate 100 .
圖1中所示的基板檢查裝置1具有框體11。在框體11的內部空間中，主要設置有：基板固定裝置12、檢查部3U、檢查部3L、及控制部2。在框體11的外壁面等上，安裝有顯示部5（報告部）。基板固定裝置12以將成為檢查對象的基板100固定在規定的位置的方式構成。The substrate inspection device 1 shown in FIG. 1 has a housing 11 . In the internal space of the frame 11, the substrate fixing device 12, the inspection part 3U, the inspection part 3L, and the control part 2 are mainly provided. The display unit 5 (reporting unit) is attached to the outer wall surface of the housing 11 and the like. The substrate fixing device 12 is configured to fix the substrate 100 to be inspected at a predetermined position.
檢查部3U位於固定在基板固定裝置12的基板100的上方。檢查部3L位於固定在基板固定裝置12上的基板100的下方。檢查部3U及檢查部3L具備電極板9，所述電極板9形成有用於與探針Pr進行電性連接的電極。在檢查部3U及檢查部3L的各電極板9上，安裝有用於檢查形成在基板100上的電路圖案的檢查夾具4U、檢查夾具4L。在檢查夾具4U、檢查夾具4L上安裝有多個探針Pr。另外，檢查部3U及檢查部3L具備：後述的電容測定部31、後述的掃描器部34、及用於在框體11內適宜移動的檢查部移動機構15。掃描器部34對電容測定部31與各探針Pr的連接關係進行切換。The inspection unit 3U is located above the substrate 100 fixed to the substrate fixing device 12 . The inspection unit 3L is located below the substrate 100 fixed on the substrate fixing device 12 . The inspection part 3U and the inspection part 3L are equipped with the electrode plate 9 in which the electrode for electrical connection with the probe Pr is formed. Inspection jig 4U and inspection jig 4L for inspecting the circuit pattern formed on the substrate 100 are mounted on each electrode plate 9 of the inspection part 3U and the inspection part 3L. A plurality of probes Pr are attached to the inspection jig 4U and the inspection jig 4L. In addition, the inspection part 3U and the inspection part 3L are equipped with the capacitance measuring part 31 mentioned later, the scanner part 34 mentioned later, and the inspection part moving mechanism 15 for moving suitably within the housing 11. The scanner unit 34 switches the connection relationship between the capacitance measurement unit 31 and each probe Pr.
檢查部3U、檢查部3L彼此相同地構成。以下，將檢查部3U、檢查部3L總稱為檢查部3。檢查夾具4U、檢查夾具4L彼此相同地構成。以下，將檢查夾具4U、檢查夾具4L總稱為檢查夾具4。The inspection unit 3U and the inspection unit 3L are configured identically to each other. Hereinafter, the inspection part 3U and the inspection part 3L are collectively called the inspection part 3. The inspection jig 4U and the inspection jig 4L are configured identically to each other. Hereinafter, the inspection jig 4U and the inspection jig 4L are collectively referred to as the inspection jig 4 .
圖2是概念性地表示圖1中所示的控制部2的結構的一例的方塊圖。控制部2例如使用微電腦來構成，所述微電腦具備：執行規定的邏輯運算的中央處理器（Central Processing Unit，CPU）、暫時地存儲數據的隨機存取記憶體（Random Access Memory，RAM）、事先存儲規定的控制程式等的非揮發性的記憶裝置、及它們的周邊電路等。所述記憶裝置也可以用作存儲部27。FIG. 2 is a block diagram conceptually showing an example of the structure of the control unit 2 shown in FIG. 1 . The control unit 2 is configured using, for example, a microcomputer equipped with a central processing unit (CPU) that performs predetermined logical operations, a random access memory (Random Access Memory, RAM) that temporarily stores data, and a Non-volatile memory devices that store prescribed control programs, etc., and their peripheral circuits, etc. The memory device may also be used as the storage unit 27 .
控制部2例如通過執行所述控制程式，而作為檢查控制部21、第一判定部22、第一斷線位置推斷部23、第二判定部24、第二斷線位置推斷部25、及第三判定部26發揮功能。For example, by executing the control program, the control unit 2 functions as the inspection control unit 21, the first determination unit 22, the first disconnection position estimation unit 23, the second determination unit 24, the second disconnection position estimation unit 25, and the third disconnection position estimation unit 25. The third determination unit 26 functions.
例如，以實驗方式測定如下的值，並事先存儲在存儲部27中：作為相互鄰接的一對正常的配線P間的靜電電容的線間基準電容Cx_ref；考慮線間基準電容Cx_ref的偏差或測定誤差等所決定的正常的範圍的、作為上限值的線間上限值Cx_lim_U及作為下限值的線間下限值Cx_lim_L；以及作為辨別線寬細的不良與斷線的閾值的、事先設定為比線間下限值Cx_lim_L小的值的線間辨別值Cx_lim_LL。另外，線間上限值Cx_lim_U與線間下限值Cx_lim_L也可以是相同的值，例如，也可以將線間基準電容Cx_ref直接用作線間上限值Cx_lim_U及線間下限值Cx_lim_L。For example, the following values are experimentally measured and stored in the storage unit 27 in advance: the inter-line reference capacitance Cx_ref which is the electrostatic capacitance between a pair of normal wirings P adjacent to each other; the deviation or measurement of the inter-line reference capacitance Cx_ref is taken into account The inter-line upper limit value Cx_lim_U as the upper limit value and the inter-line lower limit value Cx_lim_L as the lower limit value are the normal range determined by errors, etc.; and the pre-set threshold value for distinguishing defects and disconnections with thin line widths. The inter-line discrimination value Cx_lim_LL is set to a value smaller than the inter-line lower limit value Cx_lim_L. In addition, the inter-line upper limit value Cx_lim_U and the inter-line lower limit value Cx_lim_L may also be the same value. For example, the inter-line reference capacitance Cx_ref may also be directly used as the inter-line upper limit value Cx_lim_U and the inter-line lower limit value Cx_lim_L.
另外，例如實際使用線寬正常的基板與線寬已變細的基板以實驗方式測定如下的值，並事先存儲在存儲部27中：作為正常的一根配線P與載體101之間的靜電電容的配線基準電容Cz_ref；考慮配線基準電容Cz_ref的偏差或測定誤差等所決定的正常的範圍的、作為上限值的配線上限值Cz_lim_U及作為下限值的配線下限值Cz_lim_L；以及作為辨別線寬細的不良與斷線的閾值的、事先設定為比配線下限值Cz_lim_L小的值的配線辨別值Cz_lim_LL。另外，配線上限值Cz_lim_U與配線下限值Cz_lim_L也可以是相同的值，例如，也可以將配線基準電容Cz_ref直接用作配線上限值Cz_lim_U及配線下限值Cz_lim_L。In addition, for example, by actually using a substrate with a normal line width and a substrate with a thinned line width, the following values are experimentally measured and stored in the storage unit 27 in advance: as the electrostatic capacitance between a normal wiring P and the carrier 101 The wiring reference capacitance Cz_ref; the wiring upper limit value Cz_lim_U as the upper limit value and the wiring lower limit value Cz_lim_L as the lower limit value in the normal range determined by taking into account the deviation or measurement error of the wiring reference capacitance Cz_ref; and as the discrimination The wiring discrimination value Cz_lim_LL is set in advance to a value smaller than the wiring lower limit value Cz_lim_L, which is a threshold value for defects and disconnections with a thin line width. In addition, the wiring upper limit value Cz_lim_U and the wiring lower limit value Cz_lim_L may be the same value. For example, the wiring reference capacitance Cz_ref may be directly used as the wiring upper limit value Cz_lim_U and the wiring lower limit value Cz_lim_L.
線間基準電容Cx_ref、線間上限值Cx_lim_U、線間下限值Cx_lim_L、線間辨別值Cx_lim_LL、配線基準電容Cz_ref、配線上限值Cz_lim_U、配線下限值Cz_lim_L、配線辨別值Cz_lim_LL，是根據配線P的長度、寬度、間隔、層疊配線層106的厚度、預浸料102（prepreg）的厚度等而變化，作為一例，線間基準電容Cx_ref為100 fF左右，配線基準電容Cz_ref為900 fF左右，配線辨別值Cz_lim_LL為600 fF左右。The inter-line reference capacitance Cx_ref, the inter-line upper limit value Cx_lim_U, the inter-line lower limit value Cx_lim_L, the inter-line discrimination value Cx_lim_LL, the wiring reference capacitance Cz_ref, the wiring upper limit value Cz_lim_U, the wiring lower limit value Cz_lim_L, the wiring discrimination value Cz_lim_LL, are based on The length, width, and spacing of the wiring P, the thickness of the laminated wiring layer 106, the thickness of the prepreg 102, etc. vary. As an example, the inter-line reference capacitance Cx_ref is about 100 fF, and the wiring reference capacitance Cz_ref is about 900 fF. , the wiring discrimination value Cz_lim_LL is about 600 fF.
進而，例如以實驗方式測定將配線P的斷線位置與對應於此斷線位置的配線電容Cz建立了對應的斷線電容信息，並事先存儲在存儲部27中。Furthermore, the disconnection capacitance information that associates the disconnection position of the wiring P with the wiring capacitance Cz corresponding to the disconnection position is measured experimentally, for example, and is stored in the storage unit 27 in advance.
顯示部5例如為液晶顯示裝置或EL（ElectroLuminescence）顯示裝置等的顯示裝置。顯示部5對應於來自控制部2的控制信號，而顯示基板的檢查結果等。The display unit 5 is, for example, a display device such as a liquid crystal display device or an EL (ElectroLuminescence) display device. The display unit 5 displays the inspection results of the substrate and the like in response to the control signal from the control unit 2 .
檢查控制部21使檢查部3U、檢查部3L適宜移動，並使檢查夾具4U、檢查夾具4L的各探針Pr接觸固定在基板固定裝置12上的基板100的各檢查點，且利用後述的掃描器部34使對應於檢查對象的檢查點的探針Pr與後述的電容測定部31連接。The inspection control part 21 moves the inspection part 3U and the inspection part 3L appropriately, makes each probe Pr of the inspection jig 4U, and the inspection jig 4L contact each inspection point of the board|substrate 100 fixed to the board|substrate fixing device 12, and uses the scanning which will be mentioned later. The instrument unit 34 connects the probe Pr corresponding to the inspection point of the inspection object to the capacitance measurement unit 31 described later.
圖3是用以說明成為檢查對象的基板100的製造方法的一例的說明圖。在圖3中，利用在厚度方向上切斷基板100所得的剖面圖，來表示基板100的製造過程。基板100是在作為不存在核心層的所謂的無核基板（coreless）的基板100a的製造過程中，剝離支撐體用的載體101之前的基板。換句話說，基板100是在作為最終製品的基板100a上附著有載體101的狀態的基板。作為此種無核基板的製造方法，可使用各種方法，作為一例，例如可使用國際專利公開公報WO2015/122258中記載的製造方法。另外，在國際專利公開公報WO2015/122258的圖1中僅圖示了基本的工序，例如省略了將層間連接的通孔（via）的形成工序、或形成用於將零件連接在基板表面上的焊墊的工序、或將零件安裝在基板上的工序等。FIG. 3 is an explanatory diagram for explaining an example of a method of manufacturing the substrate 100 to be inspected. In FIG. 3 , a cross-sectional view obtained by cutting the substrate 100 in the thickness direction is used to illustrate the manufacturing process of the substrate 100 . The substrate 100 is a substrate before the carrier 101 for a support body is peeled off in the manufacturing process of the substrate 100 a which is a so-called coreless substrate without a core layer. In other words, the substrate 100 is a substrate in which the carrier 101 is attached to the substrate 100 a as a final product. As a manufacturing method of such a core-free substrate, various methods can be used. As an example, the manufacturing method described in International Patent Publication WO2015/122258 can be used. In addition, FIG. 1 of International Patent Publication WO2015/122258 only illustrates basic steps, and for example, the step of forming vias (vias) for connecting interlayers or forming vias for connecting parts to the surface of the substrate is omitted. The process of soldering pads or the process of mounting parts on the substrate, etc.
無核基板由於不具備核心層，因此缺乏剛性，在無核基板的製造工序中容易破損。因此，已知有如下的無核基板的製造方法：將用於在製造工序中支撐配線層的板狀的載體用作支撐體，在載體上形成配線層後，將載體剝離。Since the coreless substrate does not have a core layer, it lacks rigidity and is easily damaged during the manufacturing process of the coreless substrate. Therefore, a method of manufacturing a coreless substrate is known that uses a plate-shaped carrier for supporting a wiring layer in the manufacturing process as a support, forms the wiring layer on the carrier, and then peels off the carrier.
在圖3中所示的無核基板的製造方法中，首先，將片狀的預浸料102貼合在片狀的載體101上（工序K1）。作為載體101，例如可使用：銅、銅合金、鋁、鋁合金、不銹鋼、鈦、鈦合金等各種導電性的箔狀的金屬板。載體101並不限定於一層，也可以將一種或多種材料層疊來形成。In the method of manufacturing a coreless substrate shown in FIG. 3 , first, the sheet-shaped prepreg 102 is bonded to the sheet-shaped carrier 101 (step K1 ). As the carrier 101, for example, various conductive foil-shaped metal plates such as copper, copper alloy, aluminum, aluminum alloy, stainless steel, titanium, and titanium alloy can be used. The carrier 101 is not limited to one layer, and may also be formed by laminating one or more materials.
預浸料102包含：環氧樹脂等的樹脂材料、或玻璃纖維等的絕緣材料。載體101相當於導體板的一例，預浸料102相當於絕緣層的一例。另外，未必限定於將載體101與預浸料102層疊的例子。也可以形成材質與預浸料不同的絕緣層，來代替預浸料102。The prepreg 102 contains a resin material such as epoxy resin or an insulating material such as glass fiber. The carrier 101 corresponds to an example of a conductor plate, and the prepreg 102 corresponds to an example of an insulating layer. In addition, it is not necessarily limited to the example in which the carrier 101 and the prepreg 102 are laminated. An insulating layer made of a different material from the prepreg may be formed instead of the prepreg 102 .
繼而，將用於形成配線的銅箔103黏貼在預浸料102的與載體101相反側的表面上（工序K2）。繼而，對銅箔103進行蝕刻來形成多個配線P（工序K3）。多個配線P大致平行地延伸設置。繼而，以覆蓋多個配線P的方式，形成包含與預浸料102相同的絕緣材料的預浸料104（工序K4）。通過工序K2～工序K4的配線層形成工序，而形成配線P由絕緣材料覆蓋的第一層的配線層105。Next, the copper foil 103 for forming wiring is adhered to the surface of the prepreg 102 opposite to the carrier 101 (step K2). Next, the copper foil 103 is etched to form a plurality of wirings P (step K3). The plurality of wirings P extend substantially in parallel. Next, the prepreg 104 containing the same insulating material as the prepreg 102 is formed so as to cover the plurality of wirings P (step K4 ). Through the wiring layer forming steps of steps K2 to K4, the wiring layer 105 of the first layer in which the wiring P is covered with an insulating material is formed.
繼而，針對配線層105的與預浸料102相反側的表面，重複與工序K2～工序K4相同的配線層形成工序，由此形成第二層的配線層105（工序K5）。如此層疊多個配線層105，而形成層疊配線層106。由此，形成層疊有載體101、預浸料102、及層疊配線層106的基板100。Next, the same wiring layer forming process as steps K2 to K4 is repeated with respect to the surface of the wiring layer 105 on the opposite side to the prepreg 102 , thereby forming the second wiring layer 105 (step K5 ). The plurality of wiring layers 105 are stacked in this way to form a stacked wiring layer 106. Thereby, the substrate 100 in which the carrier 101, the prepreg 102, and the laminated wiring layer 106 are laminated|stacked is formed.
在圖3中，省略了將配線P在層間連接的通孔等的連接部的形成工序、或在基板100a的最外層（圖3中為上表面與下表面）使配線P的一部分露出而形成連接了零件等的焊墊等的工序的記載等。另外，在基板100a的最外面，覆蓋了配線P來防止配線P露出的層並不限定於預浸料，也可以是抗蝕劑（resist）等的片材或塗佈層。另外，配線層105的層疊數並不限定於兩層，也可以是一層，也可以是三層以上。In FIG. 3 , the process of forming a connecting portion such as a through hole that connects the wiring P between layers is omitted, or a part of the wiring P is exposed on the outermost layer (the upper surface and the lower surface in FIG. 3 ) of the substrate 100 a. Description of the process of connecting pads etc. of parts, etc. In addition, the layer that covers the wiring P and prevents the wiring P from being exposed on the outermost surface of the substrate 100 a is not limited to a prepreg, and may be a sheet such as resist or a coating layer. In addition, the number of stacked wiring layers 105 is not limited to two layers, and may be one layer, or three or more layers.
工序K1～工序K5相當於工序（1）的一例。例如，將通過此工序K5所形成的基板100安裝在基板固定裝置12上，利用基板檢查裝置1執行檢查。而且，對檢查結果為良好的基板100，執行以下的載體去除工序（工序K6）。在載體去除工序（工序K6）中，從基板100上剝離載體101或進行蝕刻，由此去除載體101，製成作為最終的完成品的基板100a。Processes K1 to K5 correspond to an example of process (1). For example, the substrate 100 formed in this step K5 is mounted on the substrate fixing device 12 and inspected using the substrate inspection device 1 . Then, the following carrier removal process (process K6) is performed on the substrate 100 with a good inspection result. In the carrier removal process (process K6), the carrier 101 is removed from the substrate 100 by peeling off the carrier 101 or performing etching, thereby producing the substrate 100a as a final finished product.
如此，在工序K5之後、工序K6之前，執行包含載體101的基板100的檢查，對檢查結果為良好的基板100執行工序K6，對檢查結果為不良的基板100不執行工序K6，由此，與對基板100a執行檢查的情況相比，可減少基板的製造工作量。In this way, after the process K5 and before the process K6, the substrate 100 including the carrier 101 is inspected, the substrate 100 with a good inspection result is subjected to the process K6, and the process K6 is not performed with respect to the substrate 100 with a defective inspection result. Therefore, with Compared with the case where the substrate 100a is inspected, the manufacturing workload of the substrate can be reduced.
另外，也可以在執行了包含載體101的基板100的檢查之後、通過工序K6來去除載體101之前，將積體電路（Integrated Circuit，IC）等的零件安裝在基板100上。另外，在工序K6中，也可以不僅去除載體101，也去除預浸料102。In addition, components such as integrated circuits (ICs) may be mounted on the substrate 100 after the substrate 100 including the carrier 101 is inspected and before the carrier 101 is removed in step K6 . In addition, in step K6, not only the carrier 101 but also the prepreg 102 may be removed.
圖4是概念性地表示圖1中所示的基板檢查裝置1的結構的說明圖。圖4表示在基板檢查裝置1上安裝有檢查對象的基板100的狀態。圖4中所示的基板檢查裝置1具備：電容測定部31、掃描器部34、及多個探針Pr。電容測定部31具備：交流電壓源32、電流檢測部33、及端子T1、端子T2。在圖4中省略了控制部2的記載。FIG. 4 is an explanatory diagram conceptually showing the structure of the substrate inspection device 1 shown in FIG. 1 . FIG. 4 shows a state in which the substrate 100 to be inspected is mounted on the substrate inspection apparatus 1 . The substrate inspection apparatus 1 shown in FIG. 4 includes a capacitance measurement unit 31, a scanner unit 34, and a plurality of probes Pr. The capacitance measurement unit 31 includes an AC voltage source 32, a current detection unit 33, and terminals T1 and T2. In FIG. 4 , the description of the control unit 2 is omitted.
在基板100上，形成有相互大致平行地延長的多個配線P。以下，對作為各配線P中的兩根的配線P1（第一配線）與配線P2（第二配線）進行說明，其他配線P3、P4與配線P1、配線P2同樣地構成，因此，省略其說明。配線P1、配線P2具有：第一部分L11、第一部分L21，形成在基板100的圖4中的上表面（另一側的面）上；焊墊Pd12、焊墊Pd22及第二部分L12、第二部分L22，形成在圖4中的層疊配線層106的下表面（基板100的一側的面側）上；以及貫穿配線L13、貫穿配線L23，貫穿層疊配線層106並將第一部分L11、第一部分L21與第二部分L12、第二部分L22相接。On the substrate 100, a plurality of wirings P extending substantially parallel to each other are formed. Hereinafter, the wiring P1 (first wiring) and wiring P2 (second wiring), which are two of each wiring P, will be described. The other wirings P3 and P4 are configured in the same manner as the wiring P1 and the wiring P2, and therefore their description will be omitted. . The wiring P1 and the wiring P2 have: a first part L11 and a first part L21 formed on the upper surface (the other side surface) of the substrate 100 in FIG. 4 ; a bonding pad Pd12 and a bonding pad Pd22 and a second part L12 and a second The portion L22 is formed on the lower surface (the surface side of the substrate 100) of the laminated wiring layer 106 in FIG. 4; and the through wiring L13 and the through wiring L23 penetrate the laminated wiring layer 106 and connect the first portion L11 L21 is connected to the second part L12 and the second part L22.
配線P1的第一部分L11的一端部被加寬而作為焊墊Pd11，配線P1的第二部分L12的一端部被加寬而作為焊墊Pd12，配線P2的第一部分L21的一端部被加寬而作為焊墊Pd21，配線P2的第二部分L22的一端部被加寬而作為焊墊Pd22。第一部分L11的另一端部與第二部分L12的另一端部通過貫穿配線L13來連接，第一部分L21的另一端部與第二部分L22的另一端部通過貫穿配線L23來連接。One end of the first portion L11 of the wiring P1 is widened to serve as a bonding pad Pd11, one end of the second portion L12 of the wiring P1 is widened to serve as a bonding pad Pd12, and one end of the first portion L21 of the wiring P2 is widened to serve as a bonding pad Pd11. As the bonding pad Pd21, one end portion of the second portion L22 of the wiring P2 is widened to serve as the bonding pad Pd22. The other end of the first part L11 and the other end of the second part L12 are connected by a through wiring L13, and the other end of the first part L21 and the other end of the second part L22 are connected by a through wiring L23.
檢查夾具4U的探針Pr分別接觸了包含焊墊Pd11、焊墊Pd21的基板100的圖4中的上表面上所形成的各焊墊。檢查夾具4L的探針Pr接觸了成為基板100的圖4中的下表面的載體101。在此情況下，接觸焊墊Pd11的探針Pr相當於第一探針，接觸焊墊Pd21的探針Pr相當於第二探針，接觸載體101的探針Pr相當於第三探針。The probe Pr of the inspection jig 4U comes into contact with each of the bonding pads formed on the upper surface of the substrate 100 in FIG. 4 including the bonding pad Pd11 and the bonding pad Pd21. The probe Pr of the inspection jig 4L contacts the carrier 101 which becomes the lower surface of the substrate 100 in FIG. 4 . In this case, the probe Pr contacting the pad Pd11 corresponds to the first probe, the probe Pr contacting the pad Pd21 corresponds to the second probe, and the probe Pr contacting the carrier 101 corresponds to the third probe.
交流電壓源32是輸出交流頻率f的規定的電壓V的交流電源電路。交流電壓源32的一側的輸出端子經由端子T1而與掃描器部34連接，交流電壓源32的另一側的輸出端子經由電流檢測部33與端子T2而與掃描器部34連接。The AC voltage source 32 is an AC power circuit that outputs a predetermined voltage V at an AC frequency f. One output terminal of the AC voltage source 32 is connected to the scanner unit 34 via the terminal T1 , and the other output terminal of the AC voltage source 32 is connected to the scanner unit 34 via the current detection unit 33 and the terminal T2 .
電流檢測部33例如為使用分流電阻（shunt resistor）、霍爾元件、類比數位轉換器等所構成的交流電流計。電流檢測部33檢測從交流電壓源32中輸出的電流I，即在作為配線P1、配線P2間的靜電電容的線間電容Cx中流動的電流Ix，或在作為配線P1與載體101之間的靜電電容的配線電容Cz中流動的電流Iz。電壓V及電流I可以是有效值，也可以是峰值。The current detection unit 33 is, for example, an AC ammeter configured using a shunt resistor, a Hall element, an analog-to-digital converter, or the like. The current detection unit 33 detects the current I output from the AC voltage source 32 , that is, the current Ix flowing in the interline capacitance Cx as the electrostatic capacitance between the wiring P1 and the wiring P2 , or the current Ix as the electrostatic capacitance between the wiring P1 and the carrier 101 . The current Iz flowing in the wiring capacitance Cz of the electrostatic capacitor. Voltage V and current I may be effective values or peak values.
在頻率f的電壓V被施加至靜電電容中時電流I已流動的情況下，靜電電容C通過下述的式（1）來求出。 靜電電容C＝I /（V×2πf）・・・（1）When the voltage V of the frequency f is applied to the electrostatic capacitor and the current I flows, the electrostatic capacitance C is determined by the following equation (1). Electrostatic capacitance C=I/(V×2πf)・・・(1)
在此情況下，由於V及2πf已知，因此，只要可獲得電流I，便知道靜電電容C。因此，電容測定部31可測定靜電電容C。另外，檢查控制部21可根據由電流檢測部33所檢測到的電流I並基於式（1）來算出靜電電容C，也可以將電流I直接用作表示靜電電容C的信息。以下，將檢查控制部21根據由電流檢測部33所檢測到的電流I來算出靜電電容C的情況包含在內，記載為電容測定部31測定靜電電容C。In this case, since V and 2πf are known, the electrostatic capacitance C is known as long as the current I is available. Therefore, the capacitance measuring unit 31 can measure the electrostatic capacitance C. In addition, the inspection control unit 21 may calculate the electrostatic capacitance C based on the equation (1) from the current I detected by the current detection unit 33 , or may directly use the current I as information indicating the electrostatic capacitance C. In the following, including the case where the inspection control unit 21 calculates the electrostatic capacitance C based on the current I detected by the current detection unit 33 , it will be described as the capacitance measuring unit 31 measuring the electrostatic capacitance C.
掃描器部34例如使用電晶體等的多個開關元件來構成。掃描器部34對應於來自檢查控制部21的控制信號，使端子T1、端子T2分別與檢查夾具4U、檢查夾具4L的多個探針Pr中的任一個導通連接。在圖4中，對掃描器部34的說明進行簡化，僅記載與接觸配線P1、配線P2及載體101的探針Pr和電容測定部31的連接相關的開關元件SW1、開關元件SW2、開關元件SW3，省略了其他開關元件等的記載。The scanner unit 34 is configured using a plurality of switching elements such as transistors. The scanner unit 34 electrically connects the terminal T1 and the terminal T2 to any one of the plurality of probes Pr of the inspection jig 4U and the inspection jig 4L, respectively, in response to the control signal from the inspection control unit 21 . In FIG. 4 , the description of the scanner unit 34 is simplified, and only the switching elements SW1 , SW2 , and switching elements related to the connection between the probe Pr that contacts the wiring P1 , the wiring P2 , and the carrier 101 and the capacitance measurement unit 31 are described. SW3, description of other switching elements, etc. is omitted.
檢查控制部21從多個配線P之中，選擇成為檢查對象的兩根配線P1、P2。而且，檢查控制部21通過掃描器部34，使端子T1經由開關元件SW1而與接觸了配線P1的探針Pr連接。另外，檢查控制部21通過掃描器部34，使端子T2經由開關元件SW2而與接觸了配線P2的探針Pr連接，並使端子T2經由開關元件SW3而與接觸了載體101的探針Pr連接。The inspection control unit 21 selects two wirings P1 and P2 to be inspected from among the plurality of wirings P. Furthermore, the inspection control unit 21 uses the scanner unit 34 to connect the terminal T1 to the probe Pr in contact with the wiring P1 via the switching element SW1. In addition, the inspection control unit 21 uses the scanner unit 34 to connect the terminal T2 to the probe Pr that contacts the wiring P2 via the switching element SW2, and connects the terminal T2 to the probe Pr that contacts the carrier 101 via the switching element SW3. .
檢查控制部21控制開關元件SW1、開關元件SW2、開關元件SW3的接通（ON）、斷開（OFF），通過電容測定部31來測定線間電容Cx及配線電容Cz。第一判定部22根據線間電容Cx，判定配線P1、配線P2的狀態，例如線寬粗、線寬細、斷線、良好、不良等的狀態。第一斷線位置推斷部23根據線間電容Cx，推斷配線P1、配線P2的斷線位置。第二判定部24根據配線電容Cz，判定配線P1的狀態，例如線寬粗、線寬細、斷線、良好、不良等的狀態。第二斷線位置推斷部25根據配線電容Cz，推斷配線P1的斷線的位置。第三判定部26根據第一判定部22的判定結果與第二判定部24的判定結果，判定配線P1、配線P2之中產生了由第一判定部22所判定的狀態的配線。The inspection control unit 21 controls the switching elements SW1 , SW2 , and SW3 to be turned on and off, and the capacitance measuring unit 31 measures the line-to-line capacitance Cx and the wiring capacitance Cz. The first determination unit 22 determines the status of the wiring P1 and the wiring P2 based on the inter-line capacitance Cx, such as thick line width, thin line width, disconnection, good condition, defective condition, etc. The first disconnection position estimating unit 23 estimates the disconnection positions of the wiring P1 and the wiring P2 based on the inter-line capacitance Cx. The second determination unit 24 determines the state of the wiring P1 based on the wiring capacitance Cz, such as thick line width, thin line width, disconnection, good condition, defective condition, etc. The second disconnection position estimation unit 25 estimates the disconnection position of the wiring P1 based on the wiring capacitance Cz. The third determination unit 26 determines, based on the determination result of the first determination unit 22 and the determination result of the second determination unit 24, that the state determined by the first determination unit 22 occurs among the wiring P1 and the wiring P2.
通過將如基板100般的層疊配線層106、預浸料102、及載體101成為一體的基板作為檢查對象，配線P1與載體101的距離不變，因此，配線電容Cz穩定。其結果是，根據配線電容Cz的第二判定部24的判定精度提升，根據第一判定部22與第二判定部24的判定結果的第三判定部26的判定精度提升。By using a substrate such as the substrate 100 in which the wiring layer 106, the prepreg 102, and the carrier 101 are integrated as an inspection object, the distance between the wiring P1 and the carrier 101 does not change, so the wiring capacitance Cz is stable. As a result, the determination accuracy of the second determination unit 24 based on the wiring capacitance Cz is improved, and the determination accuracy of the third determination unit 26 based on the determination results of the first determination unit 22 and the second determination unit 24 is improved.
另外，並不限定於進行具備載體101的基板100的檢查的例子。圖5是表示圖4中所示的基板檢查裝置1的另一例的概念性的說明圖。圖5中所示的基板檢查裝置1a與基板檢查裝置1的不同點是：在基板固定裝置12上具備導體板16。導體板16經由開關元件SW3而與端子T2連接。導體板16大致水平地配設，將導體板16的上表面設為平坦的載置面。在導體板16的上表面上可載置檢查對象的基板100a。基板檢查裝置1a在其他方面與基板檢查裝置1同樣地構成。In addition, the example is not limited to the inspection of the substrate 100 including the carrier 101 . FIG. 5 is a conceptual explanatory diagram showing another example of the substrate inspection device 1 shown in FIG. 4 . The substrate inspection device 1 a shown in FIG. 5 is different from the substrate inspection device 1 in that the substrate fixing device 12 is provided with a conductor plate 16 . Conductor plate 16 is connected to terminal T2 via switching element SW3. The conductor plate 16 is arranged substantially horizontally, and the upper surface of the conductor plate 16 is made into a flat mounting surface. The substrate 100 a to be inspected can be placed on the upper surface of the conductor plate 16 . The board|substrate inspection apparatus 1a is comprised similarly to the board|substrate inspection apparatus 1 in other points.
而且，也可以使預浸料102位在導體板16側，來將在工序K6中去除了載體101的基板100a載置在導體板16上，並通過基板檢查裝置1a來執行與基板檢查裝置1相同的檢查。根據基板檢查裝置1a，電容測定部31將配線P1與導體板16之間的靜電電容作為配線電容Cz來測定。Furthermore, the prepreg 102 may be positioned on the conductor plate 16 side, and the substrate 100 a from which the carrier 101 is removed in step K6 may be placed on the conductor plate 16 , and the substrate inspection device 1 a may be used to perform the same operation as the substrate inspection device 1 Same check. According to the substrate inspection device 1a, the capacitance measuring unit 31 measures the electrostatic capacitance between the wiring P1 and the conductor plate 16 as the wiring capacitance Cz.
另外，也可以將不具備預浸料102及載體101，而僅包含層疊配線層106的基板作為檢查對象。圖6是表示圖5中所示的基板檢查裝置1a的另一例的概念性的說明圖。圖6中所示的基板檢查裝置1b與基板檢查裝置1a的不同點是：在導體板16的上表面上層疊有絕緣板17。基板檢查裝置1b在其他方面與基板檢查裝置1a同樣地構成。In addition, a substrate that does not include the prepreg 102 and the carrier 101 but only includes the laminated wiring layer 106 may be used as the inspection target. FIG. 6 is a conceptual explanatory diagram showing another example of the substrate inspection device 1a shown in FIG. 5 . The substrate inspection device 1 b shown in FIG. 6 is different from the substrate inspection device 1 a in that an insulating plate 17 is laminated on the upper surface of the conductor plate 16 . The board|substrate inspection apparatus 1b is comprised similarly to the board|substrate inspection apparatus 1a in other respects.
根據基板檢查裝置1b，即便是在基板表面上不具備絕緣層的基板，也可以作為檢查對象。According to the substrate inspection device 1b, even a substrate without an insulating layer on the surface of the substrate can be used as an inspection target.
繼而，對如所述般構成的基板檢查裝置1的動作進行說明。圖7～圖10是表示基板檢查裝置1的動作的一例的流程圖。另外，關於基板檢查裝置1a、基板檢查裝置1b的動作，除了使用導體板16來代替載體101這一點以外，兩者是相同的。Next, the operation of the substrate inspection device 1 configured as above will be described. 7 to 10 are flowcharts showing an example of the operation of the substrate inspection device 1 . In addition, the operations of the substrate inspection device 1 a and the substrate inspection device 1 b are the same except that the conductor plate 16 is used instead of the carrier 101 .
首先，檢查控制部21例如通過省略圖示的搬送機構，來將檢查對象的基板100安裝在基板固定裝置12上，並通過檢查部移動機構15來使檢查夾具4U、檢查夾具4L的探針Pr接觸基板100的各檢查點及載體101（步驟S1，工序（a）、工序（b））。First, the inspection control unit 21 mounts the substrate 100 to be inspected on the substrate fixing device 12 using, for example, a conveyance mechanism (not shown), and moves the probes Pr of the inspection jig 4U and the inspection jig 4L through the inspection unit moving mechanism 15 . Each inspection point of the substrate 100 and the carrier 101 are contacted (step S1, step (a), step (b)).
繼而，檢查控制部21從基板100的多個配線P之中，選擇相互鄰接的兩根配線P1、P2作為第一配線、第二配線（步驟S2）。以下，如圖4所示，開關元件SW1設置在接觸作為配線P1（第一配線）的一端部的焊墊Pd11的探針Pr與端子T1之間，開關元件SW2設置在接觸作為配線P2（第二配線）的一端部的焊墊Pd21的探針Pr與端子T2之間，開關元件SW3設置在接觸載體101的探針Pr與端子T2之間，以此來進行說明。Next, the inspection control unit 21 selects two mutually adjacent wirings P1 and P2 from among the plurality of wirings P on the substrate 100 as the first wiring and the second wiring (step S2 ). Next, as shown in FIG. 4 , the switching element SW1 is provided between the probe Pr in contact with the pad Pd11 as one end portion of the wiring P1 (first wiring) and the terminal T1 , and the switching element SW2 is provided in contact with the wiring P2 (the first wiring). The switching element SW3 is provided between the probe Pr of the contact carrier 101 and the terminal T2 between the probe Pr of the pad Pd21 and the terminal T2.
繼而，檢查控制部21將開關元件SW1、開關元件SW2接通，將開關元件SW3斷開。由此，檢查控制部21通過電容測定部31，來測定配線P1與配線P2之間的線間電容Cx（步驟S3）。Next, the inspection control unit 21 turns on the switching element SW1 and the switching element SW2, and turns off the switching element SW3. Thereby, the inspection control part 21 measures the interline capacitance Cx between the wiring P1 and the wiring P2 through the capacitance measuring part 31 (step S3).
繼而，第一判定部22對線間電容Cx與線間上限值Cx_lim_U進行比較（步驟S4）。而且，在線間電容Cx大於線間上限值Cx_lim_U的情況（步驟S4中的是（YES））下，第一判定部22判定配線P1、配線P2的至少一個為線寬粗的不良（步驟S5）。Next, the first determination unit 22 compares the inter-line capacitance Cx with the inter-line upper limit value Cx_lim_U (step S4). Furthermore, when the inter-line capacitance Cx is larger than the inter-line upper limit value Cx_lim_U (YES in step S4), the first determination unit 22 determines that at least one of the wiring P1 and the wiring P2 has a thick line width defect (step S5 ).
線間電容Cx與配線P1和配線P2的相向距離（間隔）成反比。因此，在線間電容Cx大於作為正常的線間電容Cx的上限值的線間上限值Cx_lim_U的情況下，可認為：配線P1、配線P2的至少一個已變得比正常的線寬粗，由此，配線P1與配線P2的相向距離已變窄。因此，在線間電容Cx大於線間上限值Cx_lim_U的情況（步驟S4中的是（YES））下，第一判定部22判定配線P1、配線P2的至少一個為線寬粗的不良（步驟S5），並將此判定結果作為根據線間電容Cx的判定結果，例如顯示在顯示部5（報告部）中等來向使用者報告，然後過渡至步驟S21。The inter-line capacitance Cx is inversely proportional to the opposing distance (interval) between the wiring P1 and the wiring P2. Therefore, when the inter-line capacitance Cx is larger than the inter-line upper limit value Cx_lim_U which is the upper limit value of the normal inter-line capacitance Cx, it is considered that at least one of the wiring P1 and the wiring P2 has become thicker than the normal line width. As a result, the distance between the wiring P1 and the wiring P2 is narrowed. Therefore, when the inter-line capacitance Cx is larger than the inter-line upper limit value Cx_lim_U (YES in step S4), the first determination unit 22 determines that at least one of the wiring P1 and the wiring P2 has a thick line width defect (step S5 ), and this determination result is reported to the user by being displayed on the display unit 5 (reporting unit) or the like as the determination result based on the inter-line capacitance Cx, and then the process proceeds to step S21.
在此情況下，在第一部分L11、第一部分L21與第二部分L12、第二部分L22中，不論在哪一部分中線寬已變粗時，對於線間電容Cx的影響均相同，因此，可減少由產生了配線圖案的不良的位置所引起的檢查精度的變化。In this case, in the first part L11, the first part L21 and the second part L12, the second part L22, no matter which part the line width has become thicker, the impact on the inter-line capacitance Cx is the same. Therefore, it can be Reduces changes in inspection accuracy caused by locations where wiring pattern defects occur.
根據步驟S5，無法辨別在配線P1、配線P2的哪一個中線寬變粗。因此，在步驟S21以後，執行根據配線電容Cz的檢查。According to step S5, it is impossible to determine which of the wiring P1 and the wiring P2 has a thicker line width. Therefore, after step S21, the inspection based on the wiring capacitance Cz is performed.
在步驟S21中，檢查控制部21將開關元件SW1、開關元件SW3接通，將開關元件SW2斷開。由此，檢查控制部21通過電容測定部31，來測定配線P1與載體101之間的配線電容Cz（步驟S21）。In step S21, the inspection control unit 21 turns on the switching element SW1 and the switching element SW3, and turns off the switching element SW2. Thereby, the inspection control part 21 measures the wiring capacitance Cz between the wiring P1 and the carrier 101 through the capacitance measurement part 31 (step S21).
繼而，第二判定部24對配線電容Cz與配線上限值Cz_lim_U進行比較（步驟S22）。而且，在配線電容Cz大於配線上限值Cz_lim_U的情況（步驟S22中的是（YES））下，第二判定部24判定配線P1為在第二部分L12中線寬粗的不良（步驟S23），並將此判定結果作為根據配線電容Cz的判定結果，例如顯示在顯示部5（報告部）中等來向使用者報告。Next, the second determination unit 24 compares the wiring capacitance Cz with the wiring upper limit value Cz_lim_U (step S22 ). Furthermore, when the wiring capacitance Cz is larger than the wiring upper limit value Cz_lim_U (YES in step S22), the second determination unit 24 determines that the wiring P1 is defective with a thick line width in the second portion L12 (step S23) , and this determination result is reported to the user by displaying it on the display unit 5 (reporting unit) or the like as the determination result based on the wiring capacitance Cz.
配線電容Cz與配線P1的面積成正比，與載體101和配線P1的相向距離成反比。因此，在配線電容Cz已變得比配線上限值Cz_lim_U大的情況下，可認為：配線P1的面積已變得比正常的配線的面積大，即配線P1已變粗。The wiring capacitance Cz is proportional to the area of the wiring P1 and inversely proportional to the opposing distance between the carrier 101 and the wiring P1. Therefore, when the wiring capacitance Cz becomes larger than the wiring upper limit value Cz_lim_U, it can be considered that the area of the wiring P1 has become larger than the area of the normal wiring, that is, the wiring P1 has become thicker.
另外，如圖4所示，在焊墊Pd11與載體101之間產生靜電電容Cp1，在第一部分L11與載體101之間產生靜電電容Cz1，在第二部分L12與載體101之間產生靜電電容Cz2，在焊墊Pd12與載體101之間產生靜電電容Cp2。因此，變成：配線電容Cz＝Cp1＋Cz1＋Cz2＋Cp2。In addition, as shown in FIG. 4 , electrostatic capacitance Cp1 is generated between pad Pd11 and carrier 101 , electrostatic capacitance Cz1 is generated between first part L11 and carrier 101 , and electrostatic capacitance Cz2 is generated between second part L12 and carrier 101 , electrostatic capacitance Cp2 is generated between the bonding pad Pd12 and the carrier 101. Therefore, wiring capacitance Cz=Cp1+Cz1+Cz2+Cp2.
但是，形成在層疊配線層106的下表面的第二部分L12及焊墊Pd12與載體101的相向距離變成預浸料102的厚度，因此以極近的距離相向，靜電電容Cz2、靜電電容Cp2變成比較大的值。相對於此，形成在層疊配線層106的上表面的焊墊Pd11及第一部分L11與載體101的相向距離變成預浸料102的厚度與層疊配線層106的厚度的合計，相向距離變長。其結果是，靜電電容Cp1、靜電電容Cz1變成比靜電電容Cz2、靜電電容Cp2小的值，根據層疊配線層106的厚度，靜電電容Cp1、靜電電容Cz1變成相對於靜電電容Cz2、靜電電容Cp2小至可無視的程度的值。However, the distance between the second portion L12 and the bonding pad Pd12 formed on the lower surface of the laminated wiring layer 106 and the carrier 101 becomes the thickness of the prepreg 102. Therefore, the electrostatic capacitance Cz2 and the electrostatic capacitance Cp2 are opposite at an extremely close distance. relatively large value. On the other hand, the opposing distance between the pad Pd11 and the first portion L11 formed on the upper surface of the laminated wiring layer 106 and the carrier 101 becomes the total thickness of the prepreg 102 and the laminated wiring layer 106, and the opposing distance becomes longer. As a result, the electrostatic capacitance Cp1 and the electrostatic capacitance Cz1 become smaller than the electrostatic capacitance Cz2 and the electrostatic capacitance Cp2. Depending on the thickness of the laminated wiring layer 106, the electrostatic capacitance Cp1 and the electrostatic capacitance Cz1 become smaller than the electrostatic capacitance Cz2 and the electrostatic capacitance Cp2. A value that is negligible.
因此，即便當在第一部分L11中線寬已變粗時，配線電容Cz的增大也不超過偏差的程度，因此配線電容Cz不超過配線上限值Cz_lim_U的可能性高。因此，在配線電容Cz大於配線上限值Cz_lim_U的情況（步驟S22中的是（YES））下，第二判定部24判定配線P1為在第二部分L12中線寬粗的不良（步驟S23）。Therefore, even when the line width has become thicker in the first part L11, the increase in wiring capacitance Cz does not exceed the degree of deviation, so there is a high possibility that wiring capacitance Cz does not exceed the wiring upper limit value Cz_lim_U. Therefore, when the wiring capacitance Cz is larger than the wiring upper limit value Cz_lim_U (YES in step S22 ), the second determination unit 24 determines that the wiring P1 is defective with a thick line width in the second part L12 (step S23 ) .
另外，步驟S23中的判定結果，不一定必須將不良部位確定為第二部分L12，也可以是配線P1為線寬粗的不良這一判定結果。In addition, the determination result in step S23 does not necessarily determine that the defective part is the second portion L12, and may be a determination result that the wiring P1 is defective with a thick line width.
繼而，第三判定部26根據步驟S5中的第一判定部22的判定結果、及步驟S23中的第二判定部24的判定結果，由於任一個判定結果均在配線P1為線寬粗的不良這一點上相同，因此判定配線P1為線寬粗的不良（步驟S24），並將此判定結果作為根據線間電容Cx與配線電容Cz的判定結果，例如顯示在顯示部5（報告部）中等來向使用者報告，而結束處理。Next, the third determination unit 26 determines, based on the determination result of the first determination unit 22 in step S5 and the determination result of the second determination unit 24 in step S23, that the wiring P1 has a thick line width defect in either determination result. This point is the same, so it is determined that the wiring P1 is defective with a thick line width (step S24), and this determination result is displayed on the display unit 5 (report unit), etc. as a determination result based on the inter-line capacitance Cx and the wiring capacitance Cz. to report to the user and end processing.
第一判定部22的判定結果無法確定是配線P1、配線P2的哪一個的不良，第二判定部24的判定結果難以檢測第一部分L11中的不良，因此判定精度低。但是，第三判定部26根據第一判定部22的判定結果與第二判定部24的判定結果，基於其相同點而判定配線P1為線寬粗的不良，因此可提升在配線P1中產生了線寬粗的不良的判定精度。The determination result of the first determination unit 22 cannot determine which of the wiring P1 and the wiring P2 is defective, and the determination result of the second determination unit 24 is difficult to detect the defect in the first part L11, so the determination accuracy is low. However, the third determination unit 26 determines that the wiring P1 has a thick line width defect based on the similarity between the determination result of the first determination unit 22 and the determination result of the second determination unit 24. Therefore, it is possible to improve the defectiveness of the wiring P1. Poor judgment accuracy for thick line widths.
另一方面，在步驟S22中，在配線電容Cz為配線上限值Cz_lim_U以下的情況（步驟S22中的否（NO））下，第二判定部24判定配線P1的第二部分L12並非線寬粗的不良（步驟S25）。On the other hand, in step S22 , when the wiring capacitance Cz is equal to or less than the wiring upper limit value Cz_lim_U (NO in step S22 ), the second determination unit 24 determines that the second portion L12 of the wiring P1 is not the line width. Thick defects (step S25).
繼而，第三判定部26根據步驟S5中的第一判定部22的判定結果、及步驟S25中的第二判定部24的判定結果，判定配線P2為線寬粗的不良或配線P1為在第一部分L11中線寬粗的不良（步驟S26），並將此判定結果作為根據線間電容Cx與配線電容Cz的判定結果，例如顯示在顯示部5（報告部）中等來向使用者報告，而結束處理。Then, based on the determination result of the first determination unit 22 in step S5 and the determination result of the second determination unit 24 in step S25, the third determination unit 26 determines that the wiring P2 is defective with a thick line width or the wiring P1 is defective in the third step. A part of L11 has a thick line width defect (step S26), and this determination result is reported to the user as a determination result based on the inter-line capacitance Cx and the wiring capacitance Cz, for example, it is displayed on the display unit 5 (reporting unit), etc., and ends. handle.
在此情況下，第三判定部26也可以根據第一判定部22的判定結果與第二判定部24的判定結果，在可能的範圍內，向使用者詳細地報告不良的產生狀況，因此使用者的便利性提升。In this case, the third determination unit 26 may report the occurrence of the defect to the user in detail to the extent possible based on the determination result of the first determination unit 22 and the determination result of the second determination unit 24. Therefore, use Improved user convenience.
另一方面，返回至圖7，在步驟S4中，在線間電容Cx為線間上限值Cx_lim_U以下的情況（步驟S4中的否（NO））下，第一判定部22對線間電容Cx與線間下限值Cx_lim_L進行比較（步驟S6）。而且，在線間電容Cx為線間下限值Cx_lim_L以上的情況（步驟S6中的否（NO））下，線間電容Cx在作為正常的靜電電容範圍的線間下限值Cx_lim_L以上、線間上限值Cx_lim_U以下的範圍內，因此第一判定部22判定配線P1、配線P2為良好（正常）（步驟S7），並將此判定結果例如顯示在顯示部5中等來向使用者報告，而結束處理。On the other hand, returning to FIG. 7 , in step S4 , when the inter-line capacitance Cx is equal to or less than the inter-line upper limit value Cx_lim_U (NO in step S4 ), the first determination unit 22 determines the inter-line capacitance Cx Compare with the inter-line lower limit value Cx_lim_L (step S6). Furthermore, when the inter-line capacitance Cx is equal to or greater than the inter-line lower limit value Cx_lim_L (NO in step S6), the inter-line capacitance Cx is equal to or greater than the inter-line lower limit value Cx_lim_L which is a normal electrostatic capacitance range. Therefore, the first determination unit 22 determines that the wiring P1 and the wiring P2 are good (normal) (step S7), displays the determination result on the display unit 5, etc. to report it to the user, and ends handle.
在此情況下，在第一部分L11、第一部分L21與第二部分L12、第二部分L22中，配線P1、配線P2的間隔大致相同，因此，對於第一部分L11、第一部分L21與第二部分L12、第二部分L22的任一個，均能夠以相同程度的檢查精度進行檢查。因此，可減少由產生了配線圖案的不良的位置所引起的檢查精度的變化。In this case, in the first part L11 and the first part L21 and the second part L12 and the second part L22, the intervals between the wiring P1 and the wiring P2 are substantially the same. Therefore, for the first part L11, the first part L21 and the second part L12 , any of the second part L22 can be inspected with the same level of inspection accuracy. Therefore, it is possible to reduce changes in inspection accuracy caused by locations where defects in the wiring pattern occur.
另一方面，在步驟S6中，在線間電容Cx未滿線間下限值Cx_lim_L的情況（步驟S6中的是（YES））下，第一判定部22判定在配線P1、配線P2的至少一個中產生了線寬細的不良或斷線不良（步驟S8），並將此判定結果作為根據線間電容Cx的判定結果，例如顯示在顯示部5中等來向使用者報告。On the other hand, in step S6 , when the inter-line capacitance Cx is less than the inter-line lower limit value Cx_lim_L (YES in step S6 ), the first determination unit 22 determines that at least one of the wiring P1 and the wiring P2 A thin line width defect or a disconnection defect has occurred (step S8), and this determination result is reported to the user as a determination result based on the inter-line capacitance Cx, for example, it is displayed on the display unit 5 or the like.
在線間電容Cx已變得比線間下限值Cx_lim_L小的情況下，作為其原因，可認為：由於配線P1、配線P2的至少一個已變得比正常的線寬細，因此，配線P1與配線P2的相向距離已擴大。或者，作為其原因，可認為：配線P1、配線P2中的至少一個已斷線。因此，在線間電容Cx未滿線間下限值Cx_lim_L的情況（步驟S6中的是（YES））下，第一判定部22可判定在配線P1、配線P2的至少一個中產生了線寬細的不良或斷線不良。When the inter-line capacitance Cx becomes smaller than the inter-line lower limit value Cx_lim_L, it is considered that at least one of the wiring P1 and the wiring P2 has become thinner than the normal line width. Therefore, the wiring P1 and the wiring P2 are thinner than the normal line width. The distance between wiring P2 has been increased. Alternatively, it is considered that at least one of the wiring P1 and the wiring P2 is disconnected. Therefore, when the inter-line capacitance Cx is less than the inter-line lower limit value Cx_lim_L (YES in step S6), the first determination unit 22 can determine that a thin line width occurs in at least one of the wiring P1 and the wiring P2. defective or disconnected.
繼而，第一判定部22對線間電容Cx與線間辨別值Cx_lim_LL進行比較（步驟S9）。而且，在線間電容Cx大於線間辨別值Cx_lim_LL的情況（步驟S9中的是（YES））下，第一判定部22判定配線P1、配線P2中的至少一個為線寬細的不良（步驟S10），在線間電容Cx為線間辨別值Cx_lim_LL以下的情況（步驟S9中的否（NO））下，第一判定部22判定在配線P1、配線P2中的至少一個中產生了斷線不良（步驟S11）。Next, the first determination unit 22 compares the inter-line capacitance Cx and the inter-line discrimination value Cx_lim_LL (step S9). Furthermore, when the inter-line capacitance Cx is greater than the inter-line discrimination value Cx_lim_LL (YES in step S9), the first determination unit 22 determines that at least one of the wiring P1 and the wiring P2 is defective with a thin line width (step S10 ), when the inter-line capacitance Cx is equal to or less than the inter-line discrimination value Cx_lim_LL (NO in step S9), the first determination unit 22 determines that a disconnection failure has occurred in at least one of the wiring P1 and the wiring P2 ( Step S11).
在基板配線的製造中，通常幾乎不會產生如線寬變成1/2或變成1/3般的大的變動。即便在產生了線寬的不良的情況下，相對於正常的粗度的差異通常微小，在不良時作為線間電容Cx出現的靜電電容的變化量例如也變成1 fF～10 fF左右的微小的變化量。In the manufacturing of substrate wiring, there is usually almost no large change such as a line width changing to 1/2 or 1/3. Even when a defect in line width occurs, the difference from the normal thickness is usually very small, and the amount of change in the electrostatic capacitance that occurs as the inter-line capacitance Cx in the case of a defect is as small as about 1 fF to 10 fF, for example. amount of change.
相對於此，在產生了斷線的情況下，若在配線P1、配線P2的中央位置上產生斷線，則線間電容Cx變成1/2，若在從配線P1、配線P2的焊墊Pd11、焊墊Pd21起1/4的位置上產生斷線，則線間電容Cx變成1/4。因此，若將線間辨別值Cx_lim_LL設為從線間下限值Cx_lim_L減去在線寬已變細時產生的程度的微小的靜電電容所得的值，則可認為：在線間電容Cx大於線間辨別值Cx_lim_LL的情況（步驟S9中的是（YES））下，產生了線寬變細的不良的可能性高，在線間電容Cx為線間辨別值Cx_lim_LL以下的情況（步驟S9中的否（NO））下，產生了斷線的可能性高。On the other hand, when a disconnection occurs, if the disconnection occurs at the center position of the wiring P1 and the wiring P2, the inter-line capacitance Cx becomes 1/2. , if a disconnection occurs at 1/4 of the pad Pd21, the inter-line capacitance Cx becomes 1/4. Therefore, if the inter-line discrimination value Cx_lim_LL is a value obtained by subtracting the minute electrostatic capacitance that occurs when the line width becomes thinner from the inter-line lower limit value Cx_lim_L, it can be considered that the inter-line capacitance Cx is greater than the inter-line discrimination When the value Cx_lim_LL is (YES in step S9), there is a high possibility that the line width becomes thinner, and when the inter-line capacitance Cx is equal to or less than the inter-line discrimination value Cx_lim_LL (NO in step S9) )), the possibility of disconnection is high.
因此，第一判定部22可根據線間辨別值Cx_lim_LL，以某種程度的高準確性，辨別線寬細的不良與斷線不良。Therefore, the first determination unit 22 can distinguish a thin line width defect and a disconnection defect with a certain degree of high accuracy based on the line-to-line discrimination value Cx_lim_LL.
在步驟S10中，第一判定部22將內容為配線P1、配線P2中的至少一個為線寬細的不良的判定結果作為根據線間電容Cx的判定結果，例如顯示在顯示部5中等來向使用者報告，然後過渡至步驟S30。在步驟S11中，第一判定部22將內容為在配線P1、配線P2中的至少一個中產生了斷線不良的判定結果作為根據線間電容Cx的判定結果，例如顯示在顯示部5中等來向使用者報告，然後過渡至步驟S12。In step S10 , the first determination unit 22 displays the determination result that at least one of the wiring P1 and the wiring P2 has a thin line width as a determination result based on the interline capacitance Cx, for example, on the display unit 5 or the like to inform the user. The user reports, and then transitions to step S30. In step S11 , the first determination unit 22 displays the determination result indicating that a disconnection defect has occurred in at least one of the wiring P1 and the wiring P2 as a determination result based on the interline capacitance Cx, for example, on the display unit 5 or the like. The user reports, and then transitions to step S12.
在步驟S10中，無法辨別在配線P1、配線P2的哪一個中線寬變細。因此，在步驟S30以後，執行根據配線電容Cz的檢查。In step S10, it cannot be determined which of the wiring P1 and the wiring P2 has a thinner line width. Therefore, after step S30, the inspection based on the wiring capacitance Cz is performed.
在步驟S30中，與步驟S21同樣地，檢查控制部21將開關元件SW1、開關元件SW3接通，將開關元件SW2斷開，通過電容測定部31來測定配線P1與載體101之間的配線電容Cz（步驟S30）。In step S30, similarly to step S21, the inspection control unit 21 turns on the switching element SW1 and the switching element SW3, turns off the switching element SW2, and uses the capacitance measuring unit 31 to measure the wiring capacitance between the wiring P1 and the carrier 101. Cz (step S30).
繼而，第二判定部24對配線電容Cz與配線下限值Cz_lim_L進行比較（步驟S31）。而且，在配線電容Cz小於配線下限值Cz_lim_L的情況（步驟S31中的是（YES））下，第二判定部24判定配線P1為斷線不良或在第二部分L12中線寬細的不良（步驟S32），並將此判定結果作為根據配線電容Cz的判定結果，例如顯示在顯示部5中等來向使用者報告。Next, the second determination unit 24 compares the wiring capacitance Cz with the wiring lower limit value Cz_lim_L (step S31 ). Furthermore, when the wiring capacitance Cz is smaller than the wiring lower limit value Cz_lim_L (YES in step S31 ), the second determination unit 24 determines that the wiring P1 is a disconnection defect or a defect in which the line width is thin in the second portion L12 (Step S32), and this determination result is reported to the user as a determination result based on the wiring capacitance Cz, for example, it is displayed on the display unit 5 or the like.
配線電容Cz與配線P1的面積成正比，與載體101和配線P1的相向距離成反比。因此，在配線電容Cz已變得比配線下限值Cz_lim_L小的情況下，可認為：配線P1的面積已變得比正常的配線的面積小，即配線P1已變細、或已斷線。The wiring capacitance Cz is proportional to the area of the wiring P1 and inversely proportional to the opposing distance between the carrier 101 and the wiring P1. Therefore, when the wiring capacitance Cz becomes smaller than the wiring lower limit value Cz_lim_L, it can be considered that the area of the wiring P1 has become smaller than the area of the normal wiring, that is, the wiring P1 has become thinner or broken.
但是，如上所述，靜電電容Cp1、靜電電容Cz1變成比靜電電容Cz2、靜電電容Cp2小的值，根據層疊配線層106的厚度，靜電電容Cp1、靜電電容Cz1變成相對於靜電電容Cz2、靜電電容Cp2小至可無視的程度的值。因此，即便當在第一部分L11中線寬已變細時，配線電容Cz的減少也不超過偏差的程度，因此，配線電容Cz不低於配線下限值Cz_lim_L的可能性高。因此，在配線電容Cz小於配線下限值Cz_lim_L的情況（步驟S31中的是（YES））下，第二判定部24判定配線P1為斷線不良或在第二部分L12中線寬細的不良（步驟S32）。However, as described above, the electrostatic capacitance Cp1 and the electrostatic capacitance Cz1 become smaller than the electrostatic capacitance Cz2 and the electrostatic capacitance Cp2. Depending on the thickness of the laminated wiring layer 106, the electrostatic capacitance Cp1 and the electrostatic capacitance Cz1 become smaller than the electrostatic capacitance Cz2 and the electrostatic capacitance. Cp2 is a value that is so small that it can be ignored. Therefore, even when the line width has become thinner in the first part L11, the wiring capacitance Cz does not decrease beyond the degree of deviation, and therefore there is a high possibility that the wiring capacitance Cz is not lower than the wiring lower limit value Cz_lim_L. Therefore, when the wiring capacitance Cz is smaller than the wiring lower limit value Cz_lim_L (YES in step S31 ), the second determination unit 24 determines that the wiring P1 is a disconnection defect or a defect in which the line width is thin in the second portion L12 (Step S32).
另外，步驟S32中的判定結果，不一定必須將不良部位確定為第二部分L12，也可以是配線P1為線寬細的不良或斷線不良這一判定結果。In addition, the determination result in step S32 does not necessarily determine that the defective part is the second portion L12, and may be a determination result that the wiring P1 has a thin line width defect or a disconnection defect.
繼而，第二判定部24對配線電容Cz與配線辨別值Cz_lim_LL進行比較（步驟S33）。而且，在配線電容Cz大於配線辨別值Cz_lim_LL的情況（步驟S33中的是（YES））下，第二判定部24判定配線P1為在第二部分L12中線寬細的不良（步驟S34）。Next, the second determination unit 24 compares the wiring capacitance Cz and the wiring discrimination value Cz_lim_LL (step S33). Furthermore, when the wiring capacitance Cz is larger than the wiring discrimination value Cz_lim_LL (YES in step S33), the second determination unit 24 determines that the wiring P1 is defective with a thin line width in the second portion L12 (step S34).
如上所述，即便在產生了線寬的不良的情況下，相對於正常的粗度的線寬的差異通常微小，在不良時作為配線電容Cz出現的靜電電容的變化量例如也變成1fF～10fF左右的微小的變化量。As described above, even when a line width defect occurs, the difference in line width from a normal thickness is usually small, and the amount of change in the electrostatic capacitance that occurs as the wiring capacitance Cz at the time of the defect is, for example, 1 fF to 10 fF. A small amount of change from left to right.
相對於此，通過將配線辨別值Cz_lim_LL適當地設定成從配線下限值Cz_lim_L減去在線寬已變細時產生的程度的微小的靜電電容所得的值，如圖11的圖表G2所示，在配線P1的全長的大部分的位置上，產生了斷線時的配線電容Cz低於配線辨別值Cz_lim_LL。因此，若將配線辨別值Cz_lim_LL設為從配線下限值Cz_lim_L減去在線寬已變細時產生的程度的微小的靜電電容所得的值，則可認為：在配線電容Cz大於配線辨別值Cz_lim_LL的情況（步驟S33中的是（YES））下，產生了線寬變細的不良的可能性高，在配線電容Cz為配線辨別值Cz_lim_LL以下的情況（步驟S33中的否（NO））下，產生了斷線的可能性高。On the other hand, by appropriately setting the wiring discrimination value Cz_lim_LL to a value obtained by subtracting the minute electrostatic capacitance that occurs when the line width becomes thinner from the wiring lower limit value Cz_lim_L, as shown in the graph G2 of FIG. 11 , in At most positions along the entire length of the wiring P1, the wiring capacitance Cz when a disconnection occurs is lower than the wiring discrimination value Cz_lim_LL. Therefore, if the wiring discrimination value Cz_lim_LL is a value obtained by subtracting the minute electrostatic capacitance that occurs when the line width becomes thinner from the wiring lower limit value Cz_lim_L, it can be considered that the wiring capacitance Cz is larger than the wiring discrimination value Cz_lim_LL. In this case (YES in step S33), there is a high possibility that a defect such as thinning of the line width has occurred, and in the case where the wiring capacitance Cz is equal to or less than the wiring discrimination value Cz_lim_LL (NO in step S33), There is a high possibility of disconnection.
因此，第二判定部24可根據配線辨別值Cz_lim_LL，以某種程度的高準確性，辨別線寬細的不良與斷線不良。Therefore, the second determination unit 24 can distinguish the thin line width defect and the disconnection defect with a certain degree of high accuracy based on the wiring discrimination value Cz_lim_LL.
尤其，當在第二部分L12的前端設置有焊墊Pd12時，焊墊Pd12的線寬比第二部分L12大，每單位長度的靜電電容比第二部分L12大。因此，即便當在配線P1的終端部附近，即第二部分L12與焊墊Pd12的連接部分產生了斷線時，也從線間電容Cx減少比較大的靜電電容Cp2。因此，若將配線辨別值Cz_lim_LL設為從配線下限值Cz_lim_L減去靜電電容Cp2所得的值，則容易辨別線寬細的不良與斷線不良。In particular, when the bonding pad Pd12 is provided at the front end of the second part L12, the line width of the bonding pad Pd12 is larger than that of the second part L12, and the electrostatic capacitance per unit length is larger than that of the second part L12. Therefore, even if a disconnection occurs near the terminal portion of the wiring P1, that is, at the connection portion between the second portion L12 and the bonding pad Pd12, a relatively large electrostatic capacitance Cp2 is reduced from the interline capacitance Cx. Therefore, if the wiring discrimination value Cz_lim_LL is a value obtained by subtracting the electrostatic capacitance Cp2 from the wiring lower limit value Cz_lim_L, it will be easier to distinguish between thin line width defects and disconnection defects.
另外，步驟S34中的判定結果，不一定必須將不良部位確定為第二部分L12，也可以是配線P1為線寬細的不良這一判定結果。In addition, the determination result in step S34 does not necessarily determine that the defective part is the second portion L12, and may be a determination result that the wiring P1 is defective with a thin line width.
繼而，第三判定部26根據步驟S10中的第一判定部22的判定結果、及步驟S34中的第二判定部24的判定結果，由於任一個判定結果均在配線P1為線寬細的不良這一點上相同，因此，判定配線P1為線寬細的不良（步驟S35），並將此判定結果作為根據線間電容Cx與配線電容Cz的判定結果，例如顯示在顯示部5（報告部）中等來向使用者報告，而結束處理。Next, the third determination unit 26 determines, based on the determination result of the first determination unit 22 in step S10 and the determination result of the second determination unit 24 in step S34, that the wiring P1 has a thin line width. This point is the same. Therefore, it is determined that the wiring P1 is defective with a thin line width (step S35), and this determination result is displayed on the display unit 5 (reporting unit) as a determination result based on the inter-line capacitance Cx and the wiring capacitance Cz, for example. Medium to report to the user and end processing.
第一判定部22的判定結果無法確定是配線P1、配線P2的哪一個的不良，第二判定部24的判定結果難以檢測第一部分L11中的不良，因此判定精度低。但是，第三判定部26根據第一判定部22的判定結果與第二判定部24的判定結果，基於其相同點而判定配線P1為線寬細的不良，因此可提升在配線P1中產生了線寬細的不良的判定精度。The determination result of the first determination unit 22 cannot determine which of the wiring P1 and the wiring P2 is defective, and the determination result of the second determination unit 24 is difficult to detect the defect in the first part L11, so the determination accuracy is low. However, the third determination unit 26 determines that the wiring P1 has a thin line width defect based on the similarity between the determination result of the first determination unit 22 and the determination result of the second determination unit 24. Therefore, it is possible to improve the defectiveness of the wiring P1. Poor judgment accuracy for thin line widths.
另一方面，在步驟S33中，在配線電容Cz為配線辨別值Cz_lim_LL以下的情況（步驟S33中的否（NO））下，可認為產生了斷線，但在後述的步驟S11、步驟S12、步驟S40～步驟S46中對斷線進行判斷，因此第二判定部24結束此處理。On the other hand, in step S33, if the wiring capacitance Cz is equal to or less than the wiring discrimination value Cz_lim_LL (NO in step S33), it is considered that a disconnection has occurred. However, in steps S11, S12, and Since disconnection is determined in steps S40 to S46, the second determination unit 24 ends this process.
在步驟S31中，在配線電容Cz為配線下限值Cz_lim_L以上的情況（步驟S31中的否（NO））下，第二判定部24判定配線P1並非斷線不良，且並非在第二部分L12中線寬細的不良（步驟S36）。In step S31 , when the wiring capacitance Cz is the wiring lower limit value Cz_lim_L or more (NO in step S31 ), the second determination unit 24 determines that the wiring P1 is not a disconnection defect and is not in the second part L12 Defects with a wide and thin center line (step S36).
繼而，第三判定部26根據步驟S10中的第一判定部22的判定結果、及步驟S36中的第二判定部24的判定結果，由於配線P1、配線P2中的至少一個為線寬細的不良，且配線P1並非在第二部分L12中線寬細的不良，因此，判定配線P1為在第一部分L11中線寬細的不良、或配線P2為線寬細的不良（步驟S37）。而且，第三判定部26將此判定結果作為根據線間電容Cx與配線電容Cz的判定結果，例如顯示在顯示部5（報告部）中等來向使用者報告，而結束處理。Then, based on the determination result of the first determination unit 22 in step S10 and the determination result of the second determination unit 24 in step S36, the third determination unit 26 determines that at least one of the wiring P1 and the wiring P2 has a thin line width. Since the wiring P1 is not defective and has a thin line width in the second part L12, it is determined that the wiring P1 is a defect having a thin line width in the first part L11 or the wiring P2 is a defect having a thin line width (step S37). Then, the third determination unit 26 reports this determination result to the user by displaying it on the display unit 5 (reporting unit) or the like as a determination result based on the line-to-line capacitance Cx and the wiring capacitance Cz, and ends the process.
另一方面，在步驟S11中，通過第一判定部22來判定在配線P1、配線P2中的至少一個中產生了斷線不良後，第一斷線位置推斷部23根據線間電容Cx與線間基準電容Cx_ref的比，來推斷斷線位置Posx（步驟S12）。On the other hand, in step S11, after the first determination unit 22 determines that a disconnection failure has occurred in at least one of the wiring P1 and the wiring P2, the first disconnection position estimation unit 23 determines based on the inter-line capacitance Cx and the line The ratio of the reference capacitance Cx_ref to infer the disconnection position Posx (step S12).
圖11是表示配線P已斷線時的斷線位置與在此位置上斷線時，由電容測定部31所測定的線間電容Cx及配線電容Cz的關係的圖。圖表G1表示線間電容Cx與斷線位置的關係，圖表G2表示配線電容Cz與斷線位置的關係。FIG. 11 is a diagram showing the relationship between the disconnection position when the wiring P is disconnected and the inter-line capacitance Cx and the wiring capacitance Cz measured by the capacitance measuring unit 31 when the wiring P is disconnected at this position. The graph G1 shows the relationship between the line capacitance Cx and the disconnection position, and the graph G2 shows the relationship between the wiring capacitance Cz and the disconnection position.
圖表G1、圖表G2的橫軸以從配線P的一端部（起點）起的長度來表示配線P的斷線位置。在配線P1的例子中，探針Pr所接觸的焊墊Pd11的前端變成“起點”，焊墊Pd12的前端變成“終點”，將第二部分L12與焊墊Pd12的連接點的位置表述成“焊墊”。圖表G1的縱軸表示線間電容Cx，圖表G2的縱軸表示配線電容Cz。The horizontal axes of the graphs G1 and G2 indicate the disconnection position of the wiring P in terms of the length from one end (starting point) of the wiring P. In the example of the wiring P1, the tip of the pad Pd11 that the probe Pr contacts becomes the "starting point", and the tip of the pad Pd12 becomes the "end point". The position of the connection point between the second part L12 and the pad Pd12 is expressed as " solder pad". The vertical axis of the graph G1 represents the inter-line capacitance Cx, and the vertical axis of the graph G2 represents the wiring capacitance Cz.
另外，在圖表G2的起點附近位置上，因焊墊Pd11的靜電電容Cp1的影響，實際上存在圖表變得不連續的區域，但為了使說明變得簡單而省略其記載。In addition, in the vicinity of the starting point of the graph G2, there is actually a region where the graph becomes discontinuous due to the influence of the electrostatic capacitance Cp1 of the pad Pd11, but the description thereof is omitted in order to simplify the description.
線間電容Cx是在相互大致平行的一對配線P間產生的靜電電容。若將第一部分L11、第一部分L21的線間電容設為Cx1，將第二部分L12、第二部分L22的線間電容設為Cx2，貫穿配線L13、貫穿配線L23的線間電容因微小而無視，則線間電容Cx大致變成Cx1＋Cx2。而且，第一部分L11、第一部分L21的間隔與第二部分L12、第二部分L22的間隔大致相等。因此，隨著斷線位置從起點離開，線間電容Cx大致線性地增加。因此，可根據無斷線時的線間基準電容Cx_ref與由電容測定部31所測定的線間電容Cx的比，推斷配線P的斷線位置。The inter-line capacitance Cx is an electrostatic capacitance generated between a pair of wiring lines P that are substantially parallel to each other. If the line capacitance between the first part L11 and the first part L21 is set to Cx1, and the line capacitance between the second part L12 and the second part L22 is set to Cx2, the line capacitance between the through wiring L13 and the through wiring L23 is ignored because it is small. , then the inter-line capacitance Cx becomes roughly Cx1 + Cx2. Furthermore, the distance between the first parts L11 and L21 is substantially equal to the distance between the second parts L12 and L22. Therefore, as the disconnection position moves away from the starting point, the inter-line capacitance Cx increases approximately linearly. Therefore, the disconnection position of the wiring P can be estimated based on the ratio of the inter-line reference capacitance Cx_ref when there is no disconnection and the inter-line capacitance Cx measured by the capacitance measuring unit 31 .
具體而言，在將配線P1、配線P2的全長設為La，並以從起點起的長度來表示斷線位置Posx的情況下，第一斷線位置推斷部23可根據下述的式（2）來算出斷線位置Posx。 斷線位置Posx＝La×Cx / Cx_ref・・・（2）Specifically, when the total length of the wiring P1 and the wiring P2 is La and the disconnection position Posx is expressed as the length from the starting point, the first disconnection position estimation unit 23 can calculate the disconnection position Posx according to the following equation (2 ) to calculate the disconnection position Posx. Disconnection position Posx=La×Cx/Cx_ref・・・(2)
另外，第一斷線位置推斷部23並不限定於根據線間基準電容Cx_ref與線間電容Cx的比，來推斷配線P的斷線位置Posx的例子。例如，也可以將表示圖表G1中所示的斷線位置與線間電容Cx的對應關係的查找表（look-uptable）事先存儲在存儲部27中，第一斷線位置推斷部23通過參照此查找表，來推斷斷線位置Posx。In addition, the first disconnection position estimation unit 23 is not limited to the example in which the disconnection position Posx of the wiring P is estimated based on the ratio of the inter-line reference capacitance Cx_ref and the inter-line capacitance Cx. For example, a lookup table (look-uptable) showing the correspondence relationship between the disconnection position and the inter-line capacitance Cx shown in the graph G1 may be stored in the storage unit 27 in advance, and the first disconnection position estimation unit 23 may refer to this look-uptable. Lookup table to infer the disconnection location Posx.
第一斷線位置推斷部23將以所述方式推斷的斷線位置Posx，例如顯示在顯示部5中等來向使用者報告，然後過渡至步驟S40。The first disconnection position estimation unit 23 reports the disconnection position Posx estimated in the above manner to the user, for example, by displaying it on the display unit 5 or the like, and then proceeds to step S40.
在步驟S11中，無法辨別在配線P1、配線P2的哪一個中已斷線。因此，在步驟S40以後，執行根據配線電容Cz的檢查。In step S11, it cannot be determined which of the wiring P1 and the wiring P2 is disconnected. Therefore, after step S40, the inspection based on the wiring capacitance Cz is performed.
在步驟S40中，與步驟S21同樣地，檢查控制部21將開關元件SW1、開關元件SW3接通，將開關元件SW2斷開，通過電容測定部31來測定配線P1與載體101之間的配線電容Cz（步驟S40）。In step S40, similarly to step S21, the inspection control unit 21 turns on the switching element SW1 and the switching element SW3, turns off the switching element SW2, and uses the capacitance measuring unit 31 to measure the wiring capacitance between the wiring P1 and the carrier 101. Cz (step S40).
繼而，第二判定部24對配線電容Cz與配線辨別值Cz_lim_LL進行比較（步驟S41）。而且，在配線電容Cz為配線辨別值Cz_lim_LL以下的情況（步驟S41中的是（YES））下，第二判定部24判定配線P1為斷線不良（步驟S42），並將此判定結果作為根據配線電容Cz的判定結果，例如顯示在顯示部5中等來向使用者報告。Next, the second determination unit 24 compares the wiring capacitance Cz and the wiring discrimination value Cz_lim_LL (step S41 ). Furthermore, when the wiring capacitance Cz is equal to or less than the wiring discrimination value Cz_lim_LL (YES in step S41), the second determination unit 24 determines that the wiring P1 has a disconnection defect (step S42), and uses this determination result as a basis. The determination result of the wiring capacitance Cz is reported to the user, for example, by displaying it on the display unit 5 or the like.
繼而，第二斷線位置推斷部25根據配線電容Cz與斷線電容信息來推斷斷線位置Posz（步驟S43），並將其推斷結果作為根據配線電容Cz的斷線位置推斷結果，例如顯示在顯示部5中等來向使用者報告。Then, the second disconnection position estimation unit 25 estimates the disconnection position Posz based on the wiring capacitance Cz and the disconnection capacitance information (step S43), and uses the estimation result as the disconnection position estimation result based on the wiring capacitance Cz, for example, displayed on The display unit 5 reports to the user.
如上所述，靜電電容Cp1、靜電電容Cz1變成比靜電電容Cz2、靜電電容Cp2小的值。因此，配線電容Cz和配線P的斷線位置的關係，與圖表G1的線間電容Cx不同，不變成線性的關係。As described above, the electrostatic capacitance Cp1 and the electrostatic capacitance Cz1 have smaller values than the electrostatic capacitance Cz2 and the electrostatic capacitance Cp2. Therefore, the relationship between the wiring capacitance Cz and the disconnection position of the wiring P is different from the inter-line capacitance Cx in the graph G1 and does not become a linear relationship.
如圖11的圖表G2所示，當配線P在第一部分中已斷線時，相對於其斷線位置的配線電容Cz的變化微小，難以根據配線電容Cz來推斷斷線位置或位置精度變低。另一方面，當配線P在第二部分中已斷線時，相對於其斷線位置的配線電容Cz的變化變得比第一部分大，比較容易根據配線電容Cz來推斷斷線位置，位置精度也變高。As shown in the graph G2 of FIG. 11 , when the wiring P is disconnected in the first part, the change in the wiring capacitance Cz relative to the disconnection position is small, and it is difficult to estimate the disconnection position based on the wiring capacitance Cz, or the position accuracy becomes low. . On the other hand, when the wiring P is disconnected in the second part, the change in the wiring capacitance Cz with respect to the disconnection position becomes larger than in the first part, and it is easier to estimate the disconnection position based on the wiring capacitance Cz, and the position accuracy Also getting taller.
但是，如圖表G2所示，配線電容Cz和配線P的斷線位置的關係，與圖表G1的線間電容Cx不同，不變成線性的關係。因此，例如，將表示圖表G2中所示的斷線位置與配線電容Cz的對應關係的查找表，作為斷線電容信息而事先存儲在存儲部27中，第二斷線位置推斷部25通過參照此查找表來推斷斷線位置Posz。However, as shown in the graph G2, the relationship between the wiring capacitance Cz and the disconnection position of the wiring P is different from the inter-line capacitance Cx in the graph G1, and does not become a linear relationship. Therefore, for example, a lookup table indicating the correspondence relationship between the disconnection position and the wiring capacitance Cz shown in the graph G2 is stored in the storage unit 27 in advance as the disconnection capacitance information, and the second disconnection position estimation unit 25 refers to This lookup table is used to infer the disconnection position Posz.
另外，第二斷線位置推斷部25未必限定於根據斷線電容信息來推斷斷線位置Posz的例子。例如，在層疊配線層106非常薄的情況等，配線電容Cz與配線P的斷線位置的關係變成線性地接近的關係的情況下，與第一斷線位置推斷部23同樣地，第二斷線位置推斷部25也可以根據配線電容Cz與配線基準電容Cz_ref的比，來推斷斷線位置Posz。In addition, the second disconnection position estimating unit 25 is not necessarily limited to the example in which the disconnection position Posz is estimated based on the disconnection capacitance information. For example, when the laminated wiring layer 106 is very thin and the relationship between the wiring capacitance Cz and the disconnection position of the wiring P becomes a linearly close relationship, similarly to the first disconnection position estimation unit 23, the second disconnection The line position estimation unit 25 may estimate the disconnection position Posz based on the ratio of the wiring capacitance Cz and the wiring reference capacitance Cz_ref.
繼而，第三判定部26根據步驟S11中的第一判定部22的判定結果、及步驟S42中的第二判定部24的判定結果，由於任一個判定結果均在配線P1為斷線不良這一點上相同，因此，判定配線P1為斷線不良（步驟S44），並將此判定結果作為根據線間電容Cx與配線電容Cz的判定結果，例如顯示在顯示部5（報告部）中等來向使用者報告，而結束處理。Next, the third determination unit 26 determines based on the determination result of the first determination unit 22 in step S11 and the determination result of the second determination unit 24 in step S42 that the wiring P1 is defective due to disconnection in either determination result. The same as above, therefore, it is determined that the wiring P1 is disconnected (step S44), and this determination result is used as the determination result based on the inter-line capacitance Cx and the wiring capacitance Cz, for example, it is displayed on the display unit 5 (reporting unit) or the like to inform the user. report and end processing.
第一判定部22的判定結果無法確定是配線P1、配線P2的哪一個的不良，第二判定部24的判定結果難以檢測第一部分L11中的不良，因此判定精度低。但是，第三判定部26根據第一判定部22的判定結果與第二判定部24的判定結果，基於其相同點而判定配線P1為斷線不良，因此可提升在配線P1中產生了斷線不良的判定精度。The determination result of the first determination unit 22 cannot determine which of the wiring P1 and the wiring P2 is defective, and the determination result of the second determination unit 24 is difficult to detect the defect in the first part L11, so the determination accuracy is low. However, the third determination unit 26 determines that the wiring P1 has a disconnection defect based on the similarity between the determination result of the first determination unit 22 and the determination result of the second determination unit 24. Therefore, it is possible to improve the occurrence of disconnection in the wiring P1. Poor decision accuracy.
另一方面，在步驟S41中，在配線電容Cz超過配線辨別值Cz_lim_LL的情況（步驟S41中的否（NO））下，第二判定部24判定配線P1並非斷線不良（步驟S45）。On the other hand, in step S41 , when the wiring capacitance Cz exceeds the wiring discrimination value Cz_lim_LL (NO in step S41 ), the second determination unit 24 determines that the wiring P1 is not a disconnection defect (step S45 ).
繼而，在步驟S11中的第一判定部22的判定結果中，配線P1、配線P2的至少一個被判定為斷線不良，在步驟S45中的第二判定部24的判定結果中，配線P1被判定為並非斷線不良，因此，第三判定部26根據所述兩個判定結果，判定配線P2為斷線不良（步驟S46）。而且，第三判定部26將此判定結果作為根據線間電容Cx與配線電容Cz的判定結果，例如顯示在顯示部5（報告部）中等來向使用者報告，而結束處理。Next, in the determination result of the first determination unit 22 in step S11, at least one of the wiring P1 and the wiring P2 is determined to be disconnected. In the determination result of the second determination unit 24 in step S45, the wiring P1 is determined to be disconnected. It is determined that there is no disconnection defect, so the third determination unit 26 determines that the wiring P2 has a disconnection defect based on the two determination results (step S46). Then, the third determination unit 26 reports this determination result to the user by displaying it on the display unit 5 (reporting unit) or the like as a determination result based on the line-to-line capacitance Cx and the wiring capacitance Cz, and ends the process.
另外，基板檢查裝置1也可以在結束所述處理後，將處理過渡至步驟S2，依次選擇尚未得到檢查的配線P作為新的配線P1、配線P2，並重複以後的處理，由此執行基板100的所有配線P的檢查。In addition, after completing the above process, the substrate inspection apparatus 1 may transfer the process to step S2, sequentially select the wiring P that has not been inspected as the new wiring P1 and the wiring P2, and repeat the subsequent processing, thereby executing the substrate 100 Inspection of all wiring P.
以上，根據步驟S1～步驟S46，可判定配線P的線寬粗的不良、線寬細的不良、斷線、及斷線位置。進而，與背景技術相比，可減少由配線圖案的位置所引起的檢查精度的變化。As described above, based on steps S1 to S46, it is possible to determine the defects with thick line width, defects with thin line width, disconnection, and disconnection position of the wiring P. Furthermore, compared with the background art, the change in inspection accuracy caused by the position of the wiring pattern can be reduced.
另外，也可以不具備第二斷線位置推斷部25，而不執行步驟S43。但是，通過獲得步驟S12中的根據線間電容Cx的斷線位置Posx的推斷結果、及步驟S43中的根據配線電容Cz的斷線位置Posz的推斷結果，使用者可更準確地掌握配線P的斷線位置。In addition, the second disconnection position estimation unit 25 may not be provided and step S43 may not be executed. However, by obtaining the estimation result of the disconnection position Posx based on the inter-line capacitance Cx in step S12 and the estimation result of the disconnection position Posz based on the wiring capacitance Cz in step S43, the user can grasp the wiring P more accurately. Broken position.
另外，也可以不具備第一斷線位置推斷部23，而不執行步驟S12。但是，通過在步驟S12中推斷斷線位置Posx，可將此斷線位置Posx的信息反饋至基板100的製造步驟中等，而有助於基板100的品質提升。In addition, the first disconnection position estimation unit 23 may not be provided and step S12 may not be executed. However, by estimating the disconnection position Posx in step S12, the information of the disconnection position Posx can be fed back to the manufacturing steps of the substrate 100, etc., thereby helping to improve the quality of the substrate 100.
另外，也可以設為不具備第三判定部26，而不執行步驟S24、步驟S26、步驟S35、步驟S37、步驟S44、步驟S46的結構。但是，通過具備第三判定部26，並執行步驟S24、步驟S26、步驟S35、步驟S37、步驟S44、步驟S46，可獲得與不良部位相關的更詳細的信息，其結果是，使用者的便利性提升。Alternatively, the third determination unit 26 may not be provided, and steps S24, S26, S35, S37, S44, and S46 may not be executed. However, by providing the third determination unit 26 and executing steps S24, S26, S35, S37, S44, and S46, more detailed information about the defective part can be obtained, and as a result, the convenience of the user can be obtained sexual enhancement.
另外，第二判定部24也可以不執行步驟S33、步驟S34，第三判定部26根據步驟S10中的第一判定部22的判定結果、及步驟S32中的第二判定部24的判定結果，由於任一個判定結果均在配線P1為線寬細的不良這一點上相同，因此，判定配線P1為線寬細的不良（步驟S35）。In addition, the second determination unit 24 may not execute steps S33 and S34, and the third determination unit 26 may determine based on the determination result of the first determination unit 22 in step S10 and the determination result of the second determination unit 24 in step S32, Since all the determination results are the same in that the wiring P1 has a thin line width defect, it is determined that the wiring P1 has a thin line width defect (step S35).
另外，也可以不執行步驟S21～步驟S26，也可以不執行步驟S30～步驟S37，也可以不執行步驟S40～步驟S46。即便在不執行這些處理的任一個或所有這些處理的情況下，根據步驟S1～步驟S12，也可以判定配線P1、配線P2的至少一個的線寬粗的不良、線寬細的不良、及斷線。In addition, steps S21 to S26 may not be executed, steps S30 to S37 may not be executed, and steps S40 to S46 may not be executed. Even if any or all of these processes are not executed, it is possible to determine whether a thick line width defect, a thin line width defect, or a break in at least one of the wiring P1 and the wiring P2 according to steps S1 to S12. String.
另外，第一判定部22也可以不執行步驟S9～步驟S11。即便不執行步驟S9～步驟S11，根據步驟S4～步驟S8，也可以知道配線P1、配線P2的至少一個為不良。In addition, the first determination unit 22 may not execute steps S9 to S11. Even if steps S9 to S11 are not executed, it can be known from steps S4 to S8 that at least one of the wiring P1 and the wiring P2 is defective.
另外，未必限定於從多個探針Pr中選擇第一探針、第二探針、第三探針的例子。第一探針、第二探針、第三探針例如也可以是移動式的所謂的飛針（flying probe）。In addition, it is not necessarily limited to the example of selecting the first probe, the second probe, and the third probe from the plurality of probes Pr. The first probe, the second probe, and the third probe may be movable so-called flying probes, for example.
在所述實施方式中，將線寬粗的配線、及線寬細的配線判定為不良，但並不限定於此。線寬粗的配線未必是不良，線寬細的配線未必是不良。因此，也可以不判定配線的不良，而僅判定為配線的線寬粗或細。In the above-described embodiment, wiring with a thick line width and wiring with a thin line width are determined to be defective, but the invention is not limited thereto. Wiring with thick line width is not necessarily defective, and wiring with thin line width is not necessarily defective. Therefore, it is not necessary to determine whether the wiring is defective, but only whether the line width of the wiring is thick or thin.
1、1a、1b‧‧‧基板檢查裝置2‧‧‧控制部3、3U、3L‧‧‧檢查部4、4U、4L‧‧‧檢查夾具5‧‧‧顯示部9‧‧‧電極板11‧‧‧框體12‧‧‧基板固定裝置15‧‧‧檢查部移動機構16‧‧‧導體板17‧‧‧絕緣板21‧‧‧檢查控制部22‧‧‧第一判定部23‧‧‧第一斷線位置推斷部24‧‧‧第二判定部25‧‧‧第二斷線位置推斷部26‧‧‧第三判定部27‧‧‧存儲部31‧‧‧電容測定部32‧‧‧交流電壓源33‧‧‧電流檢測部34‧‧‧掃描器部100、100a‧‧‧基板101‧‧‧載體（導體板）102‧‧‧預浸料（絕緣層）103‧‧‧銅箔104‧‧‧預浸料105‧‧‧配線層106‧‧‧層疊配線層（基板）C、Cp1、Cz1、Cz2、Cp2‧‧‧靜電電容Cx、Cx1、Cx2‧‧‧線間電容Cx_lim_L‧‧‧線間下限值Cx_lim_LL線間辨別值Cx_lim_U‧‧‧線間上限值Cx_ref‧‧‧線間基準電容Cz‧‧‧配線電容Cz_lim_L‧‧‧配線下限值Cz_lim_LL‧‧‧配線辨別值Cz_lim_U‧‧‧配線上限值Cz_ref‧‧‧配線基準電容Cp1、Cz1、Cz2、Cp2‧‧‧靜電電容f‧‧‧頻率G1、G2‧‧‧圖表I、Ix、Iz‧‧‧電流K1～K6‧‧‧工序L11、L21‧‧‧第一部分L12、L22‧‧‧第二部分L13、L23‧‧‧貫穿配線P‧‧‧配線P1‧‧‧配線（第一配線）P2‧‧‧配線（第二配線）P3、P4‧‧‧配線Pd11、Pd21、Pd12、Pd22‧‧‧焊墊Posx、Posz‧‧‧斷線位置Pr‧‧‧探針SW1、SW2、SW3‧‧‧開關元件T1、T2‧‧‧端子V‧‧‧電壓S1～S12、S21～S22、S30～S37、S40～S46‧‧‧步驟1, 1a, 1b‧‧‧Substrate inspection device 2‧‧‧Control part 3, 3U, 3L‧‧‧Inspection part 4, 4U, 4L‧‧‧Inspection jig 5‧‧‧Display part 9‧‧‧Electrode plate 11 ‧‧‧Frame 12‧‧‧Substrate fixing device 15‧‧‧Inspection part moving mechanism 16‧‧‧Conductor plate 17‧‧‧Insulation plate 21‧‧‧Inspection control part 22‧‧‧First judgment part 23‧‧ ‧First disconnection position estimation unit 24‧‧‧Second determination unit 25‧‧‧Second disconnection position estimation unit 26‧‧‧Third determination unit 27‧‧‧Storage unit 31‧‧‧Capacitance measurement unit 32‧ ‧‧AC voltage source 33‧‧‧Current detection part 34‧‧‧Scanner part 100, 100a‧‧‧Substrate 101‧‧‧Carrier (conductor plate) 102‧‧‧Prepreg (insulating layer) 103‧‧‧ Copper foil 104‧‧‧Prepreg 105‧‧‧Wiring layer 106‧‧‧Laminated wiring layer (substrate) C, Cp1, Cz1, Cz2, Cp2‧‧‧Electrostatic capacitance Cx, Cx1, Cx2‧‧‧Interline capacitance Cx_lim_L‧‧‧Lower limit value between lines Cx_lim_LL Discrimination value between lines Cx_lim_U‧‧‧Upper limit value between lines Cx_ref‧‧‧Inter-line reference capacitance Cz‧‧‧Wiring capacitance Cz_lim_L‧‧‧Lower limit value of wiring Cz_lim_LL‧‧‧Wiring Discrimination value Cz_lim_U‧‧‧Wiring upper limit value Cz_ref‧‧‧Wiring reference capacitance Cp1, Cz1, Cz2, Cp2‧‧‧Electrostatic capacitance f‧‧‧Frequency G1, G2‧‧‧Chart I, Ix, Iz‧‧‧Current K1～K6‧‧‧Process L11, L21‧‧‧First part L12, L22‧‧‧Second part L13, L23‧‧‧Through wiring P‧‧‧Wiring P1‧‧‧Wiring (first wiring) P2‧‧ ‧Wiring (second wiring) P3, P4‧‧‧Wiring Pd11, Pd21, Pd12, Pd22‧‧‧Pad Posx, Posz‧‧‧Break position Pr‧‧‧Probe SW1, SW2, SW3‧‧‧Switch Components T1, T2‧‧‧Terminal V‧‧‧Voltage S1～S12, S21～S22, S30～S37, S40～S46‧‧‧Steps
圖1是概略性地表示使用本發明的一實施方式的基板檢查方法的基板檢查裝置的結構的概念圖。 圖2是概念性地表示圖1中所示的控制部的結構的一例的方塊圖。 圖3是用以說明成為檢查對象的基板的製造方法的一例的說明圖。 圖4是概念性地表示圖1中所示的基板檢查裝置的結構的說明圖。 圖5是表示圖4中所示的基板檢查裝置的另一例的概念性的說明圖。 圖6是表示圖5中所示的基板檢查裝置的另一例的概念性的說明圖。 圖7是表示圖4、圖5、圖6中所示的基板檢查裝置的動作的一例的流程圖。 圖8是表示圖4、圖5、圖6中所示的基板檢查裝置的動作的一例的流程圖。 圖9是表示圖4、圖5、圖6中所示的基板檢查裝置的動作的一例的流程圖。 圖10是表示圖4、圖5、圖6中所示的基板檢查裝置的動作的一例的流程圖。 圖11是表示配線已斷線時的斷線位置與在此位置上斷線時，由電容測定部所測定的線間電容及配線電容的關係的圖。FIG. 1 is a conceptual diagram schematically showing the structure of a substrate inspection apparatus using a substrate inspection method according to an embodiment of the present invention. FIG. 2 is a block diagram conceptually showing an example of the structure of the control unit shown in FIG. 1 . FIG. 3 is an explanatory diagram for explaining an example of a method of manufacturing a substrate to be inspected. FIG. 4 is an explanatory diagram conceptually showing the structure of the substrate inspection device shown in FIG. 1 . FIG. 5 is a conceptual explanatory diagram showing another example of the substrate inspection device shown in FIG. 4 . FIG. 6 is a conceptual explanatory diagram showing another example of the substrate inspection device shown in FIG. 5 . FIG. 7 is a flowchart showing an example of the operation of the substrate inspection device shown in FIGS. 4 , 5 , and 6 . FIG. 8 is a flowchart showing an example of the operation of the substrate inspection device shown in FIGS. 4 , 5 , and 6 . FIG. 9 is a flowchart showing an example of the operation of the substrate inspection device shown in FIGS. 4 , 5 , and 6 . FIG. 10 is a flowchart showing an example of the operation of the substrate inspection device shown in FIGS. 4 , 5 , and 6 . 11 is a diagram showing the relationship between the disconnection position when the wiring is disconnected and the inter-line capacitance and wiring capacitance measured by the capacitance measuring unit when the wiring is disconnected at this position.
1‧‧‧基板檢查裝置 1‧‧‧Substrate inspection device
31‧‧‧電容測定部 31‧‧‧Capacitance Measurement Department
32‧‧‧交流電壓源 32‧‧‧AC voltage source
33‧‧‧電流檢測部 33‧‧‧Current detection part
34‧‧‧掃描器部 34‧‧‧Scanner Department
100‧‧‧基板 100‧‧‧Substrate
101‧‧‧載體(導體板) 101‧‧‧Carrier (conductor plate)
102‧‧‧預浸料(絕緣層) 102‧‧‧Prepreg (insulation layer)
106‧‧‧層疊配線層(基板) 106‧‧‧Laminated wiring layer (substrate)
Cp1、Cz1、Cz2、Cp2‧‧‧靜電電容 Cp1, Cz1, Cz2, Cp2‧‧‧Electrostatic capacitance
Cx1、Cx2‧‧‧線間電容 Cx1, Cx2‧‧‧Inter-line capacitance
L11、L21‧‧‧第一部分 L11, L21‧‧‧Part 1
L12、L22‧‧‧第二部分 L12, L22‧‧‧Part 2
L13、L23‧‧‧貫穿配線 L13, L23‧‧‧through wiring
P1‧‧‧配線(第一配線) P1‧‧‧Wiring (first wiring)
P2‧‧‧配線(第二配線) P2‧‧‧Wiring (Second Wiring)
P3、P4‧‧‧配線 P3, P4‧‧‧Wiring
Pd11、Pd21、Pd12、Pd22‧‧‧焊墊 Pd11, Pd21, Pd12, Pd22‧‧‧ pad
Pr‧‧‧探針 Pr‧‧‧Probe
SW1、SW2、SW3‧‧‧開關元件 SW1, SW2, SW3‧‧‧switching elements
T1、T2‧‧‧端子 T1, T2‧‧‧ terminals
Claims (5)
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2017-183275 | 2017-09-25 | ||
| JP2017183275A JP6780859B2 (en) | 2017-09-25 | 2017-09-25 | Board inspection device and board inspection method |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| TW201915506A TW201915506A (en) | 2019-04-16 |
| TWI816699B true TWI816699B (en) | 2023-10-01 |
Family
ID=65864519
Family Applications (2)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| TW107133334A TWI816699B (en) | 2017-09-25 | 2018-09-21 | Substrate inspection device and substrate inspection method |
| TW112131984A TW202405466A (en) | 2017-09-25 | 2018-09-21 | Substrate inspection device and substrate inspection method |
Family Applications After (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| TW112131984A TW202405466A (en) | 2017-09-25 | 2018-09-21 | Substrate inspection device and substrate inspection method |
Country Status (4)
| Country | Link |
|---|---|
| JP (1) | JP6780859B2 (en) |
| KR (1) | KR102637836B1 (en) |
| CN (1) | CN109557448B (en) |
| TW (2) | TWI816699B (en) |
Families Citing this family (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP7468047B2 (en) | 2020-03-25 | 2024-04-16 | ニデックアドバンステクノロジー株式会社 | Inspection device and inspection method |
| TW202202862A (en) * | 2020-04-28 | 2022-01-16 | 日商日本電產理德股份有限公司 | Inspection device and inspection method |
| CN113092871B (en) * | 2021-03-19 | 2022-02-22 | 北京航空航天大学 | Capacitance measuring method based on electrostatic self-excited vibration principle |
Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS57187668A (en) * | 1981-05-14 | 1982-11-18 | Fujitsu Ltd | Wiring method for printed-wiring plate |
| JP2002014134A (en) * | 2000-06-30 | 2002-01-18 | Hioki Ee Corp | Device for inspecting circuit board |
| JP2005337979A (en) * | 2004-05-28 | 2005-12-08 | Hioki Ee Corp | Electrostatic capacity measuring method, circuit board inspection method, electrostatic capacity measuring instrument, and circuit board inspection device |
| JP2015109392A (en) * | 2013-12-05 | 2015-06-11 | 株式会社イースタン | Manufacturing method of wiring board |
Family Cites Families (11)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5006808A (en) * | 1989-03-21 | 1991-04-09 | Bath Scientific Limited | Testing electrical circuits |
| JP4402190B2 (en) * | 1999-02-16 | 2010-01-20 | 大日本印刷株式会社 | Non-contact type IC card substrate with built-in capacitor and method for manufacturing non-contact type IC card with built-in capacitor |
| JP2000250057A (en) * | 1999-03-04 | 2000-09-14 | Rohm Co Ltd | Method for inspecting transparent electrode pattern in liquid crystal display device |
| JP4251722B2 (en) | 1999-07-02 | 2009-04-08 | 日置電機株式会社 | Circuit board inspection equipment |
| JP2007183165A (en) * | 2006-01-06 | 2007-07-19 | Nec Kagoshima Ltd | Method and device for inspecting wiring defect |
| KR20080092522A (en) * | 2007-04-12 | 2008-10-16 | 마이크로 인스펙션 주식회사 | Inspection apparatus of a circuit substrate |
| JP4843071B2 (en) * | 2009-06-04 | 2011-12-21 | マイクロクラフト株式会社 | Inspection apparatus and inspection method for printed wiring board |
| JP5899961B2 (en) * | 2012-01-24 | 2016-04-06 | 日本電産リード株式会社 | Insulation inspection device and insulation inspection method |
| JP6248406B2 (en) * | 2013-04-09 | 2017-12-20 | 日本電産リード株式会社 | Inspection apparatus and inspection method |
| JP6414389B2 (en) * | 2014-04-21 | 2018-10-31 | 日本電産リード株式会社 | Inspection jig, substrate inspection apparatus, and substrate inspection method |
| JP6421463B2 (en) * | 2014-06-02 | 2018-11-14 | 日本電産リード株式会社 | Substrate inspection apparatus and substrate inspection method |
-
2017
- 2017-09-25 JP JP2017183275A patent/JP6780859B2/en active Active
-
2018
- 2018-09-10 KR KR1020180107832A patent/KR102637836B1/en active IP Right Grant
- 2018-09-21 TW TW107133334A patent/TWI816699B/en active
- 2018-09-21 TW TW112131984A patent/TW202405466A/en unknown
- 2018-09-21 CN CN201811109766.8A patent/CN109557448B/en active Active
Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS57187668A (en) * | 1981-05-14 | 1982-11-18 | Fujitsu Ltd | Wiring method for printed-wiring plate |
| JP2002014134A (en) * | 2000-06-30 | 2002-01-18 | Hioki Ee Corp | Device for inspecting circuit board |
| JP2005337979A (en) * | 2004-05-28 | 2005-12-08 | Hioki Ee Corp | Electrostatic capacity measuring method, circuit board inspection method, electrostatic capacity measuring instrument, and circuit board inspection device |
| JP2015109392A (en) * | 2013-12-05 | 2015-06-11 | 株式会社イースタン | Manufacturing method of wiring board |
Also Published As
| Publication number | Publication date |
|---|---|
| CN109557448B (en) | 2022-12-20 |
| JP6780859B2 (en) | 2020-11-04 |
| CN109557448A (en) | 2019-04-02 |
| TW201915506A (en) | 2019-04-16 |
| KR102637836B1 (en) | 2024-02-16 |
| KR20190035510A (en) | 2019-04-03 |
| TW202405466A (en) | 2024-02-01 |
| JP2019060627A (en) | 2019-04-18 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| TWI816699B (en) | Substrate inspection device and substrate inspection method | |
| JP3285568B2 (en) | Board wiring inspection apparatus and wiring inspection method | |
| JP2009004585A (en) | Printed-circuit board manufacturing method, and printed-circuit board | |
| TW201405132A (en) | Probe card and testing apparatus | |
| JP6765125B2 (en) | Resistance measuring device, substrate inspection device, and resistance measuring method | |
| KR20080044785A (en) | Insulation inspection apparatus and method | |
| KR20070083501A (en) | Inspecting apparatus, inspecting method and sensor for inspecting apparatus | |
| JP2010243256A (en) | Substrate inspection method and substrate inspection device | |
| JPH01283993A (en) | Circuit printed board, its surface mounting component position recognition device and surface mounting component inspecting device | |
| JP5420277B2 (en) | Circuit board inspection apparatus and circuit board inspection method | |
| JP7468047B2 (en) | Inspection device and inspection method | |
| TWI809813B (en) | Resistance measuring device and resistance measuring method | |
| JP6885612B2 (en) | Resistance measuring device and resistance measuring method | |
| JP3619819B2 (en) | Substrate inspection apparatus and substrate inspection method | |
| US8519388B2 (en) | Embedded structure for passivation integrity testing | |
| WO2021220942A1 (en) | Inspection device and inspection method | |
| JP2004361249A (en) | Substrate inspection device | |
| JP2005017221A (en) | Substrate inspecting method and device therefor | |
| JP2020128881A (en) | Short circuit inspection system, and short circuit inspection method | |
| JP2005049314A (en) | Probing test method and probe condition detector | |
| JP7468164B2 (en) | Wiring board and inspection method thereof | |
| JP6255833B2 (en) | Substrate inspection method and substrate inspection apparatus | |
| JP2009150731A (en) | Apparatus and method for substrate inspection | |
| JP2008159641A (en) | Semiconductor substrate and inspection method of semiconductor device | |
| JP2002311054A (en) | Probe card, measuring device and measuring method of electronic circuit device |