TWI809284B - 異向導電膜、連接構造體及連接構造體之製造方法 - Google Patents
異向導電膜、連接構造體及連接構造體之製造方法 Download PDFInfo
- Publication number
- TWI809284B TWI809284B TW109121150A TW109121150A TWI809284B TW I809284 B TWI809284 B TW I809284B TW 109121150 A TW109121150 A TW 109121150A TW 109121150 A TW109121150 A TW 109121150A TW I809284 B TWI809284 B TW I809284B
- Authority
- TW
- Taiwan
- Prior art keywords
- conductive particles
- anisotropic conductive
- conductive film
- holes
- semiconductor substrate
- Prior art date
Links
Images
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L24/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
- H01L24/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L24/27—Manufacturing methods
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/10—Bump connectors ; Manufacturing methods related thereto
- H01L24/11—Manufacturing methods
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/10—Bump connectors ; Manufacturing methods related thereto
- H01L24/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
- H01L24/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/10—Bump connectors ; Manufacturing methods related thereto
- H01L24/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
- H01L24/14—Structure, shape, material or disposition of the bump connectors prior to the connecting process of a plurality of bump connectors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/10—Bump connectors ; Manufacturing methods related thereto
- H01L24/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L24/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/10—Bump connectors ; Manufacturing methods related thereto
- H01L24/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L24/17—Structure, shape, material or disposition of the bump connectors after the connecting process of a plurality of bump connectors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/73—Means for bonding being of different types provided for in two or more of groups H01L24/10, H01L24/18, H01L24/26, H01L24/34, H01L24/42, H01L24/50, H01L24/63, H01L24/71
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L24/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L24/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/91—Methods for connecting semiconductor or solid state bodies including different methods provided for in two or more of groups H01L24/80 - H01L24/90
- H01L24/92—Specific sequence of method steps
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
- H01L25/03—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
- H01L25/04—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
- H01L25/065—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L27/00
- H01L25/0657—Stacked arrangements of devices
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
- H01L25/50—Multistep manufacturing processes of assemblies consisting of devices, each device being of a type provided for in group H01L27/00 or H01L29/00
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/11—Manufacturing methods
- H01L2224/11001—Involving a temporary auxiliary member not forming part of the manufacturing apparatus, e.g. removable or sacrificial coating, film or substrate
- H01L2224/11003—Involving a temporary auxiliary member not forming part of the manufacturing apparatus, e.g. removable or sacrificial coating, film or substrate for holding or transferring the bump preform
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/11—Manufacturing methods
- H01L2224/111—Manufacture and pre-treatment of the bump connector preform
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
- H01L2224/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
- H01L2224/13001—Core members of the bump connector
- H01L2224/13075—Plural core members
- H01L2224/13078—Plural core members being disposed next to each other, e.g. side-to-side arrangements
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
- H01L2224/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
- H01L2224/13001—Core members of the bump connector
- H01L2224/13075—Plural core members
- H01L2224/1308—Plural core members being stacked
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
- H01L2224/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
- H01L2224/13001—Core members of the bump connector
- H01L2224/13099—Material
- H01L2224/131—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
- H01L2224/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
- H01L2224/13001—Core members of the bump connector
- H01L2224/13099—Material
- H01L2224/131—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
- H01L2224/13138—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
- H01L2224/13139—Silver [Ag] as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
- H01L2224/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
- H01L2224/13001—Core members of the bump connector
- H01L2224/13099—Material
- H01L2224/131—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
- H01L2224/13138—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
- H01L2224/13144—Gold [Au] as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
- H01L2224/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
- H01L2224/13001—Core members of the bump connector
- H01L2224/13099—Material
- H01L2224/131—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
- H01L2224/13138—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
- H01L2224/13147—Copper [Cu] as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
- H01L2224/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
- H01L2224/13001—Core members of the bump connector
- H01L2224/13099—Material
- H01L2224/131—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
- H01L2224/13138—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
- H01L2224/13155—Nickel [Ni] as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
- H01L2224/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
- H01L2224/13001—Core members of the bump connector
- H01L2224/13099—Material
- H01L2224/131—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
- H01L2224/13138—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
- H01L2224/13157—Cobalt [Co] as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
- H01L2224/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
- H01L2224/13001—Core members of the bump connector
- H01L2224/13099—Material
- H01L2224/131—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
- H01L2224/13163—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than 1550°C
- H01L2224/13164—Palladium [Pd] as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
- H01L2224/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
- H01L2224/13001—Core members of the bump connector
- H01L2224/13099—Material
- H01L2224/1319—Material with a principal constituent of the material being a polymer, e.g. polyester, phenolic based polymer, epoxy
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
- H01L2224/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
- H01L2224/13001—Core members of the bump connector
- H01L2224/13099—Material
- H01L2224/13198—Material with a principal constituent of the material being a combination of two or more materials in the form of a matrix with a filler, i.e. being a hybrid material, e.g. segmented structures, foams
- H01L2224/13298—Fillers
- H01L2224/13299—Base material
- H01L2224/133—Base material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
- H01L2224/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
- H01L2224/1354—Coating
- H01L2224/13599—Material
- H01L2224/13686—Material with a principal constituent of the material being a non metallic, non metalloid inorganic material
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
- H01L2224/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
- H01L2224/1354—Coating
- H01L2224/13599—Material
- H01L2224/1369—Material with a principal constituent of the material being a polymer, e.g. polyester, phenolic based polymer, epoxy
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
- H01L2224/14—Structure, shape, material or disposition of the bump connectors prior to the connecting process of a plurality of bump connectors
- H01L2224/1401—Structure
- H01L2224/1403—Bump connectors having different sizes, e.g. different diameters, heights or widths
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
- H01L2224/1605—Shape
- H01L2224/16057—Shape in side view
- H01L2224/16058—Shape in side view being non uniform along the bump connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
- H01L2224/1605—Shape
- H01L2224/16057—Shape in side view
- H01L2224/16059—Shape in side view comprising protrusions or indentations
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
- H01L2224/161—Disposition
- H01L2224/16135—Disposition the bump connector connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
- H01L2224/16145—Disposition the bump connector connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being stacked
- H01L2224/16146—Disposition the bump connector connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being stacked the bump connector connecting to a via connection in the semiconductor or solid-state body
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
- H01L2224/161—Disposition
- H01L2224/16135—Disposition the bump connector connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
- H01L2224/16145—Disposition the bump connector connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being stacked
- H01L2224/16147—Disposition the bump connector connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being stacked the bump connector connecting to a bonding area disposed in a recess of the surface
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
- H01L2224/161—Disposition
- H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/16227—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation the bump connector connecting to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
- H01L2224/161—Disposition
- H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/16235—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation the bump connector connecting to a via metallisation of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
- H01L2224/161—Disposition
- H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/16237—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation the bump connector connecting to a bonding area disposed in a recess of the surface of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/17—Structure, shape, material or disposition of the bump connectors after the connecting process of a plurality of bump connectors
- H01L2224/171—Disposition
- H01L2224/17104—Disposition relative to the bonding areas, e.g. bond pads
- H01L2224/17106—Disposition relative to the bonding areas, e.g. bond pads the bump connectors being bonded to at least one common bonding area
- H01L2224/17107—Disposition relative to the bonding areas, e.g. bond pads the bump connectors being bonded to at least one common bonding area the bump connectors connecting two common bonding areas
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/27—Manufacturing methods
- H01L2224/27001—Involving a temporary auxiliary member not forming part of the manufacturing apparatus, e.g. removable or sacrificial coating, film or substrate
- H01L2224/27003—Involving a temporary auxiliary member not forming part of the manufacturing apparatus, e.g. removable or sacrificial coating, film or substrate for holding or transferring the layer preform
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/27—Manufacturing methods
- H01L2224/271—Manufacture and pre-treatment of the layer connector preform
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/27—Manufacturing methods
- H01L2224/275—Manufacturing methods by chemical or physical modification of a pre-existing or pre-deposited material
- H01L2224/27515—Curing and solidification, e.g. of a photosensitive layer material
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
- H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
- H01L2224/29001—Core members of the layer connector
- H01L2224/29075—Plural core members
- H01L2224/2908—Plural core members being stacked
- H01L2224/29082—Two-layer arrangements
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
- H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
- H01L2224/29001—Core members of the layer connector
- H01L2224/29099—Material
- H01L2224/2919—Material with a principal constituent of the material being a polymer, e.g. polyester, phenolic based polymer, epoxy
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
- H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
- H01L2224/29001—Core members of the layer connector
- H01L2224/29099—Material
- H01L2224/29198—Material with a principal constituent of the material being a combination of two or more materials in the form of a matrix with a filler, i.e. being a hybrid material, e.g. segmented structures, foams
- H01L2224/29199—Material of the matrix
- H01L2224/2929—Material of the matrix with a principal constituent of the material being a polymer, e.g. polyester, phenolic based polymer, epoxy
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
- H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
- H01L2224/29001—Core members of the layer connector
- H01L2224/29099—Material
- H01L2224/29198—Material with a principal constituent of the material being a combination of two or more materials in the form of a matrix with a filler, i.e. being a hybrid material, e.g. segmented structures, foams
- H01L2224/29298—Fillers
- H01L2224/29299—Base material
- H01L2224/29386—Base material with a principal constituent of the material being a non metallic, non metalloid inorganic material
- H01L2224/29387—Ceramics, e.g. crystalline carbides, nitrides or oxides
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/321—Disposition
- H01L2224/32135—Disposition the layer connector connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
- H01L2224/32145—Disposition the layer connector connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being stacked
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/321—Disposition
- H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/32225—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/731—Location prior to the connecting process
- H01L2224/73101—Location prior to the connecting process on the same surface
- H01L2224/73103—Bump and layer connectors
- H01L2224/73104—Bump and layer connectors the bump connector being embedded into the layer connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
- H01L2224/811—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector the bump connector being supplied to the parts to be connected in the bonding apparatus
- H01L2224/81101—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector the bump connector being supplied to the parts to be connected in the bonding apparatus as prepeg comprising a bump connector, e.g. provided in an insulating plate member
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
- H01L2224/8112—Aligning
- H01L2224/81121—Active alignment, i.e. by apparatus steering, e.g. optical alignment using marks or sensors
- H01L2224/81122—Active alignment, i.e. by apparatus steering, e.g. optical alignment using marks or sensors by detecting inherent features of, or outside, the semiconductor or solid-state body
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
- H01L2224/819—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector with the bump connector not providing any mechanical bonding
- H01L2224/81901—Pressing the bump connector against the bonding areas by means of another connector
- H01L2224/81903—Pressing the bump connector against the bonding areas by means of another connector by means of a layer connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
- H01L2224/831—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector the layer connector being supplied to the parts to be connected in the bonding apparatus
- H01L2224/83101—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector the layer connector being supplied to the parts to be connected in the bonding apparatus as prepeg comprising a layer connector, e.g. provided in an insulating plate member
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
- H01L2224/8312—Aligning
- H01L2224/83121—Active alignment, i.e. by apparatus steering, e.g. optical alignment using marks or sensors
- H01L2224/83122—Active alignment, i.e. by apparatus steering, e.g. optical alignment using marks or sensors by detecting inherent features of, or outside, the semiconductor or solid-state body
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
- H01L2224/832—Applying energy for connecting
- H01L2224/83201—Compression bonding
- H01L2224/83203—Thermocompression bonding, e.g. diffusion bonding, pressure joining, thermocompression welding or solid-state welding
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
- H01L2224/838—Bonding techniques
- H01L2224/8385—Bonding techniques using a polymer adhesive, e.g. an adhesive based on silicone, epoxy, polyimide, polyester
- H01L2224/83855—Hardening the adhesive by curing, i.e. thermosetting
- H01L2224/83856—Pre-cured adhesive, i.e. B-stage adhesive
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/91—Methods for connecting semiconductor or solid state bodies including different methods provided for in two or more of groups H01L2224/80 - H01L2224/90
- H01L2224/92—Specific sequence of method steps
- H01L2224/921—Connecting a surface with connectors of different types
- H01L2224/9211—Parallel connecting processes
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2225/00—Details relating to assemblies covered by the group H01L25/00 but not provided for in its subgroups
- H01L2225/03—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00
- H01L2225/04—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices not having separate containers
- H01L2225/065—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices not having separate containers the devices being of a type provided for in group H01L27/00
- H01L2225/06503—Stacked arrangements of devices
- H01L2225/06513—Bump or bump-like direct electrical connections between devices, e.g. flip-chip connection, solder bumps
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2225/00—Details relating to assemblies covered by the group H01L25/00 but not provided for in its subgroups
- H01L2225/03—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00
- H01L2225/04—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices not having separate containers
- H01L2225/065—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices not having separate containers the devices being of a type provided for in group H01L27/00
- H01L2225/06503—Stacked arrangements of devices
- H01L2225/06517—Bump or bump-like direct electrical connections from device to substrate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2225/00—Details relating to assemblies covered by the group H01L25/00 but not provided for in its subgroups
- H01L2225/03—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00
- H01L2225/04—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices not having separate containers
- H01L2225/065—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices not having separate containers the devices being of a type provided for in group H01L27/00
- H01L2225/06503—Stacked arrangements of devices
- H01L2225/06541—Conductive via connections through the device, e.g. vertical interconnects, through silicon via [TSV]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2225/00—Details relating to assemblies covered by the group H01L25/00 but not provided for in its subgroups
- H01L2225/03—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00
- H01L2225/04—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices not having separate containers
- H01L2225/065—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices not having separate containers the devices being of a type provided for in group H01L27/00
- H01L2225/06503—Stacked arrangements of devices
- H01L2225/06555—Geometry of the stack, e.g. form of the devices, geometry to facilitate stacking
- H01L2225/06565—Geometry of the stack, e.g. form of the devices, geometry to facilitate stacking the devices having the same size and there being no auxiliary carrier between the devices
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2225/00—Details relating to assemblies covered by the group H01L25/00 but not provided for in its subgroups
- H01L2225/03—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00
- H01L2225/04—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices not having separate containers
- H01L2225/065—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices not having separate containers the devices being of a type provided for in group H01L27/00
- H01L2225/06503—Stacked arrangements of devices
- H01L2225/06589—Thermal management, e.g. cooling
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L24/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L24/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/00015—Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed as prior art
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/30—Technical effects
- H01L2924/38—Effects and problems related to the device integration
- H01L2924/384—Bump effects
- H01L2924/3841—Solder bridging
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Computer Hardware Design (AREA)
- Manufacturing & Machinery (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Non-Insulated Conductors (AREA)
- Wire Bonding (AREA)
- Production Of Multi-Layered Print Wiring Board (AREA)
- Adhesive Tapes (AREA)
- Combinations Of Printed Boards (AREA)
- Electric Connection Of Electric Components To Printed Circuits (AREA)
- Laminated Bodies (AREA)
- Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)
Abstract
本發明提供一種多層基板,其係將具有內表面形成有鍍膜之貫通孔(以下,稱為通孔)之半導體基板積層而成者,導通特性優異,且可低成本地製造。於多層基板之俯視時,導電粒子選擇性地存在於通孔對向之位置。多層基板具有對向之通孔藉由導電粒子而連接,且形成有該通孔之半導體基板彼此藉由絕緣接著劑而接著之連接構造。
Description
本發明係關於一種多層基板。
於IC之高密度安裝領域,使用將組裝有IC等電子零件之半導體基板積層而成之多層基板。
作為多層基板之製造方法,存在將具有凸塊之貫通電極形成於各個半導體基板,藉由凸塊之回焊將對向之半導體基板之貫通電極彼此連接之方法(專利文獻1);或於對向之半導體基板之間,夾持絕緣接著劑層中分散有導電粒子之異向導電膜,進行加熱加壓而將貫通電極彼此連接之方法(專利文獻2)。
於該情形時,如圖14所示,貫通電極6一般係藉由以下方式形成:於(a)半導體基板3(b)形成貫通孔4h,(c)藉由利用無電解鍍敷形成鍍膜4a,將其圖案化,於貫通孔4h之內部殘留鍍膜4a而形成通孔,(d)進而藉由對既定之圖案設置遮罩進行電解鍍敷而於通孔內填充金屬5。
先前技術文獻
專利文獻
專利文獻1:日本專利特開2010-272737號公報
專利文獻2:日本專利特開平8-330736號公報
[發明所欲解決之課題]
然而,於各個半導體基板之貫通電極形成凸塊,將對向之半導體基板之貫通電極藉由焊料之回焊而連接,從而將半導體基板積層之方法之製造步驟繁雜。
於將對向之貫通電極使用異向導電膜連接,而將半導體基板積層之方法中,雖可某種程度地簡化多層基板之製造步驟,但由於異向導電膜係於絕緣接著劑層隨機分散有導電粒子者,故而存在由於有異向導電膜之導電粒子未被充分夾持於對向之半導體基板之貫通電極間之情形而導致導通特性不均之問題。另一方面,亦存在由於無助於貫通電極之連接之導電粒子大量存在於對向之半導體基板間,而無用之導電粒子耗費成本之問題。
因此,本發明之課題在於利用簡便之製造步驟低成本地提供一種使用異向導電膜將半導體基板積層,且導通特性優異之多層基板。
[解決課題之技術手段]
本發明者於使用異向導電膜將半導體基板積層而製造多層基板時,發現若對在貫通電極之形成之前階段所形成之通孔選擇性地配置異向導電膜之絕緣接著劑中之導電粒子,並使用該異向導電膜將對向之半導體基板之通孔連接,則可利用導電粒子將對向之通孔確實地連接,又,可減少無助於連接之導電粒子數量,多層基板之製造步驟亦顯著地簡化,可減少多層基板之製造成本,從而思及本發明。
即,本發明提供一種多層基板,其係將具有通孔之半導體基板積層而成者,於多層基板之俯視時,導電粒子選擇性地存在於通孔對向之位置,且
該多層基板具有對向之通孔藉由導電粒子而連接,形成有該通孔之半導體基板彼此藉由絕緣接著劑而接著之連接構造。
作為該多層基板,尤其是提供一種多層基板,其係將具有通孔之第1半導體基板及具有通孔之第2半導體基板積層而成者,且
具有如下連接構造:第1半導體基板之通孔與第2半導體基板之通孔對向,且藉由選擇性地配置於該等之間之導電粒子而連接,
第1半導體基板與第2半導體基板利用絕緣接著劑而接著。
又,本發明提供一種多層基板之製造方法,其係使形成於半導體基板之通孔彼此對向而接合者,將對應於通孔對向之部分於多層基板之俯視時之位置而於絕緣接著劑層選擇性地配置有導電粒子之異向導電膜夾持於具有通孔之半導體基板彼此之間,對該異向導電膜進行加熱加壓,藉此,將該等半導體基板進行異向導電性連接。
作為該多層基板之製造方法,尤其是提供一種多層基板之製造方法,其係將具有通孔之第1半導體基板及具有通孔之第2半導體基板以使該等之通孔彼此對向之方式進行接合者,於第1半導體基板與第2半導體基板之間,夾持對應於通孔之配置而於絕緣接著劑層選擇性地配置有導電粒子之異向導電膜,對該異向導電膜進行加熱加壓,藉此,將第1半導體基板與第2半導體基板進行異向導電性連接。
進而,作為於上述多層基板之製造方法中使用之異向導電膜,本發明提供一種異向導電膜,其對應於利用異向導電膜連接之通孔之配置而於絕緣接著劑層選擇性地配置有導電粒子。
又,作為對上述多層基板之製造方法有用之異向導電膜,提供一種異向導電膜,其係包含絕緣接著劑層與配置於該絕緣接著劑層之導電粒子者,且形成有2個以上之導電粒子靠近之導電粒子單元,於導電粒子單元中包含至少大小或種類不同之複數個導電粒子。
[發明之效果]
根據本發明之多層基板,半導體基板之通孔彼此由導電粒子確實地連接,因而導通特性穩定。
又,於半導體基板,不將金屬填充於通孔內而形成貫通電極,而利用導電粒子將通孔彼此連接,且因無助於連接之導電粒子於半導體基板間減少,而多層基板之製造成本被顯著地抑制。又,由於相同原因,對儀器步驟數之減少亦有效。
進而,本發明之多層基板可藉由使用既定之異向導電膜而以簡便之步驟製造。
尤其是於積層3片以上之半導體基板而成之多層基板之情形時,若於積層之半導體基板間使用共用之異向導電膜,則可大幅降低多層基板之總製造成本。因此,能夠以更低價格提供本發明之多層基板。
以下,一面參照圖式一面對本發明詳細地進行說明。再者,於各圖中,相同符號表示相同或同等之構成要素。
<多層基板中之連接構造>
圖1係本發明之一實施態樣之多層基板1A之剖視圖。
該多層基板1A係於配線基板2積層3層半導體基板3A、3B、3C者,各半導體基板3A、3B、3C係形成有IC等半導體零件之半導體晶圓。又,於配線基板2形成有通孔4X,於各半導體基板3A、3B、3C形成有通孔4A、4B、4C,於通孔4X露出於配線基板2之表面之部分、或通孔4A、4B、4C露出於半導體基板之表面之部分,分別形成有電極墊9。再者,於本發明中,作為半導體基板3A、3B、3C,亦可使用半導體晶片。又,於本發明中,構成多層基板之半導體基板之積層數並無特別限定。
多層基板1A有如下連接構造:第1半導體基板3A之通孔4A與第2半導體基板3B之通孔4B對向,且利用選擇性地配置於該等之間之導電粒子11電性連接。於該連接構造中,所謂導電粒子11選擇性地配置於對向之通孔4A、4B之間,意指導電粒子11以俯視時主要存在於通孔4A、4B之對向面或其附近,且由通孔4A、4B捕捉1個以上之導電粒子11之方式配置。於兼顧成本及性能之方面而言,較佳為以捕捉1〜十多個之方式配置。複數個導電粒子亦可於膜厚方向重疊。又,於複數個導電粒子11存在於通孔4A、4B之對向面之情形時,該導電粒子之大小、種類等亦可不同。再者,於將複數個導電粒子11配置於通孔4A、4B之對向面之情形時,可緩和半導體基板3A、3B與導電粒子11之位置對準之精度。
第1半導體基板3A與第2半導體基板3B之對向面彼此係藉由絕緣接著劑12而接著。絕緣接著劑12係由下述異向導電膜之絕緣接著劑層形成。
又,與第1半導體基板3A之通孔4A連接之第2半導體基板3B之通孔4B於第3半導體基板3C側,亦與第3半導體基板3C之通孔4C對向,且藉由選擇性地配置於該等之間之導電粒子11而將第2半導體基板3B之通孔4B與第3半導體基板3C之通孔4C電性連接。該第2半導體基板3B與第3半導體基板3C之對向面彼此亦藉由絕緣接著劑12而接著。又,配線基板2之通孔4X與第1半導體基板3A之通孔4A亦同樣地藉由導電粒子11而連接。如此,多層基板1A具有配線基板2之通孔4X與3層半導體基板之通孔4A、4B、4C於多層基板之積層方向直線狀地相連之連接構造。根據該各層之通孔直線狀地相連之連接構造,電性傳輸之路徑變短,因此可提昇傳輸速度。
再者,多層基板1A係如下所述藉由使用導電粒子具有既定之配置之本發明之異向導電膜來連接構成多層基板之各層而製造。於該情形時,即便於第1半導體基板3A與第2半導體基板3B之間存在未由對向之通孔4A、4B捕捉之導電粒子11,此種導電粒子11之數量亦較佳為存在於第1半導體基板與第2半導體基板之間之導電粒子之總數之5%以下,更佳為0.5%以下,尤佳為使導電粒子11之幾乎全部由通孔4A、4B捕捉。於構成多層基板1A之其他半導體基板間亦相同。藉由如此減少無助於通孔4A、4B、4C之連接之導電粒子11,可容易模擬分析性能,減少改善步驟數。
<配線基板>
此處,作為構成多層基板1A之配線基板2,可使用FR4等環氧玻璃基板等。作為配線基板2,亦可使用IC晶片或者IC形成用之矽晶圓。配線基板2係根據多層基板1A之用途等而適當選擇。
又,於配線基板2之電極部分,亦可視需要設置焊料球8。
<半導體基板>
作為半導體基板3A、3B、3C,只要為具有通孔4A、4B、4C者,則並無特別限定,例如,可使用矽等一般之半導體材料等。
通孔4A、4B、4C之規格可適當設定。例如,通孔4A、4B、4C較佳為具備電極墊9。又,於將半導體基板3A、3B、3C積層之情形時,較佳為以各半導體基板3A、3B、3C之通孔4A、4B、4C於多層基板1A之厚度方向跨及至少2層半導體基板直線狀地相連之方式,較佳以跨及多層基板1A之正面及背面直線狀地相連之方式配置通孔4A、4B、4C。
<搭載零件>
於本發明之多層基板,可視需要搭載各種零件。
例如,圖2所示之多層基板1B具有各層之通孔4X、4A、4B、4C直線狀地相連之連接構造,且於最外層具有連接於通孔4C之散熱用之散熱器7。因此,多層基板1B能夠利用散熱器7將自形成於配線基板2或半導體基板3A、3B、3C之IC等電子零件等釋放之熱有效率地進行散熱。
<多層基板之製造方法>
作為本發明之多層基板之製造方法,例如,於圖2之多層基板1B之情形時,首先,如圖3A所示,於具有通孔4X之配線基板2與具有通孔4A之半導體基板3A之間,夾持對應於應連接之通孔4X、4A之配置而於絕緣接著劑層12選擇性地配置有導電粒子11之本發明之異向導電膜10A,並對異向導電膜10A進行加熱加壓,藉此將配線基板2與第1半導體基板3A進行異向導電性連接,獲得圖3B所示之2層連接構造體。更具體而言,使配線基板2與異向導電膜10A以應連接之通孔4X與導電粒子11之配置吻合之方式進行位置對準並重疊,進而使第1半導體基板3A亦同樣地進行位置對準並重疊,進行加熱加壓而將該等進行異向導電性連接。該位置對準亦可藉由使用CCD等觀測異向導電膜之與通孔對應之導電粒子(於如下所述形成有粒子群之情形時,為構成該粒子群之導電粒子)及通孔,將該等重疊而進行。
同樣地,如圖3C所示,使第1半導體基板3A與異向導電膜10B進行位置對準並重疊,於其上使第2半導體基板3B進行位置對準並重疊,進行加熱加壓而進行異向導電性連接,獲得圖3D所示之3層連接構造。進而以同樣之方式於第2半導體基板3B之上使異向導電膜與第3半導體基板3C進行位置對準並重疊,進行加熱加壓。
再者,於使用異向導電膜連接配線基板與半導體基板之情形時,或者,於連接半導體基板彼此之情形時,首先,將一基板與異向導電膜進行位置對準並重疊,進行加熱加壓而將異向導電膜之導電粒子與該基板之通孔接合,藉此使導電粒子進入至通孔內,其次使對向之基板重疊,而可將該基板與前一基板之通孔及導電粒子接合。
其後,於第3半導體基板3C上藉由導熱性膠帶等而連接散熱器7,於配線基板2之電極墊9形成焊料球8,藉由常規方法而獲得多層基板1B。或者,亦可設置導電粒子代替焊料球8。
再者,作為配線基板2或半導體基板3A、3B、3C與異向導電膜10A、10B之位置對準之方法,亦可藉由於配線基板2、半導體基板3A、3B、3C及異向導電膜10A、10B分別預先標註對準標記,匹配該等對準標記而進行位置對準。
即,以往於將半導體基板積層而製造多層基板之情形時,作為一例,於半導體基板形成數十μm〜數百μm大小之對準標記,使用CCD或雷射而進行半導體基板彼此之位置對準。另一方面,由於在異向導電膜,導電粒子係單分散或格子狀地配置,故而未於異向導電膜標註對準標記。與此相對,本發明中所使用之異向導電膜係對應於應連接之通孔之配置而於絕緣接著劑層12選擇性地配置有導電粒子11者,故而可將導電粒子11之配置作為對準標記之代替。較佳為於異向導電膜設置一些亦包括此種導電粒子之配置在內之對準標記。
<異向導電膜>
本發明之多層基板之製造方法所使用之本發明之異向導電膜係對應於應連接之通孔之配置而於絕緣接著劑層12選擇性地配置有導電粒子11者,較佳為形成有對準標記者。作為對準標記,較佳為藉由配置導電粒子而形成者。藉此,可明確地檢測對準標記,且無需追加用以於異向導電膜標註對準標記之新步驟。另一方面,對準標記亦可藉由利用雷射照射等使絕緣接著劑層12局部地硬化而形成。藉此,容易變更標註對準標記之位置。
作為此種異向導電膜之製造方法,藉由對金屬板進行機械加工、雷射加工、光微影等公知之加工方法而製作具有與導電粒子11之配置對應之凸部之模具,對該模具填充硬化性樹脂,使之硬化,藉此製造凹凸反轉之樹脂模具,將導電粒子放入至該樹脂模具之凹部,於其上填充絕緣接著劑層形成用組成物,使之硬化,自模具取出即可。
又,為了將導電粒子11以既定之配置放置於絕緣接著劑層12,亦可為於絕緣接著劑層形成組成物層之上設置以既定之配置形成有貫通孔之構件,自其上供給導電粒子11,並使之通過貫通孔等方法。
<形成異向導電膜之導電粒子>
作為異向導電膜10所使用之導電粒子11,可自用於公知之異向導電膜者中適當選擇而使用。例如可列舉:焊料、鎳、鈷、銀、銅、金、鈀等金屬粒子、金屬被覆樹脂粒子等。金屬被覆樹脂粒子之金屬被覆可利用無電解鍍敷法、濺鍍法等公知之金屬膜形成方法而形成。金屬被覆只要形成於芯樹脂材之表面,則並無特別限定。芯樹脂材既可僅由樹脂形成,亦可為了提昇導通可靠性而設為含有導電微粒子者。
作為導電粒子,於上述粒子中,就導通可靠性及成本之方面而言,較佳為使用焊料粒子。另一方面,於在後續步驟中無需回焊步驟之情形等,較佳為使用金屬被覆樹脂粒子。其原因在於,於本發明中,由於係藉由對絕緣性接著劑層配置有導電粒子之異向導電膜進行加熱加壓而進行通孔彼此之連接或半導體基板彼此之接著,故而若將金屬被覆樹脂粒子用作導電粒子,則可使加熱加壓低溫化,絕緣性接著劑之材料選擇之範圍擴大。
又,作為導電粒子,亦可併用大小、種類等不同之2種以上之粒子。
<異向導電膜中之導電粒子之配置>
於異向導電膜中,就通孔彼此之接合之穩定性之方面而言,導電粒子11之配置、粒徑及種類可根據通孔之開口直徑等進行適當選擇。
例如,如圖3C、圖3D所示,於在通孔4A、4B之對向部位配置1個導電粒子11之情形時,通常較佳為使導電粒子11之粒徑大於通孔4A、4X之開口直徑。於導電粒子11由焊料粒子形成之情形時,如圖4A、圖4B所示,雖然通孔之鍍膜4a容易被因異向導電性連接時之加熱加壓而熔融之焊料粒子潤濕,但於該情形時亦較佳為將導電粒子11之粒徑設為通孔4A、4B之開口直徑以上。藉此,可利用通孔4A、4B按壓導電粒子11,而將通孔4A、4B利用導電粒子11確實地連接。
又,於導電粒子之粒徑小於通孔之開口直徑之情形時,較佳為如圖5A所示之異向導電膜10般,將使複數個導電粒子11鄰接之粒子群11a之直徑設為大於通孔4A、4B之開口直徑,而如圖5B所示,利用導電粒子11確實地連接對向之通孔4A、4B。藉由利用由複數個導電粒子所構成之粒子群11a將通孔4A、4B連接,而與利用一個一個導電粒子進行連接之情形相比,亦可使連接後之導通電阻穩固化。
如圖6A所示之異向導電膜10般,由複數個導電粒子11所構成之粒子群11a亦可以於異向導電膜10之厚度方向重疊之方式配置。藉此,如圖6B所示,可使導電粒子11進入至通孔4A、4B之更深之位置。
於形成與通孔對應且使複數個導電粒子11鄰接之粒子群之情形時,複數個導電粒子之大小或種類亦可不同。例如,如圖7A所示之異向導電膜10般,使大徑之導電粒子11p配置於與通孔4A、4B對向之位置,且使小徑之導電粒子11q配置於大徑之導電粒子11p之周圍且由電極墊捕捉之位置。於該情形時,較佳為大徑之導電粒子11p較小徑之導電粒子11q更容易變形。藉由對半導體基板3A、3B夾著該異向導電膜10進行加熱加壓,如圖7B所示之連接構造般,可使大徑之導電粒子11p夾持於通孔4A、4B間,且利用小徑之導電粒子11q填埋通孔4A、4B與大徑之導電粒子11p之間隙,可提昇通孔4A、4B與導電粒子之導通性。又,藉由於粒子群11a中,預先使導電粒子彼此接觸,通孔4A、4B與導電粒子變得容易接觸。
為了獲得圖7B之連接構造,亦可如圖8所示,預先將具有大徑之導電粒子11p之異向導電膜10p與一半導體基板3A暫時接著,將具有小徑之導電粒子11q之異向導電膜10q與另一半導體基板3B暫時接著,其後對半導體基板3A、3B進行加熱加壓。
又,如圖7A所示,於異向導電膜中,導電粒子亦可自絕緣接著劑層12露出,尤佳為使夾持於通孔4A、4B之大徑之導電粒子11p露出。藉由使導電粒子自絕緣接著劑層露出,容易將導電粒子與通孔對準,又,由於不使絕緣接著劑層12介於導電粒子與通孔之間,故而導電粒子與通孔之導通性提昇。
再者,異向導電膜之導電粒子之露出面亦可藉由利用隔離膜覆蓋等而預先進行保護,於使用異向導電膜時使導電粒子露出。
<絕緣接著劑層>
作為形成異向導電膜之絕緣接著劑層12,可適當採用於公知之異向導電膜中所使用之絕緣性樹脂層。例如可使用包含丙烯酸酯化合物與光自由基聚合起始劑之光自由基聚合型樹脂層、包含丙烯酸酯化合物與熱自由基聚合起始劑之熱自由基聚合型樹脂層、包含環氧化合物與熱陽離子聚合起始劑之熱陽離子聚合型樹脂層、及包含環氧化合物與熱陰離子聚合起始劑之熱陰離子聚合型樹脂層等。又,該等樹脂層視需要亦可設為分別聚合而成者。又,亦可由複數個樹脂層形成絕緣接著劑層12。
但是,於自多層基板1A切取晶片等視用途而於多層基板1A之製造後將多層基板1A切斷之情形時,絕緣接著劑層12較佳為具有耐切斷之柔軟性及接著性。
又,亦可於絕緣接著劑層12中,視需要添加二氧化矽微粒子、氧化鋁、氫氧化鋁等絕緣性填料。絕緣性填料之調配量較佳為相對於形成絕緣接著劑層之樹脂100質量份設為3〜40質量份。藉此,即便於異向導電性連接時絕緣接著劑層12熔融,亦可抑制因熔融之樹脂導致導電粒子11無用地移動。
又,亦可於絕緣接著劑層12視需要添加可向通孔填充之粒徑之絕緣性間隔物。藉此,容易確保異向導電性連接時之壓入之均勻性。
亦可於異向導電性連接之前,使導電粒子附近之絕緣接著劑層之樹脂之一部分預先聚合。藉此,容易將通孔與導電粒子對準,可減少發生短路之風險。
<變化態樣>
於上述異向導電膜10中,存在於既定之位置以外之導電粒子幾乎不存在。另一方面,可能存在即便存在於既定之位置亦未由對向之通孔4A、4B捕捉之導電粒子。因此,於將該異向導電膜10用於半導體基板3A、3B之連接後,於對向之半導體基板3A、3B之間,未由通孔4A、4B捕捉之導電粒子11之數量較佳為成為存在於對向之半導體基板3A、3B之間之導電粒子11之總數之5%以下。
另一方面,圖9所示之多層基板1C係藉由於圖1所示之多層基板1A中,使用共用之異向導電膜作為將配線基板2之通孔4X與第1半導體基板3A之通孔4A連接之異向導電膜、將第1半導體基板3A之通孔4A與第2半導體基板3B之通孔4B連接之異向導電膜、及將第2半導體基板3B之通孔4B與第3半導體基板3C之通孔4C連接之異向導電膜而製造者。即,作為異向導電膜,使用於欲製造之多層基板1C之俯視時,對應於配線基板2或各半導體基板3A、3B、3C之通孔彼此對向之部分而於絕緣接著劑層12選擇性地配置有導電粒子11者。藉此,於多層基板1C之俯視時,於通孔4X、4A、4B、4C對向之部分存在導電粒子11、11x。換言之,於對向之通孔之間,未必僅存在相對於該通孔選擇性地配置之導電粒子。例如,於半導體基板3A與半導體基板3B之間,除了於形成於該等上之通孔4A、4B對向之位置選擇性地配置有導電粒子11以外,亦存在無助於半導體基板3A之通孔4A與半導體基板之通孔4B之連接之導電粒子11x。因此,相對於存在於半導體基板3A與半導體基板3B之間之所有導電粒子,半導體基板3A與半導體基板3B之間未由通孔捕捉之導電粒子可能超過5%而存在。然而,位於半導體基板3A與半導體基板3B之間且無助於該等之連接之導電粒子11x有助於配線基板2之通孔4X與第1半導體基板3A之通孔4A之連接。又,於多層基板1C之俯視時,於通孔彼此不對向之位置未配置導電粒子,或者實質上不存在導電粒子。
若如此利用共用之異向導電膜將各半導體基板連接,則能夠降低多層基板之製造所需之總成本。又,亦能夠容易地應對多層基板之製品陣容之增加(規格變更)。再者,於該異向導電膜中,亦能夠將導電粒子以複數個導電粒子靠近之粒子群之形式配置。
又,於藉由使用共用之異向導電膜將各半導體基板連接而降低多層基板之製造所需之總成本之情形時,亦可使用粒子群11a配置於一面之異向導電膜而製造多層基板。於該情形時,構成各粒子群11a之導電粒子數量設為3個以上,較佳為設為10個以上,更佳為設為12個以上。為了避免短路之發生,而將粒子群11a彼此之間隔設為導電粒子直徑之1倍以上,根據半導體基板之通孔間隔適當決定。與針對每一將要連接之半導體基板使用導電粒子之配置不同之異向導電膜之情形相比,藉由共用地使用粒子群11a以適當之間隔配置於一面之異向導電膜,能夠大幅減少多層基板之製造成本。
於各半導體基板共用地使用之異向導電膜中,構成粒子群之複數個導電粒子之配置、粒徑及種類如上所述,係根據通孔彼此之接合之穩定性之方面進行適當選擇,於一個粒子群中可包含至少大小或種類不同之複數個導電粒子,於一個粒子群中複數個導電粒子亦可於異向導電膜之膜厚方向重疊,於一個粒子群中複數個導電粒子亦可配置於異向導電膜之面方向,粒子群所含之導電粒子之至少一部分亦可自絕緣接著劑層露出。
如上所述,於本發明之多層基板中,於多層基板之俯視時,導電粒子選擇性地存在於通孔對向之位置。而且,藉由如此配置之導電粒子而將對向之通孔連接,且將形成有該通孔之半導體基板彼此利用絕緣接著劑接著。於該情形時,對向之通孔亦可藉由僅選擇性地配置於該對向之通孔之間之導電粒子11進行連接,又,於形成有對向之通孔之半導體基板3A、3B、3C間,亦可包含無助於該對向之通孔之連接之導電粒子11x。
本發明之多層基板能夠用於以高密度半導體封裝等為首之要求高密度安裝之各種半導體等各種用途。又,亦可將多層基板切割成既定之尺寸而使用。
實施例
以下,藉由實施例對本發明具體地進行說明。
實施例1〜6、比較例1
(1)半導體基板
作為構成多層基板之半導體基板3,準備外形為7 mm□、厚度100 μm之矩形,且如圖7所示,具有鉻製電極墊之通孔4形成為周邊配置(30 μm,85 μm間距,280接腳)者。
於半導體基板上形成有200 μm□之四邊形標記作為對準標記。
(2)異向導電膜之製造
如表1所示,製造使表1所示之粒徑之導電粒子(微粉焊料粉、三井金屬礦業股份有限公司)隨機分散於絕緣接著劑層(比較例1,粒子密度60個/mm2
),或對應於半導體基板之通孔4之配置而配置於絕緣接著劑層(實施例1〜6,85 μm間距,280處)之異向導電膜。
於該情形時,於實施例1、2、3中,如圖10所示,於每1處通孔4之端部電極配置1個導電粒子11,於實施例4中,如圖11所示,將絕緣接著劑層12設為2層,於各接著劑層12配置導電粒子11,藉此於每1處通孔4之端部電極於膜厚方向並列地配置2個導電粒子,於實施例5中,如圖12所示於每1處通孔4之端部電極於膜面方向並列地配置2個導電粒子11,於實施例6中,如圖13所示於每1處通孔4之端部電極於膜面方向並列地配置9個導電粒子。
又,於實施例1〜6中,利用導電粒子形成對準標記。於該情形時,使導電粒子之排列之輪廓與半導體基板3之對準標記之輪廓大致一致。
更具體而言,準備厚度2 mm之鎳板,以凸部(直徑30〜45 μm、高度25 μm〜40 μm,例如,於實施例1中直徑45 μm、高度40 μm)成為上述導電粒子之配置之方式進行圖案化而製作轉印母盤。又,將混合苯氧基樹脂(YP-50,新日鐵住金化學股份有限公司)50質量份、微膠囊化咪唑化合物潛伏性硬化劑(Novacure HX3941HP,Asahi Kasei E-materials股份有限公司)30質量份、及霧化二氧化矽(Aerosil RY200,日本Aerosil股份有限公司)20質量份而成之黏合劑以乾燥厚度成為50 μm之方式塗佈於PET(聚對苯二甲酸乙二酯)膜上,使該黏合劑朝向上述轉印母盤重疊,於80℃下進行乾燥5分鐘後,利用高壓水銀燈進行1000 mJ光照射,藉此製成具有凹部之轉印模具。
另一方面,由苯氧基樹脂(YP-50,新日鐵住金化學股份有限公司)60質量份、環氧樹脂jER828,三菱化學股份有限公司)40質量份、陽離子系硬化劑(SI-60L,三新化學工業股份有限公司)2質量份製備絕緣接著劑形成用組成物,將其塗佈於膜厚50 μm之PET膜上,利用80℃之烘箱進行乾燥5分鐘,於PET膜上以30μm形成由絕緣性樹脂所構成之黏著層。
於上述具有凹部之轉印模具填充導電粒子,於其上覆蓋上述絕緣性樹脂之黏著層,照射紫外線而使絕緣性樹脂所含之硬化性樹脂硬化。然後,自模具剝離絕緣性樹脂,以導電粒子之端部與界面對齊之方式壓入,藉此製造實施例1〜3之異向導電膜。於實施例4中藉由將黏著層之厚度變更為25 μm,同樣地自模具剝離,並以60℃、0.5 MPa將剝離者彼此積層而製造絕緣接著劑層為2層之異向導電膜。於實施例5、6中藉由將黏著層之厚度變更為15 μm,同樣地自模具剝離,並於其上將與黏著層同樣地製作之絕緣性樹脂層(厚度15 μm)於黏著層之導電粒子側以60℃、0.5 MPa積層,而製造異向導電膜。
另一方面,導電粒子隨機分散之比較例1之異向導電膜係藉由將導電粒子與絕緣性樹脂利用自轉公轉式混合裝置(Thinky股份有限公司)進行攪拌而獲得導電粒子之分散物,且以30 μm形成該分散物之塗膜而製造。
(3)多層基板之製造
將(1)中所準備之半導體基板使用(2)中所製造之異向導電膜以表1所示之積層數重疊並進行按壓,進而進行加熱加壓(180℃、40 MPa、20秒),藉此製造多層基板。
(4)評價
對於所獲得之多層基板,以如下方式進行(a)填充之評價、(b)熔融之評價。將該等之結果示於表1。
(a)填充之評價
將半導體基板重疊,於按壓之狀態下,將於對向之通孔之間存在導電粒子之情形記為0K,將不存在之情形記為NG。
(b)熔融之評價
對多層基板之厚度方向之剖面進行觀察,將對向之通孔由導電粒子連接,進而導電粒子之熔融物沿通孔之內壁進入之情形記為A,將對向之通孔由導電粒子連接,但導電粒子之熔融物未沿通孔之內壁進入之情形記為B。
[表1]
比較例1 | 實施例1 | 實施例2 | 實施例3 | 實施例4 | 實施例5 | 實施例6 | |
半導體基板之積層數 | 2 | 2 | 3 | 2 | 2 | 2 | 2 |
通孔之開口徑(μm) | 30 | 30 | 30 | 30 | 30 | 30 | 30 |
導電粒子之粒徑(μm) | 5 | 40 | 40 | 30 | 25 | 25 | 25 |
相對於1個通孔之導電粒子之配置 | 隨機 | 1個 | 1個 | 1個 | 於膜厚方向2個 | 於膜面方向2個 | 於膜面方向9個 |
填充之評價 | NG | OK | OK | OK | OK | OK | OK |
熔融之評價 | - | A | A | B | B | B | B |
可確認:於比較例1之多層基板,產生大量填充不良之通孔,與此相對,實施例1〜6之多層基板均填充良好,可利用導電粒子將通孔彼此連接。尤其是於實施例6中,通孔與導電粒子之配置之位置偏移之容許範圍較大。
1A、1B:多層基板
2:配線基板
3、3A、3B、3C:半導體基板
4、4A、4B、4C:通孔
4a:鍍膜
4h:貫通孔
5:金屬
6:貫通電極
7:散熱器
8:焊料球
9:電極墊
10、10A、10B:異向導電膜
11、11p、11q:導電粒子
11a:粒子群
12:絕緣接著劑或絕緣接著劑層
[圖1]係本發明之一實施態樣之多層基板1A之剖視圖。
[圖2]係本發明之一實施態樣之多層基板1B之剖視圖。
[圖3A]係多層基板1B之製造步驟之說明圖。
[圖3B]係多層基板1B之製造步驟之說明圖。
[圖3C]係多層基板1B之製造步驟之說明圖。
[圖3D]係多層基板1B之製造步驟之說明圖。
[圖4A]係異向導電性連接前之導電粒子相對於通孔之配置之說明圖。
[圖4B]係異向導電性連接後之導電粒子相對於通孔之配置之說明圖。
[圖5A]係異向導電性連接前之導電粒子相對於通孔之配置之說明圖。
[圖5B]係異向導電性連接後之導電粒子相對於通孔之配置之說明圖。
[圖6A]係異向導電性連接前之導電粒子相對於通孔之配置之說明圖。
[圖6B]係異向導電性連接後之導電粒子相對於通孔之配置之說明圖。
[圖7A]係異向導電性連接前之導電粒子相對於通孔之配置之說明圖。
[圖7B]係異向導電性連接後之導電粒子相對於通孔之配置之說明圖。
[圖8]係異向導電性連接前之導電粒子相對於通孔之配置之說明圖。
[圖9]係本發明之一實施態樣之多層基板1C之剖視圖。
[圖10]係用於實施例1之多層基板之製造之半導體基板之表面中之電極及導電粒子之配置圖。
[圖11]係用於實施例4之多層基板之製造之半導體基板之表面中之電極及導電粒子之配置圖。
[圖12]係用於實施例5之多層基板之製造之半導體基板之表面中之電極及導電粒子之配置圖。
[圖13]係用於實施例6之多層基板之製造之半導體基板之表面中之電極及導電粒子之配置圖。
[圖14]係貫通電極之製造方法之步驟說明圖。
1A:多層基板
2:配線基板
3A、3B、3C:半導體基板
4A、4B、4C、4X:通孔
8:焊料球
9:電極墊
11:導電粒子
12:絕緣接著劑或絕緣接著劑層
Claims (7)
- 一種異向導電膜,其包含絕緣接著劑層與配置於該絕緣接著劑層之導電粒子,且形成有2個以上導電粒子靠近之粒子群,該粒子群係對應於應利用異向導電膜連接之電極之配置而配置,該電極為具備電極墊之通孔,於該粒子群中包含大小不同之複數個導電粒子,大徑之導電粒子配置於與該通孔對向之位置,且小徑之導電粒子配置於該大徑之導電粒子之周圍且由該電極墊捕捉之位置,於不與該電極對應之位置未配置導電粒子,不與該電極對應之位置為電極與電極之間。
- 如請求項1之異向導電膜,其中,於粒子群中包含至少種類不同之複數個導電粒子。
- 如請求項1之異向導電膜,其中,於粒子群中,複數個導電粒子配置於異向導電膜之面方向。
- 如請求項1之異向導電膜,其中,粒子群所含之導電粒子之至少一部分自絕緣接著劑層露出。
- 如請求項1至4中任一項之異向導電膜,其中,導電粒子至少包含金屬粒子或金屬被覆樹脂粒子之任一者。
- 一種連接構造體,其係配線基板或半導體基板藉由請求項1至5中任一項之異向導電膜與其他半導體基板異向導電性連接而成。
- 一種連接構造體之製造方法,其中,配線基板或半導體基板藉由請求項1至5中任一項之異向導電膜與其他半導體基板異向導電性連接。
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JPJP2015-004596 | 2015-01-13 | ||
JP2015004596 | 2015-01-13 |
Publications (2)
Publication Number | Publication Date |
---|---|
TW202038426A TW202038426A (zh) | 2020-10-16 |
TWI809284B true TWI809284B (zh) | 2023-07-21 |
Family
ID=56405861
Family Applications (2)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
TW105101042A TWI806814B (zh) | 2015-01-13 | 2016-01-13 | 多層基板 |
TW109121150A TWI809284B (zh) | 2015-01-13 | 2016-01-13 | 異向導電膜、連接構造體及連接構造體之製造方法 |
Family Applications Before (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
TW105101042A TWI806814B (zh) | 2015-01-13 | 2016-01-13 | 多層基板 |
Country Status (6)
Country | Link |
---|---|
US (1) | US11901325B2 (zh) |
JP (2) | JP2016131246A (zh) |
KR (1) | KR102094725B1 (zh) |
CN (1) | CN107210287B (zh) |
TW (2) | TWI806814B (zh) |
WO (1) | WO2016114320A1 (zh) |
Families Citing this family (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US11901325B2 (en) * | 2015-01-13 | 2024-02-13 | Dexerials Corporation | Multilayer substrate |
JPWO2017149977A1 (ja) * | 2016-02-29 | 2018-12-20 | パナソニックIpマネジメント株式会社 | 非水電解質二次電池 |
WO2020133421A1 (zh) * | 2018-12-29 | 2020-07-02 | 深南电路股份有限公司 | 多样化装配印刷线路板及制造方法 |
TWI742991B (zh) * | 2021-01-20 | 2021-10-11 | 啟耀光電股份有限公司 | 基板結構與電子裝置 |
Citations (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2005277112A (ja) * | 2004-03-25 | 2005-10-06 | Sony Chem Corp | 多層配線基板及びその製造方法 |
WO2009037964A1 (ja) * | 2007-09-20 | 2009-03-26 | Sony Chemical & Information Device Corporation | 異方性導電膜及びその製造方法、並びに、該異方性導電膜を用いた接合体 |
WO2009057582A1 (ja) * | 2007-10-29 | 2009-05-07 | Sony Chemical & Information Device Corporation | 電気的接続体及びその製造方法 |
US7683473B2 (en) * | 2005-09-28 | 2010-03-23 | Spansion Llc | Semiconductor device, fabrication method therefor, and film fabrication method |
WO2012046923A1 (ko) * | 2010-10-08 | 2012-04-12 | 제일모직 주식회사 | 이방성 도전 필름 |
Family Cites Families (31)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH0334064Y2 (zh) | 1985-08-21 | 1991-07-18 | ||
JPH0362411A (ja) * | 1989-07-31 | 1991-03-18 | Canon Inc | 異方性導電フィルムの製造方法 |
JP2748713B2 (ja) | 1991-03-29 | 1998-05-13 | 日立化成工業株式会社 | 接続部材 |
JPH05182973A (ja) | 1992-01-07 | 1993-07-23 | Fujitsu Ltd | 半導体装置の製造方法 |
TW301843B (en) * | 1994-11-15 | 1997-04-01 | Ibm | Electrically conductive paste and composite and their use as an electrically conductive connector |
JPH08330736A (ja) | 1995-06-01 | 1996-12-13 | Toray Ind Inc | 多層基板およびその製造方法 |
KR100539060B1 (ko) | 1997-10-28 | 2007-04-25 | 소니 케미카루 가부시키가이샤 | 이방도전성접착제및접착용막 |
JP3296306B2 (ja) * | 1997-10-28 | 2002-06-24 | ソニーケミカル株式会社 | 異方導電性接着剤および接着用膜 |
JP2001077301A (ja) * | 1999-08-24 | 2001-03-23 | Amkor Technology Korea Inc | 半導体パッケージ及びその製造方法 |
JP2001237365A (ja) | 2000-02-23 | 2001-08-31 | Seiko Epson Corp | 接続用端子の接合方法、半導体装置の製造方法および半導体装置 |
JP2002110897A (ja) * | 2000-09-28 | 2002-04-12 | Toshiba Corp | 半導体装置およびその製造方法 |
TW554191B (en) | 2000-12-16 | 2003-09-21 | Au Optronics Corp | Laminating structure and its forming method |
US20040177921A1 (en) | 2001-06-29 | 2004-09-16 | Akira Yamauchi | Joining method using anisotropic conductive adhesive |
JP2003282819A (ja) * | 2002-03-27 | 2003-10-03 | Seiko Epson Corp | 半導体装置の製造方法 |
JP4340517B2 (ja) | 2003-10-30 | 2009-10-07 | Okiセミコンダクタ株式会社 | 半導体装置及びその製造方法 |
JP4688526B2 (ja) * | 2005-03-03 | 2011-05-25 | Okiセミコンダクタ株式会社 | 半導体装置及びその製造方法 |
JP2006310082A (ja) | 2005-04-28 | 2006-11-09 | Tokai Rubber Ind Ltd | 異方性導電膜およびその製造方法 |
DE102006001600B3 (de) * | 2006-01-11 | 2007-08-02 | Infineon Technologies Ag | Halbleiterbauelement mit Flipchipkontakten und Verfahren zur Herstellung desselben |
KR100777255B1 (ko) | 2006-04-18 | 2007-11-20 | 중앙대학교 산학협력단 | 이방성 도전 필름 및 이를 이용한 전자부품의 실장방법 |
JP2006339160A (ja) | 2006-06-02 | 2006-12-14 | Hitachi Chem Co Ltd | 熱硬化性回路接続部材及びそれを用いた電極の接続構造、電極の接続方法 |
JP5010990B2 (ja) * | 2007-06-06 | 2012-08-29 | ソニーケミカル&インフォメーションデバイス株式会社 | 接続方法 |
JP5018270B2 (ja) * | 2007-06-22 | 2012-09-05 | パナソニック株式会社 | 半導体積層体とそれを用いた半導体装置 |
JP5212118B2 (ja) * | 2009-01-05 | 2013-06-19 | 日立金属株式会社 | 半導体装置およびその製造方法 |
JP2010232492A (ja) | 2009-03-27 | 2010-10-14 | Dainippon Printing Co Ltd | 多層プリント配線板組合せ体およびその製造方法 |
JP2010251547A (ja) | 2009-04-16 | 2010-11-04 | Elpida Memory Inc | 半導体装置及びその製造方法 |
JP2010272737A (ja) | 2009-05-22 | 2010-12-02 | Elpida Memory Inc | 半導体装置の製造方法 |
KR101219139B1 (ko) | 2009-12-24 | 2013-01-07 | 제일모직주식회사 | 이방 도전성 페이스트, 필름 및 이를 포함하는 회로접속구조체 |
US8552567B2 (en) | 2011-07-27 | 2013-10-08 | Micron Technology, Inc. | Semiconductor die assemblies, semiconductor devices including same, and methods of fabrication |
KR101941995B1 (ko) * | 2012-07-11 | 2019-01-24 | 에스케이하이닉스 주식회사 | 반도체 장치 및 이를 갖는 적층 반도체 패키지 |
KR102254104B1 (ko) * | 2014-09-29 | 2021-05-20 | 삼성전자주식회사 | 반도체 패키지 |
US11901325B2 (en) * | 2015-01-13 | 2024-02-13 | Dexerials Corporation | Multilayer substrate |
-
2016
- 2016-01-13 US US15/543,113 patent/US11901325B2/en active Active
- 2016-01-13 TW TW105101042A patent/TWI806814B/zh active
- 2016-01-13 WO PCT/JP2016/050877 patent/WO2016114320A1/ja active Application Filing
- 2016-01-13 KR KR1020177017942A patent/KR102094725B1/ko active IP Right Grant
- 2016-01-13 CN CN201680004716.6A patent/CN107210287B/zh active Active
- 2016-01-13 JP JP2016004551A patent/JP2016131246A/ja active Pending
- 2016-01-13 TW TW109121150A patent/TWI809284B/zh active
-
2020
- 2020-09-25 JP JP2020161100A patent/JP7207383B2/ja active Active
Patent Citations (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2005277112A (ja) * | 2004-03-25 | 2005-10-06 | Sony Chem Corp | 多層配線基板及びその製造方法 |
US7683473B2 (en) * | 2005-09-28 | 2010-03-23 | Spansion Llc | Semiconductor device, fabrication method therefor, and film fabrication method |
WO2009037964A1 (ja) * | 2007-09-20 | 2009-03-26 | Sony Chemical & Information Device Corporation | 異方性導電膜及びその製造方法、並びに、該異方性導電膜を用いた接合体 |
US20120328794A1 (en) * | 2007-09-20 | 2012-12-27 | Sony Chemical & Information Device Corporation | Anisotropic Conductive Film, Method for Producing the Same, and Joined Structure Using the Same |
WO2009057582A1 (ja) * | 2007-10-29 | 2009-05-07 | Sony Chemical & Information Device Corporation | 電気的接続体及びその製造方法 |
WO2012046923A1 (ko) * | 2010-10-08 | 2012-04-12 | 제일모직 주식회사 | 이방성 도전 필름 |
Also Published As
Publication number | Publication date |
---|---|
TW202038426A (zh) | 2020-10-16 |
US11901325B2 (en) | 2024-02-13 |
CN107210287A (zh) | 2017-09-26 |
KR20170091686A (ko) | 2017-08-09 |
JP7207383B2 (ja) | 2023-01-18 |
US20170358549A1 (en) | 2017-12-14 |
TW201639116A (zh) | 2016-11-01 |
JP2020202410A (ja) | 2020-12-17 |
WO2016114320A1 (ja) | 2016-07-21 |
KR102094725B1 (ko) | 2020-03-31 |
CN107210287B (zh) | 2020-04-14 |
JP2016131246A (ja) | 2016-07-21 |
TWI806814B (zh) | 2023-07-01 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
JP7207382B2 (ja) | 多層基板 | |
JP7207383B2 (ja) | 多層基板 | |
TW201006334A (en) | Flex-rigid wiring board and electronic device | |
TW200806137A (en) | Printed wiring board and method for manufacturing printed wiring board | |
TW201010536A (en) | Flex-rigid wiring board and electronic device | |
JP6139653B2 (ja) | 部品内蔵樹脂多層基板 | |
JP6750228B2 (ja) | バンプ形成用フィルム、半導体装置及びその製造方法、並びに接続構造体 | |
US9526168B2 (en) | Printed wiring board and method for manufacturing the same | |
JP2004274035A (ja) | 電子部品内蔵モジュールとその製造方法 | |
JP4849926B2 (ja) | 半導体装置及び半導体装置の製造方法 | |
CN110858548A (zh) | 埋入式芯片及其制造方法 | |
JP2011035269A (ja) | 半導体装置及びその製造方法 | |
TW201212136A (en) | Manufacturing method of wiring substrate having solder bump, and mask for mounting solder ball | |
JP2008205071A (ja) | 電子部品内蔵基板とこれを用いた電子機器、およびその製造方法 | |
JP2018137279A (ja) | プリント配線板の製造方法 |