TWI799161B - Package - Google Patents

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TWI799161B
TWI799161B TW111107455A TW111107455A TWI799161B TW I799161 B TWI799161 B TW I799161B TW 111107455 A TW111107455 A TW 111107455A TW 111107455 A TW111107455 A TW 111107455A TW I799161 B TWI799161 B TW I799161B
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electrode
frame portion
package
diameter
package body
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TW111107455A
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TW202240797A (en
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緒方孝友
坂太伸
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日商Ｎｇｋ電子器件股份有限公司
日商日本碍子股份有限公司
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/02—Containers; Seals
    • H01L23/04—Containers; Seals characterised by the shape of the container or parts, e.g. caps, walls
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/02—Containers; Seals
    • H01L23/06—Containers; Seals characterised by the material of the container or its electrical properties
    • H01L23/08—Containers; Seals characterised by the material of the container or its electrical properties the material being an electrical insulator, e.g. glass

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  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Piezo-Electric Or Mechanical Vibrators, Or Delay Or Filter Circuits (AREA)
  • Control And Other Processes For Unpacking Of Materials (AREA)

Abstract

框部(120)由陶瓷構成，具有第1面(SF1)及第2面(SF2)。第2面(SF2)具有包圍空腔(CV)的內緣、及包圍內緣的外緣(EO)。基板部(110)由陶瓷構成，具有第3面(SF3)，該第3面(SF3)包含支持框部(120)的第2面(SF2)的部分、及面向空腔(CV)的部分。電極層(200)係設於基板部(110)的第3面(SF3)上。通孔電極(510)具有：於第1面(SF1)具有直徑DA之端面(SFA)、及於第2面(SF2)與電極層(200)相接且具有小於直徑DA的直徑DB之底面(SFB)。於俯視觀察下，通孔電極的底面(SFB)具有：從框部(120)的第2面(SF2)的內緣起算的最小尺寸LI、及從框部(120)的第2面(SF2)的外緣(EO)起算的最小尺寸LO，且滿足LO＞LI。The frame part (120) is made of ceramics and has a first surface (SF1) and a second surface (SF2). The second surface (SF2) has an inner edge surrounding the cavity (CV), and an outer edge (EO) surrounding the inner edge. The substrate portion (110) is made of ceramics and has a third surface (SF3) including a portion supporting the second surface (SF2) of the frame portion (120) and a portion facing the cavity (CV) . The electrode layer (200) is provided on the third surface (SF3) of the substrate part (110). The through-hole electrode (510) has: an end surface (SFA) having a diameter DA on the first surface (SF1), and a bottom surface that is in contact with the electrode layer (200) on the second surface (SF2) and has a diameter DB smaller than the diameter DA (SFB). In plan view, the bottom surface (SFB) of the through-hole electrode has: the smallest dimension LI counted from the inner edge of the second surface (SF2) of the frame portion (120), and the minimum dimension LI from the second surface (SF2) of the frame portion (120). ) from the outer edge (EO) of the minimum dimension LO, and satisfy LO>LI.

Description

封裝體Package

本發明係關於封裝體，特別係關於具有由通孔電極所貫通的框部的陶瓷封裝體。The present invention relates to a package, and particularly to a ceramic package having a frame portion penetrated by through-hole electrodes.

作為使用陶瓷生坯薄片所製造的陶瓷組件，以晶體振盪器用的封裝體為人所知。一般的晶體振盪器具有水晶毛胚、具有收納有水晶毛胚的空腔的封裝體、及用以將空腔加以密封的蓋件。封裝體具有成為空腔的底面的基板部、包圍空腔的框部、及設於此框部上的金屬化層。使用(典型而言，為焊料)將蓋件接合於金屬化層。A package for a crystal oscillator is known as a ceramic component manufactured using a ceramic green sheet. A general crystal oscillator includes a crystal blank, a package having a cavity in which the crystal blank is accommodated, and a cover for sealing the cavity. The package has a substrate portion serving as the bottom surface of the cavity, a frame portion surrounding the cavity, and a metallization layer provided on the frame portion. The lid is joined to the metallization layer using (typically, solder).

封裝體的框部上的金屬化層，通常係與接地電位用的電極墊成電性短路。此電性路徑，典型而言，可透過貫通框部的通孔電極而確保。然而，隨著封裝體小型化的進展，框部的材料寬度(框部的內壁面和外壁面間的尺寸)變得較小，而變得難以形成與此相應的細微通孔電極。具體而言，難以將細微通孔電極用的細微通路孔(via hole)，利用進行煅燒而形成於成為框部的生坯片，變得困難。於使用具有插銷形狀的模具作為通路孔的典型的形成方法的情形時，當為了使通路孔微縮化而將插銷形狀微縮化，則插銷的機械強度容易變得不足。因此，依據例如日本專利特開2007－27592號公報所揭示的技術，於框部的內壁面上，設置具有大致月牙形的形狀的城堡形電極，以取代通孔電極。The metallization layer on the frame portion of the package is usually electrically short-circuited with the electrode pad for ground potential. Typically, this electrical path can be ensured by via electrodes penetrating the frame. However, as the miniaturization of the package progresses, the material width of the frame portion (the dimension between the inner wall surface and the outer wall surface of the frame portion) becomes smaller, and it becomes difficult to form fine via electrodes corresponding to this. Specifically, it is difficult to form fine via holes (via holes) for fine through-hole electrodes in a green sheet to be a frame portion by calcining. In the case of using a mold having a plug shape as a typical via hole forming method, the mechanical strength of the plug tends to be insufficient when the plug shape is miniaturized in order to miniaturize the via hole. Therefore, according to the technology disclosed in Japanese Patent Laid-Open No. 2007-27592, for example, castellated electrodes having a substantially crescent shape are provided on the inner wall surface of the frame portion instead of the through-hole electrodes.

然而，於如上述公報的技術，於空腔的側壁設置城堡形電極以取代通孔電極的情形時，於使用焊料的接合步驟中，焊料容易沿著城堡形電極而流入空腔中。由於流入的焊料和水晶毛胚接觸，有時會對晶體振盪器的性能造成不良影響。又，因焊料的流入而對機械特性所造成的不良影響，於安裝至封裝體的元件為水晶毛胚的情形時尤其令人擔憂，而於其他壓電元件的情形時有時亦會發生。再者，安裝至封裝體的元件只要是電性元件，就會擔憂如非預期的短路般之對電性特性的不良影響。However, in the case of disposing the castellation electrodes on the side walls of the cavity instead of the through-hole electrodes as in the above publication, the solder tends to flow into the cavity along the castellation electrodes during the bonding step using solder. The performance of the crystal oscillator may be adversely affected by the incoming solder coming into contact with the crystal blank. In addition, the adverse effect on the mechanical properties due to the inflow of solder is particularly worrying when the element mounted on the package is a crystal blank, and it may also occur in the case of other piezoelectric elements. Furthermore, as long as the components mounted on the package are electrical components, there may be concerns about adverse effects on electrical characteristics such as unexpected short circuits.

日本專利特開2009－234074號公報，揭示利用雷射加工技術將作為通路孔的細微貫通孔形成於陶瓷生坯薄片的方法。具體而言，於厚度為250μm以下的陶瓷生坯薄片上，使用紫外線雷射而形成直徑30μm至50μm的貫通孔。於該上述公報中並指摘於如此藉由雷射加工形成相對於厚度直徑為小的貫通孔的情形時，貫通孔有具推拔形狀的傾向。又，於上述公報中，將貫通孔的推拔形狀，視為造成導體糊膏難以填充至貫通孔的原因所在。是故，於上述公報的技術中，探討可將推拔率設為60%以上的雷射光照射條件。在此，推拔率係由推拔的直徑比所定義，推拔率100%表示貫通孔不具推拔形狀，又，更小的推拔率則表示更急遽的推拔形狀。 [先前技術文獻] [日本專利文獻] Japanese Patent Application Laid-Open No. 2009-234074 discloses a method of forming fine through holes as via holes in a ceramic green sheet by using laser processing technology. Specifically, through-holes having a diameter of 30 to 50 μm are formed on a ceramic green sheet having a thickness of 250 μm or less by using an ultraviolet laser. In the aforementioned publication, it is pointed out that when a through hole having a small diameter relative to the thickness is formed by laser processing in this way, the through hole tends to have a pushed-out shape. Also, in the above-mentioned publication, the push-out shape of the through-hole is regarded as the cause of difficulty in filling the through-hole with the conductor paste. Therefore, in the technique of the above-mentioned publication, the laser light irradiation conditions which can set the extraction rate to 60% or more are considered. Here, the push-out rate is defined by the diameter ratio of push-out. A push-out rate of 100% means that the through hole does not have a push-out shape, and a smaller push-out rate means a sharper push-out shape. [Prior Art Literature] [Japanese Patent Document]

[日本專利文獻1]專利特開2007－27592號公報 [日本專利文獻2]專利特開2009－234074號公報 [Japanese Patent Document 1] Japanese Patent Laid-Open No. 2007-27592 [Japanese Patent Document 2] Patent Laid-Open No. 2009-234074

[發明欲解決之課題][Problem to be solved by the invention]

依據本案眾發明人的探討，若以將通孔電極設於封裝體的框部的目的，而單純應用上述公報所揭示的雷射加工技術，則有時難以充分確保空腔的氣密性。此問題隨著封裝體的小型化的進展，當框部的寬度越小則越嚴重。According to the research of the inventors of this application, if the laser processing technology disclosed in the above-mentioned publication is simply applied for the purpose of providing through-hole electrodes on the frame portion of the package, it is sometimes difficult to sufficiently ensure the airtightness of the cavity. This problem becomes more serious as the width of the frame portion decreases as the size of the package progresses.

本發明係為了解決如上的課題而成，其目的在於提供可抑制氣密性降低的封裝體。 [解決課題之手段] The present invention is made to solve the above problems, and an object of the present invention is to provide a package capable of suppressing a decrease in airtightness. [Means to solve the problem]

第1態樣係一種設有空腔的封裝體，該封裝體包括由陶瓷構成的框部，該框部具有第1面、及於厚度方向與該第1面相反的第2面，該第2面具有包圍該空腔的內緣及包圍該內緣的外緣；該封裝體更包括由陶瓷構成的基板部，該基板部具有第3面，該第3面包含支持該框部的該第2面的部分、及面向該空腔的部分；該封裝體更包括設於該基板部的該第3面上的電極層、及於該第1面和該第2面之間貫通該框部的通孔電極；該通孔電極具有：於該第1面具有直徑DA之端面、及於該第2面與該電極層相接且具有小於該直徑DA的直徑DB之底面；於俯視觀察下，該通孔電極的該底面具有從該框部的該第2面的該內緣起算的最小尺寸LI、及從該框部的該第2面的該外緣起算的最小尺寸LO，且滿足LO＞LI。The first aspect is a package provided with a cavity, the package includes a frame portion made of ceramics, the frame portion has a first surface, and a second surface opposite to the first surface in the thickness direction, the second surface 2 surfaces have an inner edge surrounding the cavity and an outer edge surrounding the inner edge; the package further includes a substrate portion made of ceramics, the substrate portion has a third surface, and the third surface includes the frame portion. The part of the second surface and the part facing the cavity; the package further includes an electrode layer provided on the third surface of the substrate part, and a frame penetrating between the first surface and the second surface. The through-hole electrode of the part; the through-hole electrode has: an end surface with a diameter DA on the first surface, and a bottom surface that is in contact with the electrode layer on the second surface and has a diameter DB smaller than the diameter DA; viewed from a top view Next, the bottom surface of the via electrode has a minimum dimension LI counted from the inner edge of the second surface of the frame portion and a minimum dimension LO calculated from the outer edge of the second surface of the frame portion, and Satisfy LO>LI.

第2態樣係第1態樣的封裝體，其中，該直徑DA為50μm以下。The second aspect is the package of the first aspect, wherein the diameter DA is 50 μm or less.

第3態樣係第1或第2態樣的封裝體，其中，該框部的該第2面的該內緣和該外緣之間的最小尺寸為200μm以下。A third aspect is the package according to the first or second aspect, wherein the minimum dimension between the inner edge and the outer edge of the second surface of the frame portion is 200 μm or less.

第4態樣係第1至第3態樣中任一態樣的封裝體，其中，滿足LO≧LI×1.5。The fourth aspect is the package of any one of the first to third aspects, wherein LO≧LI×1.5 is satisfied.

第5態樣係第1至第4態樣中任一態樣的封裝體，其中，該通孔電極於該厚度方向上的該端面與該底面的中間位置，具有(DA＋DB)／2以下的直徑。A fifth aspect is the package of any one of the first to fourth aspects, wherein the through-hole electrode has a ratio of (DA+DB)/2 or less at an intermediate position between the end surface and the bottom surface in the thickness direction. diameter.

第6態樣係第1至第5態樣中任一態樣的封裝體，其中，該通孔電極具有於該厚度方向上從該端面以推拔形狀延伸的部分。A sixth aspect is the package according to any one of the first to fifth aspects, wherein the through-hole electrode has a portion extending in a push-out shape from the end surface in the thickness direction.

第7態樣係第6態樣的封裝體，其中，該推拔形狀具有5度以上的推拔角。A seventh aspect is the package according to the sixth aspect, wherein the push-out shape has a push-out angle of 5 degrees or more.

第8態樣係第6或第7態樣的封裝體，其中，該推拔形狀具有該框部的厚度的1／2以上的厚度。An eighth aspect is the package according to the sixth or seventh aspect, wherein the push-out shape has a thickness of 1/2 or more of the thickness of the frame portion.

第9態樣係第1至第8態樣中任一態樣的封裝體，其中，該通孔電極具有將該端面和該底面加以連結的側面，該側面在與該厚度方向平行的剖面觀察下，具有至少1個彎曲點。A ninth aspect is the package according to any one of the first to eighth aspects, wherein the through-hole electrode has a side surface connecting the end surface and the bottom surface, and the side surface is viewed in a cross section parallel to the thickness direction. Down, with at least 1 bending point.

第10態樣係第9態樣的封裝體，其中，該至少1個彎曲點，包含逆向彎曲的2個彎曲點。A tenth aspect is the package according to the ninth aspect, wherein the at least one bending point includes two bending points reversely bent.

第11態樣係第1至第10態樣中任一態樣的封裝體，其中，該框部具有將該第1面和該第2面的該外緣加以連結的外壁面，該外壁面具有連結至該第1面的煅燒面(as - fired surface)、及連結至該第2面的斷裂面(fracture surface)。The eleventh aspect is the package of any one of the first to tenth aspects, wherein the frame portion has an outer wall surface connecting the first surface and the outer edge of the second surface, and the outer wall surface It has an as-fired surface connected to the first surface, and a fracture surface connected to the second surface.

第12態樣係第1至第11態樣中任一態樣的封裝體，更包括：金屬化層，設於該框部的該第1面上，且與該通孔電極的該端面相接；該金屬化層在與該通孔電極的該端面的連接部分成為局部變厚。The twelfth aspect is the package of any one of the first to eleventh aspects, further comprising: a metallization layer provided on the first surface of the frame portion and in contact with the end surface of the through-hole electrode connected; the metallization layer becomes locally thickened at the connection portion with the end face of the via electrode.

第13態樣係第1至第11態樣中任一態樣的封裝體，更包括：金屬化層，設於該框部的該第1面上，且與該通孔電極的該端面相接；該框部的該第1面具有直接連結至該該通孔電極的該端面的第1區、及經由該第1區而連結至該通孔電極的該端面的第2區，該第2區係垂直於該厚度方向，該第1區相對於該第2區，以越接近該通孔電極的該端面則該框部的厚度越小的方式傾斜。 [發明效果] A thirteenth aspect is the package of any one of the first to eleventh aspects, further comprising: a metallization layer provided on the first surface of the frame portion and in contact with the end surface of the through-hole electrode connected; the first surface of the frame portion has a first region directly connected to the end surface of the via electrode, and a second region connected to the end surface of the via electrode via the first region, the first region The second region is perpendicular to the thickness direction, and the first region is inclined relative to the second region such that the thickness of the frame portion becomes smaller as it gets closer to the end surface of the via electrode. [Invention effect]

依據第1態樣，藉由使底面的直徑DB小於端面的直徑DA，於通孔電極的底面的周圍，使框部的第2面和基板部的第3面的界面變廣。換言之，於通孔電極的底面的周圍，使陶瓷間的疊層界面變廣。在此，由於以滿足LO＞LI的方式配置通孔電極的底面，故於底面和框部的第2面的外緣之間，可大幅確保陶瓷間的疊層界面所配置之處。在此，陶瓷間的疊層界面相較於金屬和陶瓷的疊層界面，具有高氣密性。因此，可抑制沿著疊層界面的漏電所導致的氣密性的降低。According to the first aspect, by making the diameter DB of the bottom surface smaller than the diameter DA of the end surface, the interface between the second surface of the frame portion and the third surface of the substrate portion is widened around the bottom surface of the via electrode. In other words, the lamination interface between ceramics is widened around the bottom surface of the via-hole electrode. Here, since the bottom surface of the via-hole electrode is arranged so that LO>LI is satisfied, a place where a lamination interface between ceramics is arranged can be largely ensured between the bottom surface and the outer edge of the second surface of the frame portion. Here, the lamination interface between ceramics has higher airtightness than the lamination interface between metal and ceramics. Therefore, it is possible to suppress a reduction in airtightness due to leakage along the interface between the laminates.

依據第2態樣，通孔電極的直徑DA為50μm以下的細微尺寸。藉此，框部的寬度尺寸亦可微縮化。當此微縮化越進展，而使得沿著基板部和框部之間的疊層界面的漏電越容易成為問題時，該問題因上述理由而被有效抑制。According to the second aspect, the diameter DA of the through-hole electrode is a fine size of 50 μm or less. Thereby, the width dimension of the frame portion can also be miniaturized. As this miniaturization progresses, leakage along the lamination interface between the substrate portion and the frame portion becomes more likely to become a problem, and this problem is effectively suppressed for the above-mentioned reason.

依據第3態樣，框部的第2面的內緣和外緣之間的最小尺寸為200μm以下。如此當微縮化越進展，而使沿著基板部和框部之間的疊層界面的漏電越容易成為問題時，該問題因上述理由而被有效抑制。According to the third aspect, the minimum dimension between the inner edge and the outer edge of the second surface of the frame portion is 200 μm or less. In this way, as the miniaturization progresses, the leakage along the lamination interface between the substrate portion and the frame portion becomes more likely to become a problem, and this problem is effectively suppressed for the above-mentioned reason.

依據第4態樣，滿足LO≧LI×1.5。藉此，可更充分抑制因沿著基板部和框部之間的疊層界面的漏電所導致的氣密性的降低。According to the fourth aspect, LO≧LI×1.5 is satisfied. Thereby, it is possible to more sufficiently suppress a decrease in airtightness due to electric leakage along the lamination interface between the substrate portion and the frame portion.

依據第5態樣，該通孔電極於厚度方向上的該端面和該底面的中間位置，具有(DA＋DB)／2以下的直徑。藉此，可充分確保通孔電極的該中間位置和框部的外壁面之間的距離。因此，可提高通孔電極和框部之間的氣密可靠性。According to the fifth aspect, the through-hole electrode has a diameter of (DA+DB)/2 or less at an intermediate position between the end surface and the bottom surface in the thickness direction. Thereby, the distance between the intermediate position of the through-hole electrode and the outer wall surface of the frame portion can be sufficiently ensured. Therefore, airtight reliability between the through-hole electrode and the frame portion can be improved.

依據第6態樣，通孔電極具有於厚度方向上從端面以推拔形狀延伸的部分。藉此，於端面的正下方，容易確保通孔電極和框部的外壁面之間的距離。因此，可提高通孔電極和框部之間的氣密可靠性。According to the sixth aspect, the via-hole electrode has a portion extending from the end surface in the thickness direction in a push-out shape. Thereby, the distance between the through-hole electrode and the outer wall surface of the frame portion can be easily ensured immediately below the end surface. Therefore, airtight reliability between the through-hole electrode and the frame portion can be improved.

依據第7態樣，通孔電極之從端面延伸的推拔形狀，具有5度以上的推拔角。藉此，於端面的正下方，更充分容易確保通孔電極和框部的外壁面之間的距離。According to the seventh aspect, the pushed-out shape extending from the end surface of the via-hole electrode has a pushed-out angle of 5 degrees or more. This makes it easier to secure a sufficient distance between the through-hole electrodes and the outer wall surface of the frame immediately below the end surface.

依據第8態樣，通孔電極之從端面延伸的推拔形狀，具有框部的厚度的1／2以上的厚度。藉此，可使通孔電極和框部的外壁面之間的距離，利用推拔形狀而更充分增大。According to the eighth aspect, the pushed-out shape extending from the end surface of the via-hole electrode has a thickness of 1/2 or more of the thickness of the frame portion. Thereby, the distance between the through-hole electrode and the outer wall surface of the frame portion can be more sufficiently increased by the push-out shape.

依據第9態樣，通孔電極的側面具有至少1個彎曲點。藉此，可抑制因封裝體的製造中的燒結收縮所造成的通孔電極的側面和框部之間的剝離。According to the ninth aspect, the side surface of the via-hole electrode has at least one bending point. Thereby, peeling between the side surface of the via electrode and the frame portion due to sintering shrinkage during the manufacture of the package can be suppressed.

依據第10態樣，通孔電極的側面具有逆向彎曲的2個彎曲點。藉此，可更充分抑制因封裝體的製造中的燒結收縮所造成的通孔電極的側面和框部之間的剝離。According to the tenth aspect, the side surfaces of the through-hole electrodes have two bending points that are reversely bent. Thereby, peeling between the side surface of the via-hole electrode and the frame portion due to sintering shrinkage during the manufacture of the package can be more sufficiently suppressed.

依據第11態樣，框部的外壁面具有連結至第1面的煅燒面和連結至第2面的斷裂面。於斷裂面藉由分斷步驟而形成時，依其步驟變異的影響，有時框部的第2面的外緣和通孔電極的底面之間的距離會變小。然而，如上所述，藉由使滿足DA＞DB且LO＞LI，該距離則不易變得過小。因此，可防止因該距離過小所造成之框部的氣密性不足。According to the eleventh aspect, the outer wall surface of the frame portion has the calcined surface connected to the first surface and the fractured surface connected to the second surface. When the fractured surface is formed by a breaking step, the distance between the outer edge of the second surface of the frame portion and the bottom surface of the via-hole electrode may become smaller due to the step variation. However, as described above, by satisfying DA>DB and LO>LI, the distance is less likely to become too small. Therefore, insufficient airtightness of the frame portion due to too small distance can be prevented.

依據第12態樣，金屬化層在與該通孔電極的該端面的連接部分成為局部變厚。藉此，可於通孔電極的端面的直徑DA和底面的直徑DB維持不變的狀況下，使通孔電極的側面和框部的第1面所成的鈍角變得更大。因此，可減緩因於主要由金屬構成的通孔電極及金屬化層、和由陶瓷構成的框部之間的熱膨脹的差異所造成的熱應力。According to the twelfth aspect, the metallization layer is partially thickened at the connection portion with the end surface of the via electrode. Thereby, the obtuse angle formed by the side surface of the via electrode and the first surface of the frame portion can be made larger while the diameter DA of the end surface and the diameter DB of the bottom surface of the via electrode remain unchanged. Therefore, thermal stress due to a difference in thermal expansion between the through-hole electrode and the metallization layer mainly made of metal and the frame part made of ceramics can be relieved.

依據第13態樣，框部的第1面的第1區，以越接近通孔電極的端面則框部的厚度變越小的方式傾斜。藉此，可於通孔電極的端面的直徑DA和底面的直徑DB維持不變的狀況下，使通孔電極的側面和框部的第1面所成的鈍角變得更大。因此，可減緩因於主要由金屬構成的通孔電極及金屬化層、和由陶瓷構成的框部之間的熱膨脹的差異所造成的熱應力。According to the thirteenth aspect, the first region of the first surface of the frame portion is inclined such that the thickness of the frame portion becomes smaller as it gets closer to the end surface of the via-hole electrode. Thereby, the obtuse angle formed by the side surface of the via electrode and the first surface of the frame portion can be made larger while the diameter DA of the end surface and the diameter DB of the bottom surface of the via electrode remain unchanged. Therefore, thermal stress due to a difference in thermal expansion between the through-hole electrode and the metallization layer mainly made of metal and the frame part made of ceramics can be relieved.

此發明的目的、特徵、態樣及優點，藉由以下的詳細說明及附加圖式而更為明白。The purpose, features, aspects and advantages of this invention will be more clearly understood by the following detailed description and attached drawings.

以下，根據圖式，說明本發明的實施形態。Hereinafter, embodiments of the present invention will be described based on the drawings.

＜實施形態1＞ 圖1係概略顯示本實施形態1中的晶體振盪器900(電性組件)的構成的俯視圖。圖2係沿著圖1的線II－II的概略剖面圖。圖3係概略顯示晶體振盪器900(圖1)的製造方法中、水晶毛胚890(電性元件)剛安裝後的構成的俯視圖。圖4係沿著圖3的線IV－IV的概略剖面圖。 ＜Embodiment 1＞ FIG. 1 is a plan view schematically showing the configuration of a crystal oscillator 900 (electrical component) in the first embodiment. FIG. 2 is a schematic cross-sectional view along line II-II in FIG. 1 . FIG. 3 is a plan view schematically showing the structure immediately after the crystal blank 890 (electrical element) is mounted in the manufacturing method of the crystal oscillator 900 ( FIG. 1 ). FIG. 4 is a schematic cross-sectional view taken along line IV-IV in FIG. 3 .

晶體振盪器900具有：封裝體701、水晶毛胚890、焊料960及蓋件980。於封裝體701設有空腔CV。水晶毛胚890係收納於空腔CV內，並安裝於封裝體701的元件電極墊211及元件電極墊212之上。蓋件980係利用焊料960而接合於封裝體701的金屬化層600，藉此，而使空腔CV密封。焊料960，典型而言，宜由含金的合金構成，例如，由含金及錫的合金亦即Au－Sn系合金構成。蓋件980由金屬構成，例如，由含鐵及鎳的合金構成。又，本說明書中，合金係視為金屬的一種。The crystal oscillator 900 has a package 701 , a crystal blank 890 , solder 960 and a cover 980 . A cavity CV is provided in the package body 701 . The crystal blank 890 is accommodated in the cavity CV, and mounted on the device electrode pad 211 and the device electrode pad 212 of the package body 701 . The lid 980 is bonded to the metallization layer 600 of the package body 701 using solder 960 , thereby sealing the cavity CV. Typically, the solder 960 is preferably composed of an alloy containing gold, for example, an alloy containing gold and tin, that is, an Au—Sn-based alloy. The cover 980 is made of metal, for example, an alloy containing iron and nickel. In addition, in this specification, an alloy system is considered as one type of metal.

金屬化層600，例如，由含鉬及鎢中至少任一者的金屬所構成。於金屬化層600的表面(面向焊料960的面)，亦可設置電鍍層，典型而言係設置金電鍍層。又，亦可設置鎳電鍍層作為金電鍍層的底部。本實施形態中，直接設於封裝體701的框部120的框頂面SF1上的金屬化層600和蓋件980之間，係僅利用焊料960而接合。The metallization layer 600 is, for example, made of a metal containing at least any one of molybdenum and tungsten. On the surface of the metallization layer 600 (the surface facing the solder 960 ), an electroplating layer, typically a gold electroplating layer, may also be provided. Also, a nickel plating layer may be provided as the bottom of the gold plating layer. In this embodiment, the metallization layer 600 provided directly on the frame top surface SF1 of the frame portion 120 of the package 701 and the lid member 980 are bonded using only the solder 960 .

圖5係概略顯示封裝體701的構成的俯視圖。圖6係沿著圖5的線VI－VI的概略剖面圖。封裝體701具有陶瓷部100、元件電極墊211、元件電極墊212及封裝電極墊301～304。又，詳述於後，封裝體701具有設於陶瓷部100之用於電性配線的結構。FIG. 5 is a plan view schematically showing the structure of the package 701 . FIG. 6 is a schematic cross-sectional view taken along line VI-VI of FIG. 5 . The package 701 has the ceramic part 100 , the element electrode pad 211 , the element electrode pad 212 , and the package electrode pads 301 to 304 . Also, as will be described in detail later, the package body 701 has a structure for electrical wiring provided on the ceramic part 100 .

陶瓷部100由陶瓷構成，以具有氧化物作為主成分為佳，具有氧化鋁作為主成分則更佳，例如實質由氧化鋁構成。陶瓷部100包含基板部110及框部120。基板部110的材料與框部120的材料可相同。框部120於厚度方向(圖6中的縱方向)上疊層於基板部110。框部120具有框頂面SF1(第1面)及框底面SF2(於厚度方向上與第1面相反的第2面)。又，框部120具有將框頂面SF1和框底面SF2彼此連結的內壁面，該內壁面係空腔CV的側壁。基板部110具有基板頂面SF3(第3面)。基板頂面SF3具有支持框部120的框底面SF2的支持面部分SF3S、及面向空腔CV的空腔面部分SF3C。空腔面部分SF3C成為空腔CV的底面。The ceramic part 100 is made of ceramics, preferably has oxide as a main component, more preferably has alumina as a main component, for example, is substantially made of alumina. The ceramic part 100 includes a substrate part 110 and a frame part 120 . The material of the substrate part 110 and the material of the frame part 120 may be the same. The frame portion 120 is stacked on the substrate portion 110 in the thickness direction (vertical direction in FIG. 6 ). The frame portion 120 has a frame top surface SF1 (first surface) and a frame bottom surface SF2 (second surface opposite to the first surface in the thickness direction). Moreover, the frame part 120 has the inner wall surface which connects frame top surface SF1 and frame bottom surface SF2 mutually, and this inner wall surface is a side wall of cavity CV. The substrate portion 110 has a substrate top surface SF3 (third surface). The board|substrate top surface SF3 has the support surface part SF3S which supports the frame bottom surface SF2 of the frame part 120, and the cavity surface part SF3C which faces the cavity CV. The cavity surface portion SF3C becomes the bottom surface of the cavity CV.

元件電極墊211及元件電極墊212(圖5)面向空腔CV而配置於陶瓷部100(圖6)。具體而言，元件電極墊211及元件電極墊212係配置於基板部110(圖6)的頂面(面向空腔CV的面)上。封裝電極墊301～304(圖5)於空腔CV外，配置於陶瓷部100(圖6)。具體而言，封裝電極墊301～304係配置於基板部110(圖6)的底面(與面向空腔CV的面相反的面)上。The element electrode pad 211 and the element electrode pad 212 ( FIG. 5 ) are disposed on the ceramic part 100 ( FIG. 6 ) facing the cavity CV. Specifically, the element electrode pad 211 and the element electrode pad 212 are arranged on the top surface (the surface facing the cavity CV) of the substrate portion 110 ( FIG. 6 ). The packaging electrode pads 301 to 304 ( FIG. 5 ) are arranged outside the cavity CV on the ceramic part 100 ( FIG. 6 ). Specifically, the package electrode pads 301 to 304 are arranged on the bottom surface (the surface opposite to the surface facing the cavity CV) of the substrate portion 110 ( FIG. 6 ).

中繼電極220(圖5)設於基板部110(圖6)的基板頂面SF3上。中繼電極220至少部分配置於支持面部分SF3S(圖6)上。因此，中繼電極220(圖5)至少部分被框部120覆蓋。中繼電極220亦可更具有未被框部120覆蓋而配置於空腔CV的底面的部分。換言之，中繼電極220亦可僅部分被框部120覆蓋。The relay electrode 220 ( FIG. 5 ) is provided on the substrate top surface SF3 of the substrate portion 110 ( FIG. 6 ). The relay electrode 220 is at least partially disposed on the supporting surface portion SF3S ( FIG. 6 ). Therefore, the relay electrode 220 ( FIG. 5 ) is at least partially covered by the frame portion 120 . The relay electrode 220 may further have a portion not covered by the frame portion 120 but disposed on the bottom surface of the cavity CV. In other words, the relay electrode 220 may also be only partially covered by the frame portion 120 .

圖7係省略金屬化層600(圖5)及框部120(圖6)的圖示的俯視圖。圖8係以虛線顯示封裝電極墊301～304，並概略顯示圖7中的基板部110及基板通孔電極411～414的俯視圖。FIG. 7 is a plan view omitting illustration of the metallization layer 600 ( FIG. 5 ) and the frame portion 120 ( FIG. 6 ). FIG. 8 shows the packaging electrode pads 301 - 304 with dotted lines, and schematically shows a top view of the substrate portion 110 and the substrate through-hole electrodes 411 - 414 in FIG. 7 .

於陶瓷部100的基板部110上，在其頂面附近埋設有配線層401～403。配線層401接觸於元件電極墊211，配線層402接觸於元件電極墊212，配線層403接觸於中繼電極220。於不阻礙此等接觸的範圍內，配線層401～403亦可由作為基板部110的一部分的絕緣膜110i(參考圖10)所覆蓋，特別是於元件電極墊211和配線層403之間，係藉由絕緣膜110i而絕緣。藉由配線層403及中繼電極220而構成電極層200。On the substrate portion 110 of the ceramic portion 100 , wiring layers 401 to 403 are embedded near the top surface thereof. The wiring layer 401 is in contact with the device electrode pad 211 , the wiring layer 402 is in contact with the device electrode pad 212 , and the wiring layer 403 is in contact with the relay electrode 220 . The wiring layers 401 to 403 may also be covered by an insulating film 110i (refer to FIG. 10 ) which is a part of the substrate portion 110 within a range not hindering such contact, especially between the element electrode pad 211 and the wiring layer 403, is It is insulated by the insulating film 110i. The electrode layer 200 is constituted by the wiring layer 403 and the relay electrode 220 .

封裝體701具有埋設於陶瓷部100的基板部110中的基板通孔電極411～414。基板通孔電極411使配線層402和封裝電極墊301彼此連接。基板通孔電極412使配線層403和封裝電極墊302彼此連接。基板通孔電極413使配線層401和封裝電極墊303彼此連接。基板通孔電極414使配線層403和封裝電極墊304彼此連接。The package 701 has through-substrate-hole electrodes 411 to 414 embedded in the substrate portion 110 of the ceramic portion 100 . The through-substrate hole electrode 411 connects the wiring layer 402 and the package electrode pad 301 to each other. The through-substrate hole electrode 412 connects the wiring layer 403 and the package electrode pad 302 to each other. The through-substrate electrode 413 connects the wiring layer 401 and the package electrode pad 303 to each other. The through-substrate electrode 414 connects the wiring layer 403 and the package electrode pad 304 to each other.

從以上構成，元件電極墊211係電連接於封裝電極墊303，元件電極墊212係電連接於封裝電極墊301，中繼電極220係電連接於封裝電極墊302及封裝電極墊304。From the above structure, the device electrode pad 211 is electrically connected to the package electrode pad 303 , the device electrode pad 212 is electrically connected to the package electrode pad 301 , and the relay electrode 220 is electrically connected to the package electrode pad 302 and the package electrode pad 304 .

圖9係省略圖5中的金屬化層600的圖示的俯視圖。圖10係沿著圖9的線X－X的概略剖面圖。圖11係圖9的部分放大圖。FIG. 9 is a top view omitting the illustration of the metallization layer 600 in FIG. 5 . Fig. 10 is a schematic cross-sectional view taken along line XX in Fig. 9 . FIG. 11 is a partially enlarged view of FIG. 9 .

框部120的框底面SF2具有：包圍空腔CV的內緣EI、及包圍內緣EI的外緣EO。內緣EI和外緣EO之間的最小尺寸WD(圖11)可為200μm以下，典型而言為20μm以上110μm以下。框部120具有將框頂面SF1和框底面SF2的外緣EO加以連結的外壁面SF4。又，框部120具有將框頂面SF1和框底面SF2的內緣EI加以連結的內壁面，內壁面係面向空腔CV。本實施形態中，外壁面SF4具有：連結至框頂面SF1的煅燒面SF4A、及連結至框底面SF2的斷裂面SF4B。斷裂面SF4B可為與框頂面SF1大致垂直的面。如圖10所示，煅燒面SF4A可為使框頂面SF1和斷裂面SF4B之間成倒角的斜角面。換言之，煅燒面SF4A的法線方向，可與框頂面SF1及斷裂面SF4B的法線方向不同且可位於此等之間。The frame bottom surface SF2 of the frame portion 120 has an inner edge EI surrounding the cavity CV, and an outer edge EO surrounding the inner edge EI. The minimum dimension WD ( FIG. 11 ) between the inner edge EI and the outer edge EO may be 200 μm or less, typically 20 μm or more and 110 μm or less. The frame part 120 has the outer wall surface SF4 which connects the outer edge EO of frame top surface SF1 and frame bottom surface SF2. Furthermore, the frame portion 120 has an inner wall surface connecting the inner edge EI of the frame top surface SF1 and the frame bottom surface SF2, and the inner wall surface faces the cavity CV. In this embodiment, outer wall surface SF4 has firing surface SF4A connected to frame top surface SF1, and fracture surface SF4B connected to frame bottom surface SF2. The fracture surface SF4B may be a surface substantially perpendicular to the frame top surface SF1. As shown in FIG. 10 , the calcined surface SF4A may be a chamfered surface that forms a chamfer between the frame top surface SF1 and the fractured surface SF4B. In other words, the normal direction of the firing surface SF4A may be different from the normal direction of the frame top surface SF1 and the fracture surface SF4B and may be located between them.

如上所述，藉由配線層403及中繼電極220，於基板部110的基板頂面SF3上構成電極層200。又，如上所述，基板部110具有絕緣膜110i(圖10)作為其一部分。作為變形例，絕緣膜110i亦可藉由封裝體的設計而省略。又，電極層200亦可僅由配線層403和中繼電極220中任一者所構成。例如，電極層200可將中繼電極220予以省略且具有配線層403，於此情形時，可使配線層403和絕緣膜110i的界線位置(圖10中的配線層403的右端位置)往支持面部分SF3S上的中繼電極220的端位置(圖10中的中繼電極220的右端位置)稍微移動，可將中繼電極220予以省略。又，可使面向空腔CV的絕緣膜110i之端變形為達到框部120，於此情形時，可藉由絕緣膜110i使電極層200與空腔CV隔開。又，如圖10所示，電極層200典型而言係橫跨於支持面部分SF3S和空腔面部分SF3C，但作為變形例，亦可僅配置於支持面部分SF3S上。又，電極層200於本實施形態中具有與框部120的框底面SF2的外緣EO遠離之端(圖10中的右端)，但亦可使此端變形為達到外緣EO。As described above, the electrode layer 200 is formed on the substrate top surface SF3 of the substrate portion 110 by the wiring layer 403 and the relay electrode 220 . Also, as described above, the substrate portion 110 has the insulating film 110i ( FIG. 10 ) as a part thereof. As a modified example, the insulating film 110i can also be omitted according to the design of the package. In addition, the electrode layer 200 may be composed of only any one of the wiring layer 403 and the relay electrode 220 . For example, the electrode layer 200 can omit the relay electrode 220 and have the wiring layer 403. In this case, the boundary position between the wiring layer 403 and the insulating film 110i (the right end position of the wiring layer 403 in FIG. 10 ) can be supported. The end position of the relay electrode 220 on the surface portion SF3S (the right end position of the relay electrode 220 in FIG. 10 ) is slightly shifted, and the relay electrode 220 can be omitted. Also, the end of the insulating film 110i facing the cavity CV can be deformed so as to reach the frame portion 120, and in this case, the electrode layer 200 can be separated from the cavity CV by the insulating film 110i. Also, as shown in FIG. 10 , the electrode layer 200 typically straddles the support surface portion SF3S and the cavity surface portion SF3C, but as a modified example, it may be disposed only on the support surface portion SF3S. Also, the electrode layer 200 has an end (the right end in FIG. 10 ) away from the outer edge EO of the frame bottom surface SF2 of the frame portion 120 in this embodiment, but this end may be deformed so as to reach the outer edge EO.

封裝體701具有通孔電極510。通孔電極510於框頂面SF1和框底面SF2之間，貫通框部120。通孔電極510於框頂面SF1具有端面SFA，又，於框底面SF2具有底面SFB。於俯視觀察下，端面SFA的中心位置和底面SFB的中心位置可大致相同。底面SFB與電極層200相接，本實施形態中與中繼電極220相接。如上所述，中繼電極220接觸於配線層403，於配線層403(圖7)連接有基板通孔電極412及基板通孔電極414。因此，基板通孔電極412及基板通孔電極414電連接於通孔電極510。再者，通孔電極510的端面SFA與金屬化層600(圖6)相接。因此，金屬化層600分別經由基板通孔電極412及基板通孔電極414，而電連接於封裝電極墊302及封裝電極墊304(參考圖8)。The package 701 has a via electrode 510 . The via electrode 510 penetrates through the frame portion 120 between the frame top surface SF1 and the frame bottom surface SF2 . The via electrode 510 has an end surface SFA on the frame top surface SF1, and has a bottom surface SFB on the frame bottom surface SF2. In a top view, the central position of the end surface SFA and the central position of the bottom surface SFB may be approximately the same. The bottom surface SFB is in contact with the electrode layer 200 , and in this embodiment is in contact with the relay electrode 220 . As described above, the relay electrode 220 is in contact with the wiring layer 403 , and the through-substrate-hole electrode 412 and the through-substrate-hole electrode 414 are connected to the wiring layer 403 ( FIG. 7 ). Therefore, the through-substrate electrode 412 and the through-substrate electrode 414 are electrically connected to the through-hole electrode 510 . Furthermore, the end surface SFA of the via electrode 510 is in contact with the metallization layer 600 ( FIG. 6 ). Therefore, the metallization layer 600 is electrically connected to the package electrode pad 302 and the package electrode pad 304 via the TSV electrode 412 and the TSV electrode 414 respectively (refer to FIG. 8 ).

通孔電極510的端面SFA具有直徑DA(圖11)。直徑DA宜小於最小尺寸WD且為50μm以下。通孔電極510的底面SFB具有小於直徑DA的直徑DB(圖11)。通孔電極510宜於厚度方向(圖10中的縱方向)上的端面SFA和底面SFB的中間位置(端面SFA的位置和底面SFB的位置的平均位置)，具有(DA＋DB)／2以下的直徑。推拔率(直徑DB相對於直徑DA的百分率)宜小於60%。The end surface SFA of the via electrode 510 has a diameter DA ( FIG. 11 ). The diameter DA is preferably smaller than the minimum dimension WD and is 50 μm or less. The bottom surface SFB of the via electrode 510 has a diameter DB ( FIG. 11 ) which is smaller than the diameter DA. Via-hole electrode 510 is preferably at an intermediate position between end surface SFA and bottom surface SFB in the thickness direction (longitudinal direction in FIG. 10 ) (average position of end surface SFA and bottom surface SFB), and has a diameter of (DA+DB)/2 or less. . The push rate (the percentage of diameter DB relative to diameter DA) should be less than 60%.

於俯視觀察下(圖11)，底面SFB具有：從框部120的框底面SF2的內緣EI起算的最小尺寸LI、及從框部120的框底面SF2的外緣EO起算的最小尺寸LO。滿足LO＞LI，較佳為滿足LO≧LI×1.5。In plan view ( FIG. 11 ), the bottom surface SFB has a minimum dimension LI counted from the inner edge EI of the frame bottom surface SF2 of the frame portion 120 and a minimum dimension LO counted from the outer edge EO of the frame bottom surface SF2 of the frame portion 120 . It satisfies LO>LI, preferably satisfies LO≧LI×1.5.

於圖11所示的平面配置中，端面SFA及底面SFB的形狀為大致圓形形狀，但此等形狀可因製造誤差而與幾何學上嚴謹定義的圓形有些許差異。於此情形時，直徑DA及直徑DB，可藉由將端面SFA及底面SFB以圓形形狀近似而進行計算。In the planar configuration shown in FIG. 11 , the shapes of the end surface SFA and the bottom surface SFB are substantially circular, but these shapes may be slightly different from a geometrically strictly defined circle due to manufacturing errors. In this case, the diameter DA and the diameter DB can be calculated by approximating the end surface SFA and the bottom surface SFB to a circular shape.

又，於圖11所示的平面配置中，框底面SF2(參考圖10)的內緣EI具有：第1直線部(圖中，縱方向的直線部)；相對於第1直線部於直角方向上延伸的第2直線部(圖中，橫向的直線部)；及將此等直線部彼此連結的角部。最小尺寸LI可為到此角部的尺寸。Also, in the plane configuration shown in FIG. 11 , the inner edge EI of the frame bottom surface SF2 (refer to FIG. 10 ) has: a first straight line portion (in the figure, a straight line portion in the vertical direction); a second linear portion extending upward (in the figure, a horizontal linear portion); and a corner portion connecting these linear portions. The smallest dimension LI may be the dimension to this corner.

圖12至圖14係概略顯示將複數之封裝體701總括製造的製造方法的一步驟的部分剖面圖。又，於圖12至圖14中，為了便於說明，將成為金屬化層600(圖6)的部分的圖示予以省略。金屬化層600的形成，由於可藉由採用例如導電糊膏的塗佈及其煅燒的周知技術，故省略其說明。又，該煅燒亦可與後述的煅燒步驟共通。又，圖12及圖13，係顯示相較於使圖13的狀態往圖14的狀態變化之煅燒步驟為前的狀態。因此，圖12及圖13中的各構成，與完成後的封裝體701不同而係由未煅燒的材料構成，但為了便於說明而忽略此材料上的差異，將與表示封裝體701的構成的符號相同的符號，亦附加於圖12及圖13中。12 to 14 are partial cross-sectional views schematically showing one step of a manufacturing method for collectively manufacturing a plurality of packages 701 . In addition, in FIGS. 12 to 14 , for convenience of description, the illustration of the portion that becomes the metallization layer 600 ( FIG. 6 ) is omitted. The metallization layer 600 can be formed by using well-known techniques such as coating and firing of conductive paste, so its description is omitted. Moreover, this calcination may be shared with the calcination process mentioned later. In addition, FIGS. 12 and 13 show the state before the calcining step of changing the state of FIG. 13 to the state of FIG. 14 . Therefore, each structure in FIG. 12 and FIG. 13 is different from the completed package 701 in that it is made of an uncalcined material. However, for the convenience of explanation, this material difference will be ignored, and the structure of the package 701 will be described. The same reference numerals are also attached to FIGS. 12 and 13 .

生坯片700G(圖12)包含複數區域701G，其各自最終成為封裝體701。於圖12的狀態中，通孔電極510係對應於已填充導電糊膏的貫通孔。該貫通孔的形成，係藉由對生坯片700G的雷射加工而進行。A green sheet 700G ( FIG. 12 ) includes a plurality of regions 701G, each of which eventually becomes a package 701 . In the state of FIG. 12 , the via electrode 510 corresponds to a via hole filled with conductive paste. The formation of the through holes is performed by laser processing of the green sheet 700G.

於生坯片700G的框頂面SF1形成渠溝TR1(圖13)。又，於生坯片700G之與框頂面SF1相反的面，形成渠溝TR2(圖13)。渠溝TR1及渠溝TR2，係以於厚度方向上對向的方式配置。渠溝TR1及渠溝TR2，係藉由例如將刀刃推壓於生坯片700G而形成。其後，進行將生坯片700G(圖13)加以煅燒的煅燒步驟。又，依所需，亦可於煅燒步驟後進行電鍍步驟。A trench TR1 is formed on the frame top surface SF1 of the green sheet 700G ( FIG. 13 ). Further, a trench TR2 is formed on the surface of the green sheet 700G opposite to the frame top surface SF1 ( FIG. 13 ). Trench TR1 and trench TR2 are arranged so as to face each other in the thickness direction. The trench TR1 and the trench TR2 are formed, for example, by pressing a blade against the green sheet 700G. Thereafter, a firing step of firing the green sheet 700G ( FIG. 13 ) is performed. Also, the electroplating step may be performed after the calcining step as required.

藉由上述煅燒步驟形成煅燒片700F(圖14)。於煅燒步驟中，渠溝TR1的內面係曝露於煅燒氣體環境。因此，煅燒片700F的渠溝TR1的內面成為煅燒面。該煅燒面成為封裝體701的煅燒面SF4A(圖10)。藉由對煅燒片700F施加應力，進行使從渠溝TR1產生裂縫的分斷步驟。藉由以分斷步驟使框部120破斷而形成斷裂面。該斷裂面成為封裝體701的斷裂面SF4B(圖10)。分斷步驟亦可為使於渠溝TR1和渠溝TR2之間產生裂縫的步驟。藉由分斷步驟，從煅燒片700F切出複數之封裝體701。A calcined sheet 700F is formed through the above calcining steps (FIG. 14). During the calcining step, the inner surface of the trench TR1 is exposed to the calcining gas environment. Therefore, the inner surface of the trench TR1 of the calcined sheet 700F becomes the calcined surface. This fired surface becomes the fired surface SF4A of the package 701 ( FIG. 10 ). By applying stress to the calcined sheet 700F, a breaking step of generating cracks from the trench TR1 is performed. A fractured surface is formed by breaking the frame portion 120 in a breaking step. This fracture surface becomes the fracture surface SF4B of the package 701 (FIG. 10). The breaking step may also be a step of creating a crack between the trench TR1 and the trench TR2. A plurality of packages 701 are cut out from the calcined sheet 700F by the breaking step.

於分斷步驟中，來自渠溝TR1的裂縫，於理想狀況下係如圖中實線箭頭所示沿著厚度方向而延展，但實際上，如圖中虛線箭頭所示，有時會非有意地相較於一側的通孔電極510(圖中，右側的通孔電極510)往另一側的通孔電極510(圖中，左側的通孔電極510)靠近。結果，於具有該另一側的通孔電極510的封裝體701中，框部120的框底面SF2的最小尺寸LO(圖11)變小。由於過小的最小尺寸LO容易導致封裝體701的漏電，故最小尺寸LO宜具有某種程度的餘裕。依據本實施形態，容易確保此餘裕。In the breaking step, the cracks from the trench TR1 are ideally extended along the thickness direction as shown by the solid arrow in the figure, but in reality, as shown by the dotted arrow in the figure, sometimes it is unintentional The ground is closer to the via electrode 510 on the other side (the via electrode 510 on the left in the figure) than the via electrode 510 on one side (the via electrode 510 on the right in the figure). As a result, in the package 701 having the via electrode 510 on the other side, the minimum dimension LO ( FIG. 11 ) of the frame bottom surface SF2 of the frame portion 120 becomes small. Since an excessively small minimum size LO is likely to cause leakage of the package body 701 , the minimum size LO should have a certain degree of margin. According to this embodiment, it is easy to secure this margin.

圖15係通孔電極510(圖10)的構成的詳細說明圖。通孔電極510具有於厚度方向(圖中縱方向)的整體，從端面SFA至底面SFB以推拔形狀延伸的部分。此推拔形狀宜具有以厚度方向LD為基準之5度以上的推拔角TP AV。通孔電極510具有將端面SFA和底面SFB連結的側面。點KA及點KB各自表示於厚度方向上的端面SFA及底面SFB的位置之該側面的位置。點KV表示於厚度方向上的點KA和點KB之間的該側面的位置。點KW表示於厚度方向上的點KV和點KB之間的該側面的位置。本實施形態中，點KV及點KW實質上位於將點KA和點KB連接的直線上。 FIG. 15 is a detailed diagram illustrating the configuration of the via electrode 510 ( FIG. 10 ). The via-hole electrode 510 has a portion extending in a push-out shape from the end surface SFA to the bottom surface SFB in the entire thickness direction (vertical direction in the figure). This push-pull shape preferably has a push-pull angle TP AV of 5 degrees or more based on the thickness direction LD. Via electrode 510 has side surfaces connecting end surface SFA and bottom surface SFB. Each of the point KA and the point KB shows the position of the side surface of the position of the end surface SFA and the bottom surface SFB in the thickness direction. Point KV indicates the position of the side surface between point KA and point KB in the thickness direction. Point KW indicates the position of the side surface between point KV and point KB in the thickness direction. In the present embodiment, point KV and point KW are substantially located on a straight line connecting point KA and point KB.

圖16係考量圖15中抽象捨蕪後的框頂面SF1的細微傾斜，並將圖15所示的構成與金屬化層600(參考圖6)一同顯示的圖。框部120的框頂面SF1具有：直接連結至通孔電極510的端面SFA的傾斜區SF1d(第1區)、及經由傾斜區SF1d而連結至通孔電極510的端面SFA的平行區SF1f(第2區)。平行區SF1f垂直於厚度方向。傾斜區SF1d係相對於平行區SF1f，以越接近通孔電極510的端面SFA則框部120的厚度越小的方式傾斜。此傾斜的角度為例如4°以上、20°以下。傾斜區SF1d可包圍通孔電極510的端面SFA，平行區SF1f可包圍此傾斜區SF1d。金屬化層600設於框頂面SF1的傾斜區SF1d及平行區SF1f上，並與通孔電極510的端面SFA相接。FIG. 16 is a diagram showing the configuration shown in FIG. 15 together with the metallization layer 600 (refer to FIG. 6 ) in consideration of the slight inclination of the top surface SF1 of the frame after abstraction in FIG. 15 . The frame top surface SF1 of the frame portion 120 has an inclined region SF1d (first region) directly connected to the end surface SFA of the via electrode 510 and a parallel region SF1f ( Zone 2). The parallel region SF1f is perpendicular to the thickness direction. The inclined region SF1d is inclined such that the thickness of the frame portion 120 becomes smaller as it gets closer to the end surface SFA of the via electrode 510 with respect to the parallel region SF1f. The angle of this inclination is, for example, not less than 4° and not more than 20°. The inclined region SF1d may surround the end surface SFA of the via electrode 510, and the parallel region SF1f may surround the inclined region SF1d. The metallization layer 600 is disposed on the inclined region SF1d and the parallel region SF1f of the top surface SF1 of the frame, and is in contact with the end surface SFA of the via electrode 510 .

依據本實施形態，如圖11所示，底面SFB的直徑DB小於端面SFA的直徑DA。藉此，於通孔電極510的底面SFB的周圍，使框部120的框底面SF2(圖10)和基板部110的基板頂面SF3(圖10)的界面變廣。換言之，於通孔電極510的底面SFB的周圍，使陶瓷間的疊層界面變廣。在此，如圖11所示，由於以滿足LO＞LI的方式配置通孔電極510的底面SFB，故於底面SFB和框部120的框底面SF2的外緣EO之間，可大大地確保陶瓷間的疊層界面所配置之處。在此，陶瓷間的疊層界面相較於金屬和陶瓷的疊層界面，具有高氣密性。因此，可抑制沿著疊層界面的漏電所導致的氣密性的降低。According to the present embodiment, as shown in FIG. 11 , the diameter DB of the bottom surface SFB is smaller than the diameter DA of the end surface SFA. This widens the interface between frame bottom surface SF2 ( FIG. 10 ) of frame portion 120 and substrate top surface SF3 ( FIG. 10 ) of substrate portion 110 around bottom surface SFB of via electrode 510 . In other words, around the bottom surface SFB of the via electrode 510 , the lamination interface between ceramics is widened. Here, as shown in FIG. 11 , since the bottom surface SFB of the via electrode 510 is arranged so that LO>LI is satisfied, a large amount of ceramic material can be ensured between the bottom surface SFB and the outer edge EO of the frame bottom surface SF2 of the frame portion 120 . Where the stack interface between is configured. Here, the lamination interface between ceramics has higher airtightness than the lamination interface between metal and ceramics. Therefore, it is possible to suppress a reduction in airtightness due to leakage along the interface between the laminates.

通孔電極510的直徑DA可為50μm以下。藉此，亦可使框部120的最小尺寸WD(圖11)微縮化。當此微縮化越進展而使沿著基板部110和框部120之間的疊層界面的漏電越容易成為問題時，該問題因上述理由而被有效抑制。The diameter DA of the via electrode 510 may be 50 μm or less. Accordingly, the minimum dimension WD ( FIG. 11 ) of the frame portion 120 can also be miniaturized. As this miniaturization progresses, leakage along the lamination interface between the substrate portion 110 and the frame portion 120 becomes more likely to become a problem, and this problem is effectively suppressed for the above-mentioned reason.

框部120的框底面SF2的內緣EI和外緣EO之間的最小尺寸可為200μm以下。如此當微縮化越進展，而使沿著基板部110和框部120間的疊層界面的漏電越容易成為問題時，該問題因上述理由而被有效抑制。The minimum dimension between the inner edge EI and the outer edge EO of the frame bottom surface SF2 of the frame part 120 may be 200 μm or less. As miniaturization progresses in this way, leakage along the lamination interface between the substrate portion 110 and the frame portion 120 becomes more likely to become a problem, and this problem is effectively suppressed for the above-mentioned reason.

參考圖11，於滿足LO≧LI×1.5的情形時，可更充分抑制因沿著基板部110的基板頂面SF3和框部120的框底面SF2間的疊層界面(參考圖10)的漏電所導致的氣密性的降低。Referring to FIG. 11 , when the condition of LO≧LI×1.5 is satisfied, leakage current due to the lamination interface (refer to FIG. 10 ) along the substrate top surface SF3 of the substrate portion 110 and the frame bottom surface SF2 of the frame portion 120 can be more fully suppressed. The resulting reduction in airtightness.

參考圖11，通孔電極510於厚度方向(圖10中的縱方向)上的端面SFA和底面SFB的中間位置，可具有(DA＋DB)／2以下的直徑。藉此，可充分確保通孔電極510的該中間位置和框部120的外壁面SF4間的距離。因此，可提高通孔電極510和框部120間的氣密可靠性。Referring to FIG. 11 , via electrode 510 may have a diameter of (DA+DB)/2 or less at an intermediate position between end surface SFA and bottom surface SFB in the thickness direction (longitudinal direction in FIG. 10 ). Thereby, the distance between the intermediate position of the via electrode 510 and the outer wall surface SF4 of the frame portion 120 can be sufficiently ensured. Therefore, the airtight reliability between the via electrode 510 and the frame portion 120 can be improved.

通孔電極510具有於厚度方向(圖10中的縱方向)上有從端面SFA以推拔形狀延伸的部分。藉此，於端面SFA的正下方，容易確保通孔電極510和框部120的外壁面SF4間的距離。因此，可提高通孔電極510和框部120間的氣密可靠性。特別是於本實施形態中，因通孔電極510整體以推拔形狀延伸，故可更充分獲得此效果。Via-hole electrode 510 has a portion extending in a pushed-out shape from end surface SFA in the thickness direction (vertical direction in FIG. 10 ). Thereby, the distance between the via-hole electrode 510 and the outer wall surface SF4 of the frame part 120 can be easily ensured directly under the end surface SFA. Therefore, the airtight reliability between the via electrode 510 and the frame portion 120 can be improved. Especially in this embodiment, since the via electrode 510 as a whole extends in a push-out shape, this effect can be more fully obtained.

推拔角TP AV(圖15)可為5度以上。藉此，於端面SFA的正下方，可更充分容易確保通孔電極510和框部120的外壁面SF4(圖10)之間的距離。 The push-pull angle TP AV ( FIG. 15 ) may be more than 5 degrees. Thereby, the distance between the via electrode 510 and the outer wall surface SF4 ( FIG. 10 ) of the frame portion 120 can be ensured more sufficiently and easily directly below the end surface SFA.

框部120的外壁面SF4(圖10)具有：連結至框頂面SF1的煅燒面SF4A、及連結至框底面SF2的斷裂面SF4B。斷裂面SF4B藉由分斷步驟而形成時，依其步驟變異的影響，有時最小尺寸LO(圖11)會變小。然而，如上所述，藉由滿足DA＞DB且LO＞LI，使最小尺寸LO不易變得過小。因此，可防止因最小尺寸LO過小而造成的框部120的氣密性的不足。The outer wall surface SF4 ( FIG. 10 ) of the frame portion 120 has a firing surface SF4A connected to the frame top surface SF1 and a fracture surface SF4B connected to the frame bottom surface SF2 . When the fracture surface SF4B is formed by a breaking step, the minimum dimension LO (FIG. 11) may become smaller depending on the step variation. However, as described above, by satisfying DA>DB and LO>LI, the minimum size LO is less likely to become too small. Therefore, insufficient airtightness of the frame portion 120 due to too small minimum dimension LO can be prevented.

藉由使傾斜區SF1d(圖16)如上所述傾斜，可於維持通孔電極510(圖15)的直徑DA及直徑DB的狀況下，使通孔電極510的側面和框頂面SF1所成的鈍角SH更大。因此，可減緩因於主要由金屬構成的通孔電極510及金屬化層600、和由陶瓷構成的框部120間的熱膨脹的差異所造成的熱應力。因此，可防止肇因於熱應力的裂縫、或於通孔電極510和框部120之間的剝離。By inclining the inclined region SF1d ( FIG. 16 ) as described above, the side surface of the via electrode 510 and the frame top surface SF1 can be formed while maintaining the diameter DA and the diameter DB of the via electrode 510 ( FIG. 15 ). The obtuse angle SH is larger. Therefore, the thermal stress caused by the difference in thermal expansion between the via electrode 510 and the metallization layer 600 mainly made of metal and the frame portion 120 made of ceramics can be alleviated. Therefore, cracks due to thermal stress, or peeling between the via electrode 510 and the frame portion 120 can be prevented.

補充說明，將直徑DB(圖15)設為固定，則使直徑DA(圖15)越大，則鈍角SH(圖16)亦越大。然而，如上所述，近年來要求縮小框部120的寬度，而與此對應，直徑DA有設計上的上限。又，將直徑DA(圖15)設為固定，則使直徑DB(圖15)越小，則鈍角SH(圖16)亦越大。然而，由於直徑DB越小，通孔電極510的底面SFB的面積亦越小，故於圖10的構成中，通孔電極510的底面SFB和電極層200的中繼電極220間的電連接容易變成不充分。As a supplementary explanation, when the diameter DB ( FIG. 15 ) is fixed, the obtuse angle SH ( FIG. 16 ) becomes larger as the diameter DA ( FIG. 15 ) becomes larger. However, as described above, the width of the frame portion 120 has been required to be reduced in recent years, and accordingly, the diameter DA has an upper limit in design. Also, when the diameter DA ( FIG. 15 ) is fixed, the obtuse angle SH ( FIG. 16 ) becomes larger as the diameter DB ( FIG. 15 ) becomes smaller. However, since the smaller the diameter DB is, the area of the bottom surface SFB of the via electrode 510 is also smaller, so in the structure of FIG. become insufficient.

又，於傾斜區SF1d所造成的上述效果無特別必要的情形時，亦可省略傾斜區SF1d。換言之，於此情形時，框頂面SF1之直接連接至通孔電極510的端面SFA的區域，亦可垂直於厚度方向。In addition, when the above-mentioned effect caused by the inclined region SF1d is not particularly necessary, the inclined region SF1d can also be omitted. In other words, in this case, the area of the frame top surface SF1 directly connected to the end surface SFA of the via electrode 510 may also be perpendicular to the thickness direction.

＜實施形態2＞ 圖17係本實施形態2中的封裝體702所具有的通孔電極520的構成的詳細說明圖。通孔電極520的側面，在與厚度方向平行的剖面觀察下(圖17)，具有至少1個彎曲點，具體而言，具有點KV及點KW作為逆向彎曲的2個彎曲點。通孔電極520包括：部分521，具有從點KA至點KV的側面；部分522，具有從點KV至點KW的側面；及部分523，具有從點KW至點KB的側面。部分521於厚度方向上從端面SFA以推拔形狀延伸，此推拔形狀的推拔角TP AV宜為5度以上。部分521宜具有框部120的厚度的1／2以上的厚度。部分522具有比部分521緩和的推拔形狀、或圓筒狀形狀。部分523具有比部分522急遽的推拔形狀。 <Embodiment 2> FIG. 17 is a detailed illustration of the structure of the via-hole electrode 520 which the package 702 in this Embodiment 2 has. The side surface of the via electrode 520 has at least one bending point when viewed in a cross-section parallel to the thickness direction ( FIG. 17 ), specifically, two bending points of point KV and point KW as reverse bending. The via electrode 520 includes: a portion 521 having a side from a point KA to a point KV; a portion 522 having a side from a point KV to a point KW; and a portion 523 having a side from a point KW to a point KB. The portion 521 extends in a push-pull shape from the end surface SFA in the thickness direction, and the push-pull angle TP AV of the push-pull shape is preferably more than 5 degrees. The portion 521 preferably has a thickness of 1/2 or more of the thickness of the frame portion 120 . The portion 522 has a gentler push-out shape or a cylindrical shape than the portion 521 . Portion 523 has a sharper push-out shape than portion 522 .

圖18係考量圖17中抽象捨蕪後的框頂面SF1的細微傾斜，並將圖17所示的構成與金屬化層600(參考圖6)一同顯示的圖。圖18所示的構成，係對應於在圖16所示的構成中將通孔電極510(實施形態1)置換成通孔電極520(本實施形態2)而成者。藉由圖18所示的構成，亦可得到與圖16所示構成相關而於實施形態1中所述效果相同之效果。FIG. 18 is a view showing the configuration shown in FIG. 17 together with the metallization layer 600 (refer to FIG. 6 ) in consideration of the slight inclination of the top surface SF1 of the frame after abstraction in FIG. 17 . The configuration shown in FIG. 18 corresponds to the configuration shown in FIG. 16 in which via electrode 510 (first embodiment) is replaced by via electrode 520 (present embodiment 2). Also with the configuration shown in FIG. 18, the same effect as that described in Embodiment 1 in relation to the configuration shown in FIG. 16 can be obtained.

又，針對上述以外的構成，因與上述實施形態1的構成大致相同，故針對相同或對應的要件附加相同符號，而不重複其說明。Also, configurations other than those described above are substantially the same as those of Embodiment 1 above, so the same or corresponding elements are given the same reference numerals and their descriptions will not be repeated.

通孔電極520的部分521，具有框部120的厚度的1／2以上的厚度。藉此，可使通孔電極520和框部120的外壁面SF4(參考圖10)之間的距離，利用推拔形狀而更充分增大。Portion 521 of via-hole electrode 520 has a thickness of 1/2 or more of the thickness of frame portion 120 . Thereby, the distance between the via electrode 520 and the outer wall surface SF4 (see FIG. 10 ) of the frame portion 120 can be more sufficiently increased by the push-out shape.

通孔電極520的側面具有彎曲點(具體而言，點KV及點KW)。藉此，可抑制因封裝體702的製造中的燒結收縮所造成的通孔電極520的側面和框部120之間的剝離。藉由作為彎曲點的點KV及點KW逆向彎曲，可使此效果更為充分。The side surfaces of the via electrode 520 have bending points (specifically, point KV and point KW). Thereby, peeling between the side surface of via electrode 520 and frame portion 120 due to sintering shrinkage during manufacture of package body 702 can be suppressed. This effect can be made more sufficient by reversely bending the points KV and KW as bending points.

＜實施形態3＞ 圖19係本實施形態3中的封裝體703所具有的通孔電極530的構成的詳細說明圖。通孔電極530包括：部分531，具有從點KA至點KV的側面；部分532，具有從點KV至點KW的側面；及部分533，具有從點KW至點KB的側面。部分531於厚度方向上從端面SFA以推拔形狀延伸，此推拔形狀的推拔角TP AV宜為5度以上。部分531宜具有框部120的厚度的1／2以上的厚度。部分532於從端面SFA往底面SFB的方向具有逆推拔形狀。部分533於從端面SFA往底面SFB的方向具有推拔形狀。 <Embodiment 3> FIG. 19 is a detailed illustration of the structure of the via-hole electrode 530 which the package 703 in this Embodiment 3 has. The via electrode 530 includes: a portion 531 having a side from a point KA to a point KV; a portion 532 having a side from a point KV to a point KW; and a portion 533 having a side from a point KW to a point KB. The portion 531 extends in a push-pull shape from the end surface SFA in the thickness direction, and the push-pull angle TP AV of the push-pull shape is preferably more than 5 degrees. The portion 531 preferably has a thickness of 1/2 or more of the thickness of the frame portion 120 . The portion 532 has a reverse push-pull shape in a direction from the end surface SFA to the bottom surface SFB. The portion 533 has a push-out shape along the direction from the end surface SFA to the bottom surface SFB.

圖20係考量圖19中抽象捨蕪後的框頂面SF1的細微傾斜，並將圖19所示的構成與金屬化層600(參考圖6)一同顯示的圖。圖20所示的構成，係對應於在圖16所示的構成中將通孔電極510(實施形態1)置換成通孔電極530(本實施形態3)而成者。藉由圖20所示的構成，亦可得到與圖16所示構成相關而於實施形態1中所述效果相同之效果。FIG. 20 is a diagram showing the composition shown in FIG. 19 together with the metallization layer 600 (refer to FIG. 6 ) in consideration of the slight inclination of the top surface SF1 of the frame after abstraction in FIG. 19 . The configuration shown in FIG. 20 corresponds to the configuration shown in FIG. 16 in which the via electrode 510 (the first embodiment) is replaced by the via electrode 530 (the third embodiment). Also with the configuration shown in FIG. 20, the same effect as that described in Embodiment 1 in relation to the configuration shown in FIG. 16 can be obtained.

又，針對上述以外的構成，因與上述實施形態2的構成大致相同，故針對相同或對應的要件賦予相同符號，而不重複其說明。依據本實施形態，相較於實施形態2，可更提高抑制因燒結收縮所造成的通孔電極520的側面和框部120之間的剝離的效果。Also, configurations other than those described above are substantially the same as those of Embodiment 2 above, so the same or corresponding elements are assigned the same reference numerals and their descriptions will not be repeated. According to this embodiment, compared with Embodiment 2, the effect of suppressing peeling between the side surface of via electrode 520 and frame portion 120 due to sintering shrinkage can be further enhanced.

＜實施例＞ 參考圖12，於生坯片700G(圖12)的形成中，將被填充通孔電極510的貫通孔，如上所述，係藉由雷射加工而進行。藉由如以下的表1所示設定該加工中的雷射光的照射時間及照射次數，而製作實施例1～8的封裝體。又，於所有實施例皆相同，將來自CO 2雷射的波長9.4μm、平均輸出200W的雷射光，經由開口徑0.8mm的遮罩而往生坯片700G照射。 <Example> Referring to FIG. 12 , in forming the green sheet 700G ( FIG. 12 ), the through-holes to be filled with the through-hole electrodes 510 are performed by laser processing as described above. The packages of Examples 1 to 8 were produced by setting the irradiation time and the number of times of irradiation of laser light in this processing as shown in Table 1 below. Also, in the same way as in all the examples, laser light from a CO 2 laser with a wavelength of 9.4 μm and an average output of 200 W was irradiated to the green sheet 700G through a mask with an aperture diameter of 0.8 mm.

[表1] 實施例 照射時間[μsec] 照射次數[次] 1 6.0 2 2 6.0 3 3 6.0 4 4 6.0 6 5 6.5 6 6 7.0 6 7 7.5 6 8 10.0 6 [Table 1] Example Irradiation time [μsec] Exposure times [times] 1 6.0 2 2 6.0 3 3 6.0 4 4 6.0 6 5 6.5 6 6 7.0 6 7 7.5 6 8 10.0 6

於實施例1～5中，得到與通孔電極510(圖15)對應的形狀。具體而言，將點KV(圖15)設為厚度方向上的點KA和點KB的中間位置(亦即，平均位置)，將點KW(圖15)設為厚度方向上的點KV和點KB的中間位置(亦即，平均位置)，直徑DA為46μm，直徑DV(通過點KV的直徑)為34μm，直徑DW(通過點KW的直徑)為28μm，直徑DB為23μm。又，從點KA往點KB的推拔角為5.9度，從點KA往點KV的推拔角為6.1度，從點KV往點KW的推拔角為5.7度，從點KW往點KB的推拔角為5.9度。如此，通孔電極整體於5.9±0.2度的範圍內，具有大致單調的推拔形狀。於圖21中，顯示此觀察時的顯微鏡相片的例子。In Examples 1-5, the shape corresponding to the via-hole electrode 510 (FIG. 15) was obtained. Specifically, let point KV ( FIG. 15 ) be the middle position (that is, the average position) of point KA and point KB in the thickness direction, and let point KW ( FIG. 15 ) be the point KV and point KB in the thickness direction. At the middle position (ie, average position) of KB, diameter DA is 46 μm, diameter DV (diameter passing point KV) is 34 μm, diameter DW (diameter passing point KW) is 28 μm, and diameter DB is 23 μm. Also, the push angle from point KA to point KB is 5.9 degrees, the push angle from point KA to point KV is 6.1 degrees, the push angle from point KV to point KW is 5.7 degrees, and the push angle from point KW to point KB The push-pull angle is 5.9 degrees. In this way, the entire via-hole electrode has a substantially monotonous push-out shape within the range of 5.9±0.2 degrees. In Fig. 21, an example of a microscope photograph at the time of this observation is shown.

又，於圖21的例中，金屬化層600(參考圖6)在與通孔電極510的端面SFA(參考圖15)的連接部分成為局部變厚。直徑DA(圖15)係於該連接部分(圖21中的箭頭部分)量測。此於後述的圖22及圖23的例中亦相同。圖21的例子，係對應於圖16的構成，金屬化層600藉由較虛線部(圖16)更往下方突出，而在與通孔電極510的端面SFA的連接部分成為局部變厚，鈍角SH(圖16)於通孔電極510的左側及右側，分別為113°。Also, in the example of FIG. 21 , the metallization layer 600 (see FIG. 6 ) is locally thickened at the connection portion with the end surface SFA (see FIG. 15 ) of the via electrode 510 . The diameter DA (FIG. 15) is measured at this connecting portion (arrow portion in FIG. 21). This is also the same in the example of FIG. 22 and FIG. 23 mentioned later. The example in FIG. 21 corresponds to the configuration in FIG. 16 . The metallization layer 600 protrudes downward from the dotted line portion ( FIG. 16 ), and the connection portion with the end surface SFA of the via electrode 510 becomes locally thickened and has an obtuse angle. SH ( FIG. 16 ) is 113° to the left and right of the via electrode 510 , respectively.

於實施例6中，得到與通孔電極520(圖17)對應的形狀。具體而言，可觀察到如點KV(圖17)及點KW(圖17)般的彎曲點。於此觀察中，點KV(圖17)為厚度方向上的點KA和點KB的大約中間位置(亦即，平均位置)，點KW(圖17)為厚度方向上的點KV和點KB的大約中間位置(亦即，平均位置)。直徑DA為47μm，直徑DV(通過點KV的直徑)為34μm，直徑DW(通過點KW的直徑)為33μm，直徑DB為23μm。又，從點KA往點KB的推拔角為6.1度，從點KA往點KV的推拔角為6.5度，從點KV往點KW的推拔角為0.8度，從點KW往點KB的推拔角為10.5度。此觀察時的顯微鏡相片的例子示於圖22。圖22的例子，係對應圖18的構成，金屬化層600藉由較虛線部(圖18)更往下方突出，而在與通孔電極520的端面SFA的連接部分成為局部變厚，鈍角SH(圖18)於通孔電極520的左側及右側，分別為114°。In Example 6, a shape corresponding to the via electrode 520 ( FIG. 17 ) was obtained. Specifically, bending points such as point KV ( FIG. 17 ) and point KW ( FIG. 17 ) are observed. In this observation, point KV (FIG. 17) is approximately the middle position (that is, the average position) of point KA and point KB in the thickness direction, and point KW (FIG. 17) is the distance between point KV and point KB in the thickness direction. About the middle position (ie, the average position). The diameter DA is 47 μm, the diameter DV (the diameter passing through the point KV) is 34 μm, the diameter DW (the diameter passing through the point KW) is 33 μm, and the diameter DB is 23 μm. Also, the pushing angle from point KA to point KB is 6.1 degrees, the pushing angle from point KA to point KV is 6.5 degrees, the pushing angle from point KV to point KW is 0.8 degrees, and the pushing angle from point KW to point KB is The push-pull angle is 10.5 degrees. An example of a microscope photograph at the time of this observation is shown in FIG. 22 . The example in FIG. 22 corresponds to the configuration in FIG. 18 . The metallization layer 600 protrudes downward from the dotted line portion ( FIG. 18 ), and becomes locally thicker at the connection portion with the end surface SFA of the via electrode 520 , and the obtuse angle SH ( FIG. 18 ) The left and right sides of the via electrode 520 are 114°, respectively.

於實施例7及8中，得到與通孔電極530(圖19)對應的形狀。具體而言，可觀察到如點KV(圖19)及點KW(圖19)般的彎曲點。於此觀察中，點KV(圖19)為厚度方向上的點KA和點KB的大約中間位置(亦即，平均位置)，點KW(圖19)為厚度方向上的點KV和點KB的大約中間位置(亦即，平均位置)。直徑DA為45μm，直徑DV(通過點KV的直徑)為31μm，直徑DW(通過點KW的直徑)為32μm，直徑DB為18μm。又，點從KA往點KB的推拔角為6.9度，從點KA往點KV的推拔角為6.9度，從點KV往點KW的推拔角為－0.8度，從點KW往點KB的推拔角為14.4度。從點KV往點KW的推拔角為負值，此代表逆推拔形狀。此觀察時的顯微鏡相片的例子示於圖23。圖23的例子，係對應圖20的構成，金屬化層600藉由較虛線部(圖20)更往下方突出，而在與通孔電極530的端面SFA的連接部分成為局部變厚，鈍角SH(圖20)於通孔電極530(圖20)的左側及右側，分別為102°及120°。In Examples 7 and 8, a shape corresponding to the via electrode 530 ( FIG. 19 ) was obtained. Specifically, bending points such as point KV ( FIG. 19 ) and point KW ( FIG. 19 ) are observed. In this observation, point KV (FIG. 19) is approximately the middle position (that is, the average position) of point KA and point KB in the thickness direction, and point KW (FIG. 19) is the distance between point KV and point KB in the thickness direction. About the middle position (ie, the average position). The diameter DA is 45 μm, the diameter DV (the diameter passing through the point KV) is 31 μm, the diameter DW (the diameter passing through the point KW) is 32 μm, and the diameter DB is 18 μm. Also, the push angle of point KA to point KB is 6.9 degrees, the push angle from point KA to point KV is 6.9 degrees, the push angle from point KV to point KW is -0.8 degrees, and the push angle from point KW to point The push angle of KB is 14.4 degrees. The push-pull angle from point KV to point KW is a negative value, which represents the reverse push-pull shape. An example of a microscope photograph at the time of this observation is shown in FIG. 23 . The example in FIG. 23 corresponds to the configuration in FIG. 20 . The metallization layer 600 protrudes downward from the dotted line portion ( FIG. 20 ), and becomes locally thicker at the connection portion with the end surface SFA of the via electrode 530 , and the obtuse angle SH ( FIG. 20 ) The left and right sides of the via electrode 530 ( FIG. 20 ) are 102° and 120°, respectively.

以上，針對本發明的實施形態1～3及其變形例加以說明。此等實施形態及變形例，只要不互相矛盾，亦可彼此自由組合。In the foregoing, Embodiments 1 to 3 and their modifications of the present invention have been described. These embodiments and modifications can be freely combined with each other as long as they do not contradict each other.

100:陶瓷部 110:基板部 110i:絕緣膜 120:框部 200:電極層 211~212:元件電極墊 220:中繼電極 301~304:封裝電極墊 401~403:配線層 411~414:基板通孔電極 510:通孔電極 520:通孔電極 521~523:部分 530:通孔電極 531~533:部分 600:金屬化層 700F:煅燒片 700G:生坯片 701~703:封裝體 701G:區域 890:水晶毛胚 900:晶體振盪器 960:焊料 980:蓋件 CV:空腔 DA:直徑 DB:直徑 DV:直徑 DW:直徑 EI:內緣 EO:外緣 KA:點 KB:點 KV:點 KW:點 LD:厚度方向 LI:從框部120的框底面SF2的內緣EI起算的最小尺寸 LO:從框部120的框底面SF2的外緣EO起算的最小尺寸 SF1:框頂面(第1面) SF1d:傾斜區(第1區) SF1f:平行區(第2區) SF2:框底面(第2面) SF3:基板頂面(第3面) SF3C:空腔面部分 SF3S:支持面部分 SF4:外壁面 SF4A:煅燒面 SF4B:斷裂面 SFA:端面 SFB:底面 SH:鈍角 TP AV:推拔角 TR1~TR2:渠溝 WD:框部120的最小尺寸 100: ceramic part 110: substrate part 110i: insulating film 120: frame part 200: electrode layer 211~212: element electrode pad 220: relay electrode 301~304: package electrode pad 401~403: wiring layer 411~414: substrate Via hole electrode 510: Via hole electrode 520: Via hole electrode 521~523: Part 530: Via hole electrode 531~533: Part 600: Metallized layer 700F: Calcined sheet 700G: Green sheet 701~703: Package body 701G: Area 890: Crystal Blank 900: Crystal Oscillator 960: Solder 980: Cover CV: Cavity DA: Diameter DB: Diameter DV: Diameter DW: Diameter EI: Inner Edge EO: Outer Edge KA: Point KB: Point KV: Point KW: point LD: thickness direction LI: minimum dimension LO from the inner edge E1 of the frame bottom surface SF2 of the frame portion 120 LO: minimum dimension SF1 from the outer edge EO of the frame bottom surface SF2 of the frame portion 120 SF1: frame top surface ( Surface 1) SF1d: Tilted area (Section 1) SF1f: Parallel area (Section 2) SF2: Frame bottom surface (Side 2) SF3: Substrate top surface (Side 3) SF3C: Cavity surface SF3S: Support Surface part SF4: outer wall surface SF4A: calcined surface SF4B: fracture surface SFA: end surface SFB: bottom surface SH: obtuse angle TP AV : push angle TR1~TR2: ditch WD: minimum size of frame part 120

[圖1]概略顯示本發明的實施形態1中的晶體振盪器的構成的俯視圖。 [圖2]沿著圖1的線II－II的概略剖面圖。 [圖3]概略顯示圖1的晶體振盪器的製造方法的一步驟的俯視圖。 [圖4]沿著圖3的線IV－IV的概略剖面圖。 [圖5]概略顯示本發明的實施形態1中的封裝體的構成的俯視圖。 [圖6]沿著圖5的線VI－VI的概略剖面圖。 [圖7]省略圖5中的金屬化層及框部的圖示的俯視圖。 [圖8]以虛線顯示封裝電極墊，並概略顯示圖7中的基板部及通孔電極的俯視圖。 [圖9]省略圖5中的框部上的金屬化層的圖示的俯視圖。 [圖10]沿著圖9的線X－X的概略剖面圖。 [圖11]圖9的部分放大圖。 [圖12]概略顯示本發明的實施形態1中的封裝體的製造方法的一步驟的部分剖面圖。 [圖13]概略顯示本發明的實施形態1中的封裝體的製造方法的一步驟的部分剖面圖。 [圖14]概略顯示本發明的實施形態1中的封裝體的製造方法的一步驟的部分剖面圖。 [圖15]圖10所示通孔電極的構成的詳細說明圖。 [圖16]考量框部的框頂面的細微傾斜，並將圖15所示的構成與金屬化層一同顯示的圖。 [圖17]本發明的實施形態2中的封裝體具有的通孔電極的構成的詳細說明圖。 [圖18]考量框部的框頂面的細微傾斜之同時，將圖17所示的構成與金屬化層一同顯示的圖。 [圖19]本發明的實施形態3中的封裝體具有的通孔電極的構成的詳細說明圖。 [圖20]考量框部的框頂面的細微傾斜之同時，將圖19所示的構成與金屬化層一同顯示的圖。 [圖21]與圖15的構成對應的實施例的顯微鏡相片。 [圖22]與圖17的構成對應的實施例的顯微鏡相片。 [圖23]與圖19的構成對應的實施例的顯微鏡相片。 [ Fig. 1] Fig. 1 is a plan view schematically showing the configuration of a crystal oscillator in Embodiment 1 of the present invention. [ Fig. 2 ] A schematic cross-sectional view taken along line II-II in Fig. 1 . [ Fig. 3 ] A plan view schematically showing one step of the method of manufacturing the crystal oscillator of Fig. 1 . [ Fig. 4 ] A schematic cross-sectional view taken along line IV-IV in Fig. 3 . [ Fig. 5] Fig. 5 is a plan view schematically showing the structure of a package in Embodiment 1 of the present invention. [ Fig. 6 ] A schematic cross-sectional view taken along line VI-VI in Fig. 5 . [ Fig. 7] Fig. 7 is a plan view omitting illustration of a metallization layer and a frame portion in Fig. 5 . [ FIG. 8 ] A top view showing package electrode pads in dotted lines and schematically showing the substrate portion and via electrodes in FIG. 7 . [ FIG. 9 ] A plan view omitting illustration of a metallization layer on a frame portion in FIG. 5 . [ Fig. 10 ] A schematic cross-sectional view taken along line XX in Fig. 9 . [ Fig. 11 ] A partially enlarged view of Fig. 9 . [ Fig. 12] Fig. 12 is a partial cross-sectional view schematically showing one step of the method of manufacturing a package in Embodiment 1 of the present invention. [ Fig. 13] Fig. 13 is a partial cross-sectional view schematically showing one step of the method of manufacturing a package in Embodiment 1 of the present invention. [ Fig. 14] Fig. 14 is a partial cross-sectional view schematically showing one step of the method of manufacturing the package in Embodiment 1 of the present invention. [ Fig. 15] Fig. 10 is a detailed diagram illustrating the structure of the via electrode shown in Fig. 10 . [FIG. 16] A diagram showing the configuration shown in FIG. 15 together with metallization layers in consideration of the slight inclination of the frame top surface of the frame part. [ Fig. 17] Fig. 17 is a detailed diagram illustrating the configuration of via-hole electrodes included in the package according to Embodiment 2 of the present invention. [ FIG. 18 ] A diagram showing the configuration shown in FIG. 17 together with metallization layers, taking into account the slight inclination of the frame top surface of the frame portion. [ Fig. 19] Fig. 19 is a detailed diagram illustrating the configuration of via-hole electrodes included in the package according to Embodiment 3 of the present invention. [ FIG. 20 ] A diagram showing the configuration shown in FIG. 19 together with metallization layers while considering the slight inclination of the frame top surface of the frame portion. [ Fig. 21 ] A microscope photograph of an example corresponding to the configuration of Fig. 15 . [ Fig. 22 ] A microscope photograph of an example corresponding to the configuration of Fig. 17 . [ Fig. 23 ] A microscope photograph of an example corresponding to the configuration of Fig. 19 .

110:基板部 110: substrate part

120:框部 120: frame part

220:中繼電極 220: relay electrode

510:通孔電極 510: Through hole electrode

701:封裝體 701: Encapsulation

CV:空腔 CV: cavity

DA:直徑 DA: diameter

DB:直徑 DB: diameter

EI:內緣 EI: inner edge

EO:外緣 EO: outer edge

LI:從框部120的框底面的內緣EI起算的最小尺寸 LI: The smallest dimension counted from the inner edge EI of the frame bottom surface of the frame portion 120

LO:從框部120的框底面的外緣EO起算的最小尺寸 LO: The smallest dimension counted from the outer edge EO of the frame bottom surface of the frame portion 120

SF4:外壁面 SF4: Outer wall

SF4A:煅燒面 SF4A: calcined surface

SF4B:斷裂面 SF4B: fracture surface

SFA:端面 SFA: end face

SFB:底面 SFB: bottom surface

WD:框部120的最小尺寸 WD: The minimum size of the frame portion 120

Claims (13)

一種封裝體，設有空腔； 該封裝體包括由陶瓷構成的框部，該框部具有第1面、及於厚度方向與該第1面相反的第2面，該第2面具有包圍該空腔的內緣及包圍該內緣的外緣； 該封裝體更包括由陶瓷構成的基板部，該基板部具有第3面，該第3面包含支持該框部的該第2面的部分、及面向該空腔的部分； 該封裝體更包括設於該基板部的該第3面上的電極層、及於該第1面和該第2面之間貫通該框部的通孔電極；該通孔電極具有：於該第1面具有直徑DA之端面、及於該第2面與該電極層相接且具有小於該直徑DA的直徑DB之底面； 於俯視觀察下，該通孔電極的該底面具有從該框部的該第2面的該內緣起算的最小尺寸LI、及從該框部的該第2面的該外緣起算的最小尺寸LO，且滿足LO＞LI。 A package body is provided with a cavity; The package includes a frame portion made of ceramics, the frame portion has a first surface, and a second surface opposite to the first surface in the thickness direction, the second surface has an inner edge surrounding the cavity and surrounds the inner edge. the outer edge of the edge; The package further includes a substrate portion made of ceramics, the substrate portion has a third surface, and the third surface includes a portion supporting the second surface of the frame portion and a portion facing the cavity; The package further includes an electrode layer disposed on the third surface of the substrate portion, and a through-hole electrode penetrating the frame portion between the first surface and the second surface; the through-hole electrode has: The first surface has an end surface with a diameter DA, and a bottom surface which is in contact with the electrode layer on the second surface and has a diameter DB smaller than the diameter DA; In plan view, the bottom surface of the via electrode has a minimum dimension LI counted from the inner edge of the second surface of the frame portion and a minimum dimension measured from the outer edge of the second surface of the frame portion LO, and satisfy LO>LI. 如請求項1的封裝體，其中， 該直徑DA為50μm以下。 Such as the package body of request item 1, wherein, The diameter DA is 50 μm or less. 如請求項1或2的封裝體，其中， 該框部的該第2面的該內緣和該外緣之間的最小尺寸為200μm以下。 Such as the package body of claim item 1 or 2, wherein, A minimum dimension between the inner edge and the outer edge of the second surface of the frame portion is 200 μm or less. 如請求項1或2的封裝體，其中， 滿足LO≧LI×1.5。 Such as the package body of claim item 1 or 2, wherein, Satisfy LO≧LI×1.5. 如請求項1或2的封裝體，其中， 該通孔電極於該厚度方向上的該端面和該底面的中間位置，具有(DA＋DB)／2以下的直徑。 Such as the package body of claim item 1 or 2, wherein, The through-hole electrode has a diameter of (DA+DB)/2 or less at an intermediate position between the end surface and the bottom surface in the thickness direction. 如請求項1或2的封裝體，其中， 該通孔電極具有於該厚度方向上從該端面以推拔形狀延伸的部分。 Such as the package body of claim item 1 or 2, wherein, The via electrode has a portion extending in a push-out shape from the end surface in the thickness direction. 如請求項6的封裝體，其中， 該推拔形狀具有5度以上的推拔角。 Such as the package body of claim item 6, wherein, The push-pull shape has a push-pull angle of 5 degrees or more. 如請求項6的封裝體，其中， 該推拔形狀具有該框部的厚度的1／2以上的厚度。 Such as the package body of claim item 6, wherein, The push-out shape has a thickness of 1/2 or more of the thickness of the frame portion. 如請求項1或2的封裝體，其中， 該通孔電極具有將該端面和該底面加以連結的側面，該側面在與該厚度方向平行的剖面觀察下，具有至少1個彎曲點。 Such as the package body of claim item 1 or 2, wherein, The through-hole electrode has a side surface connecting the end surface and the bottom surface, and the side surface has at least one bending point when viewed in a cross section parallel to the thickness direction. 如請求項9的封裝體，其中， 該至少1個彎曲點包含逆向彎曲的2個彎曲點。 Such as the package body of claim item 9, wherein, The at least one bending point includes two reverse bending points. 如請求項1或2的封裝體，其中， 該框部具有將該第1面和該第2面的該外緣加以連結的外壁面， 該外壁面具有連結至該第1面的煅燒面、及連結至該第2面的斷裂面。 Such as the package body of claim item 1 or 2, wherein, The frame portion has an outer wall surface connecting the first surface and the outer edge of the second surface, The outer wall surface has a calcined surface connected to the first surface, and a fractured surface connected to the second surface. 如請求項1或2的封裝體，更包括： 金屬化層，設於該框部的該第1面上，且與該通孔電極的該端面相接； 該金屬化層在與該通孔電極的該端面的連接部分成為局部變厚。 Such as the package body of request item 1 or 2, further including: a metallization layer disposed on the first surface of the frame portion and in contact with the end surface of the through-hole electrode; The metallization layer becomes locally thicker at a connection portion with the end surface of the via electrode. 如請求項1或2的封裝體，更包括： 金屬化層，設於該框部的該第1面上，且與該通孔電極的該端面相接； 該框部的該第1面具有直接連結至該該通孔電極的該端面的第1區、及經由該第1區而連結至該通孔電極的該端面的第2區，該第2區係垂直於該厚度方向，該第1區相對於該第2區，係以越接近該通孔電極的該端面則該框部的厚度越小的方式傾斜。 Such as the package body of request item 1 or 2, further including: a metallization layer disposed on the first surface of the frame portion and in contact with the end surface of the through-hole electrode; The first surface of the frame portion has a first region directly connected to the end surface of the via electrode, and a second region connected to the end surface of the via electrode via the first region, the second region It is perpendicular to the thickness direction, and the first region is inclined relative to the second region so that the thickness of the frame portion becomes smaller as it gets closer to the end surface of the via electrode.
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