TWI798069B - probe card - Google Patents
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- TWI798069B TWI798069B TW111115764A TW111115764A TWI798069B TW I798069 B TWI798069 B TW I798069B TW 111115764 A TW111115764 A TW 111115764A TW 111115764 A TW111115764 A TW 111115764A TW I798069 B TWI798069 B TW I798069B
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Abstract
一種探針卡,包括一導引板以及一單層或多層的屏蔽結構。該導引板包括一上表面、一下表面以及至少一貫穿該上表面及該下表面之間的導引孔,該導引孔具有一內壁面。該屏蔽結構中至少一層為一電磁吸收材料或一電磁反射材料且未連接至接地,該屏蔽結構的各層是以一原子層沉積法或一原子層蝕刻法形成於該導引孔的該內壁面上且厚度各別小於1000 nm。A probe card includes a guide plate and a single-layer or multi-layer shielding structure. The guide plate includes an upper surface, a lower surface and at least one guide hole penetrating between the upper surface and the lower surface, and the guide hole has an inner wall surface. At least one layer of the shielding structure is an electromagnetic absorbing material or an electromagnetic reflecting material and is not connected to ground, and each layer of the shielding structure is formed on the inner wall of the guide hole by an atomic layer deposition method or an atomic layer etching method and the thickness is less than 1000 nm.
Description
本發明有關於積體電路測試的裝置,特別是關於一種探針卡。 The invention relates to a device for testing integrated circuits, in particular to a probe card.
在積體電路測試方法中,針測是一種常見的方式,而用來執行針測的測試裝置中,探針卡是最關鍵的元件之一。然而,隨著積體電路上接觸點的間距逐漸縮小,探針的間距也隨著縮減,如此會造成在對積體電路進行檢測時,探針之間的訊號會彼此干擾,進而影響量測的結果。 Probe testing is a common way in integrated circuit testing methods, and a probe card is one of the most critical components in a test device used to perform pin testing. However, as the distance between the contact points on the integrated circuit is gradually reduced, the distance between the probes is also reduced. This will cause the signals between the probes to interfere with each other when testing the integrated circuit, thereby affecting the measurement. the result of.
為改善訊號干擾的問題,現有技術可見於台灣發明專利第TW I574013 B號、台灣發明專利第TW I411785 B號、US8692570B2等,前述案件均是將絕緣層與屏蔽層包覆於金屬探針的外表面,以達到屏蔽的效果,然而,因為每個探針皆須覆蓋絕緣層與屏蔽層,不僅耗時費工且生產成本較高,當探針故障或損壞時,亦會使更換探針的成本增加,且在每個探針的外表面覆蓋絕緣層與屏蔽層,除了會影響探針本身的精確度,也會增加探針損壞的機率。 In order to improve the problem of signal interference, existing technologies can be found in Taiwan Invention Patent No. TW I574013 B, Taiwan Invention Patent No. TW I411785 B, US8692570B2, etc. The above-mentioned cases all cover the outer surface of the metal probe with an insulating layer and a shielding layer However, because each probe must be covered with an insulating layer and a shielding layer, it is not only time-consuming and labor-intensive, but also has high production costs. The cost is increased, and the outer surface of each probe is covered with an insulating layer and a shielding layer. In addition to affecting the accuracy of the probe itself, it will also increase the probability of probe damage.
另一方面,現有探針卡的屏蔽層是採取一般的金屬材料,需要進一步將該屏蔽層連接至接地,才能達到屏蔽的效果,然而,接地會需要額外的線路及電路,亦增加了製造和整體結構上的複雜度。 On the other hand, the shielding layer of the existing probe card is made of common metal material, and the shielding layer needs to be further connected to the ground to achieve the shielding effect. However, the grounding will require additional lines and circuits, which also increases the manufacturing and labor costs. overall structural complexity.
因此,如何簡化探針卡的結構以及生產工序且同時達到屏蔽功效,乃本領域所屬技術人員欲解決的問題。 Therefore, how to simplify the structure and production process of the probe card while achieving the shielding effect is a problem that those skilled in the art want to solve.
本發明的目的是為了解決習知具有屏蔽功能的探針卡中,需各別沉積屏蔽結構在各個探針上,且因接地而需要額外的線路及電路,而造成工序繁雜且成本偏高的問題。 The purpose of the present invention is to solve the problem that in the conventional probe card with shielding function, shielding structures need to be separately deposited on each probe, and additional lines and circuits are required due to grounding, resulting in complicated procedures and high costs. question.
為達上述目的,本發明提供一種探針卡,包括一導引板以及一單層或多層的屏蔽結構。該導引板包括一上表面、一下表面以及至少一貫穿該上表面及該下表面之間的導引孔,該導引孔具有一內壁面。該屏蔽結構中至少一層為一電磁吸收材料或一電磁反射材料且未連接至接地,該屏蔽結構的各層是以一原子層沉積法或一原子層蝕刻法形成於該導引孔的該內壁面上且厚度各別小於1000nm。 To achieve the above purpose, the present invention provides a probe card, which includes a guide plate and a single-layer or multi-layer shielding structure. The guide plate includes an upper surface, a lower surface and at least one guide hole penetrating between the upper surface and the lower surface, and the guide hole has an inner wall surface. At least one layer of the shielding structure is an electromagnetic absorbing material or an electromagnetic reflecting material and is not connected to ground, and each layer of the shielding structure is formed on the inner wall of the guide hole by an atomic layer deposition method or an atomic layer etching method and the thickness is less than 1000nm.
10:導引板 10: guide plate
11:上表面 11: Upper surface
12:下表面 12: Lower surface
13:導引孔 13: Guide hole
131:內壁面 131: Inner wall surface
20:屏蔽結構 20: shielding structure
21:第一層 21: The first floor
22:屏蔽層 22: shielding layer
23:第二層 23: Second floor
『圖1』,為本發明一實施例的探針卡的立體示意圖。 [FIG. 1] is a three-dimensional schematic diagram of a probe card according to an embodiment of the present invention.
『圖2』,為本發明一實施例的探針卡的局部放大立體示意圖。 [FIG. 2] is a partially enlarged perspective view of a probe card according to an embodiment of the present invention.
『圖3』,為『圖2』沿A-A的剖面示意圖。 [Figure 3] is a schematic cross-sectional view along A-A of [Figure 2].
『圖4』,為『圖2』的俯視示意圖。 [Figure 4] is a schematic top view of [Figure 2].
本文所使用的術語僅是基於闡述特定實施例的目的而並非限制本發明。除非上下文另外指明,否則本文所用單數形式“一”及“該”也可能包括複數形式。 The terminology used herein is for the purpose of describing particular embodiments only and is not intended to limit the invention. As used herein, the singular forms "a" and "the" may also include plural forms unless the context dictates otherwise.
本文所使用的方向性用語,例如上、下、左、右、前、後及其衍生詞或同義詞,乃涉及附圖中的元件的方位,並非限制本發明,除非上下文另外明確記載。 Directional terms used herein, such as up, down, left, right, front, back, and their derivatives or synonyms, refer to the orientation of elements in the drawings and do not limit the invention unless the context clearly states otherwise.
有關本發明的詳細說明及技術內容,現就配合圖式說明如下:
參閱『圖1』至『圖4』,本發明揭示一種探針卡,特別是關於一種具備屏蔽功能但不用接地,且毋須在各個探針上形成屏蔽層的探針卡,該探針卡包括一導引板10以及至少一屏蔽結構20。該導引板10包括一上表面11、一下表面12以及至少一導引孔13,該導引孔13貫穿該上表面11及該下表面12,提供至少一探針(圖未示)穿過,且該導引孔13包括一內壁面131。其中,該導引孔13可按照應用需求而依照一陣列或一圖案設置在該導引板10上。本實施例中,該導引孔13的一截面為圓形,在其他實施例中,該導引孔13的該截面可為其他形狀,如三角形、方形、五角形或其他多邊形等。
Relevant detailed description and technical content of the present invention, now just explain as follows with respect to matching drawing:
Referring to "Fig. 1" to "Fig. 4", the present invention discloses a probe card, especially a probe card that has a shielding function but does not need to be grounded, and does not need to form a shielding layer on each probe. The probe card includes A
本發明中,該屏蔽結構20可以為一單層或多層,該屏蔽結構20的各層是以一原子層沉積法(Atomic Layer Deposition,ALD)或一原子層蝕刻法(Atomic Layer Etching,ALE)形成於該導引孔13的該內壁面131上,各層的厚度小於1000nm,透過該原子層沉積法或該原子層蝕刻法,可以在微小的該導引孔13內產生極薄且均勻的多層膜,而可以不沉積在探針上。該屏蔽結構20中至少一層為一電磁吸收材料或一電磁反射材料,除了該電磁吸收材料及該電磁反射材料之外,在某些實施例中,該屏蔽結構20可進一步包括至少一層的絕緣材料,由絕緣性較佳(介電常數較低)的材料沉積形成。本發明的該屏蔽結構20未連接至接地,進一步來說,在一實施例中,該屏蔽結構20的各層均未連接至接地。另一方面,本發明是將該屏蔽結構20直接沉
積在該導引孔13內,因此僅需一次性的加工即可完成,不需將每根探針都鍍上屏蔽結構。
In the present invention, the shielding structure 20 can be a single layer or multiple layers, and each layer of the shielding structure 20 is formed by an atomic layer deposition method (Atomic Layer Deposition, ALD) or an atomic layer etching method (Atomic Layer Etching, ALE). On the
該電磁吸收材料可以為導電金屬或合金,舉例來說,該電磁吸收材料可為鋁、鎢、白金、鈦、金、鐵或鈷鎳合金;該電磁反射材料可以為氧化物或氮化物,舉例來說,該電磁反射材料可為氮化矽(Si3N4)、氮化鋁(AlN)、氮化鈦(TiN)、氮化鉭(TaN)、一氧化鈷(CoO)、氧化鎳(NiO)、氧化鐵(Fe2O3)、CoTiO2;該絕緣材料可以是氧化物,例如氧化鋁(Al2O3)或氧化矽(SiO2)。 The electromagnetic absorbing material can be conductive metal or alloy, for example, the electromagnetic absorbing material can be aluminum, tungsten, platinum, titanium, gold, iron or cobalt-nickel alloy; the electromagnetic reflective material can be oxide or nitride, for example For example, the electromagnetic reflective material can be silicon nitride (Si 3 N 4 ), aluminum nitride (AlN), titanium nitride (TiN), tantalum nitride (TaN), cobalt oxide (CoO), nickel oxide ( NiO), iron oxide (Fe 2 O 3 ), CoTiO 2 ; the insulating material may be an oxide, such as aluminum oxide (Al 2 O 3 ) or silicon oxide (SiO 2 ).
在某些實施例中,該屏蔽結構20可以是或包括Al2O3/CoO/Al2O3的多層結構、Al2O3/AlN/Al2O3的多層結構、AlN/Al2O3/Fe2O3/AlN/Al2O3的多層結構、Si3N4/SiO2的多層結構或是Si3N4/SiO2/AlN/SiO2的多層結構;又在某些實施例中,該屏蔽結構20可以是前述多層結構的多個層疊,例如Al2O3/CoO/Al2O3/Al2O3/CoO/Al2O3/Al2O3/CoO/Al2O3、Si3N4/SiO2/Si3N4/SiO2/Si3N4/SiO2等等。可以理解的是,前述的多層結構包括至少一層的該電磁吸收材料或該電磁反射材料,並選擇性地包括至少一層的該絕緣材料。 In some embodiments, the shielding structure 20 may be or include a multilayer structure of Al 2 O 3 /CoO/Al 2 O 3 , a multilayer structure of Al 2 O 3 /AlN/Al 2 O 3 , AlN/Al 2 O 3 /Fe 2 O 3 /AlN/Al 2 O 3 multilayer structure, Si 3 N 4 /SiO 2 multilayer structure or Si 3 N 4 /SiO 2 /AlN/SiO 2 multilayer structure; and in some implementations In an example, the shielding structure 20 may be multiple stacks of the aforementioned multilayer structures, such as Al 2 O 3 /CoO/Al 2 O 3 /Al 2 O 3 /CoO/Al 2 O 3 /Al 2 O 3 /CoO/Al 2 O 3 , Si 3 N 4 /SiO 2 /Si 3 N 4 /SiO 2 /Si 3 N 4 /SiO 2 and so on. It can be understood that the aforementioned multilayer structure includes at least one layer of the electromagnetic absorbing material or the electromagnetic reflecting material, and optionally includes at least one layer of the insulating material.
參閱『圖3』及『圖4』,本實施例中,該屏蔽結構20為一三層結構且設置於該導引孔13的該內壁面131上,該屏蔽結構20包括一第一層21、一屏蔽層22以及一第二層23,該第一層21及該第二層23為該絕緣材料,可以是相異或相同,該屏蔽層22為該電磁吸收材料及該電磁反射材料。該第一層21沉積在該內壁面131上,該屏蔽層22沉積在該第一層21上,該第二層23沉積在該屏蔽層22上。也就是說,該第一層21、該屏蔽層22以及該第二層23依序地從該內壁面131朝該導引孔13的中心方向沉積堆疊。在操作時,
該探針***在該第二層23內,藉由該第一層21、該屏蔽層22以及該第二層23圍繞該探針,可使該探針在傳輸測試訊號時不易受到相鄰的該探針干擾(耦合)而失真,測試訊號的完整性較佳,可準確地量測積體電路的電性。
Referring to "Figure 3" and "Figure 4", in this embodiment, the shielding structure 20 is a three-layer structure and is arranged on the
在一實施例中,該導引孔13的直徑小於1mm,該探針的直徑小於50μm,該第一層21、該屏蔽層22以及該第二層23的厚度分別小於1000nm,在一實施例中,該厚度分別小於500nm,又在某些實施例中,該厚度分別介於100nm至500nm之間。透過控制該導引孔13的直徑以及該屏蔽結構20的厚度,該些探針可不接觸該第二層23地置入該導引孔13內,避免在安裝探針時破壞該屏蔽結構20,影響量測的精準度,且較小直徑的該導引孔13可使該些探針更密集的排列在該導引板10上。該屏蔽結構20藉由上述三層結構可讓電磁波產生內反射以降低電磁波的強度。
In one embodiment, the diameter of the
綜上所述,藉由本發明的該屏蔽結構20的結構以及材料選擇,該屏蔽結構20可不連接至接地,例如一接地電路或一接地電位,簡化整體的結構。且利用原子層沉積(或原子層蝕刻)技術,可以在微小的探針卡的該導引孔之中沉積該屏蔽結構,僅需一次的沉積即可將該屏蔽結構沉積於全部的該導引孔內,不需將每根探針都沉積屏蔽結構,不僅可節省沉積的工序,也可降低更換探針的成本。此外,本發明利用該屏蔽結構的設置,可以減少探針檢測半導體元件時受到訊號干擾的問題,藉此提升檢測數值的有效性,以適用於高密度端點的半導體裝置。 To sum up, with the structure and material selection of the shielding structure 20 of the present invention, the shielding structure 20 may not be connected to ground, such as a ground circuit or a ground potential, which simplifies the overall structure. And using atomic layer deposition (or atomic layer etching) technology, the shielding structure can be deposited in the guide hole of the tiny probe card, and the shielding structure can be deposited on all the guide holes with only one deposition. In the hole, there is no need to deposit a shielding structure for each probe, which not only saves the deposition process, but also reduces the cost of replacing the probes. In addition, the present invention utilizes the setting of the shielding structure to reduce the problem of signal interference when the probe detects the semiconductor element, thereby improving the validity of the detection value and being suitable for semiconductor devices with high-density terminals.
10:導引板 10: guide plate
11:上表面 11: Upper surface
12:下表面 12: Lower surface
13:導引孔 13: Guide hole
131:內壁面 131: Inner wall surface
20:屏蔽結構 20: shielding structure
21:第一層 21: The first floor
22:屏蔽層 22: shielding layer
23:第二層 23: Second floor
Claims (8)
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Citations (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
TWM300811U (en) * | 2006-06-02 | 2006-11-11 | Zen Voce Corp | Probe for anti-interference apparatus between PCB circuit boards |
TW201447308A (en) * | 2013-03-13 | 2014-12-16 | Shinko Electric Ind Co | Probe guide plate and method for manufacturing the same |
TW201734464A (en) * | 2012-08-01 | 2017-10-01 | Japan Electronic Mat Corporation | Guide plate for a probe card and probe card provided with same |
TWM574692U (en) * | 2018-12-03 | 2019-02-21 | 中華精測科技股份有限公司 | Probe holder and test interface device |
TWM599391U (en) * | 2020-04-30 | 2020-08-01 | 中華精測科技股份有限公司 | Probe head assembly with shielding function |
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2022
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Patent Citations (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
TWM300811U (en) * | 2006-06-02 | 2006-11-11 | Zen Voce Corp | Probe for anti-interference apparatus between PCB circuit boards |
TW201734464A (en) * | 2012-08-01 | 2017-10-01 | Japan Electronic Mat Corporation | Guide plate for a probe card and probe card provided with same |
TW201447308A (en) * | 2013-03-13 | 2014-12-16 | Shinko Electric Ind Co | Probe guide plate and method for manufacturing the same |
TWM574692U (en) * | 2018-12-03 | 2019-02-21 | 中華精測科技股份有限公司 | Probe holder and test interface device |
TWM599391U (en) * | 2020-04-30 | 2020-08-01 | 中華精測科技股份有限公司 | Probe head assembly with shielding function |
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