TWI797623B - Chip resistance and preparing method thereof - Google Patents

Chip resistance and preparing method thereof Download PDF

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TWI797623B
TWI797623B TW110117609A TW110117609A TWI797623B TW I797623 B TWI797623 B TW I797623B TW 110117609 A TW110117609 A TW 110117609A TW 110117609 A TW110117609 A TW 110117609A TW I797623 B TWI797623 B TW I797623B
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layer
positive electrode
paste
substrate
nickel
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TW202247200A (en
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李中興
江傳宗
李皇諭
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道登電子材料股份有限公司
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Abstract

A chip resistance and a preparing method thereof are provided. The front electrode, the back electrode, and the resistance layer of the chip resistance respectively include at least on selected from the group consisting Cu, Ni, Mg, Ba, Mo, Zn, Co, Ti, Zr, and V.

Description

晶片電阻及其製備方法Chip resistor and its preparation method

本發明有關於一種晶片電阻及其製備方法,尤指一種以卑金屬為主要組成結構的晶片電阻及其製備方法。 The invention relates to a chip resistor and its preparation method, especially to a chip resistor with base metal as the main structure and its preparation method.

目前製作晶片電阻時所使用的電阻膏、正電極、及背電極主要皆是以銀、鈀、釕等貴重金屬所構成,且因該些貴金屬材質的燒結溫度不同,故在製程中需藉由多階段的燒結以分別形成正電極、背電極、以及電阻層,而多次燒結容易使得銀金屬發生硫化反應而影響到晶片電阻的電性以及可靠度,然為了避免銀金屬的硫化反應,又需添加鈀金屬以抗硫化,如此一來,製作過程繁複耗時外,銀、鈀、釕等貴重金屬價格昂貴,無法降低製備成本。 At present, the resistance paste, positive electrode, and back electrode used in the production of chip resistors are mainly composed of precious metals such as silver, palladium, and ruthenium, and because the sintering temperatures of these precious metal materials are different, it is necessary to pass through during the manufacturing process. Multi-stage sintering is used to form the positive electrode, the back electrode, and the resistance layer, and multiple sinterings are likely to cause the silver metal to undergo sulfidation reaction and affect the electrical properties and reliability of the wafer resistor. However, in order to avoid the silver metal sulfidation reaction, and Palladium metal needs to be added to resist sulfidation. In this way, the production process is complicated and time-consuming, and precious metals such as silver, palladium, and ruthenium are expensive, which cannot reduce the production cost.

為解決上述之問題,本發明提供了一種以卑金屬為主要組成結構的晶片電阻及其製備方法。其中,該晶片電阻包括一基板,具有一第一表面以及相對該第一表面之一第二表面;一正電極,形成於該基 板該第一表面上;一背電極,形成於該基板的該第二表面上;一電阻層,形成於該基板的該第一表面以及部份的該正電極上;一封漿層,形成於該電阻層上;一金屬鍍層,形成於該正電極並延伸通導至該背電極上;其中,該正電極、該背電極、以及該電阻層係各自包含至少一選自由銅、鎳、錳、鋇、鉬、鋅、鈷、鈦、鋯、及釩所組成之群組。 In order to solve the above problems, the present invention provides a chip resistor mainly composed of base metal and a preparation method thereof. Wherein, the chip resistor includes a substrate with a first surface and a second surface opposite to the first surface; a positive electrode is formed on the substrate plate on the first surface; a back electrode formed on the second surface of the substrate; a resistance layer formed on the first surface of the substrate and part of the positive electrode; a paste layer formed on On the resistance layer; a metal plating layer is formed on the positive electrode and extends to the back electrode; wherein, the positive electrode, the back electrode, and the resistance layer each include at least one selected from copper, nickel, A group consisting of manganese, barium, molybdenum, zinc, cobalt, titanium, zirconium, and vanadium.

於一實施態樣中,該基板的材質為選自由氮化鋁、氧化鋁、及氮化矽所組成之群組。 In one embodiment, the material of the substrate is selected from the group consisting of aluminum nitride, aluminum oxide, and silicon nitride.

於一實施態樣中,該正電極的材質為至少一選自由銅、鋇、鎳及鈦所組成之群組。 In one embodiment, the material of the positive electrode is at least one selected from the group consisting of copper, barium, nickel and titanium.

於一實施態樣中,該背電極的材質為至少一選自由銅、鋇、鎳及鈦所組成之群組。 In an embodiment, the material of the back electrode is at least one selected from the group consisting of copper, barium, nickel and titanium.

於一實施態樣中,該電阻層的材質係由包含至少一選自由銅、鎳、錳、鋇、鉬、鋅、鈷、鈦、鋯、及釩所組成之群組的一電阻膏經燒結而成。 In one embodiment, the resistance layer is made of a resistance paste containing at least one selected from the group consisting of copper, nickel, manganese, barium, molybdenum, zinc, cobalt, titanium, zirconium, and vanadium after sintering made.

於一實施態樣中,該金屬鍍層包括一銅層、一鎳層、以及一錫層,該銅層與該正電極顯露的表面接觸,並延伸至與該背電極顯露的表面接觸,該鎳層形成於該銅層上,該錫層形成於該鎳層上。 In one embodiment, the metal plating layer includes a copper layer, a nickel layer, and a tin layer, the copper layer is in contact with the exposed surface of the positive electrode, and extends to contact with the exposed surface of the back electrode, the nickel A layer is formed on the copper layer, and the tin layer is formed on the nickel layer.

本發明更提供一種晶片電阻的製備方法,包括以下步驟:(A)提供一基板,該基板具有一第一表面以及相對該第一表面之一第二表面;(B)於該基板的該第一表面上塗佈一正電極膏;(C)於該基板的該第二表面上塗佈一背電極膏;(D)於該基板的該第一表面以及部分該正電極膏上塗佈一電阻膏;(E)進行燒結程序,使得該正電極膏、該背 電極膏、以及該電阻膏與該基板結合,並分別形成一正電極、一背電極、以及一電阻層;(F)於該電阻層上形成一封漿層;以及(G)於該正電極與該背電極顯露的表面上形成一金屬鍍層;其中,該正電極、該背電極、以及該電阻層係各自包含至少一選自由銅、鎳、錳、鋇、鉬、鋅、鈷、鈦、鋯、及釩所組成之群組。 The present invention further provides a method for preparing a chip resistor, comprising the following steps: (A) providing a substrate having a first surface and a second surface opposite to the first surface; Coating a positive electrode paste on a surface; (C) coating a back electrode paste on the second surface of the substrate; (D) coating a positive electrode paste on the first surface of the substrate and part of the positive electrode paste. Resistance paste; (E) carry out sintering procedure, make this positive electrode paste, this back Electrode paste and the resistance paste are combined with the substrate to form a positive electrode, a back electrode, and a resistance layer respectively; (F) forming a paste layer on the resistance layer; and (G) forming a paste layer on the positive electrode A metal plating layer is formed on the exposed surface of the back electrode; wherein, the positive electrode, the back electrode, and the resistance layer system each include at least one selected from copper, nickel, manganese, barium, molybdenum, zinc, cobalt, titanium, A group consisting of zirconium and vanadium.

於一實施態樣中,於步驟(A)中,該基板的材質係至少一選自由氮化鋁、氧化鋁、氮化矽所組成之群組。 In an embodiment, in step (A), the material of the substrate is at least one selected from the group consisting of aluminum nitride, aluminum oxide, and silicon nitride.

於一實施態樣中,於步驟(B)中,該正電極膏係包括至少一選自由銅、鋇、鎳及鈦所組成之群組,並藉由旋轉塗佈、滾輪塗佈、或網印的方法將該正電極膏塗佈於該基板的該第一表面上。 In one embodiment, in step (B), the positive electrode paste includes at least one selected from the group consisting of copper, barium, nickel, and titanium, and is coated by spin coating, roller coating, or mesh The method of printing applies the positive electrode paste on the first surface of the substrate.

於一實施態樣中,於步驟(C)中,該背電極膏係包括至少一選自由銅、鋇、鎳及鈦所組成之群組,並藉由旋轉塗佈、滾輪塗佈、或網印的方法將該背電極膏塗佈於該基板的該第二表面上。 In one embodiment, in step (C), the back electrode paste includes at least one selected from the group consisting of copper, barium, nickel and titanium, and is coated by spin coating, roller coating, or mesh The printing method applies the back electrode paste on the second surface of the substrate.

於一實施態樣中,於步驟(D)中,該電阻膏包括至少一選自由銅、鎳、錳、鋇、鉬、鋅、鈷、鈦、鋯、及釩所組成之群組,並藉由旋轉塗佈、滾輪塗佈、壓印、網印、或點膠的方法將該電阻膏塗佈於該基板的該第一表面以及部份的該正電極膏上。 In one embodiment, in step (D), the resistor paste includes at least one selected from the group consisting of copper, nickel, manganese, barium, molybdenum, zinc, cobalt, titanium, zirconium, and vanadium, and by Coating the resistor paste on the first surface of the substrate and a portion of the positive electrode paste by spin coating, roll coating, embossing, screen printing, or dispensing.

於一實施態樣中,於步驟(E)中,該燒結程序係於還原氣氛下,於650℃~950℃下進行燒結。 In an embodiment, in the step (E), the sintering procedure is to sinter at 650° C.˜950° C. under a reducing atmosphere.

於一實施態樣中,於步驟(F)中,該封漿層係由一封漿經200℃~260℃固化而形成,並於其表面進行規格印字。 In one embodiment, in the step (F), the sealant layer is formed by curing the sealant at 200° C. to 260° C., and standard printing is performed on its surface.

於一實施態樣中,於步驟(G)中,該金屬鍍層包括一銅層、一鎳層、以及一錫層,其中該銅層係藉由濺鍍程序形成於該正電極上並延伸至該背電極,以通導該正電極及該背電極,該鎳層及該錫層係依序經電鍍程序而形成於該銅層上。 In one embodiment, in step (G), the metal plating layer includes a copper layer, a nickel layer, and a tin layer, wherein the copper layer is formed on the positive electrode by a sputtering process and extends to The back electrode is used to connect the positive electrode and the back electrode, and the nickel layer and the tin layer are sequentially formed on the copper layer through electroplating procedures.

因此,本發明所提供的晶片電阻使用銅、鎳、錳、鋇、鉬、鋅、鈷、鈦、鋯、或釩等卑金屬取代習知使用於晶片電阻的銀、鈀、釕等貴金屬,以作為正電極、背電極、以及電阻層的材料,除了可大幅降低製備成本外,於製備過程中,正電極、背電極、以及電阻層可於同一燒結程序中一併燒結而形成,因此更進一步簡化了製備步驟,並提升產品良率。 Therefore, the chip resistor provided by the present invention uses base metals such as copper, nickel, manganese, barium, molybdenum, zinc, cobalt, titanium, zirconium, or vanadium to replace the conventionally used noble metals such as silver, palladium, ruthenium, etc. As the material of the positive electrode, the back electrode, and the resistance layer, in addition to greatly reducing the production cost, during the preparation process, the positive electrode, the back electrode, and the resistance layer can be sintered together in the same sintering process, so it is a further step The preparation steps are simplified and the product yield is improved.

另外,於本發明中所記載的「上」僅是用來表示相對的位置關係,例如,一第一元件,設置於一第二元件「上」可包含該第一元件與該第二元件直接接觸的情況,或者,亦可包含該第一元件與該第二元件之間有其他額外的元件,使得該第一元件與該第二元件之間並無直接的接觸。 In addition, the "upper" mentioned in the present invention is only used to indicate the relative positional relationship, for example, a first element, "on" a second element may include the direct relationship between the first element and the second element. The case of contact, alternatively, may also include other additional elements between the first element and the second element, so that there is no direct contact between the first element and the second element.

1000:晶片電阻 1000: chip resistance

1:基板 1: Substrate

11:第一表面 11: First surface

12:第二表面 12: Second surface

2:正電極 2: positive electrode

3:背電極 3: Back electrode

4:電阻層 4: Resistance layer

5:封漿層 5: Sealing layer

6:金屬鍍層 6: Metal plating

61:銅層 61: copper layer

62:鎳層 62: nickel layer

63:錫層 63: tin layer

圖1係本發明一實施態樣的晶片電阻的剖面示意圖。 FIG. 1 is a schematic cross-sectional view of a chip resistor according to an embodiment of the present invention.

本發明一實施態樣中的晶片電阻1000係如圖1所示,其包括了一基板1、一正電極2、一背電極3、一電阻層4、一封漿層5、以及一金屬鍍層6。其中,該基板1為氧化鋁陶瓷材料所構成,其具有一第一表面11以及一第二表面12。該正電極2係由銅所構成,形成於該第一表面11上,該背電極3係由銅所構成,並形成於該第二表面12上。該電阻層4係由包含卑金屬粉末、玻璃組成物、以及有機載體的電阻膏經燒結後形成,並覆蓋該基板1顯露的該第一表面11以及部份的該正電極2上,其中卑金屬粉末係至少一選自由銅、鎳、錳、鋇、鉬、鋅、鈷、鈦、鋯、及釩所組成之群組。該封漿層5係由包含環氧樹脂的封漿經固化後而形成於該電阻層4上,以保護該電阻層4,且該封漿層5的表面上可進一步進行規格印字。該金屬鍍層6形成於該正電極2上並延伸通導至該背電極3上,該金屬鍍層6係由一銅層61、一鎳層62、以及一錫層63所層疊而成,其中,該銅層61接觸並通導該正電極2以及該背電極3,該鎳層62電鍍於該銅層61上,而該錫層63電鍍於該鎳層62上,藉以保護該銅層61。 A chip resistor 1000 in an embodiment of the present invention is shown in Figure 1, which includes a substrate 1, a positive electrode 2, a back electrode 3, a resistance layer 4, a paste layer 5, and a metal coating 6. Wherein, the substrate 1 is made of alumina ceramic material, and has a first surface 11 and a second surface 12 . The positive electrode 2 is made of copper and formed on the first surface 11 , and the back electrode 3 is made of copper and formed on the second surface 12 . The resistance layer 4 is formed by sintering the resistance paste containing base metal powder, glass composition, and organic vehicle, and covers the exposed first surface 11 of the substrate 1 and part of the positive electrode 2, wherein base metal The metal powder is at least one selected from the group consisting of copper, nickel, manganese, barium, molybdenum, zinc, cobalt, titanium, zirconium, and vanadium. The paste layer 5 is formed on the resistance layer 4 by curing the paste containing epoxy resin to protect the resistance layer 4 , and the surface of the paste layer 5 can be further printed with specifications. The metal plating layer 6 is formed on the positive electrode 2 and extends to the back electrode 3. The metal plating layer 6 is formed by stacking a copper layer 61, a nickel layer 62, and a tin layer 63, wherein, The copper layer 61 contacts and connects the positive electrode 2 and the back electrode 3 , the nickel layer 62 is electroplated on the copper layer 61 , and the tin layer 63 is electroplated on the nickel layer 62 to protect the copper layer 61 .

於其他實施態樣中,該基板1並不受限於氧化鋁,可為本領域中其他常用的陶瓷材料作為基板1,例如可為氮化鋁、氮化矽;該正電極2以及背電極3的材質亦不受限於銅,可選自銅、鋇、鎳及鈦等其他卑金屬;用於形成該電阻層4的該電阻膏並不受限於上述的組成,可包含其他成分,只要不含貴重金屬即可;用於形成該封漿層5的封漿的組成並不受限於上述的組成,本領域其他作為封漿的材料或組成物皆可使用;該金屬鍍層6不受限於層疊的銅層61、鎳層62、及錫層63,可為銅、鎳、 錳、鋇、鉬、鋅、鈷、鈦、鋯、釩其中任一者或任意組合的合金或層疊所構成的多層結構,只要可提供良好的導電特性以及焊接特性即可使用。 In other implementations, the substrate 1 is not limited to alumina, and can be other commonly used ceramic materials in this field as the substrate 1, such as aluminum nitride and silicon nitride; the positive electrode 2 and the back electrode The material of 3 is not limited to copper, and can be selected from other base metals such as copper, barium, nickel and titanium; the resistance paste used to form the resistance layer 4 is not limited to the above-mentioned composition, and can include other components, As long as it does not contain precious metals; the composition of the sealant used to form the sealant layer 5 is not limited to the above-mentioned composition, and other materials or compositions in the art can be used as sealants; the metal coating 6 does not Limited by stacked copper layer 61, nickel layer 62, and tin layer 63, it can be copper, nickel, Any one of manganese, barium, molybdenum, zinc, cobalt, titanium, zirconium, vanadium or any combination of alloys or laminated multilayer structures can be used as long as they can provide good electrical conductivity and welding properties.

接下來描述本發明一實施態樣中,該晶片電阻1000的製備方法步驟。 Next, the steps of the manufacturing method of the wafer resistor 1000 in an embodiment of the present invention will be described.

步驟(A):提供一基板,該基板具有一第一表面以及相對該第一表面之一第二表面;於步驟(A)中,該基板為氧化鋁所構成,然而於其他實施態樣中,該基板的材質可選自由氮化鋁、氮化矽所組成之群組。 Step (A): providing a substrate having a first surface and a second surface opposite to the first surface; in step (A), the substrate is made of alumina, but in other implementations , the material of the substrate can be selected from the group consisting of aluminum nitride and silicon nitride.

步驟(B):於該基板的該第一表面上塗佈一正電極膏。於步驟(B)中,該正電極膏係包括銅,藉由網印的方法將該正電極膏塗佈於該基板的該第一表面上,並具有一正電極圖案。然而於其他實施態樣中,該正電極膏的成分不受限於此,只要經燒結後所形成的正電極為銅、鎳、錳、鋇、鉬、鋅、鈷、鈦、鋯、釩等卑金屬即可使用;其形成方法除了網印之外,亦可利用旋轉塗佈或滾輪塗佈的方法將該正電極膏塗佈於該第一表面上。 Step (B): coating a positive electrode paste on the first surface of the substrate. In step (B), the positive electrode paste includes copper, and the positive electrode paste is coated on the first surface of the substrate by screen printing, and has a positive electrode pattern. However, in other embodiments, the composition of the positive electrode paste is not limited thereto, as long as the positive electrode formed after sintering is copper, nickel, manganese, barium, molybdenum, zinc, cobalt, titanium, zirconium, vanadium, etc. The base metal can be used; besides screen printing, the positive electrode paste can also be coated on the first surface by spin coating or roller coating.

步驟(C):於該基板的該第二表面上塗佈一背電極膏。於步驟(C)中,該背電極膏係包括銅,藉由網印的方法將該背電極膏塗佈於該基板的該第一表面上,並具有一背電極圖案。然而於其他實施態樣中,該背電極膏的成分不受限於此,只要經燒結後所形成的背電極為銅、鋇、鎳及鈦等卑金屬即可使用;其形成方法除了網印之外,亦可利用旋轉塗佈或滾輪塗佈的方法將該背電極膏塗佈於該第二表面上。 Step (C): coating a back electrode paste on the second surface of the substrate. In step (C), the back electrode paste includes copper, and the back electrode paste is coated on the first surface of the substrate by screen printing, and has a back electrode pattern. However, in other embodiments, the composition of the back electrode paste is not limited thereto, as long as the back electrode formed after sintering is made of base metals such as copper, barium, nickel and titanium; In addition, the back electrode paste can also be coated on the second surface by means of spin coating or roller coating.

步驟(D):於該基板的該第一表面以及部分該正電極膏上塗佈一電阻膏。於步驟(D)中,該電阻膏包括卑金屬粉末、玻璃組成物、以及有機載體,其中卑金屬粉末係至少一選自由銅、鎳、錳、鋇、鉬、鋅、鈷、鈦、鋯、及釩所組成之群組,並利用網印的方法塗佈於該基板顯露的該第一表面及該正電極膏上。於其他實施態樣中,該電阻膏的成分不受限於此,且除了網印之外,亦可利用旋轉塗佈或滾輪塗佈的方法將該背電極膏塗佈於該基板的該第一表面以及部份的該正電極膏上。 Step (D): Coating a resistance paste on the first surface of the substrate and part of the positive electrode paste. In step (D), the resistor paste includes base metal powder, glass composition, and organic vehicle, wherein the base metal powder is at least one selected from copper, nickel, manganese, barium, molybdenum, zinc, cobalt, titanium, zirconium, and vanadium, and coated on the exposed first surface of the substrate and the positive electrode paste by screen printing. In other implementations, the composition of the resistor paste is not limited thereto, and besides screen printing, the back electrode paste can also be applied to the first layer of the substrate by means of spin coating or roller coating. One surface and part of the positive electrode paste.

步驟(E):進行燒結程序,使得該正電極膏、該背電極膏、以及該電阻膏與該基板結合,並分別形成一正電極、一背電極、以及一電阻層。於步驟(E)中,該燒結程序係於包括氮氣、氦氣與氮氫氣的還原氣氛下,於650℃~950℃下進行90~120分鐘。 Step (E): performing a sintering process, so that the positive electrode paste, the back electrode paste, and the resistance paste are combined with the substrate to form a positive electrode, a back electrode, and a resistance layer, respectively. In step (E), the sintering procedure is carried out at 650° C. to 950° C. for 90 to 120 minutes under a reducing atmosphere including nitrogen, helium, and nitrogen and hydrogen.

步驟(F):於該電阻層上形成一封漿層,於步驟(F)中,首先將一封漿材料塗佈於該電阻層上,接著於200℃下固化該封漿材料,以形成該封漿層,藉以保護該電阻層,接著,可進一步於該封漿層表面進行規格印字。該封漿層的材料並無特別的限制,為本領域中常用的封漿材料即可。 Step (F): forming a paste layer on the resistance layer. In step (F), firstly apply a paste material on the resistance layer, and then cure the paste material at 200° C. to form The paste layer is used to protect the resistance layer, and then standard printing can be further performed on the surface of the paste layer. The material of the sealant layer is not particularly limited, and it can be a commonly used sealant material in the field.

步驟(G):於該正電極與該背電極顯露的表面上形成一金屬鍍層,該金屬鍍層包括一銅層、一鎳層、以及一錫層,其中該銅層係藉由濺鍍程序形成於該正電極上並延伸至該背電極,以通導該正電極及該背電極,該鎳層及該錫層係依序經電鍍程序而形成於該銅層上。然而於其他實施態樣中,該金屬鍍層中的該銅層、該鎳層、以及該錫層可藉由其他方式形成,例如可為沉積法、塗佈法、無電電鍍法等其他本領域 中習知形成金屬層的方法而形成,另外,該金屬鍍層不受限於層疊的銅層、鎳層、及錫層,可為銅、鎳、錳、鋇、鉬、鋅、鈷、鈦、鋯、釩其中任一者或任意組合的合金或層疊所構成的多層結構,只要可提供良好的導電特性以及焊接特性即可使用。 Step (G): forming a metal plating layer on the exposed surfaces of the positive electrode and the back electrode, the metal plating layer including a copper layer, a nickel layer, and a tin layer, wherein the copper layer is formed by a sputtering process On the positive electrode and extending to the back electrode to connect the positive electrode and the back electrode, the nickel layer and the tin layer are sequentially formed on the copper layer through an electroplating process. However, in other implementations, the copper layer, the nickel layer, and the tin layer in the metal plating layer can be formed by other methods, such as deposition methods, coating methods, electroless plating methods, etc. In addition, the metal plating layer is not limited to stacked copper layer, nickel layer, and tin layer, and can be copper, nickel, manganese, barium, molybdenum, zinc, cobalt, titanium, Any one of zirconium and vanadium or any combination of alloys or multilayer structures formed by lamination can be used as long as they can provide good electrical conductivity and welding properties.

本發明所提供的電阻晶片中所形成的該正電極、該背電極、以及該電阻層主要是以銅、鋇、鎳及鈦等卑金屬所構成,而發明所提供的電阻晶片的製備方法中,該正電極、該背電極、以及該電阻層係於同一個燒結程序中各自燒結完成。如此可大幅降低電阻晶片的製備成本以外,也可以簡化其製備程序,同時亦可有效的改善習知晶片電阻的硫化問題提升晶片電阻的產品可靠度。 The positive electrode, the back electrode, and the resistance layer formed in the resistance chip provided by the present invention are mainly composed of base metals such as copper, barium, nickel and titanium, and in the preparation method of the resistance chip provided by the invention , the positive electrode, the back electrode, and the resistance layer are sintered in the same sintering procedure. In this way, not only the manufacturing cost of the resistor chip can be greatly reduced, but also the manufacturing procedure can be simplified, and at the same time, the vulcanization problem of the conventional chip resistor can be effectively improved, and the product reliability of the chip resistor can be improved.

1000:晶片電阻 1000: chip resistance

1:基板 1: Substrate

11:第一表面 11: First surface

12:第二表面 12: Second surface

2:正電極 2: positive electrode

3:背電極 3: Back electrode

4:電阻層 4: Resistance layer

5:封漿層 5: Sealing layer

6:金屬鍍層 6: Metal plating

61:銅層 61: copper layer

62:鎳層 62: nickel layer

63:錫層 63: tin layer

Claims (13)

一種晶片電阻,包括:一基板,具有一第一表面以及相對該第一表面之一第二表面;一正電極,形成於該基板該第一表面上;一背電極,形成於該基板的該第二表面上;一電阻層,形成於該基板的該第一表面以及部份的該正電極上;一封漿層,形成於該電阻層上;以及一金屬鍍層,形成於該正電極上並延伸通導至該背電極上,該金屬鍍層包括一銅層、一鎳層、以及一錫層,該銅層與該正電極顯露的表面接觸,並延伸至與該背電極顯露的表面接觸,該鎳層形成於該銅層上,該錫層形成於該鎳層上;其中,該正電極、該背電極、以及該電阻層係各自包含至少一選自由鎳、錳、鋇、鉬、鋅、鈷、鈦、鋯、及釩所組成之群組。 A chip resistor, comprising: a substrate having a first surface and a second surface opposite to the first surface; a positive electrode formed on the first surface of the substrate; a back electrode formed on the substrate On the second surface; a resistance layer formed on the first surface of the substrate and a part of the positive electrode; a paste layer formed on the resistance layer; and a metal plating layer formed on the positive electrode And extending to the back electrode, the metal plating layer includes a copper layer, a nickel layer, and a tin layer, the copper layer is in contact with the exposed surface of the positive electrode, and extends to contact with the exposed surface of the back electrode , the nickel layer is formed on the copper layer, and the tin layer is formed on the nickel layer; wherein, the positive electrode, the back electrode, and the resistance layer each contain at least one selected from nickel, manganese, barium, molybdenum, A group consisting of zinc, cobalt, titanium, zirconium, and vanadium. 如請求項1所述的晶片電阻,其中,該基板的材質為至少一選自由氮化鋁、氧化鋁、氮化矽所組成之群組。 The chip resistor according to claim 1, wherein the material of the substrate is at least one selected from the group consisting of aluminum nitride, aluminum oxide, and silicon nitride. 如請求項1所述的晶片電阻,其中,該正電極的材質為至少一選自由鋇、鎳及鈦所組成之群組。 The chip resistor according to claim 1, wherein the material of the positive electrode is at least one selected from the group consisting of barium, nickel and titanium. 如請求項1所述的晶片電阻,其中,該背電極的材質為至少一選自由鋇、鎳及鈦所組成之群組。 The chip resistor according to claim 1, wherein the material of the back electrode is at least one selected from the group consisting of barium, nickel and titanium. 如請求項1所述的晶片電阻,其中,該電阻層的材質係由包含至少一選自由鎳、錳、鋇、鉬、鋅、鈷、鈦、鋯、及釩所組成之群組的一電阻膏經燒結而成。 The chip resistor as claimed in claim 1, wherein the material of the resistor layer is made of at least one resistor selected from the group consisting of nickel, manganese, barium, molybdenum, zinc, cobalt, titanium, zirconium, and vanadium The paste is made by sintering. 一種晶片電阻的製備方法,包括以下步驟:(A)提供一基板,該基板具有一第一表面以及相對該第一表面之一第二表面;(B)於該基板的該第一表面上塗佈一正電極膏;(C)於該基板的該第二表面上塗佈一背電極膏;(D)於該基板的該第一表面以及部分該正電極膏上塗佈一電阻膏;(E)進行燒結程序,使得該正電極膏、該背電極膏、以及該電阻膏與該基板結合,並分別形成一正電極、一背電極、以及一電阻層;(F)於該電阻層上形成一封漿層;以及(G)於該正電極與該背電極顯露的表面上形成一金屬鍍層;其中,該正電極、該背電極、以及該電阻層係各自包含至少一選自由鎳、錳、鋇、鉬、鋅、鈷、鈦、鋯、及釩所組成之群組。 A method for preparing a chip resistor, comprising the following steps: (A) providing a substrate having a first surface and a second surface opposite to the first surface; (B) coating the first surface of the substrate with Cloth a positive electrode paste; (C) coat a back electrode paste on the second surface of the substrate; (D) coat a resistance paste on the first surface of the substrate and part of the positive electrode paste; ( E) performing a sintering process so that the positive electrode paste, the back electrode paste, and the resistance paste are combined with the substrate to form a positive electrode, a back electrode, and a resistance layer; (F) on the resistance layer forming a paste layer; and (G) forming a metal plating layer on the exposed surfaces of the positive electrode and the back electrode; wherein each of the positive electrode, the back electrode, and the resistance layer comprises at least one selected from nickel, A group consisting of manganese, barium, molybdenum, zinc, cobalt, titanium, zirconium, and vanadium. 如請求項6所述的製備方法,於步驟(A)中,該基板的材質為至少一選自由氮化鋁、氧化鋁、及氮化矽所組成之群組。 According to the preparation method described in Claim 6, in step (A), the material of the substrate is at least one selected from the group consisting of aluminum nitride, aluminum oxide, and silicon nitride. 如請求項6所述的製備方法,於步驟(B)中,該正電極膏係包括至少一選自由鋇、鎳及鈦所組成之群組,並藉由旋轉塗佈、滾輪塗佈、或網印的方法將該正電極膏塗佈於該基板的該第一表面上。 The preparation method as described in claim 6, in step (B), the positive electrode paste includes at least one selected from the group consisting of barium, nickel and titanium, and is coated by spin coating, roller coating, or Coating the positive electrode paste on the first surface of the substrate by screen printing. 如請求項6所述的製備方法,於步驟(C)中,該背電極膏係包括至少一選自由鋇、鎳及鈦所組成之群組,並藉由旋轉塗佈、滾輪塗佈、或網印的方法將該背電極膏塗佈於該基板的該第二表面上。 The preparation method as described in claim 6, in step (C), the back electrode paste includes at least one selected from the group consisting of barium, nickel and titanium, and is coated by spin coating, roller coating, or Coating the back electrode paste on the second surface of the substrate by screen printing. 如請求項6所述的製備方法,於步驟(D)中,該電阻膏包括至少一選自由鎳、錳、鋇、鉬、鋅、鈷、鈦、鋯、及釩所組成之群組,並藉由旋轉塗佈、滾輪塗佈、壓印、網印、或點膠的方法將該電阻膏塗佈於該基板的該第一表面以及部份的該正電極膏上。 The preparation method as described in claim 6, in step (D), the resistance paste includes at least one selected from the group consisting of nickel, manganese, barium, molybdenum, zinc, cobalt, titanium, zirconium, and vanadium, and Coating the resistor paste on the first surface of the substrate and a portion of the positive electrode paste by spin coating, roll coating, embossing, screen printing, or dispensing. 如請求項6所述的製備方法,於步驟(E)中,該燒結程序係於還原氣氛下,於650℃~950℃下進行燒結。 According to the preparation method described in Claim 6, in the step (E), the sintering procedure is performed under a reducing atmosphere at 650° C. to 950° C. 如請求項6所述的製備方法,於步驟(F)中,該封漿層係由一封漿經200℃~260℃固化而形成,並於其表面進行規格印字。 According to the preparation method described in Claim 6, in step (F), the sealant layer is formed by curing the sealant at 200°C to 260°C, and prints specifications on its surface. 如請求項6所述的製備方法,於步驟(G)中,該金屬鍍層包括一銅層、一鎳層、以及一錫層,其中該銅層係藉由濺鍍程序形成於該正電極上並延伸至該背電極,以通導該正電極及該背電極,該鎳層及該錫層係依序經電鍍程序而形成於該銅層上。 The preparation method as described in claim 6, in step (G), the metal plating layer includes a copper layer, a nickel layer, and a tin layer, wherein the copper layer is formed on the positive electrode by a sputtering process And extend to the back electrode to connect the positive electrode and the back electrode. The nickel layer and the tin layer are sequentially formed on the copper layer through electroplating procedures.
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Citations (6)

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TW200629303A (en) * 2005-02-05 2006-08-16 Tmi Electronics Co Ltd Thick film thermistor chip and the manufacturing method thereof
TW201221565A (en) * 2010-08-06 2012-06-01 Hitachi Chemical Co Ltd Liquid composition, and resistor film, resistor element and circuit board using same
CN106960708A (en) * 2016-01-08 2017-07-18 三星电机株式会社 chip resistor element and forming method thereof
CN110199363A (en) * 2017-04-14 2019-09-03 松下知识产权经营株式会社 Chip resister

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TW350071B (en) * 1996-09-11 1999-01-11 Matsushita Electric Ind Co Ltd Chip resistor and a method of producing the same
TW422995B (en) * 1997-12-26 2001-02-21 Du Pont Thick film resistor and the manufacturing method thereof
TW200629303A (en) * 2005-02-05 2006-08-16 Tmi Electronics Co Ltd Thick film thermistor chip and the manufacturing method thereof
TW201221565A (en) * 2010-08-06 2012-06-01 Hitachi Chemical Co Ltd Liquid composition, and resistor film, resistor element and circuit board using same
CN106960708A (en) * 2016-01-08 2017-07-18 三星电机株式会社 chip resistor element and forming method thereof
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