TWI790103B - Multilayer circuit board and manufacturing method thereof - Google Patents
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Description
本發明涉及一種多層電路板及其製造方法,特別是涉及埋入有絕緣金屬基板的一種多層電路板及其製造方法。 The invention relates to a multilayer circuit board and a manufacturing method thereof, in particular to a multilayer circuit board embedded with an insulating metal substrate and a manufacturing method thereof.
現有的多層電路板的內層若為厚銅設計(也就是多層電路板內的銅箔層的厚度至少大於3盎司以上),則經常會有散熱不佳及壓合後良率不佳的問題。故,如何通過結構設計及製造方法的改良,來克服上述的缺陷,已成為該項事業所欲解決的重要課題之一。 If the inner layer of the existing multilayer circuit board is designed with thick copper (that is, the thickness of the copper foil layer in the multilayer circuit board is at least more than 3 ounces), there will often be problems of poor heat dissipation and poor yield after lamination . Therefore, how to overcome the above-mentioned defects through the improvement of structural design and manufacturing method has become one of the important issues that this enterprise intends to solve.
本發明實施例針對現有技術的不足提供一種多層電路板及其製造方法,其能有效地改善現有多層電路板及其製造方法所可能產生的缺陷。 Embodiments of the present invention provide a multilayer circuit board and a manufacturing method thereof, which can effectively improve the possible defects of the existing multilayer circuit board and its manufacturing method.
本發明實施例公開一種多層電路板的製造方法,其依序包括:板材提供步驟:提供多個第一雙面導電基板及多個第二雙面導電基板,並且多個所述第一雙面導電基板及多個所述第二雙面導電基板分別形成有多個盲孔;填充步驟:填充塞孔油墨至多個所述第二雙面導電基板的多個所述盲孔,而後對多個所述第二雙面導電基板進行烘烤及研磨;疊板步驟:將多個所述第一雙面導電基板分別疊放設置於多個所述第二雙面導電基板;其中,多個 所述第一雙面導電基板的多個所述盲孔位置對應於多個所述第二雙面導電基板的多個所述盲孔,並且多個所述第一雙面導電基板及多個所述第二雙面導電基板之間設置有多個黏合層;切割步驟:切割相互疊放的多個所述第一雙面導電基板、多個所述第二雙面導電基板及多個所述黏合層,以對應形成有一容納空間;以及埋件步驟:將一絕緣金屬基板埋入所述容納空間,以對應形成一多層電路板;其中,所述絕緣金屬基板包含一銅箔層、一絕緣導熱層及一金屬板。 The embodiment of the present invention discloses a method for manufacturing a multi-layer circuit board, which sequentially includes: a board material providing step: providing a plurality of first double-sided conductive substrates and a plurality of second double-sided conductive substrates, and a plurality of the first double-sided conductive substrates The conductive substrate and the plurality of second double-sided conductive substrates are respectively formed with a plurality of blind holes; the filling step: filling the plugging ink into the plurality of blind holes of the plurality of second double-sided conductive substrates, and then filling the plurality of blind holes in the plurality of second double-sided conductive substrates. The second double-sided conductive substrate is baked and ground; the stacking step: stacking a plurality of the first double-sided conductive substrates on a plurality of the second double-sided conductive substrates; wherein, a plurality of The positions of the plurality of blind holes of the first double-sided conductive substrate correspond to the plurality of blind holes of the plurality of second double-sided conductive substrates, and the plurality of first double-sided conductive substrates and the plurality of blind holes A plurality of adhesive layers are arranged between the second double-sided conductive substrates; cutting step: cutting a plurality of the first double-sided conductive substrates, a plurality of the second double-sided conductive substrates and a plurality of the the adhesive layer to form an accommodation space correspondingly; and the embedding step: embedding an insulated metal substrate into the accommodation space to form a multilayer circuit board correspondingly; wherein the insulated metal substrate includes a copper foil layer, An insulating heat conducting layer and a metal plate.
本發明實施例公開一種多層電路板,其包括:多個第一雙面導電基板,每個所述第一雙面導電基板包含一第一芯板及分別形成於所述第一芯板相反兩側的一第一金屬銅層及一第二金屬銅層,並且所述第二金屬銅層形成有多個盲孔;多個第二雙面導電基板,每個所述第二雙面導電基板包含一第二芯板及分別形成於所述第二芯板相反兩側的兩個第三金屬銅層,並且每個所述第三金屬銅層形成有多個盲孔;其中,每個所述第二雙面導電基板的每個所述第三金屬銅層的厚度介於4盎司~7盎司之間,並且多個所述第一雙面導電基板分別疊放設置於多個所述第二雙面導電基板;多個黏合層,設置於相鄰的任兩個所述第二雙面導電基板之間,並設置於相鄰的一個所述第一雙面導電基板以及一個所述第二雙面導電基板之間;一容納空間,貫穿地形成於多個所述第一雙面導電基板、多個所述第二雙面導電基板及多個所述黏合層;一絕緣金屬基板,埋入所述容納空間,並且所述絕緣金屬基板包含一銅箔層、一絕緣導熱層及一金屬板。 The embodiment of the present invention discloses a multi-layer circuit board, which includes: a plurality of first double-sided conductive substrates, each of the first double-sided conductive substrates includes a first core board and is formed on opposite sides of the first core board. A first metal copper layer and a second metal copper layer on the side, and the second metal copper layer is formed with a plurality of blind holes; a plurality of second double-sided conductive substrates, each of the second double-sided conductive substrates It includes a second core board and two third metal copper layers respectively formed on opposite sides of the second core board, and each of the third metal copper layers is formed with a plurality of blind holes; wherein each of the The thickness of each of the third metal copper layers of the second double-sided conductive substrate is between 4 ounces and 7 ounces, and a plurality of the first double-sided conductive substrates are respectively stacked on a plurality of the first double-sided conductive substrates. Two double-sided conductive substrates; a plurality of adhesive layers, arranged between any two adjacent second double-sided conductive substrates, and arranged between one of the adjacent first double-sided conductive substrates and one of the first double-sided conductive substrates Between the two double-sided conductive substrates; an accommodating space formed through a plurality of the first double-sided conductive substrates, a plurality of the second double-sided conductive substrates and a plurality of the adhesive layers; an insulated metal substrate, Embedding in the containing space, and the insulating metal substrate includes a copper foil layer, an insulating heat conducting layer and a metal plate.
本發明的其中一有益效果在於,本發明所提供的所述多層電路板及其製造方法,其能通過“所述絕緣金屬基板埋入所述容納空間,以對應形成所述多層電路板;其中,所述絕緣金屬基板包含所述銅箔層、所述絕緣導熱層及所述金屬板”的技術方案,以提升所述多層電路板的散熱及內層絕 緣的效果,減少打樣困難及打樣的次數,優化所述多層電路板的尺寸設計。 One of the beneficial effects of the present invention is that the multilayer circuit board and its manufacturing method provided by the present invention can form the multilayer circuit board correspondingly by “embedding the insulated metal substrate into the accommodation space; , the insulated metal substrate includes the technical solution of the copper foil layer, the insulating and heat-conducting layer, and the metal plate", so as to improve the heat dissipation and inner layer insulation of the multilayer circuit board The effect of the edge, reducing the difficulty of proofing and the number of times of proofing, and optimizing the size design of the multi-layer circuit board.
為使能更進一步瞭解本發明的特徵及技術內容,請參閱以下有關本發明的詳細說明與圖式,然而所提供的圖式僅用於提供參考與說明,並非用來對本發明加以限制。 In order to further understand the features and technical content of the present invention, please refer to the following detailed description and drawings related to the present invention. However, the provided drawings are only for reference and description, and are not intended to limit the present invention.
100:多層電路板 100: multilayer circuit board
1:第一雙面導電基板 1: The first double-sided conductive substrate
11:第一芯板 11: The first core board
12:第一金屬銅層 12: The first metal copper layer
13:第二金屬銅層 13: Second metal copper layer
14:盲孔 14: blind hole
2:第二雙面導電基板 2: The second double-sided conductive substrate
21:第二芯板 21: Second core board
22:第三金屬銅層 22: The third metal copper layer
23:盲孔 23: blind hole
24:塞孔油墨 24: Plugging ink
3:黏合層 3: Adhesive layer
4:容納空間 4: storage space
5:絕緣金屬基板 5: Insulated metal substrate
51:銅箔層 51: copper foil layer
52:絕緣導熱層 52: Insulation and heat conduction layer
53:金屬板 53: metal plate
200:離型膜 200: release film
300:承載板 300: carrying plate
S100:多層電路板的製造方法 S100: Manufacturing method of multilayer circuit board
S101:板材提供步驟 S101: Steps for supplying plates
S103:填充步驟 S103: filling step
S105:疊板步驟 S105: Stacking steps
S107:切割步驟 S107: cutting step
S109:埋件步驟 S109: Embedded parts step
圖1為本發明實施例的板材提供步驟的動作示意圖。 Fig. 1 is a schematic diagram of the action of the plate providing step in the embodiment of the present invention.
圖2為本發明實施例的填充步驟的動作示意圖。 Fig. 2 is a schematic diagram of the action of the filling step in the embodiment of the present invention.
圖3為本發明實施例的疊板步驟的動作示意圖。 FIG. 3 is a schematic diagram of the operation of the stacking step of the embodiment of the present invention.
圖4為本發明實施例的切割步驟的動作示意圖。 FIG. 4 is a schematic diagram of the cutting step of the embodiment of the present invention.
圖5為本發明實施例的埋件步驟的動作示意圖。 Fig. 5 is a schematic diagram of the action of the embedding step according to the embodiment of the present invention.
圖6為本發明實施例的層壓步驟的動作示意圖。 FIG. 6 is a schematic diagram of the action of the lamination step of the embodiment of the present invention.
圖7為本發明實施例的多層電路板的製造方法的步驟流程圖。 FIG. 7 is a flow chart of the steps of the manufacturing method of the multilayer circuit board according to the embodiment of the present invention.
以下是通過特定的具體實施例來說明本發明所公開有關“多層電路板及其製造方法”的實施方式,本領域技術人員可由本說明書所公開的內容瞭解本發明的優點與效果。本發明可通過其他不同的具體實施例加以施行或應用,本說明書中的各項細節也可基於不同觀點與應用,在不背離本發明的構思下進行各種修改與變更。另外,本發明的附圖僅為簡單示意說明,並非依實際尺寸的描繪,事先聲明。此外,以下如有指出請參閱特定圖式或是如特定圖式所示,其僅是用以強調於後續說明中,所述及的相關內容大部份出現於該特定圖式中,但不限制該後續說明中僅可參考所述特定圖式。以下的實施方式將進一步詳細說明本發明的相關技術內容,但所公開的內容並 非用以限制本發明的保護範圍。 The following is a description of the implementation of the "multilayer circuit board and its manufacturing method" disclosed in the present invention through specific specific examples. Those skilled in the art can understand the advantages and effects of the present invention from the content disclosed in this specification. The present invention can be implemented or applied through other different specific embodiments, and various modifications and changes can be made to the details in this specification based on different viewpoints and applications without departing from the concept of the present invention. In addition, the drawings of the present invention are only for simple illustration, and are not drawn according to the actual size, which is stated in advance. In addition, if it is pointed out below that please refer to the specific drawing or as shown in the specific drawing, it is only used to emphasize the follow-up description. Most of the relevant content mentioned appears in the specific drawing, but not In this ensuing description, reference may be made to only the specific drawings described. The following embodiments will further describe the relevant technical content of the present invention in detail, but the disclosed content does not It is not intended to limit the protection scope of the present invention.
應當可以理解的是,雖然本文中可能會使用到“第一”、“第二”、“第三”等術語來描述各種元件或者信號,但這些元件或者信號不應受這些術語的限制。這些術語主要是用以區分一元件與另一元件,或者一信號與另一信號。另外,本文中所使用的術語“或”,應視實際情況可能包括相關聯的列出項目中的任一個或者多個的組合。 It should be understood that although terms such as "first", "second", and "third" may be used herein to describe various elements or signals, these elements or signals should not be limited by these terms. These terms are mainly used to distinguish one element from another element, or one signal from another signal. In addition, the term "or" used herein may include any one or a combination of more of the associated listed items depending on the actual situation.
請參閱圖1至圖7所示,其為本發明的實施例,需先說明的是,本實施例所對應到的附圖及其所提及的相關數量與外形,僅用來具體地說明本發明的實施方式,以便於了解本發明的內容,而非用來侷限本發明的保護範圍。 Please refer to Figures 1 to 7, which are embodiments of the present invention. It should be noted that the drawings corresponding to this embodiment and the relevant numbers and shapes mentioned are only used for specific description. The embodiments of the present invention are used to facilitate the understanding of the content of the present invention, and are not used to limit the protection scope of the present invention.
如圖1至圖7所示,本發明實施例提供一種多層電路板的製造方法S100,其依序包括:一板材提供步驟S101、一填充步驟S103、一疊板步驟S105、一切割步驟S107、一埋件步驟S109以及一層壓步驟(圖7未繪),但本發明不限於此。舉例來說,於本發明未繪示的其他實施例中,所述多層電路板的製造方法S100也可以不包含有所述層壓步驟。 As shown in FIGS. 1 to 7 , an embodiment of the present invention provides a method for manufacturing a multilayer circuit board S100, which sequentially includes: a plate providing step S101, a filling step S103, a stacking step S105, a cutting step S107, An embedding step S109 and a laminating step (not shown in FIG. 7 ), but the present invention is not limited thereto. For example, in other embodiments not shown in the present invention, the manufacturing method S100 of the multilayer circuit board may not include the lamination step.
以下為方便說明與理解,將依序說明所述板材提供步驟S101、所述填充步驟S103、所述疊板步驟S105、所述切割步驟S107、所述埋件步驟S109以及所述層壓步驟。如圖1及圖7所示,於所述板材提供步驟S101中,多個第一雙面導電基板1及多個第二雙面導電基板2被提供,並且多個所述第一雙面導電基板1及多個所述第二雙面導電基板2分別形成有多個盲孔14,23。
For the convenience of description and understanding, the plate providing step S101 , the filling step S103 , the stacking step S105 , the cutting step S107 , the embedding step S109 and the laminating step will be described in sequence. As shown in Figure 1 and Figure 7, in the plate providing step S101, a plurality of first double-sided
進一步地說,如圖1至圖6所示,每個所述第一雙面導電基板1包含一第一芯板11及分別形成於所述第一芯板11相反兩側的一第一金屬銅層12及一第二金屬銅層13,並且所述第二金屬銅層13形成有多個所述盲孔14,但多個所述盲孔14不會形成於所述第一芯板11。其中,每個所述第一雙面導
電基板1的每個所述第一金屬銅層12的厚度較佳介於0.5盎司~2盎司之間,並且每個所述第一雙面導電基板1的每個所述第二金屬銅層13的厚度較佳介於0.3盎司~0.5盎司之間,而每個所述第一雙面導電基板1的所述第一芯板11的厚度較佳介於2密耳~4密耳之間。
Further, as shown in FIGS. 1 to 6, each of the first double-sided
如圖1至圖6所示,每個所述第二雙面導電基板2包含一第二芯板21及分別形成於所述第二芯板21相反兩側的兩個第三金屬銅層22,並且每個所述第三金屬銅層22形成有多個所述盲孔23,而每個所述第一雙面導電基板1的每個所述第三金屬銅層22的厚度較佳介於4盎司~7盎司之間。其中,每個所述第二雙面導電基板2的所述第二芯板21的厚度介於8密耳~12密耳之間。
As shown in Figures 1 to 6, each of the second double-sided
需要說明的是,於本實施例中,多個所述第一雙面導電基板1的數量較佳為2個,並且多個所述第二雙面導電基板2的數量較佳也為2個,但本發明不限於此。所述板材提供步驟S101介紹至此,以下將開始介紹所述填充步驟S103。
It should be noted that, in this embodiment, the number of the plurality of first double-sided
如圖2及圖7所示,於所述填充步驟S103中,塞孔油墨24被填充至多個所述第二雙面導電基板2的多個所述盲孔23,而後多個所述第二雙面導電基板2被烘烤及研磨。其中,所述塞孔油墨24的材質可依實際需求進行調整,本發明未有限定。
As shown in Figure 2 and Figure 7, in the filling step S103, the plugging
所述填充步驟S103介紹至此,以下將開始介紹所述疊板步驟S105。如圖3及圖7所示,於所述疊板步驟S105中,多個所述第一雙面導電基板1分別被疊放設置於多個所述第二雙面導電基板2,並且多個所述第一雙面導電基板1的多個所述盲孔14位置對應於多個所述第二雙面導電基板2的多個所述盲孔23,而多個所述第一雙面導電基板1及多個所述第二雙面導電基板2之間設置有多個黏合層3。需要說明的是,多個所述黏合層3於本實施例中為薄片絕緣材料,並且其於層壓前呈半固化狀。
The filling step S103 has been introduced so far, and the stacking step S105 will be introduced below. As shown in Figure 3 and Figure 7, in the stacking step S105, a plurality of the first double-sided
所述疊板步驟S105介紹至此,以下將開始介紹所述切割步驟S107。如圖4及圖7所示,於所述切割步驟S107中,相互疊放的多個所述第一雙面導電基板1、多個所述第二雙面導電基板2及多個所述黏合層3被切割,以對應形成有一容納空間4。
The stacking step S105 has been introduced so far, and the cutting step S107 will be introduced below. As shown in Figure 4 and Figure 7, in the cutting step S107, a plurality of the first double-sided
所述切割步驟S107介紹至此,以下將開始介紹所述埋件步驟S109。如圖5及圖7所示,於所述埋件步驟S109中,一絕緣金屬基板5(Insulated Metal Substrate,IMS)被埋入所述容納空間4,以對應形成一多層電路板100。其中,所述絕緣金屬基板5包含一銅箔層51、一絕緣導熱層52及一金屬板53,並且所述絕緣導熱層52於本實施例中可以由氧化鋁、氮化鋁、氮化硼、氧化鎂或氧化矽製成,但本發明不限於此。舉例來說,於本發明的其他實施例中,所述絕緣導熱層52也可以由其他熱傳導性能較佳的材料替代製成。
The cutting step S107 has been introduced so far, and the embedded part step S109 will be introduced below. As shown in FIG. 5 and FIG. 7 , in the embedding step S109 , an insulated metal substrate 5 (Insulated Metal Substrate, IMS) is embedded in the
需要說明的是,於本實施例中,所述絕緣金屬基板5的所述銅箔層51的厚度大於每個所述第一雙面導電基板1的厚度,並且所述絕緣金屬基板5的所述金屬板53的厚度至少為所述第二雙面導電基板2的厚度的1倍以上,但本發明不限於此。舉例來說,於本發明未繪示的其他實施例中,所述絕緣金屬基板5的所述銅箔層51的厚度及所述金屬板53的厚度可依實際需求進行調整。
It should be noted that, in this embodiment, the thickness of the
更詳細地說,於所述埋件步驟S109中,所述絕緣金屬基板5被埋入所述容納空間4後,至少一層離型膜200將先被設置於一個所述第一雙面導電基板1相對遠離其所包含的多個所述盲孔14的一側,而一承載板300將被設置於另一個所述第一雙面導電基板1相對遠離其所包含的多個所述盲孔14的一側。
More specifically, in the embedding step S109, after the insulated metal substrate 5 is embedded in the
所述埋件步驟S109介紹至此,以下將開始介紹所述層壓步驟。如圖6及圖7所示,於所述層壓步驟中,多個所述第一雙面導電基板1、多個所
述第二雙面導電基板2、多個所述黏合層3、所述絕緣金屬基板5、至少一層所述離型膜200及所述承載板300被層壓,而後將至少一層所述離型膜200及所述承載板300自兩個所述第一雙面導電基板1分離,以使多個所述第一雙面導電基板1、多個所述第二雙面導電基板2及所述絕緣金屬基板5彼此相互黏合。
The embedding step S109 has been introduced so far, and the lamination step will be introduced below. As shown in Figures 6 and 7, in the lamination step, a plurality of the first double-sided
進一步地說,當所述層壓步驟進行後,多個所述黏合層3中呈半固化的環氧樹脂將被擠壓開來並開始流動而後凝固,將多個所述第一雙面導電基板1、多個所述第二雙面導電基板2及所述絕緣金屬基板5黏合在一起。
Further, after the lamination step is performed, the semi-cured epoxy resin in the plurality of
需要說明的是,於本實施例中,所述多層電路板100實際上為一半成品,但所述多層電路板100仍可以是單獨地應用(如:販賣)或是搭配其他構件使用,並不限定於需與其他元件搭配使用。
It should be noted that, in this embodiment, the
[實施例的有益效果] [Advantageous Effects of Embodiment]
本發明的其中一有益效果在於,本發明所提供的所述多層電路板100及其製造方法S100,其能通過“所述絕緣金屬基板5埋入所述容納空間4,以對應形成所述多層電路板100;其中,所述絕緣金屬基板5包含所述銅箔層51、所述絕緣導熱層52及所述金屬板53”的技術方案,以提升所述多層電路板100的散熱及內層絕緣的效果,減少打樣困難及打樣的次數,優化所述多層電路板100的尺寸設計。
One of the beneficial effects of the present invention is that the
以上所公開的內容僅為本發明的優選可行實施例,並非因此侷限本發明的申請專利範圍,所以凡是運用本發明說明書及圖式內容所做的等效技術變化,均包含於本發明的申請專利範圍內。 The content disclosed above is only a preferred feasible embodiment of the present invention, and does not therefore limit the scope of the patent application of the present invention. Therefore, all equivalent technical changes made by using the description and drawings of the present invention are included in the application of the present invention. within the scope of the patent.
S100:多層電路板的製造方法 S100: Manufacturing method of multilayer circuit board
S101:板材提供步驟 S101: Steps for supplying plates
S103:填充步驟 S103: filling step
S105:疊板步驟 S105: Stacking steps
S107:切割步驟 S107: cutting step
S109:埋件步驟 S109: Embedded parts step
Claims (10)
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Citations (4)
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TW200922429A (en) * | 2007-11-14 | 2009-05-16 | Advanced Semiconductor Eng | Structure and manufacturing method of (with embedded component) multilayer circuit board |
CN104125725A (en) * | 2013-04-26 | 2014-10-29 | 深南电路有限公司 | Ultra-thick copper BGA (Ball Grid Array) circuit board and manufacturing method thereof |
CN210157469U (en) * | 2018-12-29 | 2020-03-17 | 广东生益科技股份有限公司 | Metal-based copper-clad laminate |
TW202142057A (en) * | 2020-04-24 | 2021-11-01 | 欣興電子股份有限公司 | Circuit board structure |
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TW200922429A (en) * | 2007-11-14 | 2009-05-16 | Advanced Semiconductor Eng | Structure and manufacturing method of (with embedded component) multilayer circuit board |
CN104125725A (en) * | 2013-04-26 | 2014-10-29 | 深南电路有限公司 | Ultra-thick copper BGA (Ball Grid Array) circuit board and manufacturing method thereof |
CN210157469U (en) * | 2018-12-29 | 2020-03-17 | 广东生益科技股份有限公司 | Metal-based copper-clad laminate |
TW202142057A (en) * | 2020-04-24 | 2021-11-01 | 欣興電子股份有限公司 | Circuit board structure |
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