TWI748009B - Plasma processing apparatus - Google Patents

Plasma processing apparatus Download PDF

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TWI748009B
TWI748009B TW106141800A TW106141800A TWI748009B TW I748009 B TWI748009 B TW I748009B TW 106141800 A TW106141800 A TW 106141800A TW 106141800 A TW106141800 A TW 106141800A TW I748009 B TWI748009 B TW I748009B
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hole
conductive film
pin
conductive
lift pin
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TW106141800A
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Chinese (zh)
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TW201826389A (en
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佐佐木康晴
石川聡
千葉諒
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日商東京威力科創股份有限公司
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/67005—Apparatus not specifically provided for elsewhere
    • H01L21/67011—Apparatus for manufacture or treatment
    • H01L21/67017—Apparatus for fluid treatment
    • H01L21/67063—Apparatus for fluid treatment for etching
    • H01L21/67069—Apparatus for fluid treatment for etching for drying etching
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/683—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L21/687—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using mechanical means, e.g. chucks, clamps or pinches
    • H01L21/68714—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using mechanical means, e.g. chucks, clamps or pinches the wafers being placed on a susceptor, stage or support
    • H01L21/68742—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using mechanical means, e.g. chucks, clamps or pinches the wafers being placed on a susceptor, stage or support characterised by a lifting arrangement, e.g. lift pins
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01J—ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
    • H01J37/00—Discharge tubes with provision for introducing objects or material to be exposed to the discharge, e.g. for the purpose of examination or processing thereof
    • H01J37/32—Gas-filled discharge tubes
    • H01J37/32431—Constructional details of the reactor
    • H01J37/32715—Workpiece holder
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/683—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L21/6831—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using electrostatic chucks
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/683—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L21/6831—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using electrostatic chucks
    • H01L21/6833—Details of electrostatic chucks
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/683—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L21/687—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using mechanical means, e.g. chucks, clamps or pinches
    • H01L21/68714—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using mechanical means, e.g. chucks, clamps or pinches the wafers being placed on a susceptor, stage or support
    • H01L21/68757—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using mechanical means, e.g. chucks, clamps or pinches the wafers being placed on a susceptor, stage or support characterised by a coating or a hardness or a material
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T279/00—Chucks or sockets
    • Y10T279/23—Chucks or sockets with magnetic or electrostatic means

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • Chemical & Material Sciences (AREA)
  • Analytical Chemistry (AREA)
  • Plasma & Fusion (AREA)
  • Container, Conveyance, Adherence, Positioning, Of Wafer (AREA)
  • Drying Of Semiconductors (AREA)
  • Plasma Technology (AREA)
  • Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)

Abstract

A plasma processing apparatus includes an electrostatic chuck and a lifter pin. The electrostatic chuck has a mounting surface on which a target object is mounted and a back surface opposite to the mounting surface, and a through hole formed through the mounting surface and the back surface. The lifter pin is at least partially formed of an insulating member and has a leading end accommodated in the through hole. The lifter pin vertically moves with respect to the mounting surface to vertically transfer the target object. A conductive material is provided at at least one of a leading end portion of the lifter pin which corresponds to the through hole and a wall surface of the through hole which faces the lifter pin.

Description

電漿處理裝置Plasma processing device

本發明之各種態樣及實施形態係關於一種電漿處理裝置。Various aspects and embodiments of the present invention relate to a plasma processing device.

自先前以來，已知有使用電漿對晶圓等被處理體進行電漿處理之電漿處理裝置。此種電漿處理裝置例如於能夠構成真空空間之處理容器內，具有兼用作電極之保持被處理體的載置台。電漿處理裝置藉由對載置台施加特定之高頻電力，從而對配置於載置台之被處理體進行電漿處理。於載置台，形成有收容有升降銷之貫通孔。電漿處理裝置中，於搬送被處理體之情形時，使升降銷自貫通孔突出，利用升降銷自背面支持被處理體使其脫離載置台。關於升降銷，為了抑制因暴露於電漿而引起之異常放電的產生，而由絕緣性構件形成，下部由導電材料形成。 [先前技術文獻] [專利文獻] [專利文獻1]日本專利特開2000-195935號公報Heretofore, there has been known a plasma processing apparatus that uses plasma to perform plasma processing on objects to be processed such as wafers. Such a plasma processing apparatus has, for example, a processing container that can constitute a vacuum space, and has a mounting table that also serves as an electrode for holding a processed object. The plasma processing device applies a specific high-frequency power to the mounting table to perform plasma processing on the object to be processed arranged on the mounting table. A through hole for accommodating lift pins is formed on the mounting table. In the plasma processing device, when the object to be processed is transported, the lift pin is protruded from the through hole, and the lift pin is used to support the object to be processed from the back surface to separate it from the mounting table. Regarding the lift pins, in order to suppress the generation of abnormal discharge caused by exposure to plasma, they are formed of an insulating member, and the lower part is formed of a conductive material. [Prior Art Document] [Patent Document] [Patent Document 1] Japanese Patent Laid-Open No. 2000-195935

[發明所欲解決之問題] 且說，近年來，電漿處理裝置為了進行電漿處理而使施加至載置台之高頻電力高電壓化。於使施加至載置台之高頻電力高電壓化之情形時，存在於收容有升降銷之貫通孔產生異常放電的情況。電漿處理裝置中，若於貫通孔產生異常放電，則有使被處理體之品質惡化，成為良率惡化之主要原因之虞。 [解決問題之技術手段] 揭示之電漿處理裝置於1個實施形態中，具有靜電吸盤及升降銷。靜電吸盤具有供載置被處理體之載置面及與載置面相對之背面，且形成有貫通載置面與背面之通孔。升降銷係至少一部分由絕緣性構件形成，前端收容於通孔，藉由相對於載置面於上下方向移動而於上下方向搬送被處理體。電漿處理裝置於升降銷之與通孔對應之前端部分、及通孔之與升降銷相對向之壁面之至少一者具有導電性構件。 [發明之效果] 根據揭示之電漿處理裝置之1個態樣，發揮能抑制貫通孔內之異常放電之產生的效果。[Problems to be Solved by the Invention] In addition, in recent years, plasma processing apparatuses have increased the voltage of high-frequency power applied to the mounting table in order to perform plasma processing. When the high-frequency power applied to the mounting table is increased in voltage, abnormal discharge may occur in the through hole accommodating the lift pin. In the plasma processing device, if an abnormal discharge occurs in the through hole, the quality of the object to be processed may deteriorate, which may become a main cause of the deterioration of the yield. [Technical Means to Solve the Problem] In one embodiment, the disclosed plasma processing device has an electrostatic chuck and a lifting pin. The electrostatic chuck has a placement surface on which the object to be processed is placed and a back surface opposite to the placement surface, and a through hole penetrating the placement surface and the back surface is formed. At least a part of the lift pin is formed of an insulating member, the front end is accommodated in the through hole, and the object to be processed is conveyed in the vertical direction by moving in the vertical direction with respect to the mounting surface. The plasma processing device has a conductive member on at least one of the front end portion of the lift pin corresponding to the through hole and the wall surface of the through hole opposite to the lift pin. [Effects of the invention] According to one aspect of the disclosed plasma processing device, it exerts the effect of suppressing the generation of abnormal discharge in the through hole.

以下，參照圖式對本申請案所揭示之電漿處理裝置之實施形態進行詳細說明。再者，對各圖式中相同或相當之部分標註相同符號。又，所揭示之發明並不受本實施形態之限定。各實施形態可於不會使處理內容產生矛盾之範圍內適當組合。對各圖式中相同或相當之部分標註相同符號。又，「上」「下」之用語係基於圖示之狀態者，且係為求方便者。 (第1實施形態) [電漿處理裝置之構成] 圖1係表示本實施形態之電漿處理裝置之構成之概略剖視圖。電漿處理裝置100具有氣密地構成且電性上設為接地電位之處理容器1。該處理容器1呈圓筒狀，例如包含鋁等。處理容器1劃分形成生成電漿之處理空間。於處理容器1內，設有水平地支持作為被處理體(work-piece)之半導體晶圓(以下，簡稱為「晶圓」)W的載置台2。載置台2包含基材(底座)2a及靜電吸盤(ESC：Electrostatic chuck)6而構成。基材2a包含導電性之金屬、例如鋁等，具有作為下部電極之功能。靜電吸盤6具有用以靜電吸附晶圓W之功能。載置台2由支持台4支持。支持台4由例如包含石英等之支持構件3支持。又，於載置台2上方之外周，設有由例如單晶矽形成之聚焦環5。進而，於處理容器1內，以包圍載置台2及支持台4之周圍之方式，設有例如包含石英等之圓筒狀之內壁構件3a。 於基材2a，經由第1整合器11a而連接有第1 RF(radio frequency，射頻)電源10a，又，經由第2整合器11b而連接有第2 RF電源10b。第1 RF電源10a係用以產生電漿者，且以自該第1 RF電源10a向載置台2之基材2a供給特定頻率之高頻電力之方式構成。又，第2 RF電源10b係用於離子提取(用於偏壓)者，且以自該第2 RF電源10b向載置台2之基材2a供給低於第1 RF電源10a之特定頻率之高頻電力之方式構成。如此，載置台2構成為能夠施加電壓。另一方面，於載置台2之上方，以與載置台2平行地相對向之方式，設有具有作為上部電極之功能的簇射頭16。簇射頭16與載置台2作為一對電極(上部電極與下部電極)發揮功能。 靜電吸盤6係於該絕緣體6b之間介置電極6a而構成，於電極6a連接有直流電源12。並且構成為，藉由自直流電源12向電極6a施加直流電壓，而利用庫侖力吸附晶圓W。 於載置台2之內部形成有冷媒流路2d，於冷媒流路2d連接有冷媒入口配管2b、冷媒出口配管2c。並且構成為，藉由使適當之冷媒、例如冷卻水等在冷媒流路2d中循環，而能夠將載置台2控制為特定的溫度。又，以貫通載置台2等之方式，形成有用以向晶圓W之背面供給氦氣等冷熱傳遞用氣體(背面氣體(back side gas))之氣體供給管30，氣體供給管30連接於未圖示之氣體供給源。利用該等構成，將藉由靜電吸盤6而吸附保持於載置台2之上表面的晶圓W控制為特定的溫度。 於載置台2設有複數個、例如3個銷用貫通孔200(圖1中僅表示1個)，於該等銷用貫通孔200之內部分別配設有升降銷61。升降銷61連接於驅動機構62，藉由驅動機構62而上下活動。關於銷用貫通孔200及升降銷61之構造將於下文敍述。 上文所述之簇射頭16設於處理容器1之頂壁部分。簇射頭16具備本體部16a及構成電極板之上部頂板16b，且經由絕緣性構件95而被支持於處理容器1之上部。關於本體部16a，包含導電性材料、例如表面經過陽極氧化處理之鋁，且構成為於其下部能夠將上部頂板16b裝卸自如地支持。 本體部16a於內部設有氣體擴散室16c。又，本體部16a中，以位於氣體擴散室16c之下部之方式，於底部形成有多個氣體流經孔16d。又，上部頂板16b中，以與上文所述之氣體流經孔16d重疊之方式，設有於厚度方向上貫通該上部頂板16b的氣體導入孔16e。藉由此種構成，被供給至氣體擴散室16c之處理氣體經由氣體流經孔16d及氣體導入孔16e而呈簇射狀分散地被供給至處理容器1內。 於本體部16a，形成有用以向氣體擴散室16c導入處理氣體之氣體導入口16g。於氣體導入口16g連接有氣體供給配管15a之一端。於該氣體供給配管15a之另一端，連接有供給處理氣體之處理氣體供給源(氣體供給部)15。於氣體供給配管15a，自上游側依序設有質量流量控制器(MFC)15b及開關閥V2。自處理氣體供給源15經由氣體供給配管15a將用於電漿蝕刻之處理氣體供給至氣體擴散室16c。自氣體擴散室16c經由氣體流經孔16d及氣體導入孔16e向處理容器1內呈簇射狀分散地供給處理氣體。 於上文所述之作為上部電極之簇射頭16，經由低通濾波器(LPF)71電性連接有可變直流電源72。該可變直流電源72構成為可藉由啟閉開關73而實現饋電之啟閉。可變直流電源72之電流、電壓以及啟閉開關73之啟閉係由下述控制部90控制。再者，如下文所述，當自第1 RF電源10a、第2 RF電源10b對載置台2施加高頻而於處理空間產生電漿時，根據需要而藉由控制部90使啟閉開關73開啟，而對作為上部電極之簇射頭16施加特定的直流電壓。 以自處理容器1之側壁延伸至較簇射頭16之高度位置更靠上方之方式設有圓筒狀之接地導體1a。該圓筒狀之接地導體1a於其上部具有頂壁。 於處理容器1之底部，形成有排氣口81。於排氣口81，經由排氣管82而連接有第1排氣裝置83。第1排氣裝置83具有真空泵，且構成為藉由使該真空泵作動而能夠將處理容器1內減壓至特定的真空度。另一方面，於處理容器1內之側壁，設有晶圓W之搬入搬出口84，於該搬入搬出口84，設有將該搬入搬出口84打開或關閉之閘閥85。 於處理容器1之側部內側，沿內壁面設有積存物遮罩86。積存物遮罩86防止蝕刻副產物(積存物)附著於處理容器1。於該積存物遮罩86之與晶圓W大致相同之高度位置，設有以能夠控制對於接地之電位而連接的導電性構件(GND塊)89，藉此防止異常放電。又，於積存物遮罩86之下端部，設有沿內壁構件3a延伸之積存物遮罩87。積存物遮罩86、87被設為裝卸自如。 上述構成之電漿處理裝置100係藉由控制部90統一地控制其動作。於該控制部90設有具備CPU(Central Processing Unit，中央處理單元)且控制電漿處理裝置100之各部的製程控制器91、使用者介面92及記憶部93。 使用者介面92包含供工程管理者進行指令之輸入操作以管理電漿處理裝置100的鍵盤、或將電漿處理裝置100之運行狀況可視化地顯示的顯示器等。 於記憶部93，儲存有用以於製程控制器91之控制下實現電漿處理裝置100所執行之各種處理的控制程式(軟體)或記憶有處理條件資料等之製程配方。並且，根據需要，按照來自使用者介面92之指示等自記憶部93叫出任意製程配方並由製程控制器91執行，藉此，於製程控制器91之控制下，進行電漿處理裝置100中之所期望之處理。又，控制程式或處理條件資料等製程配方可利用儲存於電腦可讀取之電腦記憶媒體(例如，硬碟、CD(Compact Disc，光碟)、軟碟、半導體記憶體等)等之狀態者，或亦能夠自其他裝置經由例如專用線路隨機傳輸而於線上使用。 [載置台之主要部分構成] 繼而，參照圖2及圖3，對載置台2之主要部分構成進行說明。圖2及圖3係表示圖1之電漿處理裝置中之載置台之概略剖視圖。圖2表示使升降銷61上升而支持晶圓W之情形，圖3表示使升降銷61下降而將晶圓W支持於靜電吸盤6上之情形。如上所述，載置台2包含基材2a及靜電吸盤6，且構成為，升降銷61能夠自基材2a之下方向靜電吸盤6之上方插通。 靜電吸盤6呈圓板狀，且具有用以載置晶圓W之載置面21及與該載置面21相對向之背面22。載置面21呈圓形，與晶圓W之背面接觸而支持圓板狀之晶圓W。基材2a接合於靜電吸盤6之背面22。 於載置面21，形成有氣體供給管30之端部(氣孔)。氣體供給管30供給冷卻用之氦氣等。氣體供給管30之端部係由形成於靜電吸盤6之貫通孔30a及形成於基材2a之貫通孔30b形成。貫通孔30a係以自靜電吸盤6之背面22貫通至載置面21之方式設置。即，貫通孔30a之內壁由靜電吸盤6形成。另一方面，貫通孔30b係以自基材2a之背面貫通至與靜電吸盤6之接合面之方式設置。即，貫通孔30b之內壁由基材2a形成。貫通孔30b之孔徑例如大於貫通孔30a之孔徑。並且，以貫通孔30a及貫通孔30b連通之方式配置靜電吸盤6及基材2a。於氣體供給管30，配置有氣體用套管204及氣體用間隔件202。 又，於載置面21，形成有收容升降銷61之銷用貫通孔200。銷用貫通孔200係由形成於靜電吸盤6之貫通孔200a及形成於基材2a之貫通孔200b形成。貫通孔200a形成於靜電吸盤6，貫通孔200b形成於基材2a。形成銷用貫通孔200之貫通孔200a係設為與升降銷61之外徑吻合之孔徑、即略大於升降銷61之外徑(例如大0.1～0.5 mm左右)的孔徑，於內部能夠收容升降銷61。貫通孔200b之孔徑例如大於貫通孔200a之孔徑。並且，於貫通孔200a之內壁及貫通孔200b之內壁、與升降銷61之間，配置有銷用套管203及銷用間隔件201。本實施形態之靜電吸盤6中，藉由銷用套管203及銷用間隔件201形成銷用貫通孔200。 升降銷61之至少一部分由絕緣性構件形成。例如，升降銷61具有由絕緣性之陶瓷或樹脂等形成為銷形狀之銷本體部61a。該銷本體部61a呈圓筒形狀，外徑具有例如數mm左右。銷本體部61a之與晶圓W接觸之銷上端部61b係藉由對銷本體部61a進行倒角而形成，且具有球狀之面。該球狀之面例如曲率非常大，使升降銷61之銷上端部61b整體靠近晶圓W背面。 又，升降銷61於與銷用貫通孔200對應之前端部分，具有由導電性構件形成之導電膜61c。例如，升降銷61自銷本體部61a之銷上端部61b側起於與靜電吸盤6之厚度相應之範圍具有導電膜61c。升降銷61之銷上端部61b由於與晶圓W接觸，故而較佳為不被導電膜61c覆蓋。再者，升降銷61之銷上端部61b亦可被導電膜61c覆蓋。 升降銷61藉由圖1所示之驅動機構62而於銷用貫通孔200內上下活動，且自載置台2之載置面21出沒自如地動作。再者，當升降銷61被收容時，驅動機構62以使升降銷61之銷上端部61b位於晶圓W背面正下方之方式調整升降銷61之停止位置之高度。 如圖2所示，於已使升降銷61上升之狀態下，成為銷本體部61a之一部分及銷上端部61b自載置台2之載置面21突出之狀態，且成為於載置台2之上部支持有晶圓W之狀態。另一方面，如圖3所示，於已使升降銷61下降之狀態下，成為銷本體部61a收容於銷用貫通孔200內之狀態，且晶圓W被載置於載置面21。如此，升降銷61於上下方向搬送晶圓W。 且說，電漿處理裝置100使施加至載置台2之高頻電力高電壓化。於使施加至載置台2之高頻電力高電壓化之情形時，存在於銷用貫通孔200產生異常放電之情形。 圖4係模式性地表示靜電吸盤之銷用貫通孔附近之電位之狀態的圖。如圖4所示，靜電吸盤6具有載置面21及與載置面21相對向之背面22。又，於載置面21載置有晶圓W。又，於靜電吸盤6形成有銷用貫通孔200。電漿處理裝置100中，若對載置台2施加高頻電力，則因靜電吸盤6之靜電電容而於晶圓W與靜電吸盤6之背面22之間產生電位差。圖4中，以虛線表示當對載置台2施加高頻電力時產生之RF電位之等電位線。例如，電漿處理裝置100係若使施加至載置台2之高頻電力高電壓化，而銷用貫通孔200內產生之RF電位之電位差超過產生放電之臨界值，則會產生異常放電。 因此，電漿處理裝置100中，如圖2及圖3所示，於升降銷61之與銷用貫通孔200對應之前端部分形成有由導電性構件形成之導電膜61c。 [導電膜之電氣特性之變化例] 使用圖5及圖6，說明藉由在升降銷61之前端部分形成導電膜61c而引起的載置台2之電氣特性之變化。圖5及圖6係模式性地表示收容於銷用貫通孔之升降銷之前端部分的圖。如圖5及圖6所示，載置台2之靜電吸盤6形成有銷用貫通孔200，且載置有晶圓W。靜電吸盤6由基材2a支持。於基材2a，形成有用於絕緣之絕緣體2e。又，圖5中示出於升降銷61之前端部分不存在導電膜61c之狀態。圖6中示出於升降銷61之前端部分存在導電膜61c之狀態。於對載置台2施加有高頻電力之情形時，絕緣體2e之部分於電性上可視為例如電容器C1、C2。又，升降銷61及銷用貫通孔200之升降銷61周圍之空間可視為電容器C3。於圖5及圖6之右側，示出等效地表示施加有高頻電力時之電性狀態的等效電路EC1、EC2。如圖5所示，於對載置台2施加有高頻電力之情形時，載置台2之銷用貫通孔200附近可視為電容器C1、C2、C3相對於供給高頻電力之電源PV串聯連接而成的等效電路EC1。作為電源PV，例如第1 RF電源10a、第2 RF電源10b符合。將等效電路EC1之電源PV與電容器C3之連接點設為P1。將電容器C3與電容器C2之連接點設為P2。連接點P1與連接點P2之電位差相當於銷用貫通孔200內產生之RF電位差。若使自電源PV供給之高頻電力高電壓化，則連接點P1與連接點P2之電位差變大，會產生異常放電。 另一方面，如圖6所示，於在升降銷61之前端部分存在導電膜61c之情形時，如等效電路EC2所示，導電膜61c可視為並聯連接於電容器C3之電阻R。於如此般電阻R並聯連接於電容器C3之情形時，能減小連接點P1與連接點P2之電位差。即，導電膜61c能緩和銷用貫通孔200內產生之RF電位差。 作為用於導電膜61c之導電性構件，只要為具有導電性之材料即可，可列舉例如矽、碳、碳化矽、氮化矽、二氧化鈦、鋁等導電性材料或金屬。 導電膜61c只要以成為如下電阻值之方式形成即可，即，可將因施加至載置台2之高頻電力而產生於銷用貫通孔200內之RF電位差抑制為未達產生放電之臨界值。另一方面，於導電膜61c之電阻值過低之情形時，導電膜61c中會過度地產生電流。因此，導電膜61c較佳為設為不會過度地流通電流之厚度。導電膜61c係高頻電力之頻率越高，則電流越集中於其表面。該現象被稱為集膚效應(skin depth、Skin effect)，如以下之式(1)般表示。 [數1]

Figure 02_image001
此處，δ係距流通電流之表面的厚度(深度)。ρ係用於導電膜61c之導電性構件之電阻率。μ係用於導電膜61c之導電性構件之磁導率。μs係用於導電膜61c之導電性構件之相對磁導率。F係高頻電力之頻率。 圖7係表示集膚效應之算出結果之一例的圖。圖7之例示出針對第1導電性構件、第2導電性構件、第3導電性構件之3種導電性構件算出頻率f為40 MHz及400 kHz之情形時之δ所得的結果。例如，第1導電性構件之電阻率ρ為4.5 e2 ，相對磁導率μs為1。第1導電性構件於頻率f為40 MHz之情形時，算出厚度δ為1.69[m]。又，第2導電性構件之電阻率ρ為1.0 e6 ，相對磁導率μs為1。第2導電性構件於頻率f為40 MHz之情形時，算出厚度δ為7.96 e1 [m]。 導電膜61c於較用於導電膜61c之導電性構件之集膚效應之厚度δ薄之情形時，限制電流之流動，電阻增加，產生之電流減少。因此，導電膜61c較佳為設為用於導電膜61c之導電性構件之集膚效應之厚度δ的10%以下，更佳為，期望設為1%以下。藉此，能抑制於導電膜61c過度地產生電流。 再者，導電膜61c亦可以無階差之平坦狀態形成於升降銷61之前端部分。圖8係表示於升降銷之前端部分形成有導電膜之一例的圖。升降銷61於銷本體部61a之前端部分，以與導電膜61c之膜厚對應之深度形成凹部61d。並且，升降銷61亦可於銷本體部61a之凹部61d形成導電膜61c。 又，升降銷61係為了減少與晶圓W接觸之部分，而使前端部分形成得較細。本實施例之升降銷61係前端部分呈圓筒形狀，外徑設為例如數mm左右。存在升降銷61之前端部分之外徑較用於導電膜61c之導電性構件之集膚效應之厚度δ小的情形。於此種情形時，升降銷61亦可前端部分由導電性構件形成。例如，於升降銷61之前端部分之外徑為導電性構件之集膚效應之厚度δ之10%以下、較理想為1%以下之情形時，升降銷61亦可前端部分由導電性構件形成。例如，第2導電性構件係於頻率f為40 MHz之情形時，厚度δ為7.96 e1 [m]，為升降銷61之前端部分之外徑之1%以下。於該情形時，亦可利用第2導電性構件形成升降銷61之前端部分。圖9係表示利用導電性構件形成升降銷之前端部分之一例的圖。升降銷61設有導電部61e，該導電部61e係將自升降銷61之銷上端部61b側起與靜電吸盤6之厚度相應之範圍由導電性構件形成而得。 再者，升降銷61亦可設為於與銷用貫通孔200對應之前端部分內含導電性構件之構成。即，升降銷61亦可於與銷用貫通孔200對應之前端部分之內部埋入由導電性構件形成之導電部。圖10係表示於升降銷之前端部分之內部埋入有導電部之一例的圖。圖10所示之升降銷61於與銷用貫通孔200對應之前端部分之內部埋入有由導電性構件形成之導電部61f。導電部61f亦可為複數個。圖11係表示於升降銷之前端部分之內部埋入有導電部之另一例的圖。圖11所示之升降銷61於與銷用貫通孔200對應之前端部分之內部埋入有2個由導電性構件形成之導電部61f。導電部61f亦可埋入3個以上。 [電位變化之模擬] 圖12係使用等效電路模擬銷用貫通孔內之電位之變化的圖。圖12(A)中示出表示電位變化之3個波形W1～W3。波形W1表示圖5及圖6中所示之等效電路EC1、EC2之連接點P1之電位。波形W2表示圖5中所示之等效電路EC1之連接點P2之電位。即，波形W2表示於升降銷61之前端部分不存在導電膜61c之情形時之電位變化。波形W3表示圖6中所示之等效電路EC2之連接點P2之電位。即，波形W3表示於升降銷61之前端部分存在導電膜61c之情形時之電位變化。圖12(B)中示出將圖12(A)之波形W1～W3之波峰部分放大後之波形。圖12(B)所示之電位差d1係波形W1與波形W2之差，且表示於升降銷61之前端部分不存在導電膜61c之情形時產生之電位差。電位差d2係波形W1與波形W3之差，且表示於升降銷61之前端部分存在導電膜61c之情形時產生之電位差。與電位差d1相比，電位差d2有所減少。如此，於在升降銷61之前端部分存在導電膜61c之情形時，電位差減少。藉此，能抑制銷用貫通孔200內之異常放電之產生。 如此，第1實施形態之電漿處理裝置100具有靜電吸盤6及升降銷61。靜電吸盤6具有供載置晶圓W之載置面21及與載置面21相對之背面22，且形成有貫通載置面21與背面22之銷用貫通孔200。升降銷61係至少一部分由絕緣性構件形成，前端收容於銷用貫通孔200，藉由相對於載置面21於上下方向移動而於上下方向搬送晶圓W。電漿處理裝置100於升降銷61之與銷用貫通孔200對應之前端部分具有導電膜61c或導電部61e。藉此，電漿處理裝置100能抑制銷用貫通孔200內之異常放電之產生。 (第2實施形態) 於上文所述之第1實施形態之電漿處理裝置100中，針對在升降銷61之與銷用貫通孔200對應之前端部分具有導電性構件的情形進行了說明。於第2實施形態之電漿處理裝置100中，針對在銷用貫通孔200之與升降銷61相對向之壁面具有導電性構件的情形進行說明。 圖13係表示於銷用貫通孔之與升降銷相對向之壁面具有導電性構件之一例的圖。於靜電吸盤6形成有銷用貫通孔200，且載置有晶圓W。於銷用貫通孔200收容有升降銷61之前端。靜電吸盤6於銷用貫通孔200之與升降銷61相對向之壁面具有由導電性構件形成之導電膜6c。 再者，亦可代替導電膜6c，而於銷用貫通孔200內設置導電性之筒狀構件。圖14係模式性地表示靜電吸盤之銷用貫通孔附近的立體圖。於靜電吸盤6形成有銷用貫通孔200。亦可藉由將與銷用貫通孔200吻合地形成之導電性之筒狀構件6d***至銷用貫通孔200，而於銷用貫通孔200之與升降銷61相對向之壁面設置導電性構件。再者，例如，亦可利用導電性構件形成銷用間隔件201之與靜電吸盤6對應之一部分、或整個銷用間隔件201。 作為導電膜6c、筒狀構件6d中使用之導電性構件，只要為具有導電性之材料即可，可列舉例如矽、碳、碳化矽、氮化矽、二氧化鈦、鋁等導電性材料或金屬。 該導電膜6c、筒狀構件6d係與第1實施形態之導電膜61c同樣地發揮電性作用，能緩和銷用貫通孔200內產生之RF電位差。 如此，第2實施形態之電漿處理裝置100於銷用貫通孔200之與升降銷61相對向之壁面具有導電膜6c或筒狀構件6d。藉此，電漿處理裝置100能抑制銷用貫通孔200內之異常放電之產生。 (第3實施形態) 繼而，對第3實施形態進行說明。第3實施形態之電漿處理裝置之構成係與圖1所示之電漿處理裝置10大致相同之構成，故而對於相同之部分標註相同符號並省略說明，主要針對不同部分進行說明。 圖15A係表示載置台之概略剖視圖。於載置台2，設有上述氣體供給管30，於前端部形成有氣體供給用貫通孔210。氣體供給用貫通孔210係由貫通孔210a及貫通孔210b形成。貫通孔210a形成於靜電吸盤6，貫通孔210b形成於基材2a。貫通孔210a及貫通孔210b例如以於常溫下位置一致之方式形成。於氣體供給用貫通孔210內，與氣體供給用貫通孔210之內壁隔以間隔而配置有埋入構件220。 且說，氣體供給用貫通孔210內之異常放電可藉由縮小埋入構件220與氣體供給用貫通孔210之間隔而抑制。因此，例如考慮將埋入構件220之前端部分形成得較粗，而縮小埋入構件220與氣體供給用貫通孔210之間隔。又，氣體供給用貫通孔210內之異常放電亦能藉由縮短導熱氣體路徑之直線部分而抑制。其原因在於，藉由縮短導熱氣體路徑之直線部分，會降低導熱氣體中之電子之能量。因此，氣體供給用貫通孔210係貫通孔210b之直徑形成為大於貫通孔210a之直徑，又，埋入構件220係與貫通孔210b對應之部分形成為較埋入構件220之前端部分粗。 然而，於縮小埋入構件220與氣體供給用貫通孔210之間隔之情形時，存在埋入構件220破損之情形。圖15B係說明埋入構件之破損之圖。載置台2於已進行過電漿處理之情形時，溫度例如自100℃達到200℃之高溫。靜電吸盤6及基材2a係若溫度達到高溫，則分別發生熱膨脹。並且，因靜電吸盤6與基材2a之熱膨脹之差而導致於貫通孔210a與貫通孔210b產生位置偏差。因此，例如，若將埋入構件220之前端部分形成得較粗，從而縮小埋入構件220與氣體供給用貫通孔210之間隔，則存在因貫通孔210a與貫通孔210b之位置偏差而造成埋入構件220破損之情形。 因此，將埋入構件220之一部分由彈性構件形成。例如，將埋入構件220之和貫通孔210a與貫通孔210b連通之部分對應的部分至少由彈性構件形成。 圖16A係說明第3實施形態之埋入構件之圖。例如，埋入構件220於被收容於氣體供給用貫通孔210之狀態下，自上端部220b側起，於與貫通孔210a之上半部分對應之前端部分形成由導電性構件形成之導電部220e，較導電部220e靠下部由彈性構件形成。彈性構件只要具有相對於因溫度變化引起之貫通孔210a與貫通孔210b之位置偏差不會破損之程度的彈性即可。又，彈性構件較佳為進而對電漿具有耐性。作為彈性構件，可列舉例如氟系樹脂。作為氟系樹脂，可列舉例如聚四氟乙烯。聚四氟乙烯作為絕緣性構件發揮功能。又，彈性構件並不限於氟系樹脂，可列舉楊氏模數為20 GPa以下之構件。尤其以楊氏模數為10 GPa以下之構件更佳。 圖16B係說明第3實施形態之埋入構件之圖。即便於實施電漿處理後靜電吸盤6及基材2a達到高溫，因靜電吸盤6及基材2a之熱膨脹之差而導致於貫通孔210a與貫通孔210b產生位置偏差之情形時，因埋入構件220之和貫通孔210a與貫通孔210b連通之部分對應的部分會發生變形，從而亦能抑制埋入構件220之破損之產生。又，於靜電吸盤6及基材2a恢復為常溫之情形時，如圖16A所示，貫通孔210a與貫通孔210b之位置無偏差，埋入構件220恢復為原來的形狀。藉此，即便於縮小埋入構件220與氣體供給用貫通孔210之間隔之情形時，亦能抑制埋入構件220之破損。 如此，第3實施形態之電漿處理裝置100具有靜電吸盤6及基材2a。靜電吸盤6具有供載置晶圓W之載置面21及與載置面21相對之背面22，且形成有貫通載置面21與背面22之貫通孔210a。基材2a具有支持靜電吸盤6之支持面，且形成有與貫通孔210a連通之貫通孔210b，於貫通孔210a及貫通孔210b內具有埋入構件220。埋入構件220係和靜電吸盤6之貫通孔210a與基材2a之貫通孔210b連通之部分對應的部分至少由彈性構件形成。藉此，電漿處理裝置100即便於為了抑制氣體供給用貫通孔210內之異常放電之產生而將埋入構件220與氣體供給用貫通孔210之間隔形成得較小之情形時，亦能抑制埋入構件220之破損之產生。 以上，對一實施形態進行了敍述，但本發明並不限定於該特定的實施形態，可於申請專利範圍內所記載之本發明之主旨之範圍內進行各種變化或變更。 例如，亦可將第1實施形態至第3實施形態加以組合而實施。例如，電漿處理裝置100亦可於升降銷61之與銷用貫通孔200對應之前端部分形成有導電膜61c，且於銷用貫通孔200之與升降銷61相對向之壁面形成有導電膜6c。又，電漿處理裝置100中，升降銷61亦可如埋入構件220般形成。埋入構件220亦可如升降銷61般形成有導電性構件。 又，第1實施形態之導電膜61c或導電部61e亦可並非設置於升降銷61之與銷用貫通孔200對應之前端部分的整個周面。例如，導電膜61c或導電部61e亦可相對於前端部分之圓周方向設置於一部分周面。又，例如，導電膜61c或導電部61e亦可於升降銷61之前端部分之周面以與靜電吸盤6之厚度對應之長度，在圓周方向上分離地設置有複數個。第2實施形態之導電膜6c亦可並非設置於銷用貫通孔200之與升降銷61相對向之整個壁面。例如，導電膜6c只要相對於銷用貫通孔200之圓周方向設置於一部分壁面即可。又，例如，導電膜61c亦可於銷用貫通孔200之壁面以銷用貫通孔200之長度，於圓周方向上分離地設置有複數個。 又，第1實施形態及第2實施形態中，電漿處理裝置100亦可使用由放射狀線槽孔天線(Radial line slotantenna)產生之電漿。Hereinafter, the embodiment of the plasma processing device disclosed in this application will be described in detail with reference to the drawings. Furthermore, the same or equivalent parts in the drawings are denoted with the same symbols. In addition, the disclosed invention is not limited by this embodiment. The respective embodiments can be appropriately combined within a range that does not cause any contradiction in the processing content. The same or equivalent parts in the drawings are marked with the same symbols. In addition, the terms "up" and "down" are based on the state of the icon and are for convenience. (First Embodiment) [Configuration of Plasma Treatment Apparatus] Fig. 1 is a schematic cross-sectional view showing the configuration of the plasma treatment apparatus of this embodiment. The plasma processing apparatus 100 has a processing container 1 which is airtightly configured and electrically set to a ground potential. The processing container 1 has a cylindrical shape and contains, for example, aluminum. The processing container 1 divides and forms a processing space for generating plasma. In the processing container 1, there is provided a mounting table 2 that horizontally supports a semiconductor wafer (hereinafter, simply referred to as "wafer") W as a work-piece. The mounting table 2 includes a base material (base) 2a and an electrostatic chuck (ESC: Electrostatic chuck) 6 and is configured. The base material 2a contains conductive metal, for example, aluminum, etc., and has a function as a lower electrode. The electrostatic chuck 6 has the function of electrostatically attracting the wafer W. The mounting table 2 is supported by the supporting table 4. The support stand 4 is supported by, for example, a support member 3 containing quartz or the like. In addition, on the outer periphery of the upper part of the mounting table 2, a focusing ring 5 formed of, for example, single crystal silicon is provided. Furthermore, in the processing container 1, a cylindrical inner wall member 3a containing, for example, quartz, is provided so as to surround the peripheries of the mounting table 2 and the supporting table 4. A first RF (radio frequency) power supply 10a is connected to the substrate 2a via a first integrator 11a, and a second RF power supply 10b is connected via a second integrator 11b. The first RF power source 10a is used to generate plasma, and is configured to supply high-frequency power of a specific frequency to the substrate 2a of the mounting table 2 from the first RF power source 10a. In addition, the second RF power supply 10b is used for ion extraction (for bias), and the second RF power supply 10b supplies the substrate 2a of the mounting table 2 with a frequency lower than the specific frequency of the first RF power supply 10a. The structure of frequency power. In this way, the mounting table 2 is configured to be able to apply a voltage. On the other hand, above the mounting table 2, a shower head 16 having a function as an upper electrode is provided so as to face the mounting table 2 in parallel. The shower head 16 and the mounting table 2 function as a pair of electrodes (upper electrode and lower electrode). The electrostatic chuck 6 is configured by interposing an electrode 6a between the insulators 6b, and a DC power source 12 is connected to the electrode 6a. In addition, it is configured such that by applying a DC voltage from the DC power supply 12 to the electrode 6 a, the wafer W is attracted by the Coulomb force. A refrigerant flow path 2d is formed inside the mounting table 2, and a refrigerant inlet pipe 2b and a refrigerant outlet pipe 2c are connected to the refrigerant flow path 2d. And it is comprised so that the mounting table 2 can be controlled to a specific temperature by circulating an appropriate refrigerant, for example, cooling water, etc. in the refrigerant flow path 2d. In addition, a gas supply pipe 30 for supplying cold and heat transfer gas (back side gas) such as helium gas to the back of the wafer W is formed so as to penetrate the mounting table 2 and the like. The gas supply pipe 30 is connected to the back side of the wafer W. The gas supply source shown in the figure. With these structures, the wafer W sucked and held on the upper surface of the mounting table 2 by the electrostatic chuck 6 is controlled to a specific temperature. Plural, for example, three pin through holes 200 (only one is shown in FIG. 1) are provided on the mounting table 2, and lift pins 61 are respectively arranged in the pin through holes 200. The lifting pin 61 is connected to the driving mechanism 62 and moves up and down by the driving mechanism 62. The structure of the pin through hole 200 and the lift pin 61 will be described below. The shower head 16 described above is arranged on the top wall of the processing container 1. The shower head 16 includes a main body portion 16 a and a top plate 16 b constituting the upper portion of the electrode plate, and is supported on the upper portion of the processing container 1 via an insulating member 95. The main body portion 16a includes a conductive material, for example, aluminum whose surface has been anodized, and is configured to detachably support the upper top plate 16b at the lower portion thereof. The main body 16a is provided with a gas diffusion chamber 16c inside. In addition, in the main body portion 16a, a plurality of gas flow holes 16d are formed at the bottom portion of the gas diffusion chamber 16c so as to be located below the gas diffusion chamber 16c. In addition, the upper top plate 16b is provided with a gas introduction hole 16e penetrating the upper top plate 16b in the thickness direction so as to overlap with the above-mentioned gas flow hole 16d. With this configuration, the processing gas supplied to the gas diffusion chamber 16c is supplied into the processing container 1 in a shower-like manner via the gas flow hole 16d and the gas introduction hole 16e. The main body portion 16a is formed with a gas introduction port 16g for introducing processing gas into the gas diffusion chamber 16c. One end of the gas supply pipe 15a is connected to the gas inlet 16g. A processing gas supply source (gas supply part) 15 for supplying processing gas is connected to the other end of the gas supply pipe 15a. The gas supply pipe 15a is provided with a mass flow controller (MFC) 15b and an on-off valve V2 in this order from the upstream side. The processing gas used for plasma etching is supplied to the gas diffusion chamber 16c from the processing gas supply source 15 via the gas supply pipe 15a. The processing gas is supplied from the gas diffusion chamber 16c in a shower-like manner into the processing container 1 via the gas flow hole 16d and the gas introduction hole 16e in a dispersed manner. The shower head 16 as the upper electrode described above is electrically connected to a variable DC power supply 72 via a low-pass filter (LPF) 71. The variable DC power supply 72 is configured to be able to open and close the power feeding by the opening and closing switch 73. The current and voltage of the variable DC power supply 72 and the opening and closing of the opening and closing switch 73 are controlled by the control unit 90 described below. Furthermore, as described below, when a high frequency is applied to the mounting table 2 from the first RF power supply 10a and the second RF power supply 10b to generate plasma in the processing space, the control unit 90 turns on and off the switch 73 as necessary. It is turned on, and a specific DC voltage is applied to the shower head 16 as the upper electrode. A cylindrical ground conductor 1a is provided so as to extend from the side wall of the processing container 1 to a position higher than the height of the shower head 16. The cylindrical ground conductor 1a has a top wall on its upper part. At the bottom of the processing container 1, an exhaust port 81 is formed. A first exhaust device 83 is connected to the exhaust port 81 via an exhaust pipe 82. The first exhaust device 83 has a vacuum pump, and is configured to be able to depressurize the inside of the processing container 1 to a certain degree of vacuum by operating the vacuum pump. On the other hand, the side wall in the processing container 1 is provided with a loading/unloading port 84 for the wafer W, and the loading/unloading port 84 is provided with a gate valve 85 that opens or closes the loading/unloading port 84. Inside the side portion of the processing container 1, a deposit mask 86 is provided along the inner wall surface. The deposit mask 86 prevents etching by-products (deposits) from adhering to the processing container 1. A conductive member (GND block) 89 that can be connected to control the potential to the ground is provided at the height of the reservoir mask 86 at approximately the same height as the wafer W, thereby preventing abnormal discharge. In addition, at the lower end of the accumulated object shield 86, an accumulated object shield 87 extending along the inner wall member 3a is provided. The deposit masks 86 and 87 are set to be detachable. The plasma processing apparatus 100 having the above-mentioned configuration is controlled by the control unit 90 to uniformly control its operations. The control unit 90 is provided with a process controller 91 equipped with a CPU (Central Processing Unit) and controls various parts of the plasma processing apparatus 100, a user interface 92 and a memory unit 93. The user interface 92 includes a keyboard for the engineering manager to perform command input operations to manage the plasma processing device 100, or a display that visually displays the operating status of the plasma processing device 100, and the like. In the memory portion 93, a control program (software) used to implement various processes executed by the plasma processing apparatus 100 under the control of the process controller 91 or a process recipe storing process condition data, etc. are stored. In addition, as needed, according to instructions from the user interface 92, any process recipe is called from the memory unit 93 and executed by the process controller 91, whereby the plasma processing device 100 is executed under the control of the process controller 91 The desired treatment. In addition, process recipes such as control programs or processing condition data can be stored in a computer readable computer memory medium (for example, hard disk, CD (Compact Disc, optical disk), floppy disk, semiconductor memory, etc.), etc., Or it can be randomly transmitted from other devices via a dedicated line, for example, and used online. [Main part configuration of the mounting table] Next, the main part configuration of the mounting table 2 will be described with reference to FIGS. 2 and 3. 2 and 3 are schematic cross-sectional views showing the mounting table in the plasma processing apparatus of FIG. 1. FIG. 2 shows a situation in which the lift pins 61 are raised to support the wafer W, and FIG. 3 shows a situation in which the lift pins 61 are lowered to support the wafer W on the electrostatic chuck 6. As described above, the mounting table 2 includes the base material 2a and the electrostatic chuck 6, and is configured such that the lift pins 61 can be inserted from below the base material 2a to above the electrostatic chuck 6. The electrostatic chuck 6 is in the shape of a disc, and has a mounting surface 21 for mounting the wafer W and a back surface 22 opposite to the mounting surface 21. The mounting surface 21 has a circular shape and is in contact with the back surface of the wafer W to support the wafer W in the shape of a disc. The base material 2a is joined to the back surface 22 of the electrostatic chuck 6. On the mounting surface 21, an end (air hole) of the gas supply pipe 30 is formed. The gas supply pipe 30 supplies helium gas for cooling and the like. The end of the gas supply pipe 30 is formed by a through hole 30a formed in the electrostatic chuck 6 and a through hole 30b formed in the base material 2a. The through hole 30a is provided so as to penetrate from the back surface 22 of the electrostatic chuck 6 to the placing surface 21. That is, the inner wall of the through hole 30a is formed by the electrostatic chuck 6. On the other hand, the through hole 30b is provided so as to penetrate from the back surface of the base material 2a to the bonding surface with the electrostatic chuck 6. That is, the inner wall of the through hole 30b is formed by the base material 2a. The hole diameter of the through hole 30b is, for example, larger than the hole diameter of the through hole 30a. In addition, the electrostatic chuck 6 and the base material 2a are arranged such that the through hole 30a and the through hole 30b communicate with each other. The gas supply pipe 30 is provided with a gas sleeve 204 and a gas spacer 202. In addition, a pin through hole 200 for accommodating the lift pin 61 is formed on the mounting surface 21. The pin through hole 200 is formed by the through hole 200 a formed in the electrostatic chuck 6 and the through hole 200 b formed in the base material 2 a. The through hole 200a is formed in the electrostatic chuck 6, and the through hole 200b is formed in the base material 2a. The through hole 200a forming the through hole 200 for the pin is set to a hole diameter that matches the outer diameter of the lift pin 61, that is, a hole slightly larger than the outer diameter of the lift pin 61 (for example, about 0.1 to 0.5 mm larger), and can accommodate the lift inside. PIN 61. The hole diameter of the through hole 200b is, for example, larger than the hole diameter of the through hole 200a. In addition, between the inner wall of the through hole 200a and the inner wall of the through hole 200b, and the lift pin 61, a pin sleeve 203 and a pin spacer 201 are arranged. In the electrostatic chuck 6 of this embodiment, the pin bushing 203 and the pin spacer 201 form the pin through-hole 200. As shown in FIG. At least a part of the lift pin 61 is formed of an insulating member. For example, the lift pin 61 has a pin body portion 61a formed into a pin shape by insulating ceramics, resin, or the like. The pin main body portion 61a has a cylindrical shape, and the outer diameter has, for example, about several mm. The pin upper end portion 61b of the pin body portion 61a that is in contact with the wafer W is formed by chamfering the pin body portion 61a, and has a spherical surface. The spherical surface has a very large curvature, for example, so that the pin upper end 61b of the lift pin 61 is close to the back surface of the wafer W as a whole. In addition, the lift pin 61 has a conductive film 61c formed of a conductive member at the front end portion corresponding to the pin through hole 200. For example, the lift pin 61 has a conductive film 61c in a range corresponding to the thickness of the electrostatic chuck 6 from the pin upper end 61b side of the pin main body 61a. Since the pin upper end 61b of the lift pin 61 is in contact with the wafer W, it is preferably not covered by the conductive film 61c. Furthermore, the pin upper end 61b of the lift pin 61 may also be covered by the conductive film 61c. The lift pin 61 moves up and down in the pin through hole 200 by the drive mechanism 62 shown in FIG. 1, and moves freely from the placement surface 21 of the placement table 2. Furthermore, when the lift pin 61 is accommodated, the drive mechanism 62 adjusts the height of the stop position of the lift pin 61 in such a way that the pin upper end 61b of the lift pin 61 is located directly below the back surface of the wafer W. As shown in FIG. 2, in the state where the lift pin 61 has been raised, a part of the pin body 61a and the pin upper end 61b protrude from the mounting surface 21 of the mounting table 2, and become the upper part of the mounting table 2. Support wafer W status. On the other hand, as shown in FIG. 3, in a state where the lift pin 61 has been lowered, the pin body portion 61 a is housed in the pin through hole 200, and the wafer W is placed on the mounting surface 21. In this way, the lift pins 61 transport the wafer W in the vertical direction. In addition, the plasma processing apparatus 100 increases the voltage of the high-frequency power applied to the mounting table 2. When the high-frequency power applied to the mounting table 2 is increased in voltage, abnormal discharge may occur in the pin through hole 200. Fig. 4 is a diagram schematically showing the state of the potential in the vicinity of the through hole for the pin of the electrostatic chuck. As shown in FIG. 4, the electrostatic chuck 6 has a mounting surface 21 and a back surface 22 facing the mounting surface 21. In addition, the wafer W is placed on the placement surface 21. In addition, a pin through hole 200 is formed in the electrostatic chuck 6. In the plasma processing apparatus 100, when high-frequency power is applied to the mounting table 2, a potential difference is generated between the wafer W and the back surface 22 of the electrostatic chuck 6 due to the electrostatic capacitance of the electrostatic chuck 6. In FIG. 4, the equipotential lines of the RF potential generated when high-frequency power is applied to the mounting table 2 are indicated by dotted lines. For example, if the plasma processing apparatus 100 increases the voltage of the high-frequency power applied to the mounting table 2 and the potential difference of the RF potential generated in the pin through hole 200 exceeds the critical value for the discharge, abnormal discharge will occur. Therefore, in the plasma processing apparatus 100, as shown in FIGS. 2 and 3, a conductive film 61c formed of a conductive member is formed at the front end portion of the lift pin 61 corresponding to the pin through hole 200. [Examples of changes in electrical characteristics of conductive film] Using FIGS. 5 and 6, the changes in electrical characteristics of the mounting table 2 caused by the formation of the conductive film 61 c at the front end portion of the lift pin 61 will be described. 5 and 6 are diagrams schematically showing the front end portion of the lift pin accommodated in the pin through hole. As shown in FIGS. 5 and 6, the electrostatic chuck 6 of the mounting table 2 has a pin through hole 200 formed thereon, and the wafer W is mounted. The electrostatic chuck 6 is supported by the base material 2a. On the base material 2a, an insulator 2e for insulation is formed. In addition, FIG. 5 shows a state where the conductive film 61c does not exist at the front end portion of the lift pin 61. FIG. 6 shows a state where the conductive film 61c is present at the front end portion of the lift pin 61. As shown in FIG. When high-frequency power is applied to the mounting table 2, the part of the insulator 2e can be regarded as, for example, capacitors C1 and C2 electrically. In addition, the space around the lift pin 61 and the lift pin 61 of the pin through hole 200 can be regarded as a capacitor C3. On the right side of FIG. 5 and FIG. 6, equivalent circuits EC1 and EC2 equivalently representing the electrical state when high-frequency power is applied are shown. As shown in FIG. 5, when high-frequency power is applied to the mounting table 2, the vicinity of the pin through-hole 200 of the mounting table 2 can be regarded as the capacitors C1, C2, and C3 connected in series with the high-frequency power supply PV. Into the equivalent circuit EC1. As the power source PV, for example, the first RF power source 10a and the second RF power source 10b correspond. Set the connection point between the power source PV of the equivalent circuit EC1 and the capacitor C3 as P1. Set the connection point between the capacitor C3 and the capacitor C2 as P2. The potential difference between the connection point P1 and the connection point P2 is equivalent to the RF potential difference generated in the pin through hole 200. If the high-frequency power supplied from the power supply PV is increased in voltage, the potential difference between the connection point P1 and the connection point P2 will increase, and abnormal discharge will occur. On the other hand, as shown in FIG. 6, when there is a conductive film 61c at the front end of the lift pin 61, as shown in the equivalent circuit EC2, the conductive film 61c can be regarded as the resistance R connected in parallel to the capacitor C3. When the resistor R is connected in parallel to the capacitor C3 in this way, the potential difference between the connection point P1 and the connection point P2 can be reduced. That is, the conductive film 61c can relax the RF potential difference generated in the pin through hole 200. As the conductive member used for the conductive film 61c, any material having conductivity may be used, and examples thereof include conductive materials such as silicon, carbon, silicon carbide, silicon nitride, titanium dioxide, and aluminum, or metals. The conductive film 61c only needs to be formed so as to have a resistance value that can suppress the RF potential difference generated in the pin through hole 200 due to the high-frequency power applied to the mounting table 2 below the threshold value for discharge generation . On the other hand, when the resistance value of the conductive film 61c is too low, a current is excessively generated in the conductive film 61c. Therefore, the conductive film 61c is preferably set to a thickness that does not excessively flow current. The higher the frequency of the high-frequency power of the conductive film 61c, the more current is concentrated on its surface. This phenomenon is called skin depth (skin effect), and is represented by the following formula (1). [Number 1]
Figure 02_image001
Here, δ is the thickness (depth) from the surface through which the current flows. ρ is the resistivity of the conductive member used for the conductive film 61c. μ is the permeability of the conductive member used for the conductive film 61c. μs is the relative permeability of the conductive member used for the conductive film 61c. F is the frequency of high-frequency power. Fig. 7 is a diagram showing an example of the calculation result of the skin effect. The example in FIG. 7 shows the results of calculating δ when the frequency f is 40 MHz and 400 kHz for three types of conductive members, the first conductive member, the second conductive member, and the third conductive member. For example, the resistivity ρ of the first conductive member is 4.5 e 2 , and the relative magnetic permeability μs is 1. When the frequency f of the first conductive member is 40 MHz, the calculated thickness δ is 1.69 [m]. In addition, the resistivity ρ of the second conductive member is 1.0 e 6 , and the relative magnetic permeability μs is 1. When the frequency f of the second conductive member is 40 MHz, the calculated thickness δ is 7.96 e 1 [m]. When the conductive film 61c is thinner than the skin effect thickness δ of the conductive member used for the conductive film 61c, the current flow is restricted, the resistance increases, and the current generated decreases. Therefore, the conductive film 61c is preferably set to be 10% or less of the skin effect thickness δ of the conductive member used for the conductive film 61c, more preferably, it is desirably set to be 1% or less. Thereby, it is possible to suppress excessive current generation in the conductive film 61c. Furthermore, the conductive film 61c can also be formed on the front end portion of the lift pin 61 in a flat state without step difference. Fig. 8 is a diagram showing an example of a conductive film formed on the front end portion of the lift pin. The lift pin 61 is formed at the front end portion of the pin body 61a with a depth corresponding to the film thickness of the conductive film 61c to form a recess 61d. In addition, the lift pin 61 may also form a conductive film 61c in the recess 61d of the pin body 61a. In addition, in order to reduce the contact portion of the wafer W, the lift pin 61 has the tip portion formed thinner. The lift pin 61 of the present embodiment has a cylindrical shape at its front end, and its outer diameter is set to, for example, a few mm. There are cases where the outer diameter of the front end portion of the lift pin 61 is smaller than the skin effect thickness δ of the conductive member used for the conductive film 61c. In this case, the front end portion of the lift pin 61 may be formed of a conductive member. For example, when the outer diameter of the front end portion of the lift pin 61 is less than 10% of the skin effect thickness δ of the conductive member, preferably less than 1%, the front end portion of the lift pin 61 may also be formed of a conductive member . For example, when the frequency f of the second conductive member is 40 MHz, the thickness δ is 7.96 e 1 [m], which is less than 1% of the outer diameter of the front end of the lift pin 61. In this case, a second conductive member may be used to form the front end portion of the lift pin 61. Fig. 9 is a diagram showing an example of forming the front end portion of the lift pin by using a conductive member. The lift pin 61 is provided with a conductive portion 61e, and the conductive portion 61e is formed from a conductive member in a range corresponding to the thickness of the electrostatic chuck 6 from the pin upper end 61b side of the lift pin 61. Furthermore, the lift pin 61 may be configured to include a conductive member in the front end portion corresponding to the pin through hole 200. In other words, the lift pin 61 may have a conductive portion formed of a conductive member buried in the front end portion corresponding to the pin through hole 200. Fig. 10 is a diagram showing an example of a conductive part embedded in the front end portion of the lift pin. The lift pin 61 shown in FIG. 10 has a conductive portion 61f formed of a conductive member embedded in the front end portion corresponding to the pin through hole 200. There may be a plurality of conductive portions 61f. Fig. 11 is a diagram showing another example in which a conductive part is embedded in the interior of the front end portion of the lift pin. The lift pin 61 shown in FIG. 11 has two conductive portions 61f formed of conductive members embedded in the front end portion corresponding to the pin through hole 200. Three or more conductive parts 61f may be embedded. [Simulation of potential change] Fig. 12 is a diagram that uses an equivalent circuit to simulate the change of potential in the through hole for a pin. Fig. 12(A) shows three waveforms W1 to W3 representing potential changes. The waveform W1 represents the potential at the connection point P1 of the equivalent circuits EC1 and EC2 shown in FIG. 5 and FIG. 6. The waveform W2 represents the potential at the connection point P2 of the equivalent circuit EC1 shown in FIG. 5. That is, the waveform W2 represents the potential change when the conductive film 61c is not present at the front end portion of the lift pin 61. The waveform W3 represents the potential at the connection point P2 of the equivalent circuit EC2 shown in FIG. 6. That is, the waveform W3 represents the potential change when the conductive film 61c is present at the front end portion of the lift pin 61. Fig. 12(B) shows the waveforms obtained by magnifying the peaks of the waveforms W1 to W3 in Fig. 12(A). The potential difference d1 shown in FIG. 12(B) is the difference between the waveform W1 and the waveform W2, and represents the potential difference generated when the conductive film 61c is not present at the front end portion of the lift pin 61. The potential difference d2 is the difference between the waveform W1 and the waveform W3, and represents the potential difference generated when the conductive film 61c is present at the front end portion of the lift pin 61. Compared with the potential difference d1, the potential difference d2 is reduced. In this way, when the conductive film 61c is present at the front end portion of the lift pin 61, the potential difference is reduced. Thereby, the generation of abnormal discharge in the pin through hole 200 can be suppressed. In this way, the plasma processing apparatus 100 of the first embodiment has the electrostatic chuck 6 and the lift pins 61. The electrostatic chuck 6 has a mounting surface 21 on which the wafer W is mounted and a back surface 22 opposite to the mounting surface 21, and a pin through hole 200 penetrating the mounting surface 21 and the back surface 22 is formed. At least a part of the lift pin 61 is formed of an insulating member, the front end is accommodated in the pin through hole 200, and the wafer W is conveyed in the vertical direction by moving in the vertical direction with respect to the mounting surface 21. The plasma processing apparatus 100 has a conductive film 61c or a conductive portion 61e at the front end portion of the lift pin 61 corresponding to the pin through hole 200. Thereby, the plasma processing apparatus 100 can suppress the generation of abnormal discharge in the pin through hole 200. (Second Embodiment) In the plasma processing apparatus 100 of the first embodiment described above, the case where a conductive member is provided at the front end portion of the lift pin 61 corresponding to the pin through hole 200 has been described. In the plasma processing apparatus 100 of the second embodiment, a case where a conductive member is provided on the wall surface of the pin through hole 200 facing the lift pin 61 will be described. FIG. 13 is a diagram showing an example of a conductive member provided on the wall surface of the pin through hole facing the lift pin. The through hole 200 for pins is formed in the electrostatic chuck 6, and the wafer W is mounted. The front end of the lift pin 61 is accommodated in the pin through hole 200. The electrostatic chuck 6 has a conductive film 6c formed of a conductive member on a wall surface of the pin through hole 200 facing the lift pin 61. Furthermore, instead of the conductive film 6c, a conductive cylindrical member may be provided in the pin through hole 200. Fig. 14 is a perspective view schematically showing the vicinity of the through hole for the pin of the electrostatic chuck. A pin through hole 200 is formed in the electrostatic chuck 6. It is also possible to insert a conductive cylindrical member 6d formed to coincide with the pin through hole 200 into the pin through hole 200, and to provide a conductive member on the wall surface of the pin through hole 200 facing the lift pin 61 . Furthermore, for example, a part of the pin spacer 201 corresponding to the electrostatic chuck 6 or the entire pin spacer 201 may be formed using a conductive member. As the conductive member used in the conductive film 6c and the cylindrical member 6d, any material having conductivity may be used, and examples thereof include conductive materials such as silicon, carbon, silicon carbide, silicon nitride, titanium dioxide, and aluminum, or metals. The conductive film 6c and the cylindrical member 6d have electrical functions similar to the conductive film 61c of the first embodiment, and can alleviate the RF potential difference generated in the pin through hole 200. In this way, the plasma processing apparatus 100 of the second embodiment has the conductive film 6c or the cylindrical member 6d on the wall surface of the pin through hole 200 facing the lift pin 61. Thereby, the plasma processing apparatus 100 can suppress the generation of abnormal discharge in the pin through hole 200. (Third Embodiment) Next, a third embodiment will be described. The configuration of the plasma processing device of the third embodiment is substantially the same as that of the plasma processing device 10 shown in FIG. Fig. 15A is a schematic cross-sectional view showing the mounting table. The mounting table 2 is provided with the above-mentioned gas supply pipe 30, and a gas supply through hole 210 is formed at the tip. The gas supply through-hole 210 is formed by the through-hole 210a and the through-hole 210b. The through hole 210a is formed in the electrostatic chuck 6, and the through hole 210b is formed in the base material 2a. The through-hole 210a and the through-hole 210b are formed in such a way that their positions are aligned at room temperature, for example. In the through hole 210 for gas supply, an embedded member 220 is arranged at an interval from the inner wall of the through hole 210 for gas supply. In addition, the abnormal discharge in the gas supply through hole 210 can be suppressed by reducing the distance between the embedded member 220 and the gas supply through hole 210. Therefore, for example, it is considered that the front end portion of the embedded member 220 is formed thicker, and the interval between the embedded member 220 and the gas supply through hole 210 is reduced. In addition, abnormal discharge in the gas supply through hole 210 can also be suppressed by shortening the straight portion of the heat transfer gas path. The reason is that by shortening the straight portion of the heat-conducting gas path, the energy of the electrons in the heat-conducting gas is reduced. Therefore, the gas supply through hole 210 is formed with a diameter of the through hole 210b larger than the diameter of the through hole 210a, and the portion of the embedded member 220 corresponding to the through hole 210b is formed larger than the front end portion of the embedded member 220. However, when the interval between the embedded member 220 and the gas supply through hole 210 is reduced, the embedded member 220 may be damaged. Fig. 15B is a diagram illustrating the damage of the embedded member. When the mounting table 2 has been subjected to plasma treatment, the temperature is, for example, from 100°C to a high temperature of 200°C. When the temperature of the electrostatic chuck 6 and the base material 2a reaches a high temperature, they thermally expand, respectively. In addition, the difference in thermal expansion between the electrostatic chuck 6 and the base material 2a causes positional deviation between the through holes 210a and the through holes 210b. Therefore, for example, if the front end portion of the embedded member 220 is formed thicker to reduce the distance between the embedded member 220 and the gas supply through hole 210, the positional deviation between the through hole 210a and the through hole 210b may cause the embedment. The entry member 220 is damaged. Therefore, a part of the embedded member 220 is formed of an elastic member. For example, the portion corresponding to the portion where the embedded member 220 and the through hole 210a communicate with the through hole 210b is formed of at least an elastic member. Fig. 16A is a diagram illustrating the embedded member of the third embodiment. For example, when the embedded member 220 is housed in the gas supply through hole 210, from the upper end 220b side, a conductive portion 220e formed of a conductive member is formed at the front end corresponding to the upper half of the through hole 210a. , The lower part of the conductive portion 220e is formed of an elastic member. The elastic member only needs to have elasticity to such an extent that the positional deviation between the through hole 210a and the through hole 210b caused by the temperature change will not be damaged. In addition, the elastic member is preferably further resistant to plasma. As an elastic member, a fluorine resin is mentioned, for example. Examples of the fluorine-based resin include polytetrafluoroethylene. Polytetrafluoroethylene functions as an insulating member. In addition, the elastic member is not limited to a fluorine-based resin, and a member having a Young's modulus of 20 GPa or less can be mentioned. Particularly, a member with a Young's modulus of 10 GPa or less is better. Fig. 16B is a diagram illustrating the embedded member of the third embodiment. Even if the electrostatic chuck 6 and the base material 2a reach a high temperature after the plasma treatment, the difference in thermal expansion between the electrostatic chuck 6 and the base material 2a causes a positional deviation between the through holes 210a and the through holes 210b. The portion corresponding to the portion where the through hole 210a and the through hole 210b communicate with the through hole 210a and the through hole 210b are deformed, so that the damage of the embedded member 220 can also be suppressed. Moreover, when the electrostatic chuck 6 and the base material 2a return to normal temperature, as shown in FIG. 16A, there is no deviation in the positions of the through holes 210a and the through holes 210b, and the embedded member 220 returns to its original shape. Thereby, even when the interval between the embedded member 220 and the gas supply through hole 210 is reduced, the damage of the embedded member 220 can be suppressed. Thus, the plasma processing apparatus 100 of the third embodiment has the electrostatic chuck 6 and the base material 2a. The electrostatic chuck 6 has a mounting surface 21 on which the wafer W is mounted and a back surface 22 opposite to the mounting surface 21, and a through hole 210a penetrating the mounting surface 21 and the back surface 22 is formed. The base material 2a has a supporting surface for supporting the electrostatic chuck 6, and is formed with a through hole 210b communicating with the through hole 210a, and an embedded member 220 is provided in the through hole 210a and the through hole 210b. The portion of the embedded member 220 corresponding to the portion where the through hole 210a of the electrostatic chuck 6 communicates with the through hole 210b of the base material 2a is at least formed by an elastic member. Thereby, the plasma processing apparatus 100 can suppress even when the distance between the embedded member 220 and the gas supply through hole 210 is formed to be small in order to suppress the generation of abnormal discharge in the gas supply through hole 210 The occurrence of damage to the embedded member 220. In the foregoing, one embodiment has been described, but the present invention is not limited to this specific embodiment, and various changes or modifications can be made within the scope of the gist of the present invention described in the scope of the patent application. For example, the first embodiment to the third embodiment may be combined and implemented. For example, in the plasma processing apparatus 100, a conductive film 61c may be formed on the front end portion of the lift pin 61 corresponding to the pin through hole 200, and a conductive film may be formed on the wall surface of the pin through hole 200 facing the lift pin 61 6c. In addition, in the plasma processing apparatus 100, the lift pins 61 may be formed like the embedded member 220. The embedded member 220 may be formed with a conductive member like the lift pin 61. In addition, the conductive film 61c or the conductive portion 61e of the first embodiment may not be provided on the entire peripheral surface of the front end portion of the lift pin 61 corresponding to the pin through hole 200. For example, the conductive film 61c or the conductive portion 61e may be provided on a part of the circumferential surface with respect to the circumferential direction of the tip portion. In addition, for example, the conductive film 61c or the conductive portion 61e may be provided on the peripheral surface of the front end portion of the lift pin 61 with a length corresponding to the thickness of the electrostatic chuck 6, and a plurality of them may be separately provided in the circumferential direction. The conductive film 6c of the second embodiment may not be provided on the entire wall surface of the pin through hole 200 facing the lift pin 61. For example, the conductive film 6c may be provided on a part of the wall surface with respect to the circumferential direction of the pin through hole 200. In addition, for example, the conductive film 61c may be provided on the wall surface of the pin through hole 200 with the length of the pin through hole 200 separated in the circumferential direction. In addition, in the first embodiment and the second embodiment, the plasma processing apparatus 100 may also use plasma generated by a radial line slot antenna.

1‧‧‧處理容器1a‧‧‧接地導體2‧‧‧載置台2a‧‧‧基材2b‧‧‧冷媒入口配管2c‧‧‧冷媒出口配管2d‧‧‧冷媒流路2e‧‧‧絕緣體3‧‧‧支持構件3a‧‧‧內壁構件4‧‧‧支持台5‧‧‧聚焦環6‧‧‧靜電吸盤6a‧‧‧電極6b‧‧‧絕緣體6c‧‧‧導電膜6d‧‧‧筒狀構件10a‧‧‧第1 RF電源10b‧‧‧第2 RF電源11a‧‧‧第1整合器11b‧‧‧第2整合器12‧‧‧直流電源15‧‧‧處理氣體供給源15a‧‧‧氣體供給配管15b‧‧‧質量流量控制器16‧‧‧簇射頭16a‧‧‧本體部16b‧‧‧上部頂板16c‧‧‧氣體擴散室16d‧‧‧氣體流經孔16e‧‧‧氣體導入孔16g‧‧‧氣體導入口21‧‧‧載置面22‧‧‧背面30‧‧‧氣體供給管30a‧‧‧貫通孔30b‧‧‧貫通孔61‧‧‧升降銷61a‧‧‧銷本體部61b‧‧‧銷上端部61c‧‧‧導電膜61d‧‧‧凹部61e‧‧‧導電部61f‧‧‧導電部62‧‧‧驅動機構71‧‧‧低通濾波器72‧‧‧可變直流電源73‧‧‧啟閉開關81‧‧‧排氣口82‧‧‧排氣管83‧‧‧第1排氣裝置84‧‧‧搬入搬出口85‧‧‧閘閥86‧‧‧積存物遮罩87‧‧‧積存物遮罩89‧‧‧導電性構件90‧‧‧控制部91‧‧‧製程控制器92‧‧‧使用者介面93‧‧‧記憶部95‧‧‧絕緣性構件100‧‧‧電漿處理裝置200‧‧‧銷用貫通孔200a‧‧‧貫通孔200b‧‧‧貫通孔201‧‧‧銷用間隔件202‧‧‧氣體用間隔件203‧‧‧銷用套管204‧‧‧氣體用套管210‧‧‧氣體供給用貫通孔210a‧‧‧貫通孔210b‧‧‧貫通孔220‧‧‧埋入構件220b‧‧‧上端部220e‧‧‧導電部C1‧‧‧電容器C2‧‧‧電容器C3‧‧‧電容器EC1‧‧‧等效電路EC2‧‧‧等效電路PV‧‧‧電源P1‧‧‧連接點P2‧‧‧連接點R‧‧‧電阻V2‧‧‧開關閥W‧‧‧晶圓1‧‧‧Processing container 1a‧‧‧Earth conductor 2‧‧‧Mounting table 2a‧‧Base material 2b‧‧‧Refrigerant inlet pipe 2c‧‧‧Refrigerant outlet pipe 2d‧‧‧Refrigerant flow path 2e‧‧‧Insulator 3‧‧‧Supporting component 3a‧‧‧Inner wall component 4‧‧‧Supporting table 5‧‧‧Focusing ring 6‧‧‧Electrostatic chuck 6a‧‧Electrode 6b‧‧‧Insulator 6c‧‧‧Conductive film 6d‧‧ ‧Cylinder member 10a‧‧‧First RF power supply 10b‧‧‧Second RF power supply 11a‧‧‧First integrator 11b‧‧‧Second integrator 12‧‧‧DC power supply 15‧‧‧Processing gas supply source 15a. Gas inlet 16g 61a. Device 72‧‧‧Variable DC power supply 73‧‧‧Open and close switch 81‧‧‧Exhaust port 82‧‧‧Exhaust pipe 83‧‧‧The first exhaust device 84‧‧‧Move into the export port 85‧‧‧ Gate valve 86‧‧‧Stock mask 87‧‧‧Stock mask 89‧‧‧conductive member 90‧‧‧control part 91‧‧‧process controller 92‧‧‧user interface 93‧‧‧memory part 95‧‧‧Insulating member 100‧‧‧Plasma processing device 200‧‧‧Pin through hole 200a‧‧‧Through hole 200b‧‧‧Through hole 201‧‧‧Pin spacer 202‧‧‧Gas spacer Piece 203‧‧‧Pin sleeve 204‧‧‧Gas sleeve 210‧‧‧Gas supply through hole 210a‧‧‧through hole 210b‧‧‧through hole 220‧‧‧embedded member 220b‧‧‧ upper end Part 220e‧‧‧Conducting part C1‧‧‧Capacitor C2‧‧‧Capacitor C3‧‧‧Capacitor EC1‧‧‧Equivalent circuit EC2‧‧‧Equivalent circuit PV‧‧‧Power supply P1‧‧‧Connection point P2‧‧ ‧Connection point R‧‧‧Resistor V2‧‧‧On-off valve W‧‧‧ Wafer

圖1係表示本實施形態之電漿處理裝置之構成之概略剖視圖。 圖2係表示圖1之電漿處理裝置中之載置台之概略剖視圖。 圖3係表示圖1之電漿處理裝置中之載置台之概略剖視圖。 圖4係模式性地表示靜電吸盤之銷用貫通孔附近之電位之狀態的圖。 圖5係模式性地表示收容於銷用貫通孔之升降銷之前端部分的圖。 圖6係模式性地表示收容於銷用貫通孔之升降銷之前端部分的圖。 圖7係表示集膚效應之算出結果之一例的圖。 圖8係表示於升降銷之前端部分形成有導電膜之一例的圖。 圖9係表示利用導電性構件形成升降銷之前端部分之一例的圖。 圖10係表示於升降銷之前端部分之內部埋入有導電部之一例的圖。 圖11係表示於升降銷之前端部分之內部埋入有導電部之另一例的圖。 圖12(A)、(B)係使用等效電路模擬銷用貫通孔內之電位之變化的圖。 圖13係表示於銷用貫通孔之與升降銷相對向之壁面具有導電性構件之一例的圖。 圖14係模式性地表示靜電吸盤之銷用貫通孔附近之立體圖。 圖15A係表示載置台之概略剖視圖。 圖15B係說明埋入構件之破損之圖。 圖16A係說明第3實施形態之埋入構件之圖。 圖16B係說明第3實施形態之埋入構件之圖。Fig. 1 is a schematic cross-sectional view showing the configuration of the plasma processing apparatus of this embodiment. FIG. 2 is a schematic cross-sectional view showing a mounting table in the plasma processing apparatus of FIG. 1. FIG. Fig. 3 is a schematic cross-sectional view showing a mounting table in the plasma processing apparatus of Fig. 1; Fig. 4 is a diagram schematically showing the state of the potential in the vicinity of the through hole for the pin of the electrostatic chuck. Fig. 5 is a diagram schematically showing the front end portion of the lift pin accommodated in the pin through hole. Fig. 6 is a diagram schematically showing the front end portion of the lift pin accommodated in the pin through hole. Fig. 7 is a diagram showing an example of the calculation result of the skin effect. Fig. 8 is a diagram showing an example of a conductive film formed on the front end portion of the lift pin. Fig. 9 is a diagram showing an example of forming the front end portion of the lift pin by using a conductive member. Fig. 10 is a diagram showing an example of a conductive part embedded in the front end portion of the lift pin. Fig. 11 is a diagram showing another example in which a conductive part is embedded in the interior of the front end portion of the lift pin. Fig. 12 (A) and (B) are diagrams using an equivalent circuit to simulate the change of the potential in the through hole for a pin. Fig. 13 is a diagram showing an example of a conductive member provided on the wall surface of the pin through hole facing the lift pin. Fig. 14 is a perspective view schematically showing the vicinity of the through hole for the pin of the electrostatic chuck. Fig. 15A is a schematic cross-sectional view showing the mounting table. Fig. 15B is a diagram illustrating the damage of the embedded member. Fig. 16A is a diagram illustrating the embedded member of the third embodiment. Fig. 16B is a diagram illustrating the embedded member of the third embodiment.

2‧‧‧載置台 2‧‧‧Mounting table

2a‧‧‧基材 2a‧‧‧Substrate

5‧‧‧聚焦環 5‧‧‧Focusing Ring

6‧‧‧靜電吸盤 6‧‧‧Electrostatic chuck

6a‧‧‧電極 6a‧‧‧electrode

6b‧‧‧絕緣體 6b‧‧‧Insulator

21‧‧‧載置面 21‧‧‧Mounting surface

22‧‧‧背面 22‧‧‧Back

30‧‧‧氣體供給管 30‧‧‧Gas supply pipe

30a‧‧‧貫通孔 30a‧‧‧Through hole

30b‧‧‧貫通孔 30b‧‧‧Through hole

61‧‧‧升降銷 61‧‧‧Lift pin

61a‧‧‧銷本體部 61a‧‧‧Pin body

61b‧‧‧銷上端部 61b‧‧‧Pin upper end

61c‧‧‧導電膜 61c‧‧‧Conductive film

200‧‧‧銷用貫通孔 200‧‧‧Through hole for pin

200a‧‧‧貫通孔 200a‧‧‧Through hole

200b‧‧‧貫通孔 200b‧‧‧Through hole

201‧‧‧銷用間隔件 201‧‧‧Spacers for pins

202‧‧‧氣體用間隔件 202‧‧‧Gas spacer

203‧‧‧銷用套管 203‧‧‧Pin sleeve

204‧‧‧氣體用套管 204‧‧‧Gas casing

W‧‧‧晶圓 W‧‧‧wafer

Claims (7)

一種電漿處理裝置，其特徵在於，具有：靜電吸盤，其具有供載置被處理體之載置面及與上述載置面相對之背面，且形成有貫通上述載置面與上述背面之通孔；及升降銷，其至少一部分由絕緣性構件形成，前端收容於上述通孔，藉由相對於上述載置面於上下方向移動而於上下方向搬送上述被處理體；上述升降銷於與上述通孔對應之前端部分具有由導電性構件形成之導電膜，且上述導電膜之厚度為用於上述導電膜之上述導電性構件之集膚效應之厚度δ的10%以下，其中上述厚度δ係以下式(1)表示，
Figure 106141800-A0305-02-0026-1
 μ=μo×μs μo=1.2566370614e-6(H/m)其中ρ係用於上述導電膜之上述導電性構件之電阻率，μ係用於上述導電膜之上述導電性構件之磁導率，μs係用於上述導電膜之上述導電性構件之相對磁導率，F係高頻電力之頻率。 A plasma processing device, characterized by comprising: an electrostatic chuck, which has a mounting surface on which to-be-processed objects are mounted and a back surface opposite to the mounting surface, and a communication penetrating the mounting surface and the back surface is formed. Hole; and a lift pin, at least a part of which is formed of an insulating member, the front end is accommodated in the through hole, and the object to be processed is conveyed in the vertical direction by moving in the vertical direction relative to the mounting surface; the lift pin is connected to the above The front end portion corresponding to the through hole has a conductive film formed of a conductive member, and the thickness of the conductive film is less than 10% of the skin effect thickness δ of the conductive member used for the conductive film, wherein the thickness δ is The following formula (1) represents,
Figure 106141800-A0305-02-0026-1
 μ=μo×μs μo=1.2566370614e-6(H/m) where ρ is the resistivity of the conductive member used in the conductive film, and μ is the permeability of the conductive member used in the conductive film, μs is the relative permeability of the conductive member used in the conductive film, and F is the frequency of high-frequency power. 如請求項1之電漿處理裝置，其中上述導電膜之厚度為用於上述導電膜之上述導電性構件之集膚效應之上述厚度δ的1%以下。 The plasma processing device of claim 1, wherein the thickness of the conductive film is less than 1% of the thickness δ of the skin effect of the conductive member used for the conductive film. 如請求項1之電漿處理裝置，其中 上述升降銷之上述前端部分係由導電性構件形成，且上述升降銷之前端部分之外徑為用於上述導電膜之上述導電性構件之集膚效應之上述厚度δ之10%以下。 Such as the plasma processing device of claim 1, where The front end portion of the lift pin is formed of a conductive member, and the outer diameter of the front end portion of the lift pin is less than 10% of the thickness δ of the skin effect of the conductive member used for the conductive film. 如請求項1之電漿處理裝置，其中上述升降銷於上述前端部分具有凹部，該凹部具有與上述導電膜之膜厚對應之深度，且上述導電膜形成於上述凹部。 The plasma processing apparatus of claim 1, wherein the lift pin has a recess at the tip portion, the recess having a depth corresponding to the film thickness of the conductive film, and the conductive film is formed in the recess. 如請求項1之電漿處理裝置，其中上述靜電吸盤於上述通孔之與上述升降銷相對向之壁面具有由導電性構件形成之導電膜。 The plasma processing device of claim 1, wherein the electrostatic chuck has a conductive film formed of a conductive member on a wall surface of the through hole opposite to the lift pin. 如請求項1之電漿處理裝置，其中上述靜電吸盤於上述通孔內具有導電性之筒狀構件。 The plasma processing device of claim 1, wherein the electrostatic chuck has a conductive cylindrical member in the through hole. 一種電漿處理裝置，其特徵在於，具有：靜電吸盤，其具有供載置被處理體之載置面及與上述載置面相對之背面，且形成有貫通上述載置面與上述背面之第1通孔及第2通孔；升降銷，其至少一部分由絕緣性構件形成，前端收容於上述第1通孔，藉由相對於上述載置面於上下方向移動而於上下方向搬送上述被處理體；及基台，其具有支持上述靜電吸盤之支持面，且形成有與上述第2通孔連通之第3通孔，於該第2通孔及第3通孔內具有埋入構件； 上述升降銷於與上述第1通孔對應之前端部分具有由導電性構件形成之導電膜，上述導電膜之厚度為用於上述導電膜之上述導電性構件之集膚效應之厚度δ的10%以下，上述厚度δ係以下式(1)表示，
Figure 106141800-A0305-02-0028-2
 μ=μo×μs μo=1.2566370614e-6(H/m)其中ρ係用於上述導電膜之上述導電性構件之電阻率，μ係用於上述導電膜之上述導電性構件之磁導率，μs係用於上述導電膜之上述導電性構件之相對磁導率，F係高頻電力之頻率，且上述埋入構件之至少與上述靜電吸盤之上述第2通孔和上述基台之上述第3通孔連通之部分相對應的部分由彈性構件形成。 A plasma processing device, characterized by comprising: an electrostatic chuck, which has a mounting surface on which an object to be processed is mounted and a back surface opposite to the mounting surface, and a second surface penetrating the mounting surface and the back surface is formed. 1 through hole and second through hole; lift pins, at least a part of which is formed of an insulating member, the tip is housed in the first through hole, and the processed material is conveyed in the vertical direction by moving in the vertical direction relative to the mounting surface Body; and a base, which has a support surface for supporting the electrostatic chuck, and is formed with a third through hole communicating with the second through hole, and has embedded members in the second through hole and the third through hole; The lift pin has a conductive film formed of a conductive member at the front end portion corresponding to the first through hole, and the thickness of the conductive film is less than 10% of the skin effect thickness δ of the conductive member used for the conductive film , The above-mentioned thickness δ is expressed by the following formula (1),
Figure 106141800-A0305-02-0028-2
 μ=μo×μs μo=1.2566370614e-6(H/m) where ρ is the resistivity of the conductive member used in the conductive film, and μ is the permeability of the conductive member used in the conductive film, μs is the relative permeability of the conductive member used in the conductive film, F is the frequency of high-frequency power, and the embedded member is at least connected to the second through hole of the electrostatic chuck and the second through hole of the base. The part corresponding to the part where the three through holes communicate is formed by an elastic member.
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KR20180064302A (en) 2018-06-14
JP2018093173A (en) 2018-06-14
TW201826389A (en) 2018-07-16
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CN114512391A (en) 2022-05-17
TWI797802B (en) 2023-04-01

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