TWI699602B

TWI699602B - Display device

Info

Publication number: TWI699602B
Application number: TW108102306A
Authority: TW
Inventors: 陳志成; 劉貴文
Original assignee: 友達光電股份有限公司
Priority date: 2019-01-21
Filing date: 2019-01-21
Publication date: 2020-07-21
Also published as: CN110488543A; TW202028834A; CN110488543B

Abstract

A display device includes a substrate and a display array. The substrate includes a display area and a periphery area. The display array is assigned on the substrate and in the display area. The display array includes multiple scan lines, multiple data lines, multiple common electrodes and multiple first transmitting electrodes. The scan lines cross the data lines and multiple sub-pixels are defined by the scan lines and data lines. Each sub-pixel includes at least a pixel electrode. The common electrodes are assigned among the sub-pixels. The first transmitting electrodes and the common electrodes are electrically independent. The pixel electrodes are assigned between two of first transmitting electrodes.

Description

顯示裝置 Display device

本揭示內容是關於一種顯示裝置，且特別是一種可偵測3D手勢的顯示裝置。 The present disclosure relates to a display device, and particularly a display device capable of detecting 3D gestures.

隨著科技發展，顯示裝置的需求越來越廣泛。傳統上，3D近場技術是使用玻璃式疊構設計，面板模組的厚度較大。而當面板的尺寸越大，觸控等效電容對觸控手勢判別的靈敏度影響越明顯。 With the development of technology, the demand for display devices has become more and more extensive. Traditionally, the 3D near-field technology uses a glass-type stack design, and the thickness of the panel module is relatively large. When the size of the panel is larger, the touch equivalent capacitance has more obvious influence on the sensitivity of touch gesture discrimination.

因此，如何減少面板模組的厚度，以及減少觸控等效電容，是目前設計的考量和挑戰。 Therefore, how to reduce the thickness of the panel module and reduce the equivalent capacitance of touch is the current design consideration and challenge.

本揭示內容的一種實施態樣係關於一種顯示裝置，包含基板和電極陣列。基板上包含顯示區和周邊區。電極陣列配置於基板上並位於顯示區內。電極陣列包含複數條掃描線和複數條資料線、複數個共通電極和複數個第一傳送電極。掃描線和資料線交錯定義出複數個子畫素。每個子畫素至少包含一畫素電極。共通電極分別配置於子畫素中。第一傳送電極和共通電極為電性獨立。畫素電極配置於第一傳送電極中之二者間。 An implementation aspect of the present disclosure relates to a display device including a substrate and an electrode array. The substrate includes a display area and a peripheral area. The electrode array is arranged on the substrate and located in the display area. The electrode array includes a plurality of scanning lines and a plurality of data lines, a plurality of common electrodes and a plurality of first transfer electrodes. Scan lines and data lines are interlaced to define a plurality of sub-pixels. Each sub-pixel includes at least one pixel electrode. The common electrodes are respectively arranged in the sub-pixels. The first transfer electrode and the common electrode are electrically independent. The second pixel electrode is arranged in the first transfer electrode Between.

100:顯示裝置 100: display device

104:掃描線 104: scan line

106:資料線 106: data line

108:觸控導線 108: Touch wire

110、190:基板 110, 190: substrate

120:驅動電路 120: drive circuit

140:顯示區 140: display area

142:第一傳送電極 142: first transfer electrode

160:周邊區 160: Surrounding area

162:第一感應電極 162: first sensing electrode

180:電極陣列 180: electrode array

PX、PX_R、PX_G、PX_B:子畫素 PX, PX_R, PX_G, PX_B: sub-pixel

PXe:畫素電極 PXe: pixel electrode

Vcom:共通電極 Vcom: common electrode

TP:觸控電極 TP: Touch electrode

TP_TX:第二傳送電極 TP_TX: second transmitting electrode

TP_RX:第二感應電極 TP_RX: second sensing electrode

TFT:電晶體 TFT: Transistor

LC:顯示介質層 LC: display medium layer

AS:半導體層 AS: semiconductor layer

GI、BP1、BP2、BP3、PL:絕緣層 GI, BP1, BP2, BP3, PL: insulating layer

M1、M2、M21、M22、M3、M3_1、M3_2、G_M3:金屬層 M1, M2, M21, M22, M3, M3_1, M3_2, G_M3: metal layer

ITO1、ITO2、G_ITO1、C_ITO1:導電薄膜層 ITO1, ITO2, G_ITO1, C_ITO1: conductive film layer

NPX、N41、N42、N43、N44、N51、N52、N53、N54、N71、N72、N73、N74、N92、N93:開口 NPX, N41, N42, N43, N44, N51, N52, N53, N54, N71, N72, N73, N74, N92, N93: opening

X、Y、Z:方向 X, Y, Z: direction

第1圖係根據本揭示內容之部分實施例繪示一種顯示裝置的剖面示意圖。 FIG. 1 is a schematic cross-sectional view of a display device according to some embodiments of the present disclosure.

第2圖係根據本揭示內容之部分實施例繪示一種顯示裝置的示意圖。 FIG. 2 is a schematic diagram of a display device according to some embodiments of the present disclosure.

第3圖係根據本揭示內容之部分實施例繪示一種顯示裝置的示意圖。 FIG. 3 is a schematic diagram of a display device according to some embodiments of the present disclosure.

第4A圖係根據本揭示內容之部分實施例繪示一種顯示裝置的局部放大示意圖。 FIG. 4A is a partial enlarged schematic diagram of a display device according to some embodiments of the present disclosure.

第4B圖係根據第4A圖之實施例繪示一種顯示裝置的立體示意圖。 FIG. 4B is a perspective view of a display device according to the embodiment of FIG. 4A.

第5A圖係根據本揭示內容之部分實施例繪示另一種顯示裝置的局部放大示意圖。 FIG. 5A is a partial enlarged schematic diagram of another display device according to some embodiments of the present disclosure.

第5B圖係根據第5A圖之實施例繪示一種顯示裝置的立體示意圖。 FIG. 5B is a perspective view of a display device according to the embodiment of FIG. 5A.

第6A圖繪示了第5A圖之實施例之顯示裝置沿切線A5-A5’的剖面示意圖。 FIG. 6A is a schematic cross-sectional view of the display device of the embodiment of FIG. 5A along the tangent line A5-A5'.

第6B圖繪示了第5A圖之實施例之顯示裝置沿切線B5-B5’的剖面示意圖。 Fig. 6B is a schematic cross-sectional view of the display device of the embodiment of Fig. 5A along the tangent line B5-B5'.

第7A圖係根據本揭示內容之部分實施例繪示另一種顯示裝置的局部放大示意圖。 FIG. 7A is a partial enlarged schematic diagram of another display device according to some embodiments of the present disclosure.

第7B圖係根據第7A圖之實施例繪示一種顯示裝置的立體示意圖。 FIG. 7B is a perspective view of a display device according to the embodiment of FIG. 7A.

第8A圖繪示了第7A圖之實施例之顯示裝置沿切線A7-A7’的剖面示意圖。 FIG. 8A is a schematic cross-sectional view of the display device of the embodiment of FIG. 7A along the tangent line A7-A7'.

第8B圖繪示了第7A圖之實施例之顯示裝置沿切線B7-B7’的剖面示意圖。 FIG. 8B is a schematic cross-sectional view of the display device of the embodiment of FIG. 7A along the tangent line B7-B7'.

第9A圖係根據本揭示內容之部分實施例繪示另一種顯示裝置的局部放大示意圖。 FIG. 9A is a partial enlarged schematic diagram of another display device according to some embodiments of the present disclosure.

第9B圖係根據第9A圖之實施例繪示一種顯示裝置的立體示意圖。 FIG. 9B is a three-dimensional schematic diagram of a display device according to the embodiment of FIG. 9A.

第10A圖繪示了第9A圖之實施例之顯示裝置沿切線A9-A9’的剖面示意圖。 FIG. 10A is a schematic cross-sectional view of the display device of the embodiment of FIG. 9A along the tangent line A9-A9'.

第10B圖繪示了第9A圖之實施例之顯示裝置沿切線B9-B9’的剖面示意圖。 FIG. 10B is a schematic cross-sectional view of the display device of the embodiment of FIG. 9A along the tangent line B9-B9'.

第11A圖和第11B圖係根據本揭示內容之部分實施例分別繪示另一種顯示裝置的示意圖。 FIG. 11A and FIG. 11B are schematic diagrams respectively showing another display device according to some embodiments of the present disclosure.

第12A圖和第12B圖係根據本揭示內容之部分實施例分別繪示一種的訊號時序示意圖。 FIG. 12A and FIG. 12B are schematic diagrams illustrating a signal timing according to some embodiments of the present disclosure.

下文係舉實施例配合所附圖式作詳細說明，但所描述的具體實施例僅用以解釋本案，並不用來限定本案，而結構操作之描述非用以限制其執行之順序，任何由元件重新組合之結構，所產生具有均等功效的裝置，皆為本揭示內容所涵蓋的範圍。 The following is a detailed description of the embodiments in conjunction with the accompanying drawings, but the specific embodiments described are only used to explain the case, not to limit the case, and the description of the structure operation is not used to limit the order of its execution. The recombined structure produces devices with equal functions, which are all covered by this disclosure Range.

請參考第1圖。第1圖係根據本揭示內容之部分實施例繪示一種顯示裝置100的剖面示意圖。如第1圖所示，顯示裝置100包含下基板110、顯示介質層LC和上基板190。顯示介質層LC位於下基板110和上基板190之間。在下基板110和顯示介質層LC之間，顯示裝置100依序包含金屬層M1、金屬層M2、金屬層M3、導電薄膜層ITO1和導電薄膜層ITO2。在部分實施例中，根據乾蝕刻或濕蝕刻的不同方式，金屬層M3和導電薄膜層ITO1的順序亦可更改。 Please refer to Figure 1. FIG. 1 is a schematic cross-sectional view of a display device 100 according to some embodiments of the present disclosure. As shown in FIG. 1, the display device 100 includes a lower substrate 110, a display medium layer LC, and an upper substrate 190. The display medium layer LC is located between the lower substrate 110 and the upper substrate 190. Between the lower substrate 110 and the display medium layer LC, the display device 100 sequentially includes a metal layer M1, a metal layer M2, a metal layer M3, a conductive thin film layer ITO1 and a conductive thin film layer ITO2. In some embodiments, the order of the metal layer M3 and the conductive thin film layer ITO1 can also be changed according to different methods of dry etching or wet etching.

在部分實施例中，顯示介質層LC可為液晶層或電泳層。基板可由玻璃基板、塑膠基板或其他合適之硬式或可饒式基板據以實施。舉例來說，下基板110可為陣列基板。顯示裝置100可包含主動元件(例如電晶體)、被動元件(例如電容、電阻)或其它合適的元件配置於下基板110和顯示介質層LC之間。上基板190可為對向基板。顯示裝置100可包含彩色濾光片或其他合適的元件配置於顯示介質層LC和上基板190之間。 In some embodiments, the display medium layer LC may be a liquid crystal layer or an electrophoretic layer. The substrate can be implemented by a glass substrate, a plastic substrate, or other suitable rigid or flexible substrates. For example, the lower substrate 110 may be an array substrate. The display device 100 may include active components (such as transistors), passive components (such as capacitors, resistors) or other suitable components disposed between the lower substrate 110 and the display medium layer LC. The upper substrate 190 may be an opposite substrate. The display device 100 may include a color filter or other suitable elements disposed between the display medium layer LC and the upper substrate 190.

為便於說明起見，本揭示內容之顯示裝置100的電路及元件分別繪示於第2圖和第3圖中。請參考第2圖。第2圖係根據本揭示內容之部分實施例繪示一種顯示裝置100的示意圖。如第2圖所示，顯示裝置100包含基板110、驅動電路120和電極陣列180。基板110上包含顯示區140和周邊區160。驅動電路120配置於基板110上並位於周邊區160內。電極陣列180配置於基板110上並位於顯示區140內。電極陣列180包含複數條掃描線104、複數條資料線106和複數個子畫素PX。掃描線104和資料線106彼此交錯定義出多個子畫素PX。每個子畫素PX至少包含一個畫素電極(未繪示於第2圖)。 For ease of description, the circuits and components of the display device 100 of the present disclosure are shown in FIG. 2 and FIG. 3, respectively. Please refer to Figure 2. FIG. 2 is a schematic diagram of a display device 100 according to some embodiments of the present disclosure. As shown in FIG. 2, the display device 100 includes a substrate 110, a driving circuit 120 and an electrode array 180. The substrate 110 includes a display area 140 and a peripheral area 160. The driving circuit 120 is disposed on the substrate 110 and located in the peripheral area 160. The electrode array 180 is disposed on the substrate 110 and located in the display area 140. Electrode array 180 contains A plurality of scan lines 104, a plurality of data lines 106, and a plurality of sub-pixels PX. The scan line 104 and the data line 106 intersect each other to define a plurality of sub-pixels PX. Each sub-pixel PX includes at least one pixel electrode (not shown in Figure 2).

在部分實施例中，掃描線104配置於第1圖中的金屬層M1，資料線106配置於第1圖中的金屬層M2。構成子畫素PX的畫素電極配置於第1圖中的導電薄膜層ITO2。在部分實施例中，驅動電路120可由顯示驅動器整合晶片(Touch with Display Driver，TDDI)據以實施，但並不以此為限。 In some embodiments, the scan line 104 is configured on the metal layer M1 in Figure 1, and the data line 106 is configured on the metal layer M2 in Figure 1. The pixel electrodes constituting the sub-pixel PX are arranged on the conductive thin film layer ITO2 in Figure 1. In some embodiments, the driving circuit 120 can be implemented by a touch with display driver (TDDI) chip, but it is not limited to this.

接著，請參考第3圖。第3圖係根據本揭示內容之部分實施例繪示一種顯示裝置100的示意圖。如第3圖所示，顯示裝置100包含複數個第一傳送電極142、複數個第二接收電極162和共通電極(未繪示於第3圖)。第一傳送電極142配置於基板110上並位於顯示區140內。第二接收電極162配置於基板110上並位於周邊區160內。 Next, please refer to Figure 3. FIG. 3 is a schematic diagram of a display device 100 according to some embodiments of the present disclosure. As shown in FIG. 3, the display device 100 includes a plurality of first transmitting electrodes 142, a plurality of second receiving electrodes 162, and common electrodes (not shown in FIG. 3). The first transfer electrode 142 is disposed on the substrate 110 and located in the display area 140. The second receiving electrode 162 is disposed on the substrate 110 and located in the peripheral area 160.

值得注意的是，第2圖和第3圖僅為方便說明的示意圖，並非用以表示疊層架構上的配置關係，且其元件數量僅用於示意，並不以此為限。關於畫素電極、共通電極及第一傳送電極142之間的配置細節將於後續段落中進行說明。 It is worth noting that FIG. 2 and FIG. 3 are only schematic diagrams for convenience of explanation, and are not used to show the configuration relationship on the laminated structure, and the number of components is only for illustration, and is not limited thereto. The configuration details between the pixel electrode, the common electrode, and the first transmission electrode 142 will be described in subsequent paragraphs.

請參考第4A圖和第4B圖。第4A圖係根據本揭示內容之部分實施例繪示一種顯示裝置100的局部放大示意圖。第4B圖係根據第4A圖之實施例繪示一種顯示裝置100的立體示意圖。為了凸顯本揭示內容之顯示裝置100的特徵，在第4A圖和第4B圖中僅示意性地繪示出金屬層M1、M2、M3、電晶體TFT、畫素電極PXe、共通電極Vcom和第一傳送電極142。在本實施例中，掃描線104配置於金屬層M1，資料線106配置於金屬層M2。第一傳送電極142的導線配置於金屬層M3。共通電極Vcom和第一傳送電極142配置於導電薄膜層ITO1。畫素電極配置於導電薄膜層ITO2。 Please refer to Figure 4A and Figure 4B. FIG. 4A is a partial enlarged schematic diagram of a display device 100 according to some embodiments of the present disclosure. FIG. 4B is a perspective view of a display device 100 according to the embodiment in FIG. 4A. In order to highlight the features of the display device 100 of the present disclosure, only the metal layers M1, M2, M3, the transistor TFT, the pixel electrode PXe, the common electrode Vcom, and the second electrode are schematically shown in FIGS. 4A and 4B. A transmission electrode 142. In this embodiment, the scan line 104 is disposed on the metal layer M1, and the data line 106 is disposed on the metal layer M2. The wire of the first transfer electrode 142 is disposed on the metal layer M3. The common electrode Vcom and the first transfer electrode 142 are arranged on the conductive thin film layer ITO1. The pixel electrode is arranged on the conductive thin film layer ITO2.

如第4A圖所示，配置於金屬層M1的掃描線104和配置於金屬層M2的資料線106彼此交錯定義出多個畫素。在部分實施中，畫素可包含三個子畫素PX_R、PX_G、PX_B。每個子畫素PX_R、PX_G、PX_B至少包含一個畫素電極PXe。在部分實施例中，在垂直投影方向(即，Z方向)上，金屬層M3和金屬層M2重疊。第一傳送電極142配置於金屬層M2、M3的上方。具體而言，從垂直投影方向(即，Z方向)上來看，第一傳送電極142和畫素電極PXe沿著X方向交錯排列。換言之，畫素電極PXe配置於多個第一傳送電極142中之二者之間。 As shown in FIG. 4A, the scan lines 104 arranged on the metal layer M1 and the data lines 106 arranged on the metal layer M2 are staggered to define a plurality of pixels. In some implementations, the pixel may include three sub-pixels PX_R, PX_G, and PX_B. Each sub-pixel PX_R, PX_G, PX_B includes at least one pixel electrode PXe. In some embodiments, the metal layer M3 and the metal layer M2 overlap in the vertical projection direction (ie, the Z direction). The first transfer electrode 142 is disposed above the metal layers M2, M3. Specifically, viewed from the vertical projection direction (ie, the Z direction), the first transfer electrodes 142 and the pixel electrodes PXe are staggered along the X direction. In other words, the pixel electrode PXe is disposed between two of the plurality of first transfer electrodes 142.

在部分實施例中，一或多個畫素電極PXe構成一個子畫素PX。共通電極Vcom配置於子畫素PX之中。第一傳送電極142和共通電極Vcom彼此電性獨立。具體而言，換言之，如第4A圖所示，第一傳送電極142和共通電極Vcom彼此不相接觸。於實務上，共通電極Vcom可經由圖案化製程而形成。在部分實施例中，共通電極Vcom可包含多個相互不接觸的部分。這些相互不接觸的部分在不同時間點中可作為觸控單元中的各個電極。詳細相關內容將於後續段落中進行說明。 In some embodiments, one or more pixel electrodes PXe constitute one sub-pixel PX. The common electrode Vcom is arranged in the sub-pixel PX. The first transfer electrode 142 and the common electrode Vcom are electrically independent of each other. Specifically, in other words, as shown in FIG. 4A, the first transfer electrode 142 and the common electrode Vcom are not in contact with each other. In practice, the common electrode Vcom can be formed through a patterning process. In some embodiments, the common electrode Vcom may include a plurality of portions that are not in contact with each other. These non-contact parts can be used as the electrodes in the touch unit at different time points. Detailed related content will be explained in subsequent paragraphs.

在部分實施例中，共通電極Vcom透過導電薄膜層ITO1相互連接。第一傳送電極142透過金屬層M3相互連接。舉例來說，如第4B圖所示，多個第一傳送電極142分別透過開口N41、N42、N43、N44與多個配置於金屬層M3的導線相互連接。 In some embodiments, the common electrodes Vcom are connected to each other through the conductive thin film layer ITO1. The first transfer electrodes 142 are connected to each other through the metal layer M3 Pick up. For example, as shown in FIG. 4B, the plurality of first transfer electrodes 142 are respectively connected to the plurality of wires disposed on the metal layer M3 through the openings N41, N42, N43, N44.

請參考第5A圖和第5B圖。第5A圖係根據本揭示內容之部分實施例繪示另一種顯示裝置100的局部放大示意圖。第5B圖係根據第5A圖之實施例繪示一種顯示裝置的立體示意圖。在第5A圖和第5B圖中，與第4A圖、第4B圖中相似的元件已於先前段落說明者，於此不再贅述。為便於說明起見，在第5A圖之實施例中僅標示出共通電極Vcom、第一傳送電極142和第一傳送電極142所連接的金屬層M3_1。在本實施例中，共通電極Vcom和第一傳送電極142配置於導電薄膜層ITO1。如第5B圖所示，共通電極Vcom透過導電薄膜層ITO1相互連接。第一傳送電極142透過金屬層M3相互連接。舉例來說，第一傳送電極142透過開口N51、N52、N53、N54分別與各個金屬層M3_1相互連接。 Please refer to Figure 5A and Figure 5B. FIG. 5A is a partial enlarged schematic diagram of another display device 100 according to some embodiments of the present disclosure. FIG. 5B is a perspective view of a display device according to the embodiment of FIG. 5A. In FIG. 5A and FIG. 5B, elements similar to those in FIG. 4A and FIG. 4B have been described in the previous paragraphs, and will not be repeated here. For ease of description, only the common electrode Vcom, the first transfer electrode 142, and the metal layer M3_1 connected to the first transfer electrode 142 are marked in the embodiment in FIG. 5A. In this embodiment, the common electrode Vcom and the first transfer electrode 142 are disposed on the conductive thin film layer ITO1. As shown in FIG. 5B, the common electrodes Vcom are connected to each other through the conductive thin film layer ITO1. The first transfer electrodes 142 are connected to each other through the metal layer M3. For example, the first transfer electrode 142 is connected to each metal layer M3_1 through the openings N51, N52, N53, and N54, respectively.

具體而言，請參考第6A圖。第6A圖繪示了第5A圖之實施例之顯示裝置100沿切線A5-A5’的剖面示意圖。在第6A圖中，繪示出基板110、金屬層M1、M2、M3_1、半導體層AS、絕緣層GI、BP1、BP2、BP3、PL、導電薄膜層ITO1和ITO2在XZ平面上的相對關係。 Specifically, please refer to Figure 6A. FIG. 6A is a schematic cross-sectional view of the display device 100 of the embodiment of FIG. 5A along the tangent line A5-A5'. In Figure 6A, the relative relationship between the substrate 110, the metal layers M1, M2, M3_1, the semiconductor layer AS, the insulating layers GI, BP1, BP2, BP3, PL, the conductive thin film layers ITO1 and ITO2 on the XZ plane is drawn.

結構上，如第6A圖所示，金屬層M1配置於基板110上。絕緣層GI配置於基板110與金屬層M1上，且絕緣層GI覆蓋至少部分的金屬層M1。半導體層AS配置於絕緣層GI上。金屬層M21、M22配置於絕緣層GI之上，金屬層M21、 M22分別接觸半導體層AS，而金屬層M21和M22彼此不相接觸。絕緣層BP1配置於半導體層AS、金屬層M21和M22上，且絕緣層BP1覆蓋至少部分的導體層M22。絕緣層PL於絕緣層BP1之上以形成一平坦層。金屬層M3_1配置於絕緣層PL上。絕緣層BP2配置於絕緣層PL上，且絕緣層BP2覆蓋至少部分的金屬層M3_1。導電薄膜層G_ITO1位於絕緣層BP2上。絕緣層BP3配置於絕緣層BP2與導電薄膜層G_ITO1上，且絕緣層BP3覆蓋至少部分的導電薄膜層G_ITO1。導電薄膜層ITO2位於絕緣層BP3上。 Structurally, as shown in FIG. 6A, the metal layer M1 is disposed on the substrate 110. The insulating layer GI is disposed on the substrate 110 and the metal layer M1, and the insulating layer GI covers at least part of the metal layer M1. The semiconductor layer AS is disposed on the insulating layer GI. The metal layers M21, M22 are disposed on the insulating layer GI, and the metal layers M21, M22 respectively contact the semiconductor layer AS, and the metal layers M21 and M22 do not contact each other. The insulating layer BP1 is disposed on the semiconductor layer AS, the metal layers M21 and M22, and the insulating layer BP1 covers at least part of the conductive layer M22. The insulating layer PL is on the insulating layer BP1 to form a flat layer. The metal layer M3_1 is disposed on the insulating layer PL. The insulating layer BP2 is disposed on the insulating layer PL, and the insulating layer BP2 covers at least part of the metal layer M3_1. The conductive thin film layer G_ITO1 is located on the insulating layer BP2. The insulating layer BP3 is disposed on the insulating layer BP2 and the conductive thin film layer G_ITO1, and the insulating layer BP3 covers at least part of the conductive thin film layer G_ITO1. The conductive thin film layer ITO2 is located on the insulating layer BP3.

進一步來說，絕緣層BP1、PL、BP2和BP3被蝕刻而形成開口NPX，使得部分的金屬層M22於開口NPX處未被絕緣層覆蓋。因此導電薄膜層ITO2可經由開口NPX接觸金屬層M22。此外，絕緣層BP2被蝕刻而形成開口N51、N52，使得各部分的金屬層M3_1分別於開口N51、N52處未被絕緣層BP2覆蓋。因此，作為第一傳送電極142的薄膜導電層G_ITO1可經由開口N51、N52分別接觸金屬層M3_1。 Furthermore, the insulating layers BP1, PL, BP2, and BP3 are etched to form the opening NPX, so that a part of the metal layer M22 is not covered by the insulating layer at the opening NPX. Therefore, the conductive thin film layer ITO2 can contact the metal layer M22 through the opening NPX. In addition, the insulating layer BP2 is etched to form openings N51 and N52, so that each part of the metal layer M3_1 is not covered by the insulating layer BP2 at the openings N51 and N52, respectively. Therefore, the thin film conductive layer G_ITO1 as the first transfer electrode 142 can contact the metal layer M3_1 through the openings N51 and N52, respectively.

接著，請參考第6B圖。第6B圖繪示了第5A圖之實施例之顯示裝置沿切線B5-B5’的剖面示意圖。在第6B圖中，與第6A圖中相似的元件係以相同的元件符號表示，其相對關係已於先前段落說明者，於此不再贅述。結構上，如第6B圖所示，在X方向上，作為畫素電極PXe的薄膜導電層ITO2係位於作為第一傳送電極142的二或多個薄膜導電層G_ITO1之間。在本實施例中，畫素電極PXe具有狹縫，但並不以此為限。此外，作為第一傳送電極142的薄膜導電層G_ITO1和作為共通電極Vcom的薄膜導電層C_ITO1配置於同一平面或同一絕緣層上但相互不接觸。各個金屬層M3_1皆為沿Y方向延伸的連接導線，且各個金屬層M3_1係相應作為不同位置的第一傳送電極142的連接導線。 Next, please refer to Figure 6B. Fig. 6B is a schematic cross-sectional view of the display device of the embodiment of Fig. 5A along the tangent line B5-B5'. In Fig. 6B, elements similar to those in Fig. 6A are represented by the same element symbols, and their relative relationships have been described in the previous paragraphs, and will not be repeated here. Structurally, as shown in FIG. 6B, in the X direction, the thin-film conductive layer ITO2 as the pixel electrode PXe is located between two or more thin-film conductive layers G_ITO1 as the first transfer electrode 142. In this embodiment, the pixel electrode PXe has a slit, but it is not limited to this. In addition, the thin film conductive layer G_ITO1 as the first transfer electrode 142 and the The thin-film conductive layer C_ITO1 that is the common electrode Vcom is arranged on the same plane or on the same insulating layer but not in contact with each other. Each metal layer M3_1 is a connecting wire extending along the Y direction, and each metal layer M3_1 is correspondingly used as a connecting wire of the first transfer electrode 142 at different positions.

如此一來，一部分的導電薄膜層1TO1作為共通電極Vcom，另一部分的導電薄膜層ITO1作為第一傳送電極142，這兩部分的導電薄膜層ITO1互不相接觸。共通電極Vcom透過導電薄膜層ITO1便能相互連接，而第一傳送電極142透過金屬層M3便能相互連接。 In this way, a part of the conductive thin film layer ITO1 serves as the common electrode Vcom, and the other part of the conductive thin film layer ITO1 serves as the first transfer electrode 142, and the conductive thin film layers ITO1 of the two parts do not contact each other. The common electrode Vcom can be connected to each other through the conductive thin film layer ITO1, and the first transfer electrode 142 can be connected to each other through the metal layer M3.

請參考第7A圖和第7B圖。第7A圖係根據本揭示內容之部分實施例繪示另一種顯示裝置100的局部放大示意圖。第7B圖係根據第7A圖之實施例繪示一種顯示裝置100的立體示意圖。在第7A圖之實施例中，與第5A圖所示實施例相似，共通電極Vcom和第一傳送電極142皆配置於導電薄膜層ITO1。畫素電極PXe配置於多個第一傳送電極142中之二者之間。與第5A圖所示實施例相比，在本實施例中，第一傳送電極142透過金屬層M3_1相互連接，而共通電極Vcom透過金屬層M3_2相互連接。其中，金屬層M3_2相異於金屬層M3_1。舉例來說，如第7B圖所示，第一傳送電極142透過開口N71、N74與金屬層之M3_1相互連接。共通電極Vcom透過開口N72、N73與金屬層M3_2相互連接。在部分實施例中，共通電極Vcom亦可透過導電薄膜層ITO1相互連接。 Please refer to Figure 7A and Figure 7B. FIG. 7A is a partial enlarged schematic diagram of another display device 100 according to some embodiments of the present disclosure. FIG. 7B is a perspective view of a display device 100 according to the embodiment of FIG. 7A. In the embodiment of FIG. 7A, similar to the embodiment shown in FIG. 5A, the common electrode Vcom and the first transfer electrode 142 are both arranged on the conductive thin film layer ITO1. The pixel electrode PXe is disposed between two of the plurality of first transfer electrodes 142. Compared with the embodiment shown in FIG. 5A, in this embodiment, the first transfer electrodes 142 are connected to each other through the metal layer M3_1, and the common electrode Vcom is connected to each other through the metal layer M3_2. Among them, the metal layer M3_2 is different from the metal layer M3_1. For example, as shown in FIG. 7B, the first transfer electrode 142 is connected to the M3_1 of the metal layer through the openings N71 and N74. The common electrode Vcom is connected to the metal layer M3_2 through the openings N72 and N73. In some embodiments, the common electrodes Vcom can also be connected to each other through the conductive thin film layer ITO1.

具體而言，請參考第8A圖。第8A圖繪示了第7A圖之實施例之顯示裝置沿切線A7-A7’的剖面示意圖。在第8A 圖中，與第6A圖中相似的元件係以相同的元件符號表示，其相對關係已於先前段落說明者，於此不再贅述。結構上，和第6A圖所示實施例相比，在本實施例中，第一傳送電極142透過開口N71與金屬層M3_1相互連接。共通電極Vcom透過開口N72與金屬層M3_2相互連接。 Specifically, please refer to Figure 8A. FIG. 8A is a schematic cross-sectional view of the display device of the embodiment of FIG. 7A along the tangent line A7-A7'. At 8A In the figure, the elements similar to those in Fig. 6A are represented by the same element symbols, and their relative relationships have been described in the previous paragraphs, and will not be repeated here. Structurally, compared with the embodiment shown in FIG. 6A, in this embodiment, the first transfer electrode 142 is connected to the metal layer M3_1 through the opening N71. The common electrode Vcom is connected to the metal layer M3_2 through the opening N72.

進一步說明，在垂直投影方向(即，Z方向)上，位於金屬層M3_1之下的絕緣層BP2被蝕刻而形成開口N71，使得部分的金屬層M3_1於開口N71處未被絕緣層BP2覆蓋。因此，如第8A圖所示，作為第一傳送電極142的薄膜導電層G_ITO1可經由開口N71接觸金屬層M3_1。相似地，在垂直投影方向(即，Z方向)上，位於金屬層M3_2之下的絕緣層BP2被蝕刻而形成開口N72，使得部分的金屬層M3_2於開口N72處未被絕緣層BP2覆蓋。因此，作為共通電極Vcom的薄膜導電層C_ITO1可經由開口N72接觸金屬層M3_2。 To further illustrate, in the vertical projection direction (ie, the Z direction), the insulating layer BP2 under the metal layer M3_1 is etched to form an opening N71, so that part of the metal layer M3_1 is not covered by the insulating layer BP2 at the opening N71. Therefore, as shown in FIG. 8A, the thin-film conductive layer G_ITO1 as the first transfer electrode 142 can contact the metal layer M3_1 through the opening N71. Similarly, in the vertical projection direction (ie, the Z direction), the insulating layer BP2 under the metal layer M3_2 is etched to form an opening N72, so that part of the metal layer M3_2 is not covered by the insulating layer BP2 at the opening N72. Therefore, the thin film conductive layer C_ITO1 as the common electrode Vcom can contact the metal layer M3_2 through the opening N72.

接著，請參考第8B圖。第8B圖繪示了第7A圖之實施例之顯示裝置沿切線B7-B7’的剖面示意圖。在第8B圖中，與第6B圖、第8A圖中相似的元件係以相同的元件符號表示，其相對關係已於先前段落說明者，於此不再贅述。結構上，和第6B圖所示實施例相比，在本實施例中，薄膜導電層G_ITO1用以作為第一傳送電極142，而金屬層M3_1作為第一傳送電極142的連接導線。薄膜導電層C_ITO1用以作為共通電極Vcom，而金屬層M3_2作為共通電極Vcom的連接導線。金屬層M3_1、M3_2皆為沿Y方向延伸的連接導線。 Next, please refer to Figure 8B. FIG. 8B is a schematic cross-sectional view of the display device of the embodiment of FIG. 7A along the tangent line B7-B7'. In Fig. 8B, elements similar to those in Fig. 6B and Fig. 8A are represented by the same element symbols, and their relative relationships have been described in the previous paragraphs, and will not be repeated here. Structurally, compared with the embodiment shown in FIG. 6B, in this embodiment, the thin film conductive layer G_ITO1 is used as the first transfer electrode 142, and the metal layer M3_1 is used as the connecting wire of the first transfer electrode 142. The thin film conductive layer C_ITO1 is used as a common electrode Vcom, and the metal layer M3_2 is used as a connecting wire for the common electrode Vcom. The metal layers M3_1 and M3_2 are both connecting wires extending along the Y direction.

如此一來，藉由一部分的金屬層M3作為第一傳送電極142的連接導線，另一部份的金屬層M3作為共通電極Vcom的連接導線，使得共通電極Vcom和第一傳送電極142在保持電性獨立的狀況下能夠分別透過不同部分的金屬層M3相互連接。 In this way, a part of the metal layer M3 is used as the first transmission The connecting wire of the electrode 142, and the other part of the metal layer M3 serves as the connecting wire of the common electrode Vcom, so that the common electrode Vcom and the first transfer electrode 142 can pass through the different parts of the metal layer M3 while maintaining electrical independence. connection.

請參考第9A圖和第9B圖。第9A圖係根據本揭示內容之部分實施例繪示另一種顯示裝置100的局部放大示意圖。第9B圖係根據第9A圖之實施例繪示一種顯示裝置100的立體示意圖。與第5A圖、第7A圖所示實施例相比，在第9A圖之實施例中，共通電極Vcom配置於導電薄膜層ITO1，而第一傳送電極142配置於金屬層G_M3。畫素電極PXe配置於多個第一傳送電極142中之二者之間。此外，共通電極Vcom可透過導電薄膜層ITO1相互連接，或者透過金屬層M3_2相互連接。舉例來說，如第9B圖所示，共通電極Vcom透過開口N92、N93與金屬層M3_2相互連接。 Please refer to Figure 9A and Figure 9B. FIG. 9A is a partial enlarged schematic diagram of another display device 100 according to some embodiments of the present disclosure. FIG. 9B is a perspective view of a display device 100 according to the embodiment of FIG. 9A. Compared with the embodiments shown in FIGS. 5A and 7A, in the embodiment of FIG. 9A, the common electrode Vcom is disposed on the conductive thin film layer ITO1, and the first transfer electrode 142 is disposed on the metal layer G_M3. The pixel electrode PXe is disposed between two of the plurality of first transfer electrodes 142. In addition, the common electrodes Vcom can be connected to each other through the conductive thin film layer ITO1 or through the metal layer M3_2. For example, as shown in FIG. 9B, the common electrode Vcom is connected to the metal layer M3_2 through the openings N92 and N93.

具體而言，請參考第10A圖。第10A圖繪示了第9A圖之實施例之顯示裝置沿切線A9-A9’的剖面示意圖。在第10A圖中，與第6A圖、第8A圖中相似的元件係以相同的元件符號表示，其相對關係已於先前段落說明者，於此不再贅述。結構上，和第8A圖所示實施例相比，在本實施例中，金屬層G_M3被絕緣層BP2覆蓋。因此，作為第一傳送電極142的金屬層G_M3與導電薄膜層ITO1相互不連接。換言之，作為第一傳送電極142的金屬層G_M3與作為共通電極Vcom的導電薄膜層ITO1彼此電性獨立。此外，在垂直投影方向(即，Z方向)上，位於金屬層M3_2之下的絕緣層BP2被蝕刻而形成開口 N92，使得部分的金屬層M3_2於開口N92處未被絕緣層BP2覆蓋。因此，作為共通電極Vcom的薄膜導電層C_ITO1可經由開口N92接觸金屬層M3_2。 Specifically, please refer to Figure 10A. FIG. 10A is a schematic cross-sectional view of the display device of the embodiment of FIG. 9A along the tangent line A9-A9'. In Fig. 10A, elements similar to those in Fig. 6A and Fig. 8A are represented by the same element symbols, and their relative relationships have been described in the previous paragraphs, and will not be repeated here. Structurally, compared with the embodiment shown in FIG. 8A, in this embodiment, the metal layer G_M3 is covered by the insulating layer BP2. Therefore, the metal layer G_M3 as the first transfer electrode 142 and the conductive thin film layer ITO1 are not connected to each other. In other words, the metal layer G_M3 as the first transfer electrode 142 and the conductive thin film layer ITO1 as the common electrode Vcom are electrically independent of each other. In addition, in the vertical projection direction (ie, the Z direction), the insulating layer BP2 under the metal layer M3_2 is etched to form an opening N92, so that part of the metal layer M3_2 is not covered by the insulating layer BP2 at the opening N92. Therefore, the thin film conductive layer C_ITO1 as the common electrode Vcom can contact the metal layer M3_2 through the opening N92.

接著，請參考第10B圖。第10B圖繪示了第9A圖之實施例之顯示裝置沿切線B9-B9’的剖面示意圖。在第10B圖中，與第6B圖、第8B圖、第10A圖中相似的元件係以相同的元件符號表示，其相對關係已於先前段落說明者，於此不再贅述。結構上，和第8B圖所示實施例相比，在本實施例中，金屬層G_M3用以作為第一傳送電極142，而金屬層G_M3在垂直投影方向(即，Z方向)上未被薄膜導電層ITO1或ITO2重疊。換言之，金屬層G_M3作為第一傳送電極142以及第一傳送電極142的連接導線。此外，與第8B圖所示實施例相似，薄膜導電層C_ITO1用以作為共通電極Vcom，而金屬層M3_2作為共通電極Vcom的連接導線。 Next, please refer to Figure 10B. FIG. 10B is a schematic cross-sectional view of the display device of the embodiment of FIG. 9A along the tangent line B9-B9'. In Fig. 10B, elements similar to those in Fig. 6B, Fig. 8B, and Fig. 10A are represented by the same element symbols, and their relative relationships have been described in the previous paragraphs, and will not be repeated here. Structurally, compared with the embodiment shown in Figure 8B, in this embodiment, the metal layer G_M3 is used as the first transfer electrode 142, and the metal layer G_M3 is not thinned in the vertical projection direction (ie, the Z direction). The conductive layers ITO1 or ITO2 overlap. In other words, the metal layer G_M3 serves as the first transfer electrode 142 and the connecting wire of the first transfer electrode 142. In addition, similar to the embodiment shown in FIG. 8B, the thin-film conductive layer C_ITO1 is used as the common electrode Vcom, and the metal layer M3_2 is used as the connecting wire of the common electrode Vcom.

如此一來，一部分的金屬層M3作為第一傳送電極142，而配置於導電薄膜層ITO1的共通電極Vcom藉由另一部分的金屬層M3作為共通電極Vcom的連接導線。 In this way, a part of the metal layer M3 serves as the first transfer electrode 142, and the common electrode Vcom disposed on the conductive thin film layer ITO1 uses the other part of the metal layer M3 as the connecting wire of the common electrode Vcom.

值得注意的是，在上述第5A圖~第10B圖的部分實施例中，位於顯示區140內的共通電極Vcom可完全相連，用以提供參考電壓至所有子畫素PX。在其他部分實施例中，位於顯示區140內的共通電極Vcom可劃分為多個電極，並各自連接相應的觸控導線，用以接收觸控感測訊號進行觸控偵測。具體內容說明如下。 It is worth noting that in some of the embodiments in FIGS. 5A to 10B described above, the common electrode Vcom located in the display area 140 can be completely connected to provide a reference voltage to all the sub-pixels PX. In some other embodiments, the common electrode Vcom located in the display area 140 can be divided into a plurality of electrodes, and each is connected to a corresponding touch wire for receiving touch sensing signals for touch detection. The specific content is explained as follows.

請參考第11A圖和第11B圖。第11A圖和第11B圖係根據本揭示內容之部分實施例分別繪示另一種顯示裝置100的示意圖。在本實施例中，電極陣列(如第2圖之電極陣列180)包含自容式的觸控電極陣列。如第11A圖所示，顯示裝置100包含複數個觸控電極TP和複數條觸控導線108。觸控電極TP配置於下基板110上並位於顯示區140內。每個觸控電極TP各自透過相應的觸控導線108連接至驅動電路120。在部分實施例中，觸控電極TP可由上述共通電極Vcom據以實施。換言之，共通電極Vcom可用以顯示及/或用以進行2D觸控偵測。 Please refer to Figure 11A and Figure 11B. Figure 11A and Figure 11B A schematic diagram of another display device 100 is drawn according to some embodiments of the present disclosure. In this embodiment, the electrode array (such as the electrode array 180 in FIG. 2) includes a self-capacitive touch electrode array. As shown in FIG. 11A, the display device 100 includes a plurality of touch electrodes TP and a plurality of touch wires 108. The touch electrode TP is disposed on the lower substrate 110 and located in the display area 140. Each touch electrode TP is connected to the driving circuit 120 through a corresponding touch wire 108. In some embodiments, the touch electrode TP can be implemented by the above-mentioned common electrode Vcom. In other words, the common electrode Vcom can be used for display and/or for 2D touch detection.

具體而言，在顯示區140內的共通電極Vcom可被劃分為多個區域，每個區域中的共通電極Vcom相互連接以形成一個觸控電極TP。此外，各個區域內的共通電極Vcom的觸控導線108可由上述金屬層M3據以實施，詳細內容已於第5A圖~第10B圖說明，在此不再贅述。 Specifically, the common electrode Vcom in the display area 140 may be divided into a plurality of areas, and the common electrode Vcom in each area is connected to each other to form a touch electrode TP. In addition, the touch wires 108 of the common electrode Vcom in each area can be implemented by the metal layer M3 mentioned above. The detailed content has been described in FIGS. 5A to 10B, and will not be repeated here.

在其他部分實施例中，電極陣列(如第2圖之電極陣列180)包含互容式的觸控電極陣列。如第11B圖所示，顯示裝置100包含一或多個觸控傳送電極TP_TX、複數個觸控感應電極TP_RX和複數條觸控導線108。觸控傳送電極TP_TX和觸控感應電極TP_RX配置於下基板110上並位於顯示區140內，且觸控傳送電極TP_TX和觸控感應電極TP_RX彼此電性獨立。觸控傳送電極TP_TX和觸控感應電極TP_RX透過相應的觸控導線108各自連接至驅動電路120。 In some other embodiments, the electrode array (such as the electrode array 180 in FIG. 2) includes a mutual capacitive touch electrode array. As shown in FIG. 11B, the display device 100 includes one or more touch transmission electrodes TP_TX, a plurality of touch sensing electrodes TP_RX, and a plurality of touch wires 108. The touch transmission electrode TP_TX and the touch sensing electrode TP_RX are disposed on the lower substrate 110 and located in the display area 140, and the touch transmission electrode TP_TX and the touch sensing electrode TP_RX are electrically independent of each other. The touch transmission electrode TP_TX and the touch sensing electrode TP_RX are respectively connected to the driving circuit 120 through the corresponding touch wire 108.

具體而言，觸控傳送電極TP_TX和觸控感應電極TP_RX可由上述共通電極Vcom據以實施。舉例來說，在顯示區140內的共通電極Vcom可被劃分為多個區域。多個區域中之一者的共通電極Vcom相互連接以分別形成一個觸控傳送電極TP_TX。其餘多個區域中的共通電極Vcom各自相互連接以分別形成多個觸控感應電極TP_RX。此外，各個區域內的共通電極Vcom的觸控導線108可由上述金屬層M3據以實施，詳細內容已於第5A圖~第10B圖說明，在此不再贅述。 Specifically, the touch transmission electrode TP_TX and the touch sensing electrode TP_RX can be implemented by the aforementioned common electrode Vcom. For example, the common electrode Vcom in the display area 140 may be divided into a plurality of regions. Multiple regions One of the common electrodes Vcom is connected to each other to form a touch transmission electrode TP_TX. The common electrodes Vcom in the remaining multiple regions are connected to each other to form multiple touch sensing electrodes TP_RX, respectively. In addition, the touch wires 108 of the common electrode Vcom in each area can be implemented by the metal layer M3 mentioned above. The detailed content has been described in FIGS. 5A to 10B, and will not be repeated here.

值得注意的是，第11A圖和第11B圖中繪示的觸控導線108僅為方便說明起見之示例，其大小或數量並非用以限制本揭示內容，每個觸控電極可連接一或多條觸控導線。而第11A圖中繪示的觸控電極TP和第11B圖中繪示的觸控傳送電極TP_TX和觸控感應電極TP_RX亦僅為方便說明起見之示例，其大小或數量並非用以限制本揭示內容，每個區域中包含的共通電極Vcom的形狀或面積大小可視實際需求進行設計。此外，在部分實施例中，位於顯示區140內的共通電極Vcom亦可不作劃分。換言之，共通電極Vcom僅用於顯示。 It is worth noting that the touch wires 108 shown in FIGS. 11A and 11B are only examples for convenience of description, and their size or number are not used to limit the content of this disclosure. Each touch electrode can be connected to one or Multiple touch wires. The touch electrodes TP shown in Figure 11A and the touch transmission electrodes TP_TX and touch sensing electrodes TP_RX shown in Figure 11B are also only examples for convenience of description, and their size or number is not intended to limit the present invention. To reveal the content, the shape or area of the common electrode Vcom included in each area can be designed according to actual needs. In addition, in some embodiments, the common electrode Vcom located in the display area 140 may not be divided. In other words, the common electrode Vcom is only used for display.

然，當共通電極Vcom僅用於顯示時，顯示裝置100仍可搭配外掛式觸控感應器(例如：on-cell觸控感測器或out-cell觸控感測器)，以達到觸控和手勢的整合。舉例來說，如第5A圖所示實施例中，共通電極Vcom僅用於顯示時提供參考電壓至子畫素PX。因此，在第5A圖的實施例中，顯示裝置100僅用以執行顯示及/或3D手勢偵測，但可藉由外掛式觸控感應器達到偵測2D觸控的功能。 However, when the common electrode Vcom is only used for display, the display device 100 can still be equipped with an external touch sensor (for example: on-cell touch sensor or out-cell touch sensor) to achieve touch control. Integration with gestures. For example, in the embodiment shown in FIG. 5A, the common electrode Vcom is only used to provide the reference voltage to the sub-pixel PX during display. Therefore, in the embodiment of FIG. 5A, the display device 100 is only used to perform display and/or 3D gesture detection, but the function of detecting 2D touch can be achieved by an external touch sensor.

請參考第12A圖和第12B圖。第12A圖和第12B圖係根據本揭示內容之部分實施例分別繪示一種的訊號時序示意圖。如第12A圖所示，在顯示期間Dis，顯示裝置100用以進行顯示。在手勢感測期間Ges，當3D手勢感測功能被致能時，顯示裝置100用以進行3D手勢偵測。具體而言，在期間P1，顯示裝置100的共通電極Vcom用以提供參考電壓至子畫素PX。在期間P2，顯示裝置100的共通電極Vcom亦用以提供參考電壓至子畫素PX，而第一傳送電極142用以接收手勢感測訊號並根據手勢感測訊號產生電場以進行手勢偵測。第一接收電極162用以根據電場變化對手勢進行識別及動作追蹤。 Please refer to Figure 12A and Figure 12B. FIG. 12A and FIG. 12B are schematic diagrams illustrating a signal timing according to some embodiments of the present disclosure. As shown in FIG. 12A, during the display period Dis, the display device 100 is used To display. During the gesture sensing period Ges, when the 3D gesture sensing function is enabled, the display device 100 is used to perform 3D gesture detection. Specifically, during the period P1, the common electrode Vcom of the display device 100 is used to provide a reference voltage to the sub-pixel PX. During the period P2, the common electrode Vcom of the display device 100 is also used to provide a reference voltage to the sub-pixel PX, and the first transmission electrode 142 is used to receive the gesture sensing signal and generate an electric field according to the gesture sensing signal for gesture detection. The first receiving electrode 162 is used for recognizing and tracking gestures according to changes in the electric field.

換言之，由於第一傳送電極142和共通電極Vcom互不相連，因此，在同一期間(如：期間P2)，顯示裝置100可同時進行顯示及偵測3D手勢。 In other words, since the first transmission electrode 142 and the common electrode Vcom are not connected to each other, in the same period (eg, period P2), the display device 100 can display and detect 3D gestures at the same time.

此外，在觸控感測期間Tou，顯示裝置100用以進行偵測2D觸控。具體而言，在第三期間P3，顯示裝置100的共通電極Vcom用以接收觸控感測訊號以進行2D觸控偵測。在部分實施例中，觸控感測期間Tou可配置在無法進行顯示的垂直空白間隙(Vertical Blank Interval，VBI)。 In addition, during the touch sensing period Tou, the display device 100 is used to detect 2D touch. Specifically, in the third period P3, the common electrode Vcom of the display device 100 is used to receive touch sensing signals for 2D touch detection. In some embodiments, Tou can be configured in a vertical blank interval (VBI) where display cannot be performed during the touch sensing period.

在其他部分實施例中，如第12B圖所示，當3D手勢感測功能被禁能時，顯示裝置100用以進行顯示及偵測2D觸控。具體而言，由於共通電極Vcom亦作為觸控電極TP，因此，在顯示期間Dis(如：期間P1)，所有區域的共通電極Vcom用以提供同一參考電壓至子畫素PX。在觸控感測期間Tou(如：期間P3)，不同區域的共通電極Vcom用以接收相應的觸控感測訊號進行2D觸控偵測。舉例來說，在期間P3，作為第二傳送電極TP_TX的部分共通電極Vcom用以輸出高低準位交錯的觸控感測訊號，而作為第二感應電極TP_RX的部分共通電極Vcom用以偵測電容變化以進行2D觸控偵測。另外，作為第二感應電極TP_RX的部分共通電極Vcom亦可再進行劃分，以依據不同時序依序分區進行2D觸控偵測。 In some other embodiments, as shown in FIG. 12B, when the 3D gesture sensing function is disabled, the display device 100 is used for displaying and detecting 2D touch. Specifically, since the common electrode Vcom also serves as the touch electrode TP, during the display period Dis (eg, period P1), the common electrode Vcom in all regions is used to provide the same reference voltage to the sub-pixel PX. During the touch sensing period Tou (eg, period P3), the common electrodes Vcom in different areas are used to receive corresponding touch sensing signals for 2D touch detection. For example, during the period P3, a part of the common electrode Vcom serving as the second transmitting electrode TP_TX is used to output touch sensing signals with alternating high and low levels, and is used as part of the second sensing electrode TP_RX The common electrode Vcom is used to detect changes in capacitance for 2D touch detection. In addition, part of the common electrode Vcom as the second sensing electrode TP_RX can also be further divided to perform 2D touch detection in sequence according to different timings.

需要說明的是，在不衝突的情況下，在本揭示內容各個圖式、實施例及實施例中的特徵與電路可以相互組合。圖式中所繪示的電路僅為示例之用，係簡化以使說明簡潔並便於理解，並非用以限制本案。此外，上述各實施例中的各個裝置、單元及元件可以由各種類型的數位或類比電路實現，亦可分別由不同的積體電路晶片實現，或整合至單一晶片。上述僅為例示，本揭示內容並不以此為限。 It should be noted that, in the case of no conflict, the features and circuits in the various drawings, embodiments, and embodiments of the present disclosure can be combined with each other. The circuit shown in the drawing is only an example, and is simplified to make the description concise and easy to understand, and is not intended to limit the case. In addition, the various devices, units, and components in the foregoing embodiments can be implemented by various types of digital or analog circuits, and can also be implemented by different integrated circuit chips, or integrated into a single chip. The foregoing is only an example, and the present disclosure is not limited to this.

綜上所述，本案透過應用上述各個實施例中，藉由配置及連接設計，使得第一傳送電極142和共通電極Vcom可整合在in-cell面板內且彼此電性獨立，讓顯示裝置能夠同時進行顯示及3D手勢偵測。另外，藉由部分的薄膜導電層可依不同時序分別作為共通電極Vcom和觸控電極TP，使得在不需要增加面板厚度便能夠包含2D觸控和3D手勢偵測的功能。 In summary, by applying the above-mentioned various embodiments, the first transmission electrode 142 and the common electrode Vcom can be integrated in the in-cell panel and electrically independent of each other through the configuration and connection design, so that the display device can be simultaneously Perform display and 3D gesture detection. In addition, part of the thin-film conductive layer can be used as the common electrode Vcom and the touch electrode TP according to different timings, so that the functions of 2D touch and 3D gesture detection can be included without increasing the thickness of the panel.

雖然本揭示內容已以實施方式揭露如上，然其並非用以限定本揭示內容，所屬技術領域具有通常知識者在不脫離本揭示內容之精神和範圍內，當可作各種更動與潤飾，因此本揭示內容之保護範圍當視後附之申請專利範圍所界定者為準。 Although the content of this disclosure has been disclosed in the above embodiments, it is not intended to limit the content of this disclosure. Those with ordinary knowledge in the technical field can make various changes and modifications without departing from the spirit and scope of this disclosure. Therefore, this The scope of protection of the disclosed content shall be subject to the scope of the attached patent application.

PX_R、PX_G、PX_B‧‧‧子畫素 PX_R, PX_G, PX_B‧‧‧sub pixel

M1、M2、M3‧‧‧金屬層 M1, M2, M3‧‧‧Metal layer

Vcom‧‧‧共通電極 Vcom‧‧‧Common electrode

PXe‧‧‧畫素電極 PXe‧‧‧Pixel electrode

142‧‧‧第一傳送電極 142‧‧‧First transfer electrode

TFT‧‧‧電晶體 TFT‧‧‧Transistor

N41、N42、N43、N44‧‧‧開口 N41, N42, N43, N44‧‧‧ opening

X、Y、Z‧‧‧方向 X, Y, Z‧‧‧direction

Claims

一種顯示裝置，包含：一基板，該基板上包含一顯示區和一周邊區；以及一電極陣列，配置於該基板上並位於該顯示區內，該電極陣列包含：複數條掃描線和複數條資料線，彼此交錯定義出複數個子畫素，每個子畫素至少包含一畫素電極；複數個共通電極，分別配置於該些子畫素中；以及複數個第一傳送電極，該些第一傳送電極和該些共通電極彼此為電性獨立，其中該畫素電極配置於該些第一傳送電極中之二者間，其中在同一期間，該些共通電極用以提供一參考電壓至該些子畫素，該些第一傳送電極用以接收一手勢感測訊號進行手勢偵測。 A display device includes: a substrate including a display area and a peripheral area; and an electrode array disposed on the substrate and located in the display area, the electrode array including: a plurality of scanning lines and a plurality of data Lines, interlacing each other to define a plurality of sub-pixels, each sub-pixel includes at least one pixel electrode; a plurality of common electrodes are respectively arranged in the sub-pixels; and a plurality of first transmission electrodes, the first transmission The electrodes and the common electrodes are electrically independent of each other, wherein the pixel electrode is disposed between the two of the first transfer electrodes, and in the same period, the common electrodes are used to provide a reference voltage to the sub For pixels, the first transmitting electrodes are used to receive a gesture sensing signal for gesture detection.

如請求項1所述之顯示裝置，其中該顯示裝置更包含一顯示介質層，該顯示介質層與該基板之間依序包含：一第一金屬層；一第二金屬層；一第三金屬層；一第一導電薄膜層；以及一第二導電薄膜層，其中該些掃描線配置於該第一金屬層，該些資料線配置於該第二金屬層。 The display device of claim 1, wherein the display device further includes a display medium layer, and the display medium layer and the substrate sequentially include: a first metal layer; a second metal layer; and a third metal Layer; a first conductive film layer; and a second conductive film layer, wherein the scan lines are configured in the first metal layer, and the data lines are configured in the second metal layer.

如請求項2所述之顯示裝置，其中該些共通電極和該些第一傳送電極配置於該第一導電薄膜層。 The display device according to claim 2, wherein the common electrodes and the first transmission electrodes are disposed on the first conductive thin film layer.

如請求項3所述之顯示裝置，其中該些第一傳送電極透過該第三金屬層相互連接，該些共通電極透該第一導電薄膜層相互連接。 The display device according to claim 3, wherein the first transmission electrodes are connected to each other through the third metal layer, and the common electrodes are connected to each other through the first conductive film layer.

如請求項3所述之顯示裝置，其中該些第一傳送電極透過該第三金屬層之一第一部分相互連接，該些共通電極透過該第三金屬層之一第二部分相互連接，其中該第三金屬層之該第二部分相異於該第三金屬層之該第一部分。 The display device according to claim 3, wherein the first transmission electrodes are connected to each other through a first portion of the third metal layer, and the common electrodes are connected to each other through a second portion of the third metal layer, wherein the The second part of the third metal layer is different from the first part of the third metal layer.

如請求項2所述之顯示裝置，其中該些共通電極配置於該第一導電薄膜層，該些第一傳送電極配置於該第三金屬層。 The display device according to claim 2, wherein the common electrodes are arranged on the first conductive thin film layer, and the first transfer electrodes are arranged on the third metal layer.

如請求項1所述之顯示裝置，其中在一第一期間，該些共通電極用以提供一參考電壓至該些子畫素，在相異於該第一期間的一第二期間，該些共通電極用以接收一觸控感測訊號進行觸控偵測。 The display device according to claim 1, wherein in a first period, the common electrodes are used to provide a reference voltage to the sub-pixels, and in a second period different from the first period, the common electrodes The common electrode is used for receiving a touch sensing signal for touch detection.

如請求項1所述之顯示裝置，其中顯示裝置更包含一第一接收電極，該第一接收電極配置於該基板上並位於該周邊區。 The display device according to claim 1, wherein the display device further comprises a first receiving electrode, and the first receiving electrode is disposed on the substrate and Located in the surrounding area.

如請求項1所述之顯示裝置，其中該些共通電極包含一第二傳送電極和一第二感應電極，該第二傳送電極和該第二感應電極彼此電性獨立。 The display device according to claim 1, wherein the common electrodes include a second transmission electrode and a second sensing electrode, and the second transmission electrode and the second sensing electrode are electrically independent of each other.