TWI690034B - 半導體裝置及其製造方法 - Google Patents

半導體裝置及其製造方法 Download PDF

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TWI690034B
TWI690034B TW107140463A TW107140463A TWI690034B TW I690034 B TWI690034 B TW I690034B TW 107140463 A TW107140463 A TW 107140463A TW 107140463 A TW107140463 A TW 107140463A TW I690034 B TWI690034 B TW I690034B
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Taiwan
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barrier layer
opening
layer
barrier
transistor
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TW107140463A
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TW202008521A (zh
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吳家揚
張簡旭珂
王廷君
游詠晞
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台灣積體電路製造股份有限公司
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  • Electrodes Of Semiconductors (AREA)
  • Insulated Gate Type Field-Effect Transistor (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)

Abstract

半導體裝置包括具有源極/汲極和閘極的電晶體。半導體裝置更包含用於電晶體的導電接觸。導電接觸提供與電晶體的源極/汲極或閘極的電連接。導電接觸包括複數個阻障層。阻障層彼此具有不同的深度。

Description

半導體裝置及其製造方法
本揭露涉及半導體裝置及其製造方法。
半導體積體電路(integrated circuit,IC)工業經歷了快速成長。積體電路中材料和設計的技術進步創造了許多積體電路世代,每一世代皆都具有比前幾世代更小和更複雜的電路。然而,這些進步增加了處理和製造積體電路的複雜性,並且為了實現這些進步,需要積體電路處理和製造中的類似發展。在積體電路演變過程中,功能密度(即,每個晶片面積的互連裝置的數量)通常增加,而幾何尺寸(即,可使用製造製程產生的最小元件)減小。
然而,傳統的半導體裝置仍可能具有某些缺點。例如,可以形成導電接觸以為例如電晶體的主動裝置或例如電阻器、電容器、電感器等的被動裝置提供電連接。為了形成這樣的導電接觸,可以形成接觸開口然後用導電材料填充。然而,傳統半導體裝置的接觸開口通常形成為具有花瓶型狀或橢圓形狀。這種形狀可能導致填充開口的困難,其可能降低裝置性能或產量。
因此,雖然現有的半導體裝置及其製造通常已經足夠用於它們的預期目的,但它們在每個方面都不是完全地令人滿意。
本揭露提供一種半導體裝置,包括:電晶體與導電接觸。電晶體具有源極/汲極和閘極。導電接觸用於電晶體,導電接觸提供與電晶體的源極/汲極或閘極的電連接;其中:導電接觸包括複數個阻障層;阻障層具有彼此不同的複數個深度。
本揭露提供另一種半導體裝置,包括:電晶體與導電接觸。電晶體,具有源極/汲極元件和閘極元件。導電接觸形成在電晶體的源極/汲極元件上或閘極元件上;其中:導電接觸件包括由複數個阻障層圍繞的金屬部分;以及每個阻障層的深度與阻障層和金屬部分的距離相關。
本揭露提供一種方法,包括:提供具有源極/汲極和閘極的電晶體,其中在鰭狀場效應電晶體上形成介電材料;執行複數個蝕刻和沈積循環以形成電晶體之複數個導電接觸的複數個阻障層,其中每個循環包括蝕刻製程以蝕刻介電材料中的開口,以及沉積製程以沉積相應的阻障層於蝕刻的開口,其中形成的阻障層彼此具有不同的深度;以及用導電材料填充由最後一個循環蝕刻的最後一個開口,從而形成電晶體的導電接觸。
50:鰭狀場效應電晶體裝置
60:閘極
60A:閘極電極元件
60B:閘極介電質元件
70:源極
80:汲極
100:半導體裝置
100A:半導體裝置
110:半導體層
150:鰭狀結構
160:源極/汲極區域
170:磊晶層
180:蝕刻停止層
200:閘極結構
210:層
220:間隔物
300:蝕刻製程
310:開口
320:開口
350:沉積製程
360:阻障層
360A:底部部分
360B:側壁部分
365:厚度
400:再濺射製程
500:蝕刻製程
550:沉積製程
560:阻障層
560A:底部部分
560B:側壁部分
565:厚度
600:再濺射製程
700:蝕刻製程
750:沉積製程
760:阻障層
760A:底部部分
760B:側壁部分
780:深度
781:深度
782:深度
800:退火製程
820:接觸矽化物層
840:接觸
860:阻障層
860B:側壁區域
870:ILD層
871:ILD層
872:ILD層
880:導電通孔
881:導電通孔
890:種子層
900:方法
910:步驟
920:步驟
930:步驟
X-X:方向
Y-Y:方向
Z-Z:方向
LG:長度
tox:厚度
Wfin:鰭片寬度
當結合附圖閱讀時,從以下詳細描述中可以最好地理解本揭露的各方面。需要強調的是,根據工業上的標準實踐,各種特徵未按比例繪製。實際上,為了清楚討論,可以任意增加或減少各種特徵的尺寸。還要強調的是,所附附圖僅繪示本揭露的典型實施例,因此不應認為是對範圍的限制,因為本揭露同樣可以適用於其他實施例。
第1圖繪示鰭式場效應電晶體的透視圖。
第2圖示繪示根據本揭露實施例中包括多個鰭式場效應電晶體的半導體裝置的俯視圖。
第3圖至第14圖和第15A圖至第15B圖繪示根據本揭露實施例中處於製造的各個階段的鰭式場效應電晶體的橫截面側視圖。
第16圖繪示根據本揭露的實施例中製造半導體裝置的方法的流程圖。
以下揭露內容提供用於實現本揭露之不同特徵的許多不同實施例或示例。以下描述元件和配置的具體示例以簡化本揭露。當然,這些僅僅是例子,並不意在限制。例如,在下面的描述中在第二特徵上方或之上形成第一特徵可以包括其中第一特徵和第二特徵形成為直接接觸的實施例,並且還可以包括其中可以在第一特徵和第二特徵之間形成額外特徵,使 得第一特徵和第二特徵可以不直接接觸。另外,本揭露可以在各種示例中重複附圖標記和/或文字。這種重複是為了簡單和清楚的目的,並且本身不表示所討論的各種實施例和/或配置之間的關係。
此外,為了便於描述,可以在此使用空間相對術語,諸如「在...下面」、「在...下方」、「低於」、「在...上面」、「高於」等等,以描述一個元件或特徵與如附圖所示的另一個元件或特徵的關係。除了附圖中描繪的方向之外,空間相對術語旨在涵蓋使用或操作中的裝置的不同方位。此裝置可以以其他方式定向(旋轉90度或在其他方位)並且同樣可以相應地解釋這裡使用的空間相關描述符號。
此外,當用「約」、「近似」等描述數字或數字範圍時,此術語旨在包括所描述的數字及在其合理範圍內的數字,例如所述數字的+/-10%的範圍內或本領域技術人員理解的其他數值。例如,術語「約5奈米(nm)」包括4.5nm至5.5nm的尺寸範圍。
為了追求更高的裝置密度、更高的性能和更低的成本,半導體工業已經發展到奈米技術製程節點。然而,傳統的半導體製造方法仍然可能具有缺點。例如,為了替半導體裝置提供電連接,可以在諸如電晶體的主動裝置或諸如電阻器或電容器的被動裝置上形成導電接觸。導電接觸的形成可以包括在介電結構中蝕刻接觸開口,隨後用諸如金屬的導電材料填充開口。然而,在常規半導體裝置中形成的接觸開口可能具有橢圓形狀或花瓶狀形狀的橫截面側面輪廓,例如在中間較寬但在 頂部和/或底部較窄。這種輪廓可能導致難以用導電材料填充接觸開口。接觸孔的不完全填充可能降低裝置性能或產量。
為了改善裝置性能,本揭露形成具有多個阻障層的導電接觸。透過多個蝕刻-沉積循環形成多個阻障層,其中在每個循環中蝕刻(或向下延伸)接觸開口,隨後沉積一個不同的阻障層。在這些蝕刻-沉積循環中的一些中,還執行濺射製程(sputtering process)以去除沉積的阻障層的底部部分,以便使接觸開口的後續蝕刻更容易。由於這種獨特的製造製程流程,多個阻障層形成為在橫截面視圖中具有階梯狀輪廓。所形成的接觸開口不具有花瓶狀形狀,而是具有在頂部較寬而在底部較窄的形狀,從而使其更容易填充。各種阻障層也可具有不同的材料成分,這使得它們可以具有不同的作用。
請參考下面第1圖至第14圖和第15A圖至第15B圖,其更詳細地討論本揭露的各個方面。作為說明本揭露各個方面的非限制性示例,參考第1圖至第14圖和第15A圖至第15B圖討論的鰭狀場效應電晶體(fin-like field-effect transistor,FinFET)裝置。然而,應理解,除非另外特別聲明,否則本揭露的各個方面不限於任何特定類型的裝置。
鰭狀場效應電晶體裝置的使用在半導體工業中越來越受歡迎。參考第1圖,其繪示示例性鰭狀場效應電晶體裝置50的透視圖。鰭狀場效應電晶體裝置50是非平面多閘極電晶體,其建構在基板(例如體基板(bulk substrate))上。薄的含矽「鰭狀」結構(下文中稱為「鰭片」)形成鰭狀場效應電晶體裝置50的主體。鰭片沿第1圖中所示的X方向延伸。鰭片具有 沿著與X方向正交的Y方向測量的鰭片寬度Wfin。鰭狀場效應電晶體裝置50的閘極60圍繞鰭片纏繞,例如圍繞鰭片的頂表面和相對的側壁表面。因此,閘極60的一部分在Z方向上位於鰭片上方,其中Z方向與X方向和Y方向都正交。
LG表示在X方向上測量的閘極60的長度(或寬度,取決於透視圖)。閘極60可以包括閘極電極元件60A和閘極介電質元件60B。閘極介電質60B具有在Y方向上測量的厚度tox。閘極60的一部分位於例如淺溝槽隔離(shallow trench isolation,STI)的介電隔離結構上方。鰭狀場效應電晶體裝置50的源極70和汲極80形成在閘極60相對側上之鰭片的延伸部分中。由閘極60纏繞的一部分的鰭片用作鰭狀場效應電晶體裝置50的通道。鰭狀場效應電晶體裝置50的有效通道長度由鰭片的尺寸決定。
第2圖是半導體裝置100的簡化頂視圖,其包括多個鰭狀場效應電晶體。出於簡化的原因,半導體裝置100在下文中可以互換地稱為鰭狀場效應電晶體裝置100。如第2圖所示,半導體裝置100包括多個鰭狀結構150和多個閘極結構200。鰭狀結構150是半導體層在第1圖所示的Z方向上向上突出的部分。鰭狀結構150是伸長的結構,每個伸長的結構在第1圖的X方向上延伸。同時,閘極結構200是伸長的結構,每個伸長的結構在第1圖的Y方向上延伸並且每個閘極結構200都圍繞每個鰭狀結構150(例如,以第1圖中所示的方式)的一部分纏繞。在第2圖的頂視圖中,閘極結構200和鰭狀結構150看起來垂直相交。
半導體裝置100的不同橫截面視圖可以透過在X方向上「切割」它來獲得,其被稱為X切割,或者透過在Y方向上「切割」它來獲得,其被稱為Y切割。除非另有說明,否則本揭露的第3圖至第12圖的橫截面視圖是X切割視圖。
參考第3圖,在基板上製造半導體裝置100。在一些實施例中,基板包括介電材料,例如氧化矽(SiO2)。在一些其他實施例中,基板包括半導體材料,例如矽。在替代實施例中,基板也可使用其他合適的材料。
半導體裝置100包括半導體層110。半導體層110可以形成在基板上並且可以包括半導體材料。例如,在一個實施例中,半導體層110包括晶體矽材料。可以執行注入製程(例如,抗穿通注入製程)以將多個摻雜劑離子注入到半導體層110中。在一些實施例中,摻雜劑離子可以包括n型材料,例如砷(As)或者磷(P),或者在一些其他實施例中可以包括p型材料,例如硼(B),這將取決於是需要N型金屬氧化物半導體(或n型場效應半導體)或P型金屬氧化物半導體(或p型場效應半導體)。
在半導體層上形成諸如淺溝槽隔離(STI)的隔離結構,然而由於這裡採用X切割的位置,因此在第3圖中隔離結構可能不是直接可見的。隔離結構可以包括介電材料,例如氧化矽、氮化矽、氮氧化矽或其組合。隔離結構在半導體裝置100的各種微電子元件之間提供電隔離。
半導體裝置100包括諸如鰭狀結構150的鰭狀結構,每個鰭狀結構在Z方向上垂直向上突出。可以透過圖案化 半導體層110(在形成隔離結構之前)來形成鰭狀結構150。如此,鰭狀結構150可以具有與半導體層110相同的材料成分。隔離結構形成在鰭狀結構150的側壁上(再次,隔離結構在這裡不是直接可見的),但是一部分的鰭狀結構150仍然從隔離結構中突出。換句話說,至少一部分的每個鰭狀結構150未被隔離結構覆蓋。
可以摻雜部分的鰭狀結構150以用作鰭狀場效應電晶體的源極/汲極區域160。源極/汲極區域160可以包括矽鍺或矽磷。還可以透過一個或多個磊晶生長製程在源極/汲極區域160上磊晶生長磊晶層170。磊晶層170也被認為是鰭狀場效應電晶體的源極/汲極的一部分。位於源極/汲極區域160之間的鰭狀結構150的部分可以用作鰭狀場效應電晶體的通道區域。蝕刻停止層180位於磊晶層170上方。在一些實施例中,蝕刻停止層180可包括介電材料。
半導體裝置100還包括層間介電質(inter-layer dielectric,ILD)結構,例如ILD0層和位於ILD0層上方的ILD1層。ILD0層和ILD1層可以包括介電材料,例如低介電常數(low-k)介電材料(介電常數小於二氧化矽的介電材料)。作為非限制性示例,低介電常數介電材料可包括摻氟二氧化矽、摻碳二氧化矽,多孔二氧化矽、多孔摻碳二氧化矽、旋塗有機聚合物介電質、旋塗矽基聚合物介電質或其組合。或者,ILD0層和/或ILD1層可包括氧化矽或氮化矽,或其組合。
半導體裝置100還包括閘極結構200。閘極結構200形成為圍繞每個鰭狀結構150纏繞,例如以類似於第1圖中 所示的方式。閘極結構200可以包括閘極介電質和閘極電極。閘極介電質可以包括高介電常數(high-k)介電材料,其是介電常數大於二氧化矽(SiO2)的介電常數的材料,其中二氧化矽的介電常數大約為4。在一個實施例中,高介電常數閘極介電質包括氧化鉿(HfO2),其具有在約18至約40的範圍內的介電常數。在替代實施例中,高介電常數閘極介電質可包括二氧化鋯(ZrO2)、氧化釔(Y2O3)、氧化鑭(La2O5)、氧化釓(Gd2O5)、氧化鈦(TiO2)、氧化鉭(Ta2O5)、氧化鉺鉿(HfErO)、氧化鑭鉿(HfLaO)、氧化釔鉿(HfYO)、氧化釓鉿(HfGdO)、氧化鋁鉿(HfAlO)、氧化鋯鉿(HfZrO)、氧化鈦鉿(HfTiO)、氧化鉭鉿(HfTaO)或氧化鈦鍶(SrTiO)。閘極電極可包括含金屬材料。在一些實施例中,金屬閘極電極可包括功函數金屬元件和填充金屬元件。將功函數金屬元件配置成調諧其相應的鰭狀場效應電晶體的功函數以達到所需閾值電壓(threshold voltage,Vt)。在各種實施例中,功函數金屬元件可包含:鋁化鈦(TiAl)、氮鋁化鈦(TiAlN)、氮碳化鉭(TaCN)、氮化鈦(TiN)、氮化鎢(WN)或鎢(W),或者其組合。將填充金屬元件配置為功能閘極結構的主要導電部分。在各種實施例中,填充金屬元件可包含鋁(Al)、鎢(W)、銅(Cu)或其組合。
層210位於閘極結構200上方(或者,可以將層210視為是閘極結構200的一部分)。在一些實施例中,層210可以包括導電材料並且可以幫助減小閘極結構200的電阻。由於層210與閘極結構200對齊,所以層210也可以被稱為自對準接觸(self-aligned contact,SAC)。
間隔物220位於閘極結構200的側壁上和層210的側壁上。可以透過合適的沉積製程形成間隔物220,接著進行蝕刻製程。間隔物220可以包括介電材料,例如氧化矽、氮化矽、氮氧化矽或其組合。
在一些實施例中,閘極結構200透過閘極替換製程形成。在閘極替換製程中,在高介電常數介電質上形成虛設閘極電極。例如,虛設閘極電極可以包括多晶矽。在形成源極/汲極區域160(及其磊晶層170)以及ILD0層之後,使用一個或多個蝕刻製程去除虛設閘極電極,因此在ILD0層中在去除的虛設閘極結構的位置留下開口。然後用金屬閘極材料填充開口以形成閘極結構200的金屬閘極電極。這稱為後閘極製程(gate-last process)。在一些實施例中,閘極替換製程包括高介電常數最後製程(high-k last process)。在高介電常數最後製程中,首先形成虛設閘極介電質(例如氧化矽),而不是高介電常數閘極介電質。然後在虛設閘極介電質上形成虛設閘極電極。在形成源極/汲極區域160和ILD0層之後,可以去除虛設閘極介電質和虛設閘極電極兩者,從而留下開口。然後形成高介電常數介電材料以填充開口,從而形成高介電常數閘極介電質。然後在高介電常數閘極介電質上形成金屬閘極電極。
可以在形成閘極結構200之後形成ILD1層。對半導體裝置100執行蝕刻製程300以在ILD1層中蝕刻一個或多個開口310。儘管在第3圖中繪示了兩個開口310,但是應當理解,在一些實施例中,開口310可以是與兩個鰭狀結構重疊的溝槽。在一些實施例中,蝕刻製程300可以包括濕式蝕刻製程, 或者在其他實施例中可以包括乾式蝕刻製程,或者在其他實施例中可以包括其組合。例如,在一些實施例中,蝕刻製程300可以包括首先執行乾式蝕刻製程,然後進行濕式蝕刻製程。蝕刻到ILD1層中的開口310位於鰭狀場效應電晶體的源極/汲極區域160(或磊晶層170)上方並與其垂直對齊。作為非限制性示例,還在第2圖的頂視圖中繪示了開口310的簡化表示(疊加在鰭狀結構150的源極/汲極區域上方)。開口310也可以稱為源極/汲極接觸開口。
類似地,可以對半導體裝置100執行類似於蝕刻製程300的另一蝕刻製程以在ILD1層中蝕刻開口320,但是開口320位於閘極結構200上方並與閘極結構200垂直對準。換句話說,開口320是閘極接觸開口。由於採用X切割橫截面視圖的位置,在第3圖的橫截面圖中不能直接看到閘極接觸開口320,但是這些閘極接觸開口320的簡化圖示繪示於第2圖的頂視圖中。儘管第2圖繪示了兩個源極/汲極接觸開口310和兩個閘極接觸開口320,但是可以在ILD1層中蝕刻多個其他類似的接觸開口以用於半導體裝置100其餘部分的源極/汲極區域和閘極結構。
現在參考第4圖,執行沉積製程350以在ILD0層上方形成阻障層360。在一些實施例中,阻障層360包含氮化鉭(TaN),其有助於防止洩漏或擴散。阻障層360部分地填充開口310(和開口320,儘管在第4圖中不是直接可見的)。在每個開口310中,阻障層360包括形成在開口310的底表面上的底部部分360A,以及形成在開口310的側壁上的側壁部分 360B。側壁部分360B藉由底部部分360A連接在一起。形成的阻障層360具有厚度365。在一些實施例中,厚度365在約10埃至約500埃的範圍內。
應當理解,透過沉積製程350也將阻障層360沉積到開口320(即,閘極接觸開口)中,儘管在第4圖中不能直接看到形成在開口320中的阻障層360。形成在閘極接觸開口320中的阻障層360也具有藉由底部部分360A連接在一起的側壁部分360B。在一些實施例中,沉積製程350包括濺射製程,其中目標源材料(例如,阻障層360的材料)被侵蝕(例如,透過離子轟擊)並因此沉積在ILD1層上。在一些實施例中,使用能夠執行直流(DC)電壓濺射和/或交流(AC)電壓(RF)濺射的工具來執行沉積製程350。
現在參考第5圖,對半導體裝置100執行再濺射製程400。再濺射製程400去除每個開口310中的阻障層360的底部部分360A(以及開口320中的阻障層360的底部部分360A)。例如,可配置的電容器(例如,可配置的電容)可以放置在製造半導體裝置100的晶片下面。透過配置的電容器,可以控製或調節離子轟擊的方向。因此,再濺射製程400是定向製程,並且可執行再濺射製程400以移除阻障層360的底部部分360A而基本上不影響阻障層360的側壁部分360B。
在一些實施例中,使用相同的工具執行再濺射製程400和沈積製程350。換句話說,由於可使用相同的半導體製造工具執行沉積製程和再濺射製程,所以製造半導體裝置100的晶片可以在同一製造工具中經歷沉積和再濺射製程,這 是方便的並且簡化了半導體製造製程。然而,應當理解,在替代實施例中,可以執行另一蝕刻製程來代替再濺射製程400,以去除阻障層360的底部部分360A。在這種情況下,這種蝕刻製程可以使用配置為去除阻障層360的材料的蝕刻劑(例如,氮化鉭(TaN)),而蝕刻製程300可以使用配置為去除ILD1層的介電材料的蝕刻劑(例如,氧化矽)。
現在參考第6圖,對半導體裝置100執行蝕刻製程500以進一步向下延伸開口310。例如,開口310可以被蝕刻以穿透ILD1層,並且可以部分地延伸到ILD0層中。蝕刻製程500還可以包括乾式蝕刻製程和/或濕式蝕刻製程,例如乾式蝕刻製程,然後是濕式蝕刻製程。阻障層360可以在蝕刻製程500期間用作蝕刻掩模。在一些實施例中,開口310的底部部分位於蝕刻停止層180的上表面上方(如本文中的第6圖所示)。在一些其他實施例中,開口310可以延伸到蝕刻停止層180中。類似地,可以執行類似於蝕刻製程500的另一蝕刻製程以進一步向下延伸閘極接觸開口320,例如停止在層210處(或者,停止在閘極結構200處)。
現在參考第7圖,執行沉積製程550以在半導體裝置100上方形成阻障層560。在一些實施例中,阻障層560和阻障層360可具有不同的材料成分。在一些實施例中,阻障層560包含氮化鉭(TaN)、鉭(Ta)、鈦(Ti)、氮化鈦(TiN)或其組合中的至少一種。這些材料有助於防止洩漏或擴散,以及增強導電性。
如第7圖所示,阻障層560部分地填充開口310。 形成具有厚度565的阻障層560。在一些實施例中,厚度565在約10埃至約500埃的範圍內。在每個開口310中,阻障層560包括形成在開口310的底表面上的底部部分560A,以及形成在開口310的側壁上和阻障層360的側壁部分360B上的側壁部分560B。換言之,整個阻障層360的剩餘側壁部分360B與阻障層560之一部分的側壁部分560B直接物理接觸。在一些實施例中,側壁部分360B與20%至80%的部分的側壁部分560B物理接觸。此範圍被配置為促進本揭露的多循環蝕刻和沈積過程。如果側壁部分360B和側壁部分560B之間的物理接觸太小,則表明側壁部分360B形成得太短,並且它們可能不能充分地用於其預期目的。另一方面,如果側壁部分360B和側壁部分560B之間的物理接觸太大,則表明側壁部分560B可能形成得不夠長(或者側壁部分360B形成得太長),並且它們也可能不能充分地用於其預期目的。應當理解,阻障層560也透過沉積製程550沉積到延伸開口320(即,閘極接觸開口)中,儘管在第7圖中,在開口320中形成之部分的阻障層560不是直接可見的。
與沈積製程350類似,沉積製程550還可以包括濺射製程,其可以透過與沉積製程350相同的製造工具來執行。
現在參考第8圖,對半導體裝置100執行再濺射製程600。再濺射製程600去除每個開口310中的阻障層560的底部部分560A(還有開口320中的阻障層560的底部部分)。同樣,再濺射製程600是定向製程(directional process),並且其可以執行以使得阻障層560的底部部分560A的移除基本上 不影響阻障層560的側壁部分560B。還應理解,再濺射製程600可以類似於上面討論的再濺射製程400,並且可以使用相同的製造工具來執行。在替代實施例中,可以執行另一蝕刻製程(例如,乾式蝕刻)以代替再濺射製程移除底部部分560A。這種蝕刻製程可以被配置為去除層560(氮化鉭(TaN)、鉭(Ta)、鈦(Ti)、氮化鈦(TiN))的材料而不會去除ILD1層的介電材料(例如,氧化矽)。
現在參考第9圖,對半導體裝置100執行蝕刻製程700以進一步向下延伸開口310。例如,可以蝕刻開口310以穿透ILD1層和ILD0層兩者,並且可以延伸到蝕刻停止層180中,但是在磊晶層170處停止,如上所述,磊晶層170被認為是源極/汲極的一部分。在一些實施例中,可以蝕刻開口310,以暴露磊晶層170的一部分,這意味著開口310暴露源極/汲極區域。蝕刻製程700還可以包括乾式蝕刻製程和/或濕式蝕刻製程,例如乾式蝕刻製程,接著是濕式蝕刻製程。阻障層560可以在蝕刻製程700期間用作蝕刻掩模。
現在參考第10圖,執行沉積製程750以在半導體裝置100上方形成阻障層760。在一些實施例中,阻障層760可以被稱為膠層。在一些實施例中,阻障層760、阻障層560和阻障層360可以具有彼此不同的材料成分。在一些實施例中,阻障層760包含鈷(Co)、鎳(Ni)、鈦(Ti)、氮化鈦(TiN)或其組合。這些材料有助於防止洩漏或擴散,增強導電性,以及促進矽化物的形成。
如第10圖所示,阻障層760部分地填充開口310。 在每個開口310中,阻障層760包括形成在開口310的底表面上的底部部分760A,以及形成在開口310的側壁上並且形成在阻障層560的側壁部分560B上的側壁部分760B。換句話說,作為第10圖的實施例中所示的非限制性示例,整個阻障層560的剩餘側壁部分560B與阻障層760之一部分的側壁部分760B直接物理接觸。
如第10圖所示,側壁部分360B可以具有深度780,側壁部分560B可以具有深度781,並且側壁部分760B可以具有深度782(均在Z方向上測量)。深度780至深度782是側壁部分360B、560B、760B在Z方向上向下延伸到ILD0和ILD1層中的長度。在一些實施例中,深度780與深度781之間的比例在約1:5和約3:5之間的範圍內。在一些實施例中,深度780與深度782之間的比例在約1:5和約3:7之間的範圍內。在一些實施例中,深度781和深度782之間的比例在約1:2和約3:4之間的範圍內。
類似於沉積製程350和沉積製程550,沉積製程750還可以包括濺射製程,其可以透過與執行沉積製程350和沉積製程550的相同製造工具來執行。與阻障層360和阻障層560不同,不需要對阻障層760執行再濺射製程。換句話說,保留在開口310中阻障層760的底部部分760A。這是因為底部部分760A將促進接觸矽化物的形成。例如,現在參見第11圖,對半導體裝置100執行退火製程800。在一些實施例中,退火製程800可以包括快速熱退火(rapid thermal annealing,RTA)製程,其中退火溫度快速升高。退火製程800促進磊晶 層170(其是源極/汲極區域的一部分)與阻障層760的底部部分760A之間的反應。結果,可以在磊晶層170中形成接觸矽化物層820。接觸矽化物層820有助於減小將在源極/汲極區域160上形成的接觸的電阻。在一些實施例中,與接觸矽化物層相比,接觸矽化物層820也可具有更大的體積。這可歸因於某些側壁部分760B與下方的層之間的反應。另外,根據本揭露形成的開口310的形狀/輪廓允許源極/汲極之更大的暴露區域以用於形成矽化物。因此,矽化物區域擴大。較大的接觸矽化物層820可以進一步降低接觸的電阻並增強其導電性。
現在參考第12圖,透過用導電材料填充開口310來形成導電接觸840。在一些實施例中,導電接觸840包含金屬,例如鎢(W)、鈷(Co)或其組合。應當理解,阻障層360/560/760也可以被認為是導電接觸840的一部分。儘管第12圖中所示的接觸840是源極/汲極接觸,但是應該理解,閘極接觸可以類似地形成在閘極結構200上方。
基於以上討論,可以看出,本揭露利用獨特的方法來形成用於鰭狀場效應電晶體的接觸840的阻障層360/560/760。不是透過單個步驟將開口穿透過ILD1層和ILD0層直接蝕刻到源極/汲極區域,本揭露採用多個蝕刻/沉積循環來定義接觸開口310並形成多個阻障層。如上面參考第3圖至第10圖所討論的那樣,在每個蝕刻/沉積循環中,向下蝕刻接觸開口310,接著進行沉積製程以在蝕刻的接觸開口中沉積阻障層。使用再濺射去除阻障層的底部部分(例如,底部部分360A和底部部分560A)以允許後續蝕刻/沉積循環的蝕刻製 程平穩地繼續,而不必切換蝕刻劑。阻障層的其餘部分也用作後續蝕刻步驟中的蝕刻掩模,從而保留接觸開口310的形狀或橫截面輪廓。換句話說,防止接觸開口310具有花瓶狀輪廓(常規鰭狀場效應電晶體裝置中常見的),其中具有花瓶狀輪廓的接觸開口在中間較寬但在頂部和底部較窄。反之,由本揭露形成的接觸開口310具有頂部較寬而底部較窄的輪廓。例如,隨著開口的深度增加,接觸開口310(以及在開口中隨後形成的接觸840)的橫向寬度可以減小。這種類型的輪廓允許接觸840容易地形成在接觸開口310中,例如在其中沒有間隙。
本文中形成的多個阻障層360/560/760也具有獨特的輪廓,例如在橫截面側視圖中的階梯狀(或梯形)輪廓。例如,阻障層360的深度(在Z方向上)小於阻障層560的深度,並且阻障層560的深度小於阻障層760的深度。或者說,在三個示例性阻障層中,側壁部分760B向下延伸最遠,並且側壁部分560B向下延伸得較少,並且側壁部分360B向下延伸最少。描述多個阻障層360/560/760的獨特階梯狀輪廓的另一種方式是每個阻障層的深度與阻障層和接觸840的距離相關。例如,當阻障層和接觸840之間的距離減小,則阻障層的深度增加。
由於它們的不同位置和不同的材料成分,阻障層360/560/760還可以用於不同的功能。例如,阻障層360可主要用於防止洩漏,例如接觸840和ILD1層之間的擴散。阻障層560可主要用於防止洩漏,也可用於增強接觸840的導電性。阻障層760不僅可用於防止洩漏並增強接觸840的導電性,還 可用於促進接觸矽化物的形成。阻障層360/560/760還有助於接觸840的黏附,因為接觸840本身可能與ILD0/ILD1層的黏附力不足。因此,阻障層360/560/760也可以稱為膠層。
應理解,儘管本文使用三個阻障層360/560/760來說明本揭露的概念,但阻障層的數量不限於三個。在其他實施例中,可以使用多於或少於三個的阻障層而不脫離本揭露的精神和範圍。例如,第13圖繪示出另一個實施例,其中使用了兩個阻障層(例如,層360和層760),而不是三個。在第13圖所示的實施例中,阻障層360的深度可以大於深度780但小於深度781(如第10圖所示)。作為另一個例子,第14圖繪示另一個實施例,其中使用了四個阻障層,例如層360、層560、層760和層860,而不是三個。例如,阻障層860可以在阻障層560和阻障層760之間。在第14圖所示的實施例中,阻障層860的深度(例如,透過側壁區域860B在Z方向上向下延伸多遠來測量)可以大於深度781但小於深度782(繪示於第10圖中)。阻障層860還可以具有與阻障層360、阻障層560和/或阻障層760不同的材料成分。
此外,在一些實施例中,源極/汲極接觸和閘極接觸可以具有不同數量的阻障層,或者在其他實施例中可以具有相同數量的阻障層。
第15A圖至第15B圖繪示作為上述半導體裝置100之實施例中半導體裝置100A的一部分的局部橫截面側視圖。出於清楚和一致的原因,在第15A圖至第15B圖中與第3圖至第14圖中類似的元件標記相同。而且,第15B圖示繪出第 15A圖的放大(例如,「特寫」)部分。
在第15A圖至第15B圖所示,半導體裝置100B包括多個ILD層,例如ILD層870、871、872。這些ILD層870至ILD層872中的每一個皆可實現為上面討論的ILD0層或ILD1層的實施例。在ILD層871中形成導電通孔880,並且在導電通孔880上形成另一導電通孔881。導電通孔881的形成可以利用上面討論的多循環蝕刻和沈積製程,其中形成多個阻障層例如,阻障層360、560、760。然後在阻障層760上形成種子層890,隨後在種子層890上形成導電通孔881。因此,可以看出,本揭露的各個方面不僅適用於閘極元件的導電接觸或電晶體的源極/汲極元件,它們也適用於在積體電路晶片中的各種微電子元件之間建立電互連的通孔。
第16圖是繪示根據本揭露之實施例中方法900的流程圖。方法900包括步驟910,其中提供鰭狀場效應電晶體。鰭狀場效應電晶體具有源極/汲極和閘極。在鰭狀場效應電晶體上形成介電材料。在一些實施例中,介電材料包括層間介電質(inter-layer dielectric,ILD)。
方法900包括步驟920,其中執行多個蝕刻和沈積循環以形成鰭狀場效應電晶體的導電接觸的多個阻障層。每個循環包括蝕刻製程以在介電材料中蝕刻開口,以及沉積製程以在蝕刻的開口中沉積相應的阻障層。阻障層形成為彼此具有不同的深度。
方法900包括步驟930,其中導電材料填充由最後一個循環蝕刻的最後開口,從而形成電晶體的導電接觸。
在一些實施例中,至少一些循環還包括在蝕刻製程和沈積製程之間執行的再濺射製程。再濺射製程去除沉積的阻障層的底部部分。在一些實施例中,使用相同的半導體製造工具執行沉積製程和再濺射製程。
在一些實施例中,執行多個蝕刻和沈積循環如下:執行第一蝕刻製程以在介電材料中蝕刻開口。開口位於鰭狀場效應電晶體的源極/汲極之上或閘極之上。此後,在開口中沉積第一阻障層。第一阻障層包括由底部部分連接的側壁部分。然後去除第一阻障層的底部部分。在去除第一阻障層的底部部分之後,執行第二蝕刻製程以向下延伸開口。在執行第二蝕刻製程之後,在開口中沉積第二阻障層。第二阻障層包括由底部部分連接的側壁部分。第二阻障層之部分的側壁部分形成在第一阻障層的側壁部分上。此後,去除第二阻障層的底部部分。在去除第二阻障層的底部部分之後,執行第三蝕刻製程以進一步向下延伸開口。在第三蝕刻製程之後,在開口中沉積第三阻障層。第三阻障層包括由底部部分連接的側壁部分。第三阻障層之部分的側壁部分形成在第二阻障層的側壁部分上。然後用導電材料填充開口以形成導電接觸。在一些實施例中,在沉積第三阻障層之後但在用導電材料填充開口之前執行退火製程。退火製程促進第三阻障層與下面之部分的源極/汲極之間的反應,從而形成接觸矽化物層。在一些實施例中,第一阻障層、第二阻障層和第三阻障層形成為具有彼此不同的材料成分。例如,在一個實施例中,第一阻障層形成為包含氮化鉭(TaN),第二阻障層形成為包含氮化鉭(TaN)、鉭(Ta)、鈦(Ti) 或氮化鈦(TiN),第三阻障層形成為包含鈷(Co)、鎳(Ni)、鈦(Ti)或氮化鈦(TiN)。
在一些實施例中,開口填充有含鎢的材料。含鎢材料可以形成為與第三阻障層的側壁部分和底部部分直接物理接觸。
在一些實施例中,導電接觸的上部部分由(n+1)個阻障層圍繞,中心部分由n個阻障層圍繞,並且底部分由(n-1)個阻障層圍繞,其中n是等於或大於2的自然數。
應當理解,可以在方法900的步驟910至步驟930之前、期間或之後執行額外的製程。例如,方法900可以包括一個或多個平坦化製程。出於簡化的原因,這裡不詳細討論其他附加步驟。
基於以上討論,可以看出本揭露提供優於傳統鰭狀場效應電晶體裝置的優點。然而,應該理解,其他實施例可以提供額外的優點,並且並非所有優點都必須在此揭露,並且並非所有實施例都需要特別的優點。一個優點是本揭露形成具有易於填充的輪廓的接觸開口。這是透過上述討論的多個蝕刻和沈積製程的循環實現的。另一個優點是不同的阻障層可以用於不同的目的,因為它們可以具有不同的材料成分和不同的位置。又另一個優點是本揭露改善了接觸之矽化物的形成。例如,最後形成的阻障層可以與下面的層反應以形成接觸矽化物層,與常規矽化物層相比,其可以具有更大的體積。又另一個優點是本揭露的方法易於實施,例如,阻障層沉積和再濺射可以在相同的製造工具中進行。其他優點包括與現有的鰭狀場效 應電晶體製造的兼容性,因此本揭露不需要額外的處理,因此執行起來容易且便宜。
本揭露的一個方面涉及半導體裝置。半導體裝置具有電晶體,此電晶體具有源極/汲極和閘極。半導體裝置具有用於電晶體的導電接觸。導電接觸提供與電晶體的源極/汲極或閘極的電連接。導電接觸包括多個阻障層。阻障層具有彼此不同的深度。
本揭露的另一方面涉及一種半導體裝置。半導體裝置具有電晶體,此電晶體具有源極/汲極元件和閘極元件。半導體裝置具有形成在電晶體的源極/汲極元件上或閘極元件上的導電接觸。導電接觸件包括由多個阻障層圍繞的金屬部分。每個阻障層的長度與阻障層與金屬部分的距離相關。
本揭露的另一方面涉及一種方法。此方法包括提供具有源極/汲極和閘極的電晶體的步驟。在鰭狀場效應電晶體上形成介電材料。此方法包括執行多個蝕刻和沈積循環以形成電晶體的導電接觸的多個阻障層的步驟。每個循環包括蝕刻製程以蝕刻開口於介電材料中,以及沉積製程以在蝕刻的開口中沉積相應的阻障層。阻障層形成為彼此具有不同的深度。此方法包括用導電材料填充由最後一個循環蝕刻的最後開口的步驟,從而形成電晶體的導電接觸。
前面已經概述了若干實施例的特徵,使得本領域技術人員可以更好地理解隨後的詳細描述。本領域技術人員應當理解,他們可以容易地使用本揭露作為設計或修改其他過程和結構的基礎,以實現相同的目的和/或實現本文介紹的實施 例的相同優點。本領域技術人員還應該認識到,這樣的等同構造不脫離本揭露的精神和範圍,並且在不脫離本揭露的精神和範圍的情況下,它們可以在本文中進行各種改變、替換和變更。例如,透過為位元線導體(bit line conductor)和字元線導體(word line conductor)實現不同的厚度,可以實現導體的不同電阻。然而,也可以使用改變金屬導體的電阻的其他技術。
100:半導體裝置
110:半導體層
150:鰭狀結構
160:源極/汲極區域
170:磊晶層
180:蝕刻停止層
200:閘極結構
210:層
220:間隔物
310:開口
360:阻障層
360B:側壁部分
560:阻障層
560B:側壁部分
760:阻障層
760B:側壁部分
820:接觸矽化物層
840:接觸

Claims (9)

  1. 一種半導體裝置,包括:一電晶體,具有一源極/汲極和一閘極;以及一導電接觸,用於該電晶體,該導電接觸提供與該電晶體的該源極/汲極或該閘極的電連接;其中:該導電接觸包括複數個阻障層;該些阻障層彼此具有不同的深度;以及該導電接觸的一上部部分由(n+1)個阻障層圍繞,一中心部分由n個阻障層圍繞,並且一底部部分由(n-1)個阻障層圍繞,其中n是等於或大於2的自然數。
  2. 根據請求項1所述的半導體裝置,其中該些阻障層在一橫截面圖中具有一階梯狀輪廓。
  3. 根據請求項1所述的半導體裝置,其中該些阻障層彼此具有不同的材料成分。
  4. 一種半導體裝置,包括:一電晶體,具有一源極/汲極元件和一閘極元件;以及一導電接觸形成在該電晶體的該源極/汲極元件上或該閘極元件上;其中:該導電接觸件包括一金屬部分及複數個阻障層,其中該 金屬部分由該些阻障層圍繞;以及每個該些阻障層的一深度與該些阻障層和該金屬部分的一距離相關。
  5. 根據請求項4所述的半導體裝置,其中該深度隨著與該金屬部分的該距離的增加而減小。
  6. 根據請求項4所述的半導體裝置,其中:該阻障層包括一第一阻障層、一第二阻障層和一第三阻障層;該第一阻障層位於最遠離該金屬部分的位置,並包括具有一第一深度的一側壁部分;該第三阻障層位於最靠近該金屬部分的位置,並包括具有一第三深度的一側壁部分;該第二阻障層位於該第一阻障層和該第三阻障層之間,並包括具有一第二深度的一側壁部分;該第一深度小於該第二深度;以及該第二深度小於該第三深度。
  7. 一種半導體裝置的製造方法,包括:提供具有一源極/汲極和一閘極的一電晶體,其中在該電晶體上形成一介電材料;執行複數個蝕刻和沈積循環以形成該電晶體之一導電接觸的複數個阻障層,其中每個該些循環包括一蝕刻製程以在 該介電材料中蝕刻一開口,以及一沉積製程以在蝕刻的該開口中沉積一相應的阻障層,其中形成的該些阻障層彼此具有不同的深度;以及用一導電材料填充由一最後一個循環蝕刻的一最後開口,從而形成該電晶體的該導電接觸。
  8. 根據請求項7所述的方法,其中該些循環中的至少一些更包含在該蝕刻製程和該沉積製程之間執行的一再濺射製程,並且其中該再濺射製程移除沉積的該相應的阻障層的一底部部分。
  9. 根據請求項8所述的方法,其中執行該些蝕刻和沈積循環包括:執行一第一蝕刻製程以在該介電材料中蝕刻一開口,其中該開口位於該電晶體的該源極/汲極上或該閘極上;在該開口中沉積一第一阻障層,該第一阻障層包括由一底部部分連接的複數個側壁部分;去除該第一阻障層的該底部部分;在去除該第一阻障層的該底部部分之後,執行一第二蝕刻製程以使該開口向下延伸;在該第二蝕刻製程之後,在該開口中沉積一第二阻障層,該第二阻障層包括由一底部部分連接的複數個側壁部分,其中該第二阻障層之部分的該些側壁部分形成在該第一阻障層的該些側壁部分上; 去除該第二阻障層的該底部部分;在去除該第二阻障層的該底部部分之後,執行一第三蝕刻製程以進一步向下延伸該開口;在該第三蝕刻製程之後,在該開口中沉積一第三阻障層,該第三阻障層包括由一底部部分連接的複數個側壁部分,其中該第三阻障層之部分的該些側壁部分形成在該第二阻障層的該些側壁部分上;以及用一導電材料填充該開口。
TW107140463A 2018-07-31 2018-11-14 半導體裝置及其製造方法 TWI690034B (zh)

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