TWI673556B - Display panel - Google Patents

Display panel Download PDF

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Publication number
TWI673556B
TWI673556B TW107107950A TW107107950A TWI673556B TW I673556 B TWI673556 B TW I673556B TW 107107950 A TW107107950 A TW 107107950A TW 107107950 A TW107107950 A TW 107107950A TW I673556 B TWI673556 B TW I673556B
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Taiwan
Prior art keywords
layer
insulating layer
thin film
trench
display panel
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TW107107950A
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Chinese (zh)
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TW201939144A (en
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王培筠
薛芷苓
陳佳楷
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友達光電股份有限公司
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Priority to TW107107950A priority Critical patent/TWI673556B/en
Priority to CN201810588352.1A priority patent/CN108520895B/en
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Publication of TWI673556B publication Critical patent/TWI673556B/en
Publication of TW201939144A publication Critical patent/TW201939144A/en

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    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10KORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10OLED displays
    • H10K59/12Active-matrix OLED [AMOLED] displays
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10KORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K50/00Organic light-emitting devices
    • H10K50/80Constructional details
    • H10K50/84Passivation; Containers; Encapsulations
    • H10K50/844Encapsulations

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  • Physics & Mathematics (AREA)
  • Optics & Photonics (AREA)
  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Electroluminescent Light Sources (AREA)
  • Devices For Indicating Variable Information By Combining Individual Elements (AREA)

Abstract

一種顯示面板包括基底、畫素陣列、複合絕緣層與封裝層。基底具有顯示區與外圍區,畫素陣列位於基底上且位於顯示區內,畫素陣列包括複數薄膜電晶體、複數電激發光元件與畫素定義層。複數電激發光元件分別電性連接對應的薄膜電晶體的汲極,畫素定義層位於薄膜電晶體上。複合絕緣層位於基底上且位於外圍區,複合絕緣層包括第一絕緣層與第二絕緣層,第二絕緣層位於第一絕緣層與基底之間,溝槽貫穿第一絕緣層與第二絕緣層。封裝層位於畫素陣列與複合絕緣層上,封裝層與溝槽重疊。A display panel includes a substrate, a pixel array, a composite insulating layer, and a packaging layer. The substrate has a display area and a peripheral area. The pixel array is located on the substrate and is located in the display area. The pixel array includes a plurality of thin film transistors, a plurality of electrically excited light elements, and a pixel definition layer. The plurality of electrically excited optical elements are respectively electrically connected to the drain electrodes of the corresponding thin film transistors, and the pixel definition layer is located on the thin film transistors. The composite insulating layer is located on the substrate and located in the peripheral area. The composite insulating layer includes a first insulating layer and a second insulating layer. The second insulating layer is located between the first insulating layer and the substrate. A trench penetrates the first insulating layer and the second insulating layer. Floor. The encapsulation layer is located on the pixel array and the composite insulation layer, and the encapsulation layer and the trench overlap.

Description

顯示面板Display panel

本發明是關於一種具有電子元件的基板,且特別是關於一種顯示面板。 The present invention relates to a substrate having electronic components, and more particularly to a display panel.

在現在的顯示面板的製作程序中,基底會作為顯示面板的底層。完成後的顯示面板可劃分為顯示區與圍繞著顯示區的外圍區,而由於基底是作為顯示面板的底層,則基底也可劃分為對應的顯示區與外圍區。在顯示面板的製程中,多層的結構如金屬線路、絕緣層與電子元件等,會在垂直於基底的垂直方向上依序成形在所述基底上,多層絕緣層位於外圍區的部分會在所述垂直方向上被刀具加以切割,以去除多餘的部份而形成所述顯示面板。 In the current manufacturing process of a display panel, the substrate is used as the bottom layer of the display panel. The completed display panel can be divided into a display area and a peripheral area surrounding the display area. Since the substrate is used as the bottom layer of the display panel, the substrate can also be divided into corresponding display areas and peripheral areas. In the manufacturing process of the display panel, a multilayer structure such as a metal circuit, an insulating layer, and an electronic component is sequentially formed on the substrate in a vertical direction perpendicular to the substrate, and a portion of the multilayer insulating layer located in a peripheral region is formed on the substrate. The display panel is cut by cutting with a cutter in the vertical direction to remove unnecessary portions.

在現有顯示面板的製作程序中,所述外圍區會被刀具加以切割,然而,刀具在切割時所產生的應力可能會導致切割處產生裂痕,裂痕便因為顯示面板的撓曲或形變而向顯示區的方向延伸,裂痕延伸的愈長,就愈有可能延伸至金屬線路或電子元件而造成其破損或斷裂,從而降低顯示面板的生產良率。現有顯示面板的外圍區的多層絕緣層,多半是採用無機材料,相較於有機材料,無機材料的機械性質較為硬且脆,因此一旦外圍區的切割處產生裂痕,此裂痕很容易延伸到顯示區中並破壞電性元件。 In the existing manufacturing process of the display panel, the peripheral area will be cut by a cutter. However, the stress generated by the cutter during cutting may cause a crack at the cutting portion, and the crack may be displayed to the display due to the flexion or deformation of the display panel. The direction of the area extends. The longer the crack extends, the more likely it is to extend to the metal circuit or electronic component and cause damage or breakage, thereby reducing the production yield of the display panel. The multi-layer insulation layer in the peripheral area of the existing display panel is mostly made of inorganic materials. Compared with organic materials, the mechanical properties of inorganic materials are harder and more brittle. Therefore, once a crack is generated at the peripheral area, the crack can easily extend to the display. Area and destroy electrical components.

本發明之至少一實施例提出一種顯示面板,以避免外圍區在被切割時產生裂痕。 At least one embodiment of the present invention provides a display panel to avoid cracks in the peripheral area when being cut.

本發明之至少一實施例提出一種顯示面板,即使外圍區在被切割時產生了裂痕,也能阻止外圍區的裂痕往顯示區的方向延伸,以避免顯示面板的電性元件被裂痕破壞。 At least one embodiment of the present invention provides a display panel, which prevents cracks in the peripheral region from extending toward the display region even if cracks are generated in the peripheral region when being cut, so as to avoid damage to the electrical components of the display panel.

本發明之至少一實施例提出一種顯示面板包括基底、畫素陣列、複合絕緣層與封裝層。基底具有顯示區與外圍區,外圍區實質上圍繞顯示區。畫素陣列位於基底上且位於顯示區內,畫素陣列包括複數薄膜電晶體、複數電激發光元件與畫素定義層。各薄膜電晶體包括主動層、閘絕緣層、閘極、層間絕緣層、源極與汲極。閘絕緣層位於主動層上,閘極位於閘絕緣層上,層間絕緣層位於閘極上,源極與汲極位於層間絕緣層上且分別藉由複數第一接觸洞而電性連接主動層,該些第一接觸洞貫穿層間絕緣層與閘絕緣層。複數電激發光元件分別電性連接對應的薄膜電晶體的汲極,畫素定義層位於層間絕緣層上。複合絕緣層位於基底上且位於外圍區,複合絕緣層包括第一絕緣層與第二絕緣層。第一絕緣層與層間絕緣層由同一材料層形成且直接連接,第二絕緣層位於第一絕緣層與基底之間,第二絕緣層與閘絕緣層由同一材料層形成且直接連接,且其中至少一溝槽貫穿第一絕緣層與第二絕緣層。封裝層位於畫素陣列與複合絕緣層上,封裝層與至少一溝槽重疊。 At least one embodiment of the present invention provides a display panel including a substrate, a pixel array, a composite insulating layer, and a packaging layer. The substrate has a display area and a peripheral area, and the peripheral area substantially surrounds the display area. The pixel array is located on the substrate and is located in the display area. The pixel array includes a plurality of thin film transistors, a plurality of electrically excited light elements, and a pixel definition layer. Each thin film transistor includes an active layer, a gate insulation layer, a gate electrode, an interlayer insulation layer, a source electrode, and a drain electrode. The gate insulation layer is located on the active layer, the gate electrode is located on the gate insulation layer, the interlayer insulation layer is located on the gate electrode, the source electrode and the drain electrode are located on the interlayer insulation layer, and the active layer is electrically connected through a plurality of first contact holes, respectively. The first contact holes penetrate the interlayer insulating layer and the gate insulating layer. The plurality of electrically excited light elements are electrically connected to the drain electrodes of the corresponding thin film transistors, and the pixel definition layer is located on the interlayer insulation layer. The composite insulating layer is located on the substrate and is located in a peripheral region. The composite insulating layer includes a first insulating layer and a second insulating layer. The first insulating layer and the interlayer insulating layer are formed and directly connected by the same material layer, the second insulating layer is located between the first insulating layer and the substrate, the second insulating layer and the gate insulating layer are formed and directly connected by the same material layer, and among them At least one trench penetrates the first insulating layer and the second insulating layer. The packaging layer is located on the pixel array and the composite insulating layer, and the packaging layer overlaps at least one trench.

綜上所述,根據本發明所提出的顯示面板的諸多實施例,其可降低外圍區在被切割時產生裂痕的可能,且即使有裂痕產生,也可使裂痕無法延伸至顯示區,從而可避免顯示面板的電性元件因為裂痕而破損或 斷裂。 In summary, according to the embodiments of the display panel provided by the present invention, it is possible to reduce the possibility of cracks in the peripheral area when being cut, and even if cracks occur, the cracks cannot be extended to the display area, so that Avoid damage to the electrical components of the display panel due to cracks or fracture.

以下在實施方式中詳細敘述本發明之詳細特徵以及優點,其內容足以使任何熟悉相關技藝者暸解本發明之技術內容並據以實施,且根據本說明書所揭露之內容、申請專利範圍及圖式,任何熟習相關技藝者可輕易地理解本發明相關之目的及優點。 The detailed features and advantages of the present invention are described in detail in the following embodiments. The content is sufficient for any person skilled in the art to understand and implement the technical content of the present invention, and according to the content disclosed in this specification, the scope of patent applications and the drawings. Anyone skilled in the relevant art can easily understand the related objects and advantages of the present invention.

10、10a~10k、10m~10s‧‧‧顯示面板 10, 10a ~ 10k, 10m ~ 10s‧‧‧ display panel

100‧‧‧基底 100‧‧‧ substrate

110‧‧‧顯示區 110‧‧‧display area

120‧‧‧外圍區 120‧‧‧ Outer Zone

130‧‧‧電路區 130‧‧‧Circuit Area

200‧‧‧畫素陣列 200‧‧‧ pixel array

201‧‧‧第一接觸洞 201‧‧‧First contact hole

202‧‧‧第二接觸洞 202‧‧‧Second contact hole

210‧‧‧薄膜電晶體 210‧‧‧ thin film transistor

211‧‧‧主動層 211‧‧‧active layer

212‧‧‧閘絕緣層 212‧‧‧Gate insulation

213‧‧‧閘極 213‧‧‧Gate

214‧‧‧層間絕緣層 214‧‧‧Interlayer insulation

215‧‧‧源極 215‧‧‧Source

216‧‧‧汲極 216‧‧‧Drain

220‧‧‧電激發光元件 220‧‧‧electrically excited optical element

221‧‧‧下電極 221‧‧‧lower electrode

222‧‧‧上電極 222‧‧‧up electrode

223‧‧‧發光層 223‧‧‧Light-emitting layer

230‧‧‧畫素定義層 230‧‧‧ pixel definition layer

231‧‧‧開口 231‧‧‧ opening

240‧‧‧緩衝層 240‧‧‧ buffer layer

250‧‧‧平坦層 250‧‧‧ flat layer

300‧‧‧複合絕緣層 300‧‧‧ Composite insulation layer

310‧‧‧第一絕緣層 310‧‧‧The first insulation layer

320‧‧‧第二絕緣層 320‧‧‧Second insulation layer

330‧‧‧第三絕緣層 330‧‧‧Third insulation layer

340‧‧‧有機絕緣填料 340‧‧‧Organic insulating filler

400‧‧‧封裝層 400‧‧‧encapsulation layer

410‧‧‧第一無機薄膜封裝層 410‧‧‧The first inorganic thin film encapsulation layer

420‧‧‧第二無機薄膜封裝層 420‧‧‧Second inorganic thin film encapsulation layer

430‧‧‧有機薄膜封裝層 430‧‧‧Organic thin film encapsulation layer

500、500a、500b、500c‧‧‧溝槽 500, 500a, 500b, 500c‧‧‧Trench

501‧‧‧第一溝槽 501‧‧‧first groove

5011‧‧‧第一間隔 5011‧‧‧First interval

502‧‧‧第二溝槽 502‧‧‧Second Groove

5021‧‧‧第二間隔 5021‧‧‧Second interval

600‧‧‧擋牆 600‧‧‧ retaining wall

700‧‧‧閘極驅動電路 700‧‧‧Gate driving circuit

Dc‧‧‧周向方向 Dc‧‧‧ circumferential direction

Dr‧‧‧徑向方向 Dr‧‧‧ radial direction

Dv‧‧‧垂直方向 Dv‧‧‧ vertical

[圖1]為本發明第一實施例之顯示面板的上視圖;[圖2]為圖1之顯示面板於線段2-2處的剖視圖;[圖3]為本發明第二實施例之顯示面板的剖視圖;[圖4]為本發明第三實施例之顯示面板的剖視圖;[圖5]為圖4之顯示面板的上視圖;[圖6]為本發明第四實施例之顯示面板的上視圖;[圖7]為本發明第五實施例之顯示面板的剖視圖;[圖8]為本發明第六實施例之顯示面板的剖視圖;[圖9]為本發明第七實施例之顯示面板的剖視圖;[圖10]為本發明第八實施例之顯示面板的剖視圖;[圖11]為本發明第九實施例之顯示面板的剖視圖;[圖12]為本發明第十實施例之顯示面板的剖視圖;[圖13]為本發明第十一實施例之顯示面板的剖視圖;[圖14]為本發明第十二實施例之顯示面板的剖視圖;[圖15]為本發明第十三實施例之顯示面板的剖視圖; [圖16]為本發明第十四實施例之顯示面板的剖視圖;[圖17]為本發明第十五實施例之顯示面板的剖視圖;[圖18]為本發明第十六實施例之顯示面板的剖視圖;[圖19]為本發明第十七實施例之顯示面板的剖視圖;[圖20]為本發明第十八實施例之顯示面板的剖視圖;以及[圖21]為本發明第十九實施例之顯示面板的剖視圖。 [FIG. 1] is a top view of a display panel according to a first embodiment of the present invention; [FIG. 2] is a sectional view of the display panel at line 2-2 of FIG. 1; [FIG. 3] is a display according to a second embodiment of the present invention Sectional view of the panel; [FIG. 4] is a sectional view of a display panel according to a third embodiment of the present invention; [FIG. 5] is a top view of the display panel of FIG. 4; [FIG. 6] is a view of a display panel according to a fourth embodiment of the present invention Top view; [FIG. 7] A cross-sectional view of a display panel of a fifth embodiment of the present invention; [FIG. 8] A cross-sectional view of a display panel of a sixth embodiment of the present invention; [FIG. 9] A display of a seventh embodiment of the present invention Sectional view of a panel; [FIG. 10] is a sectional view of a display panel of an eighth embodiment of the present invention; [FIG. 11] is a sectional view of a display panel of a ninth embodiment of the present invention; [FIG. 12] is a tenth embodiment of the present invention Sectional view of a display panel; [FIG. 13] is a sectional view of a display panel of an eleventh embodiment of the present invention; [FIG. 14] is a sectional view of a display panel of a twelfth embodiment of the present invention; [FIG. 15] is a tenth aspect of the present invention A cross-sectional view of a display panel of the three embodiments; [FIG. 16] A sectional view of a display panel of a fourteenth embodiment of the present invention; [FIG. 17] A sectional view of a display panel of a fifteenth embodiment of the present invention; [FIG. 18] A display of a sixteenth embodiment of the present invention A cross-sectional view of a panel; [FIG. 19] A cross-sectional view of a display panel of a seventeenth embodiment of the present invention; [FIG. 20] A cross-sectional view of a display panel of an eighteenth embodiment of the present invention; and [FIG. 21] a tenth of the present invention A cross-sectional view of a display panel of a ninth embodiment.

請參照圖1與圖2,圖1為本發明第一實施例之顯示面板10的上視圖,圖2為圖1之顯示面板10於線段2-2處的剖視圖。在本實施例中,顯示面板10是一種自發光顯示面板,但不限於此。顯示面板10包括基底100、畫素陣列200、複合絕緣層300與封裝層400。基底100具有顯示區110與外圍區120,外圍區120實質上圍繞顯示區110。圖1的顯示面板10省略繪示封裝層400及部分元件,以方便顯示封裝層400下的元件與結構。 Please refer to FIGS. 1 and 2. FIG. 1 is a top view of a display panel 10 according to a first embodiment of the present invention, and FIG. 2 is a cross-sectional view of the display panel 10 of FIG. 1 at a line segment 2-2. In this embodiment, the display panel 10 is a self-emitting display panel, but is not limited thereto. The display panel 10 includes a substrate 100, a pixel array 200, a composite insulating layer 300, and a packaging layer 400. The substrate 100 has a display area 110 and a peripheral area 120. The peripheral area 120 substantially surrounds the display area 110. The display panel 10 in FIG. 1 omits the illustration of the packaging layer 400 and some components to facilitate the display of the components and structures under the packaging layer 400.

如圖1所示,顯示面板10對應於基底100的顯示區110與外圍區120而區分為兩個部份,顯示面板10在對應於顯示區110的部分可用來產生影像,而在對應於外圍區120的部分則無法產生影像。如圖2所示,畫素陣列200位於基底100上且位於顯示區110內。畫素陣列200包括複數薄膜電晶體210、複數電激發光元件220與畫素定義層230。封裝層400位於畫素陣列200與複合絕緣層300上,且實質上覆蓋畫素陣列200與複合絕緣層300。 As shown in FIG. 1, the display panel 10 is divided into two parts corresponding to the display area 110 and the peripheral area 120 of the substrate 100. The display panel 10 can be used to generate an image at a portion corresponding to the display area 110, and at a portion corresponding to the periphery. A portion of the area 120 cannot generate an image. As shown in FIG. 2, the pixel array 200 is located on the substrate 100 and within the display area 110. The pixel array 200 includes a plurality of thin film transistors 210, a plurality of electro-optical excitation elements 220, and a pixel definition layer 230. The encapsulation layer 400 is located on the pixel array 200 and the composite insulating layer 300 and substantially covers the pixel array 200 and the composite insulating layer 300.

如圖2所示,在本實施例中,各薄膜電晶體210包括主動層211、閘絕緣層212、閘極213、層間絕緣層214、源極215與汲極216。閘絕緣層212位於主動層211上,閘極213位於閘絕緣層212上,層間絕緣層214 位於閘極213上,源極215與汲極216位於層間絕緣層214上。複數第一接觸洞201舉例係貫穿層間絕緣層214與閘絕緣層212,導電材料填充於第一接觸洞201中,源極215與汲極216可分別藉由對應的第一接觸洞201而電性連接對應的主動層211。 As shown in FIG. 2, in this embodiment, each thin film transistor 210 includes an active layer 211, a gate insulation layer 212, a gate electrode 213, an interlayer insulation layer 214, a source electrode 215, and a drain electrode 216. The gate insulation layer 212 is located on the active layer 211, the gate electrode 213 is located on the gate insulation layer 212, and the interlayer insulation layer 214 Located on the gate electrode 213, the source electrode 215 and the drain electrode 216 are located on the interlayer insulating layer 214. The plurality of first contact holes 201 are, for example, penetrating the interlayer insulating layer 214 and the gate insulating layer 212. A conductive material is filled in the first contact hole 201, and the source electrode 215 and the drain electrode 216 can be electrically charged through the corresponding first contact hole 201, respectively. The sexual connection corresponds to the active layer 211.

複數電激發光元件220分別電性連接對應的薄膜電晶體210的汲極216,且畫素定義層230位於層間絕緣層214上。畫素定義層230可用來分隔這些電激發光元件220,使這些電激發光元件220於空間上可各自獨立,以分別形成獨立的畫素。在本實施例中,畫素定義層230與電激發光元件22共同位於平坦層250上;在其他實施例中,電激發光元件220可位於畫素定義層230之上。在本實施例中,電激發光元件220為有機發光二極體(OLED);在其他實施中,電激發光元件220可以是任何一種適當的發光元件。在本實施例中,畫素定義層230為有機材料,但不限於此;在其他實施例中,畫素定義層230為無機材料。 The plurality of electrical excitation light elements 220 are electrically connected to the drain electrodes 216 of the corresponding thin film transistors 210 respectively, and the pixel definition layer 230 is located on the interlayer insulating layer 214. The pixel definition layer 230 can be used to separate the electrically excited light elements 220, so that the electrically excited light elements 220 can be separated from each other in space to form independent pixels. In this embodiment, the pixel-defining layer 230 and the electro-optical light-emitting element 22 are co-located on the flat layer 250; in other embodiments, the electro-optical-light-emitting element 220 may be located on the pixel-defining layer 230. In this embodiment, the electrically excited light element 220 is an organic light emitting diode (OLED); in other implementations, the electrically excited light element 220 may be any suitable light emitting element. In this embodiment, the pixel definition layer 230 is an organic material, but is not limited thereto. In other embodiments, the pixel definition layer 230 is an inorganic material.

複合絕緣層300位於基底100上且位於外圍區120,複合絕緣層300包括第一絕緣層310與第二絕緣層320,第二絕緣層320位於第一絕緣層310與基底100之間。在本實施例中,第一絕緣層310與層間絕緣層214由同一材料層形成且直接連接,而第二絕緣層320與閘絕緣層212由同一材料層形成且直接連接,但不限於此。在顯示面板10的製程中,第二絕緣層320與閘絕緣層212會先在同一製程步驟中以同一材料同時成形,而第一絕緣層310與層間絕緣層214則會在第二絕緣層320與閘絕緣層212成形之後的另一製程步驟中以同一材料同時成形。 The composite insulating layer 300 is located on the substrate 100 and is located in the peripheral region 120. The composite insulating layer 300 includes a first insulating layer 310 and a second insulating layer 320, and the second insulating layer 320 is located between the first insulating layer 310 and the substrate 100. In this embodiment, the first insulating layer 310 and the interlayer insulating layer 214 are formed of the same material layer and are directly connected, and the second insulating layer 320 and the gate insulating layer 212 are formed of the same material layer and are directly connected, but are not limited thereto. In the manufacturing process of the display panel 10, the second insulating layer 320 and the gate insulating layer 212 are simultaneously formed with the same material in the same process step, and the first insulating layer 310 and the interlayer insulating layer 214 are formed on the second insulating layer 320. In another process step after forming the gate insulating layer 212, the same material is simultaneously formed.

如圖1與圖2所示,在本實施例中,顯示面板10更包括至少一 溝槽500。溝槽500位於外圍區120的複合絕緣層300,且封裝層400與溝槽500重疊。如圖1與圖2所示,封裝層400是在垂直於基底100的垂直方向Dv上與溝槽500重疊,封裝層400是位於顯示面板10在垂直方向Dv上的頂層,且封裝層400會完全覆蓋溝槽500。 As shown in FIGS. 1 and 2, in this embodiment, the display panel 10 further includes at least one Groove 500. The trench 500 is located in the composite insulating layer 300 of the peripheral region 120, and the packaging layer 400 overlaps the trench 500. As shown in FIGS. 1 and 2, the encapsulation layer 400 overlaps the trench 500 in a vertical direction Dv perpendicular to the substrate 100. The encapsulation layer 400 is a top layer on the display panel 10 in the vertical direction Dv, and the encapsulation layer 400 will The trench 500 is completely covered.

在本實施例中,溝槽500在垂直於基底100的垂直方向Dv上朝基底100延伸。換言之,溝槽500貫穿複合絕緣層300的至少一層。在本實施例中,如圖2所示,溝槽500貫穿第一絕緣層310與第二絕緣層320。 In this embodiment, the trench 500 extends toward the substrate 100 in a vertical direction Dv perpendicular to the substrate 100. In other words, the trench 500 penetrates at least one layer of the composite insulating layer 300. In this embodiment, as shown in FIG. 2, the trench 500 penetrates the first insulating layer 310 and the second insulating layer 320.

藉此,當顯示面板10的外側邊緣(即外圍區120遠離顯示區110的一側)被刀具切割時,刀具所施加的應力至少會有部份被溝槽500吸收,如此可減低產生裂痕的機會。即使顯示面板10的外側邊緣因為切割或撓曲而產生裂痕,此裂痕也會被溝槽500阻擋,而不會延伸至顯示區110中。 Therefore, when the outer edge of the display panel 10 (that is, the side of the peripheral area 120 away from the display area 110) is cut by a cutter, at least part of the stress applied by the cutter is absorbed by the groove 500, which can reduce the occurrence of cracks. opportunity. Even if a crack is generated on the outer edge of the display panel 10 due to cutting or bending, the crack will be blocked by the trench 500 without extending into the display area 110.

請參照圖1,溝槽500實質上環繞顯示區110,例如溝槽500以環形方式連續不中斷地環繞顯示區110一周,但不限於此;在其他實施例中,溝槽500也可以分段地環繞顯示區110,容後詳述。 Referring to FIG. 1, the groove 500 substantially surrounds the display area 110. For example, the groove 500 continuously surrounds the display area 110 in a circular manner without interruption, but is not limited thereto. In other embodiments, the groove 500 may be segmented. Ground surrounds the display area 110, which will be described in detail later.

如圖2所示,在本實施例中,畫素陣列200更包括緩衝層240,緩衝層240位於基底100與主動層211之間。複合絕緣層300更包括第三絕緣層330,第三絕緣層330位於基底100與第二絕緣層320之間。在一些實施例中,第三絕緣層330與緩衝層240由同一材料層形成。舉例來說,在顯示面板10的製程中,第三絕緣層330與緩衝層240會在同一製程步驟中以同一材料同時成形,且第三絕緣層330與緩衝層240的製程步驟會先於第二絕緣層320與閘絕緣層212的製程步驟。 As shown in FIG. 2, in this embodiment, the pixel array 200 further includes a buffer layer 240, and the buffer layer 240 is located between the substrate 100 and the active layer 211. The composite insulating layer 300 further includes a third insulating layer 330. The third insulating layer 330 is located between the substrate 100 and the second insulating layer 320. In some embodiments, the third insulating layer 330 and the buffer layer 240 are formed of the same material layer. For example, in the manufacturing process of the display panel 10, the third insulating layer 330 and the buffer layer 240 are simultaneously formed with the same material in the same process step, and the manufacturing steps of the third insulating layer 330 and the buffer layer 240 are prior to the first step. The manufacturing steps of the two insulating layers 320 and the gate insulating layer 212.

如圖1與圖2所示,在本實施例中,基底100更具有電路區 130,電路區130位於顯示區110與外圍區120之間,緩衝層240、閘絕緣層212與層間絕緣層214均可從顯示區110延伸至電路區130。顯示面板10更包括閘極驅動電路700,閘極驅動電路700位於基底100上且位於電路區130內,閘極驅動電路700電性連接畫素陣列200。例如,閘極驅動電路700可透過顯示面板10中的對應線路(圖未示)連接畫素陣列200中的薄膜電晶體210。畫素定義層230也會從顯示區110延伸至電路區130,且閘極驅動電路700可被畫素定義層230覆蓋。在本實施例中,閘極驅動電路700為閘極陣列(Gate on Array,GOA),但不限於此。 As shown in FIGS. 1 and 2, in this embodiment, the substrate 100 further has a circuit region. 130. The circuit area 130 is located between the display area 110 and the peripheral area 120. The buffer layer 240, the gate insulation layer 212, and the interlayer insulation layer 214 can all extend from the display area 110 to the circuit area 130. The display panel 10 further includes a gate driving circuit 700. The gate driving circuit 700 is located on the substrate 100 and within the circuit area 130. The gate driving circuit 700 is electrically connected to the pixel array 200. For example, the gate driving circuit 700 may be connected to the thin film transistor 210 in the pixel array 200 through corresponding lines (not shown) in the display panel 10. The pixel definition layer 230 will also extend from the display area 110 to the circuit area 130, and the gate driving circuit 700 may be covered by the pixel definition layer 230. In this embodiment, the gate driving circuit 700 is a gate on array (GOA), but it is not limited thereto.

如圖1與圖2所示,在本實施例中,封裝層400包括第一無機薄膜封裝層410、第二無機薄膜封裝層420與有機薄膜封裝層430。第一無機薄膜封裝層410位於畫素陣列200與複合絕緣層300上且覆蓋溝槽500,而有機薄膜封裝層430位於第一無機薄膜封裝層410與第二無機薄膜封裝層420之間。在本實施例中,第一無機薄膜封裝層410會先成形,接著有機薄膜封裝層430成形在第一無機薄膜封裝層410上,最後第二無機薄膜封裝層420成形在有機薄膜封裝層430上,且第二無機薄膜封裝層420與第一無機薄膜封裝層410會共同包住有機薄膜封裝層430,但不以此為限。 As shown in FIGS. 1 and 2, in this embodiment, the encapsulation layer 400 includes a first inorganic thin film encapsulation layer 410, a second inorganic thin film encapsulation layer 420, and an organic thin film encapsulation layer 430. The first inorganic thin film encapsulation layer 410 is located on the pixel array 200 and the composite insulating layer 300 and covers the trench 500, and the organic thin film encapsulation layer 430 is located between the first inorganic thin film encapsulation layer 410 and the second inorganic thin film encapsulation layer 420. In this embodiment, the first inorganic thin film encapsulation layer 410 is formed first, then the organic thin film encapsulation layer 430 is formed on the first inorganic thin film encapsulation layer 410, and finally the second inorganic thin film encapsulation layer 420 is formed on the organic thin film encapsulation layer 430. In addition, the second inorganic thin film encapsulation layer 420 and the first inorganic thin film encapsulation layer 410 will jointly cover the organic thin film encapsulation layer 430, but not limited thereto.

如圖2所示,在本實施例中,複合絕緣層300更包括有機絕緣填料340,有機絕緣填料340位於溝槽500內。如圖2所示,有機絕緣填料340完全填充溝槽500且接觸溝槽500至少一側壁(如圖2的溝槽500的右側側壁)的第一絕緣層310與第二絕緣層320。有機絕緣填料340舉例係與畫素定義層230由同一材料層形成,換句話說,在顯示面板10的製程中,有機絕緣填料340與畫素定義層230會在同一製程步驟中以同一材料同時成 形。在本實施例中,當有機絕緣填料340、畫素定義層230與電激發光元件220成形之後,封裝層400會成形於畫素陣列200與複合絕緣層300之上,且封裝層400的第一無機薄膜封裝層410會覆蓋溝槽500與有機絕緣填料340。因溝槽500中的有機絕緣填料340具有更佳的柔韌性,因此有機絕緣填料340可吸收應力,以減少裂痕的產生或阻擋裂痕的延伸。 As shown in FIG. 2, in this embodiment, the composite insulating layer 300 further includes an organic insulating filler 340, and the organic insulating filler 340 is located in the trench 500. As shown in FIG. 2, the organic insulating filler 340 completely fills the trench 500 and contacts the first insulating layer 310 and the second insulating layer 320 of at least one side wall of the trench 500 (such as the right side wall of the trench 500). For example, the organic insulating filler 340 is formed of the same material layer as the pixel definition layer 230. In other words, during the manufacturing process of the display panel 10, the organic insulating filler 340 and the pixel definition layer 230 are made of the same material at the same time in the same process step. to make shape. In this embodiment, after the organic insulating filler 340, the pixel definition layer 230, and the electro-active light element 220 are formed, the encapsulation layer 400 is formed on the pixel array 200 and the composite insulation layer 300. An inorganic thin film encapsulation layer 410 covers the trench 500 and the organic insulating filler 340. Because the organic insulating filler 340 in the trench 500 has better flexibility, the organic insulating filler 340 can absorb stress to reduce the occurrence of cracks or block the cracks from extending.

如圖2所示,在本實施例中,各電激發光元件220包括下電極221、上電極222與發光層223。下電極221位於層間絕緣層214與畫素定義層230之間,上電極222可位於畫素定義層230與封裝層400之間,而發光層223位於下電極221以及上電極222之間。並且,畫素定義層230具有複數開口231,而發光層223分別位於這些開口231中。在本實施例中,上電極222舉例係為全面性地設置於畫素定義層230上,上電極222的材料舉例為金屬。 As shown in FIG. 2, in this embodiment, each of the electro-optical light-emitting elements 220 includes a lower electrode 221, an upper electrode 222, and a light-emitting layer 223. The lower electrode 221 is located between the interlayer insulating layer 214 and the pixel definition layer 230, the upper electrode 222 may be located between the pixel definition layer 230 and the encapsulation layer 400, and the light emitting layer 223 is located between the lower electrode 221 and the upper electrode 222. In addition, the pixel definition layer 230 has a plurality of openings 231, and the light-emitting layer 223 is located in these openings 231, respectively. In this embodiment, the upper electrode 222 is exemplarily disposed on the pixel definition layer 230 in a comprehensive manner, and the material of the upper electrode 222 is a metal.

如圖2所示,在本實施例中,畫素陣列200更包括平坦層250,且平坦層250位於層間絕緣層214與畫素定義層230之間。平坦層250具有複數第二接觸洞202,第二接觸洞202之中具有導電材料。這些電激發光元件220的下電極221可分別藉由對應的第二接觸洞202電性連接至對應的薄膜電晶體210的汲極216。在本實施例中,畫素定義層230與平坦層250可從顯示區110延伸至電路區130,且閘極驅動電路700可被畫素定義層230以及平坦層250覆蓋。 As shown in FIG. 2, in this embodiment, the pixel array 200 further includes a flat layer 250, and the flat layer 250 is located between the interlayer insulating layer 214 and the pixel definition layer 230. The flat layer 250 has a plurality of second contact holes 202, and the second contact holes 202 include a conductive material. The lower electrodes 221 of the electro-active light-emitting elements 220 can be electrically connected to the drain electrodes 216 of the corresponding thin-film transistors 210 through the corresponding second contact holes 202, respectively. In this embodiment, the pixel definition layer 230 and the flat layer 250 may extend from the display area 110 to the circuit area 130, and the gate driving circuit 700 may be covered by the pixel definition layer 230 and the flat layer 250.

請參照圖3,圖3為本發明第二實施例之顯示面板10a的剖視圖,其中圖3的實施例沿用圖1與圖2的實施例的元件標號與部分內容,其中採用相同或近似的標號來表示相同或近似的元件,並且省略了相同技術內 容的說明。關於省略部分的說明可參考前述實施例,在此不贅述。 Please refer to FIG. 3. FIG. 3 is a cross-sectional view of a display panel 10a according to a second embodiment of the present invention. The embodiment of FIG. 3 follows the component numbers and parts of the embodiments of FIG. 1 and FIG. To represent the same or similar components, and omit the same technology Content description. For the description of the omitted parts, reference may be made to the foregoing embodiments, and details are not described herein.

如圖3所示,在第二實施例中,溝槽500a更貫穿第三絕緣層330。在本實施例中,溝槽500a貫穿第一絕緣層310、第二絕緣層320與第三絕緣層330,溝槽500a舉例係暴露出基底100的上表面,有機絕緣填料340可與基底100接觸,相較於第一實施例,溝槽500a在垂直方向Dv上比溝槽500更深,且有機絕緣填料340在垂直方向Dv上亦更深入複合絕緣層300中,因此,溝槽500a與其中的有機絕緣填料340能吸收更多的應力且具有更大的阻擋面積,故能更有效地避免裂痕的產生與阻止裂痕的延伸。 As shown in FIG. 3, in the second embodiment, the trench 500 a further penetrates the third insulating layer 330. In this embodiment, the trench 500a penetrates the first insulating layer 310, the second insulating layer 320, and the third insulating layer 330. The trench 500a, for example, exposes the upper surface of the substrate 100, and the organic insulating filler 340 may contact the substrate 100 Compared with the first embodiment, the trench 500a is deeper than the trench 500 in the vertical direction Dv, and the organic insulating filler 340 is further deeper into the composite insulating layer 300 in the vertical direction Dv. Therefore, the trench 500a and the The organic insulating filler 340 can absorb more stress and has a larger blocking area, so it can more effectively avoid the generation of cracks and prevent the cracks from extending.

請參照圖4與圖5,圖4為本發明第三實施例之顯示面板10b的剖視圖,圖5為圖4之顯示面板10b的上視圖,其中圖4與圖5的實施例沿用圖1與圖2的實施例的元件標號與部分內容,其中採用相同或近似的標號來表示相同或近似的元件,並且省略了相同技術內容的說明。關於省略部分的說明可參考前述實施例,在此不贅述。圖5的顯示面板10b省略繪示封裝層400及部分元件,以方便顯示封裝層400下的元件與結構。 Please refer to FIG. 4 and FIG. 5. FIG. 4 is a cross-sectional view of a display panel 10 b according to a third embodiment of the present invention. FIG. 5 is a top view of the display panel 10 b of FIG. 4. The component numbers and some contents of the embodiment of FIG. 2 are the same or similar reference numerals to indicate the same or similar components, and the description of the same technical content is omitted. For the description of the omitted parts, reference may be made to the foregoing embodiments, and details are not described herein. The display panel 10b of FIG. 5 omits the illustration of the packaging layer 400 and some components to facilitate the display of the components and structures under the packaging layer 400.

如圖4與圖5所示,在第三實施例中,溝槽500b之數量係為兩個,其為第一溝槽501與第二溝槽502。第一溝槽501與第二溝槽502舉例可相隔一距離且不連接,但不以此為限。第二溝槽502位在第一溝槽501與畫素陣列200之間。如圖5所示,在本實施例中,第一溝槽501與第二溝槽502在顯示面板10b的徑向方向Dr上彼此分隔,第二溝槽502環繞顯示區110,而第一溝槽501環繞第二溝槽502。此外,有機絕緣填料340分別位於第一溝槽501與第二溝槽502中。相較於第一實施例,溝槽500b的數量比溝槽500多,因此,第一溝槽501、第二溝槽502與其中的有機絕緣填料340能吸收 更多的應力,並且即使在裂痕穿過第一溝槽501的情況下,仍有第二溝槽502可以阻擋裂痕的延伸,進而減少裂痕延伸至顯示區110的風險。 As shown in FIGS. 4 and 5, in the third embodiment, the number of the trenches 500 b is two, which are the first trenches 501 and the second trenches 502. For example, the first trench 501 and the second trench 502 may be separated by a distance and not connected, but not limited thereto. The second trench 502 is located between the first trench 501 and the pixel array 200. As shown in FIG. 5, in this embodiment, the first groove 501 and the second groove 502 are separated from each other in the radial direction Dr of the display panel 10 b, the second groove 502 surrounds the display area 110, and the first groove The groove 501 surrounds the second groove 502. In addition, an organic insulating filler 340 is located in each of the first trench 501 and the second trench 502. Compared with the first embodiment, the number of the trenches 500b is more than that of the trenches 500. Therefore, the first trenches 501, 502 and the organic insulating filler 340 therein can absorb More stress, and even when the crack passes through the first trench 501, the second trench 502 can block the crack from extending, thereby reducing the risk of the crack extending to the display area 110.

如圖4所示,在本實施例中,第一溝槽501與第二溝槽502分別貫穿第一絕緣層310、第二絕緣層320與第三絕緣層330;在一些實施例中,第一溝槽501與第二溝槽502可以僅貫穿第一絕緣層310與第二絕緣層320;在一些實施例中,第一溝槽501與第二溝槽502的其中之一者僅貫穿第一絕緣層310與第二絕緣層320,而其中之另一者則貫穿第一絕緣層310、第二絕緣層320與第三絕緣層330。 As shown in FIG. 4, in this embodiment, the first trench 501 and the second trench 502 penetrate the first insulating layer 310, the second insulating layer 320, and the third insulating layer 330, respectively; in some embodiments, the first A trench 501 and a second trench 502 may only penetrate the first insulating layer 310 and the second insulating layer 320; in some embodiments, one of the first trench 501 and the second trench 502 only penetrates the first insulating layer 310 and the second insulating layer 320. An insulating layer 310 and a second insulating layer 320, and the other one penetrates the first insulating layer 310, the second insulating layer 320, and the third insulating layer 330.

請參照圖6,圖6為本發明第四實施例之顯示面板10c的上視圖,其中圖6的實施例沿用圖5的實施例的元件標號與部分內容,其中採用相同或近似的標號來表示相同或近似的元件,並且省略了相同技術內容的說明。關於省略部分的說明可參考前述實施例,在此不贅述。 Please refer to FIG. 6. FIG. 6 is a top view of a display panel 10c according to a fourth embodiment of the present invention. The embodiment of FIG. 6 follows the component numbers and parts of the embodiment of FIG. 5, and the same or similar reference numerals are used to indicate them. The same or similar elements, and the description of the same technical content is omitted. For the description of the omitted parts, reference may be made to the foregoing embodiments, and details are not described herein.

如圖6所示,在第四實施例中,溝槽500c之數量係為多個,其為複數第一溝槽501與複數第二溝槽502,第二溝槽502位在第一溝槽501與畫素陣列200之間。複數第二溝槽502沿著顯示面板10c的周向方向Dc排列並環繞顯示區110,且複數第二溝槽502在周向方向Dc上彼此舉例為等距間隔。複數第一溝槽501沿著顯示面板10c的周向方向Dc排列並環繞這些第二溝槽502,且複數第一溝槽501在周向方向Dc上彼此舉例為等距間隔。並且,第一溝槽501與第二溝槽502在顯示面板10c的徑向方向Dr上彼此分隔。此外,有機絕緣填料340分別位於複數第一溝槽501與複數第二溝槽502中。 As shown in FIG. 6, in the fourth embodiment, the number of the trenches 500 c is plural, which is a plurality of first trenches 501 and a plurality of second trenches 502. The second trenches 502 are located in the first trenches. Between 501 and the pixel array 200. The plurality of second grooves 502 are arranged along the circumferential direction Dc of the display panel 10c and surround the display area 110, and the plurality of second grooves 502 are spaced at equal intervals from each other in the circumferential direction Dc. The plurality of first grooves 501 are arranged along the circumferential direction Dc of the display panel 10c and surround the second grooves 502, and the plurality of first grooves 501 are equidistantly spaced from each other in the circumferential direction Dc. Also, the first groove 501 and the second groove 502 are separated from each other in the radial direction Dr of the display panel 10c. In addition, the organic insulating filler 340 is respectively located in the plurality of first trenches 501 and the plurality of second trenches 502.

在本實施例中,複數第一溝槽501與複數第二溝槽502是交錯 排列的。舉例來說,每兩個相鄰的第一溝槽501之間會在周向方向Dc上相距有第一間隔5011,且每兩個相鄰的第二溝槽502之間會在周向方向Dc上相距有第二間隔5021。在徑向方向Dr上,第一間隔5011與第二間隔5021會彼此錯開而不會彼此重疊,換句話說,任一第二間隔5021會在徑向方向Dr上與對應的第一溝槽501重疊,且任一第二溝槽502會在徑向方向Dr上與對應的第一間隔5011重疊。藉此設置,即使裂痕穿過第一溝槽501之間的第一間隔5011而往顯示區110方向延伸,與此第一間隔5011在徑向方向Dr上重疊的第二溝槽502仍可以阻擋裂痕的延伸。 In this embodiment, the plurality of first trenches 501 and the plurality of second trenches 502 are staggered. Arranged. For example, every two adjacent first trenches 501 will be separated by a first distance 5011 in the circumferential direction Dc, and every two adjacent second trenches 502 will be circumferentially separated. There is a second interval 5021 on Dc. In the radial direction Dr, the first interval 5011 and the second interval 5021 will be staggered from each other without overlapping each other. In other words, any second interval 5021 will be in the radial direction Dr with the corresponding first groove 501 Overlap, and any second groove 502 overlaps the corresponding first interval 5011 in the radial direction Dr. With this arrangement, even if the crack extends through the first gap 5011 between the first grooves 501 toward the display area 110, the second groove 502 overlapping with the first gap 5011 in the radial direction Dr can still be blocked The extension of the crack.

在本實施例中,通過設置多個第一溝槽501與多個第二溝槽502在控制裂痕的發生及延伸問題上可更有彈性,舉例來說,若在切割製程中,位於顯示面板10c的短邊處的較易發生裂痕或較易產生較大的裂痕,則可在顯示面板10c的短邊處設置長度較長的第一溝槽501及/或第二溝槽502,及/或寬度較大的第一溝槽501及/或第二溝槽502,且顯示面板10c的短邊處之第一溝槽501及/或第二溝槽502之數量可少於顯示面板10c的長邊處之第一溝槽501及/或第二溝槽502之數量,藉此可更彈性地控制裂痕的發生機率及阻擋裂痕的延伸區域。 In this embodiment, by setting a plurality of first grooves 501 and a plurality of second grooves 502, it is more flexible in controlling the occurrence and extension of cracks. For example, if it is located in the display panel during the cutting process, The short sides of 10c are prone to cracks or larger cracks are easy to be formed, and the first grooves 501 and / or the second grooves 502 having a longer length may be provided at the short sides of the display panel 10c, and / Or the first grooves 501 and / or the second grooves 502 with a larger width, and the number of the first grooves 501 and / or the second grooves 502 at the short sides of the display panel 10c may be less than The number of the first grooves 501 and / or the second grooves 502 at the long sides can be used to more flexibly control the occurrence rate of cracks and prevent the cracks from extending.

請參照圖7,圖7為本發明第五實施例之顯示面板10d的剖視圖,其中圖7的實施例沿用圖1與圖2的實施例的元件標號與部分內容,其中採用相同或近似的標號來表示相同或近似的元件,並且省略了相同技術內容的說明。關於省略部分的說明可參考前述實施例,在此不贅述。 Please refer to FIG. 7. FIG. 7 is a cross-sectional view of a display panel 10d according to a fifth embodiment of the present invention. The embodiment of FIG. 7 follows the component numbers and parts of the embodiments of FIG. 1 and FIG. 2. The same or similar reference numerals are used. To represent the same or similar elements, and the description of the same technical content is omitted. For the description of the omitted parts, reference may be made to the foregoing embodiments, and details are not described herein.

如圖7所示,顯示面板10d更包括至少一擋牆600。擋牆600位於外圍區120並位於第一絕緣層310上,擋牆600可環繞顯示區110,且溝 槽500位於擋牆600以及畫素陣列200之間,而封裝層400則接觸並覆蓋於擋牆600上。在本實施例中,擋牆600與畫素定義層230可由同一材料層形成,換句話說,在顯示面板10d的製程中,擋牆600與畫素定義層230會在同一製程步驟中以同一材料同時成形。除此之外,在本實施例中,有機絕緣填料340與畫素定義層230可由同一材料層形成,因此在顯示面板10d的製程中,擋牆600、有機絕緣填料340與畫素定義層230可在同一製程步驟中以同一材料同時成形。 As shown in FIG. 7, the display panel 10 d further includes at least one retaining wall 600. The retaining wall 600 is located in the peripheral area 120 and on the first insulating layer 310. The retaining wall 600 may surround the display area 110, and the groove The groove 500 is located between the retaining wall 600 and the pixel array 200, and the encapsulation layer 400 contacts and covers the retaining wall 600. In this embodiment, the retaining wall 600 and the pixel definition layer 230 may be formed from the same material layer. In other words, in the manufacturing process of the display panel 10d, the retaining wall 600 and the pixel definition layer 230 will be the same in the same process step. The material is formed simultaneously. In addition, in this embodiment, the organic insulating filler 340 and the pixel defining layer 230 may be formed of the same material layer. Therefore, in the manufacturing process of the display panel 10d, the retaining wall 600, the organic insulating filler 340 and the pixel defining layer 230 are formed. Can be formed simultaneously from the same material in the same process step.

如圖7所示,在本實施例中,在顯示面板10d的製程中,在擋牆600、有機絕緣填料340、畫素定義層230與電激發光元件220成形之後,封裝層400會再成形於畫素陣列200、複合絕緣層300與擋牆600之上,且封裝層400的第一無機薄膜封裝層410覆蓋溝槽500、有機絕緣填料340、第一絕緣層310與擋牆600。並且,在封裝層400的成形過程中,有機薄膜封裝層430會因為擋牆600的關係而被限制在擋牆600所圍繞的範圍內,使得有機薄膜封裝層430不容易溢出,從而有效定義有機薄膜封裝層430所在的區域並確保材料不會浪費。 As shown in FIG. 7, in this embodiment, in the manufacturing process of the display panel 10 d, after the retaining wall 600, the organic insulating filler 340, the pixel definition layer 230 and the electro-active light element 220 are formed, the encapsulation layer 400 is reshaped. On the pixel array 200, the composite insulating layer 300 and the retaining wall 600, the first inorganic thin film encapsulating layer 410 of the encapsulating layer 400 covers the trench 500, the organic insulating filler 340, the first insulating layer 310 and the retaining wall 600. Moreover, during the forming process of the encapsulation layer 400, the organic thin film encapsulation layer 430 will be limited to the range surrounded by the barrier wall 600 due to the relationship of the retaining wall 600, so that the organic thin film encapsulation layer 430 will not easily overflow, thereby effectively defining organic The area where the thin film encapsulation layer 430 is located and ensures that no material is wasted.

在一些實施例中,第一無機薄膜封裝層410可位在擋牆600之內並覆蓋溝槽500、有機絕緣填料340與擋牆600之內的第一絕緣層310,而第二無機薄膜封裝層420則可覆蓋擋牆600與擋牆600之外的第一絕緣層310。舉例來說,如圖7至圖9所示,第一無機薄膜封裝層410或第二無機薄膜封裝層420可覆蓋擋牆600與擋牆600之外的第一絕緣層310;並且,在基底100的法線方向(圖式的垂直方向)上,第一無機薄膜封裝層410或第二無機薄膜封裝層420可覆蓋閘極驅動電路700、畫素定義層230、平坦層 250、溝槽500、500a、500b以及擋牆600,而有機薄膜封裝層430可覆蓋閘極驅動電路700、畫素定義層230、平坦層250以及溝槽500、500a、500b,但有機薄膜封裝層430不覆蓋擋牆600之全部,亦即有機薄膜封裝層430僅會覆蓋擋牆600的一部分。在一些實施例中,第一無機薄膜封裝層410及第二無機薄膜封裝層420可共同覆蓋擋牆600,例如第一無機薄膜封裝層410可覆蓋溝槽500、有機絕緣填料340、擋牆600之內的第一絕緣層310與擋牆600靠近顯示區110的半邊,而第二無機薄膜封裝層420可覆蓋擋牆600遠離顯示區110的半邊與擋牆600之外的第一絕緣層310。 In some embodiments, the first inorganic thin film encapsulation layer 410 may be located within the retaining wall 600 and cover the trench 500, the organic insulating filler 340, and the first insulating layer 310 within the retaining wall 600, and the second inorganic thin film encapsulation The layer 420 may cover the retaining wall 600 and the first insulating layer 310 outside the retaining wall 600. For example, as shown in FIGS. 7 to 9, the first inorganic thin film encapsulation layer 410 or the second inorganic thin film encapsulation layer 420 may cover the barrier wall 600 and the first insulating layer 310 outside the barrier wall 600; In the normal direction of 100 (the vertical direction of the drawing), the first inorganic thin film encapsulation layer 410 or the second inorganic thin film encapsulation layer 420 may cover the gate driving circuit 700, the pixel definition layer 230, and the flat layer. 250, trenches 500, 500a, 500b, and retaining wall 600, and the organic thin film encapsulation layer 430 may cover the gate driving circuit 700, the pixel definition layer 230, the flat layer 250, and the trenches 500, 500a, and 500b, but the organic thin film package The layer 430 does not cover the entirety of the barrier wall 600, that is, the organic thin film encapsulation layer 430 only covers a part of the barrier wall 600. In some embodiments, the first inorganic thin film encapsulation layer 410 and the second inorganic thin film encapsulation layer 420 may collectively cover the barrier wall 600. For example, the first inorganic thin film encapsulation layer 410 may cover the trench 500, the organic insulating filler 340, and the barrier wall 600. The first insulating layer 310 and the retaining wall 600 are close to the half of the display area 110, and the second inorganic thin film encapsulation layer 420 can cover the half of the retaining wall 600 away from the display area 110 and the first insulating layer 310 outside the retaining wall 600. .

請參照圖8,圖8為本發明第六實施例之顯示面板10e的剖視圖,其中圖8的實施例沿用圖3的實施例的元件標號與部分內容,其中採用相同或近似的標號來表示相同或近似的元件,並且省略了相同技術內容的說明。關於省略部分的說明可參考前述實施例,在此不贅述。 Please refer to FIG. 8. FIG. 8 is a cross-sectional view of a display panel 10e according to a sixth embodiment of the present invention. The embodiment of FIG. 8 follows the component numbers and parts of the embodiment of FIG. 3, and the same or similar reference numerals are used to indicate the same. Or similar elements, and descriptions of the same technical content are omitted. For the description of the omitted parts, reference may be made to the foregoing embodiments, and details are not described herein.

如圖8所示,在第六實施例中,顯示面板10e更包括擋牆600,擋牆600位於外圍區120並位於第一絕緣層310上,且溝槽500a位於擋牆600以及畫素陣列200之間,而封裝層400則接觸並覆蓋於溝槽500a、有機絕緣填料340與擋牆600上。在本實施例中,擋牆600的功能及設置方式可參考圖7的實施例,在此不贅述。 As shown in FIG. 8, in the sixth embodiment, the display panel 10 e further includes a retaining wall 600. The retaining wall 600 is located in the peripheral area 120 and on the first insulating layer 310, and the trench 500 a is located in the retaining wall 600 and the pixel array. 200, and the encapsulation layer 400 contacts and covers the trench 500a, the organic insulating filler 340, and the retaining wall 600. In this embodiment, for the function and setting manner of the retaining wall 600, reference may be made to the embodiment in FIG. 7, and details are not described herein.

請參照圖9,圖9為本發明第七實施例之顯示面板10f的剖視圖,其中圖9的實施例沿用圖4的實施例的元件標號與部分內容,其中採用相同或近似的標號來表示相同或近似的元件,並且省略了相同技術內容的說明。關於省略部分的說明可參考前述實施例,在此不贅述。 Please refer to FIG. 9. FIG. 9 is a cross-sectional view of a display panel 10f according to a seventh embodiment of the present invention. The embodiment of FIG. 9 follows the component numbers and parts of the embodiment of FIG. 4, and the same or similar reference numerals are used to indicate the same. Or similar elements, and descriptions of the same technical content are omitted. For the description of the omitted parts, reference may be made to the foregoing embodiments, and details are not described herein.

如圖9所示,在第七實施例中,顯示面板10f更包括擋牆600, 擋牆600位於外圍區120並位於第一絕緣層310上,且溝槽500b位於擋牆600以及畫素陣列200之間,而封裝層400則接觸並覆蓋於溝槽500b、有機絕緣填料340與擋牆600上。在本實施例中,擋牆600的功能及設置方式可參考圖7的實施例,在此不贅述。 As shown in FIG. 9, in the seventh embodiment, the display panel 10f further includes a retaining wall 600. The retaining wall 600 is located in the peripheral region 120 and on the first insulating layer 310, and the trench 500b is located between the retaining wall 600 and the pixel array 200, and the encapsulation layer 400 contacts and covers the trench 500b, the organic insulating filler 340, and On the retaining wall 600. In this embodiment, for the function and setting manner of the retaining wall 600, reference may be made to the embodiment in FIG. 7, and details are not described herein.

請參照圖10,圖10為本發明第八實施例之顯示面板10g的剖視圖,其中圖10的實施例沿用圖1與圖2的實施例的元件標號與部分內容,其中採用相同或近似的標號來表示相同或近似的元件,並且省略了相同技術內容的說明。關於省略部分的說明可參考前述實施例,在此不贅述。 Please refer to FIG. 10. FIG. 10 is a cross-sectional view of a display panel 10g according to an eighth embodiment of the present invention. The embodiment of FIG. 10 follows the component numbers and parts of the embodiments of FIG. 1 and FIG. To represent the same or similar elements, and the description of the same technical content is omitted. For the description of the omitted parts, reference may be made to the foregoing embodiments, and details are not described herein.

如圖10所示,在第八實施例中,溝槽500貫穿第一絕緣層310與第二絕緣層320,而第一無機薄膜封裝層410的一部分與有機薄膜封裝層430的一部分填入溝槽500內。具體而言,在封裝層400成形並覆蓋於畫素陣列200與複合絕緣層300上的製程步驟之前,溝槽500中沒有填入有機絕緣填料340或任何填料,而在封裝層400的第一無機薄膜封裝層410成形時,其除了覆蓋畫素陣列200與複合絕緣層300之外,還會流入溝槽500中,並在溝槽500的內表面形成一層第一無機薄膜封裝層410,接著在封裝層400的有機薄膜封裝層430的成形過程中,有機薄膜封裝層430會流入溝槽500且覆蓋在溝槽500中的第一無機薄膜封裝層410上,並填入溝槽500。本實施例與圖1與圖2的實施例不同之處在於溝槽500中並非填入有機絕緣填料340,而是填入第一無機薄膜封裝層410的一部分與有機薄膜封裝層430的一部分,此外,在有機薄膜封裝層430的成形過程中,溝槽500可讓過多的有機薄膜封裝層430流入,故除了圖1與圖2的實施例所提到的優點外,本實施例之溝槽500亦有防止有機薄膜封裝層430溢流的功能。 As shown in FIG. 10, in the eighth embodiment, the trench 500 penetrates the first insulating layer 310 and the second insulating layer 320, and a part of the first inorganic thin film encapsulation layer 410 and a part of the organic thin film encapsulation layer 430 fill the trench. Inside the slot 500. Specifically, before the encapsulation layer 400 is formed and covered on the pixel array 200 and the composite insulating layer 300, the trench 500 is not filled with the organic insulating filler 340 or any filler. When the inorganic thin film encapsulation layer 410 is formed, in addition to covering the pixel array 200 and the composite insulating layer 300, it also flows into the trench 500, and a first inorganic thin film encapsulation layer 410 is formed on the inner surface of the trench 500. During the forming process of the organic thin film encapsulation layer 430 of the encapsulation layer 400, the organic thin film encapsulation layer 430 flows into the trench 500 and covers the first inorganic thin film encapsulation layer 410 in the trench 500 and fills the trench 500. This embodiment is different from the embodiment of FIGS. 1 and 2 in that the trench 500 is not filled with the organic insulating filler 340, but a portion of the first inorganic thin film encapsulation layer 410 and a portion of the organic thin film encapsulation layer 430. In addition, during the forming process of the organic thin film encapsulation layer 430, the trench 500 can allow too much organic thin film encapsulation layer 430 to flow in, so in addition to the advantages mentioned in the embodiments of FIGS. 1 and 2, the trenches of this embodiment 500 also has a function of preventing overflow of the organic thin film encapsulation layer 430.

請參照圖11,圖11為本發明第九實施例之顯示面板10h的剖視圖,其中圖11的實施例沿用圖3與圖10的實施例的元件標號與部分內容,其中採用相同或近似的標號來表示相同或近似的元件,並且省略了相同技術內容的說明。關於省略部分的說明可參考前述實施例,在此不贅述。 Please refer to FIG. 11. FIG. 11 is a cross-sectional view of a display panel 10h according to a ninth embodiment of the present invention. The embodiment of FIG. 11 follows the component numbers and parts of the embodiments of FIGS. 3 and 10, and the same or similar reference numbers are used. To represent the same or similar elements, and the description of the same technical content is omitted. For the description of the omitted parts, reference may be made to the foregoing embodiments, and details are not described herein.

如圖11所示,在第九實施例中,溝槽500a更貫穿第三絕緣層330。並且,由於溝槽500a貫穿第一絕緣層310、第二絕緣層320與第三絕緣層330,因此第一無機薄膜封裝層410與有機薄膜封裝層430會延伸到第一絕緣層310、第二絕緣層320與第三絕緣層330。相較於第八實施例,溝槽500a在垂直方向Dv上比溝槽500更深,且有機薄膜封裝層430在垂直方向Dv上亦更深入複合絕緣層300中,因此,溝槽500a與其中的有機薄膜封裝層430能吸收更多的應力,並能更有效地避免裂痕的產生與阻止裂痕的延伸。 As shown in FIG. 11, in the ninth embodiment, the trench 500 a further penetrates the third insulating layer 330. In addition, since the trench 500a penetrates the first insulating layer 310, the second insulating layer 320, and the third insulating layer 330, the first inorganic thin film encapsulation layer 410 and the organic thin film encapsulation layer 430 will extend to the first insulating layer 310 and the second The insulating layer 320 and the third insulating layer 330. Compared with the eighth embodiment, the trench 500a is deeper in the vertical direction Dv than the trench 500, and the organic thin film encapsulation layer 430 is further deeper in the composite insulating layer 300 in the vertical direction Dv. Therefore, the trench 500a and the The organic thin film encapsulation layer 430 can absorb more stress, and can more effectively avoid the occurrence of cracks and prevent the cracks from extending.

請參照圖12,圖12為本發明第十實施例之顯示面板10i的剖視圖,其中圖12的實施例沿用圖4與圖11的實施例的元件標號與部分內容,其中採用相同或近似的標號來表示相同或近似的元件,並且省略了相同技術內容的說明。關於省略部分的說明可參考前述實施例,在此不贅述。 Please refer to FIG. 12. FIG. 12 is a cross-sectional view of a display panel 10i according to a tenth embodiment of the present invention. The embodiment of FIG. 12 follows the component numbers and parts of the embodiments of FIG. 4 and FIG. 11, and the same or similar reference numbers are used. To represent the same or similar elements, and the description of the same technical content is omitted. For the description of the omitted parts, reference may be made to the foregoing embodiments, and details are not described herein.

如圖12所示,在第十實施例中,第二溝槽502位在第一溝槽501與畫素陣列200之間。第一無機薄膜封裝層410與有機薄膜封裝層430會分別延伸到第一溝槽501與第二溝槽502中。第一溝槽501、第二溝槽502與其中的有機薄膜封裝層430能吸收更多的應力,並且即使在裂痕穿過第一溝槽501的情況下,仍有第二溝槽502可以阻擋裂痕的延伸,進而減少裂痕延伸至顯示區110的風險。 As shown in FIG. 12, in the tenth embodiment, the second trench 502 is located between the first trench 501 and the pixel array 200. The first inorganic thin film encapsulation layer 410 and the organic thin film encapsulation layer 430 will extend into the first trench 501 and the second trench 502, respectively. The first trench 501, the second trench 502, and the organic thin film encapsulation layer 430 therein can absorb more stress, and even if the crack passes through the first trench 501, the second trench 502 can still block The extension of the cracks further reduces the risk of the cracks extending to the display area 110.

請參照圖13,圖13為本發明第十一實施例之顯示面板10j的剖視圖,其中圖13的實施例沿用圖7與圖10的實施例的元件標號與部分內容,其中採用相同或近似的標號來表示相同或近似的元件,並且省略了相同技術內容的說明。關於省略部分的說明可參考前述實施例,在此不贅述。 Please refer to FIG. 13. FIG. 13 is a cross-sectional view of a display panel 10j according to an eleventh embodiment of the present invention. The embodiment of FIG. 13 follows the component numbers and parts of the embodiments of FIGS. 7 and 10, in which the same or similar components are used. Numbers are used to indicate the same or similar elements, and descriptions of the same technical content are omitted. For the description of the omitted parts, reference may be made to the foregoing embodiments, and details are not described herein.

如圖13所示,在第十一實施例中,溝槽500貫穿第一絕緣層310與第二絕緣層320,而顯示面板10j更包括至少一擋牆600,且第一無機薄膜封裝層410與有機薄膜封裝層430會延伸到溝槽500中。並且,在有機薄膜封裝層430的成形過程中,有機薄膜封裝層430會受到擋牆600的限制而不易溢流出去,且溝槽500也可讓過多的有機薄膜封裝層430流入,因而擋牆600與溝槽500互相配合可更有效地防止有機薄膜封裝層430溢流。 As shown in FIG. 13, in the eleventh embodiment, the trench 500 penetrates the first insulating layer 310 and the second insulating layer 320, and the display panel 10j further includes at least one retaining wall 600, and the first inorganic thin film encapsulation layer 410 The organic thin film encapsulation layer 430 extends into the trench 500. In addition, during the forming process of the organic thin film encapsulation layer 430, the organic thin film encapsulation layer 430 is restricted by the retaining wall 600 and cannot easily overflow, and the trench 500 can allow too much organic thin film encapsulation layer 430 to flow in, so the retaining wall The cooperation between 600 and the trench 500 can more effectively prevent the organic thin film encapsulation layer 430 from overflowing.

請參照圖14,圖14為本發明第十二實施例之顯示面板10k的剖視圖,其中圖14的實施例沿用圖8與圖11的實施例的元件標號與部分內容,其中採用相同或近似的標號來表示相同或近似的元件,並且省略了相同技術內容的說明。關於省略部分的說明可參考前述實施例,在此不贅述。 Please refer to FIG. 14. FIG. 14 is a cross-sectional view of a display panel 10k according to a twelfth embodiment of the present invention. The embodiment of FIG. 14 follows the component numbers and parts of the embodiments of FIG. 8 and FIG. 11, in which the same or similar components are used. Numbers are used to indicate the same or similar elements, and descriptions of the same technical content are omitted. For the description of the omitted parts, reference may be made to the foregoing embodiments, and details are not described herein.

如圖14所示,在第十二實施例中,溝槽500a貫穿第一絕緣層310、第二絕緣層320與第三絕緣層330,而第一無機薄膜封裝層410與有機薄膜封裝層430會延伸到溝槽500a中。並且,顯示面板10k包括擋牆600,擋牆600位於外圍區120並位於第一絕緣層310上,且溝槽500a位於擋牆600以及畫素陣列200之間,而封裝層400則接觸並覆蓋於擋牆600上,且第一無機薄膜封裝層410與有機薄膜封裝層430的一部分會填入溝槽500a中。 As shown in FIG. 14, in the twelfth embodiment, the trench 500 a penetrates the first insulating layer 310, the second insulating layer 320, and the third insulating layer 330, and the first inorganic thin film encapsulation layer 410 and the organic thin film encapsulation layer 430 Will extend into the trench 500a. Moreover, the display panel 10k includes a retaining wall 600, which is located in the peripheral area 120 and on the first insulating layer 310, and the trench 500a is located between the retaining wall 600 and the pixel array 200, and the encapsulation layer 400 is in contact with and covers On the retaining wall 600, a part of the first inorganic thin film encapsulation layer 410 and the organic thin film encapsulation layer 430 will be filled in the trench 500a.

請參照圖15,圖15為本發明第十三實施例之顯示面板10m的剖視圖,其中圖15的實施例沿用圖4與14的實施例的元件標號與部分內 容,其中採用相同或近似的標號來表示相同或近似的元件,並且省略了相同技術內容的說明。關於省略部分的說明可參考前述實施例,在此不贅述。 Please refer to FIG. 15. FIG. 15 is a cross-sectional view of a display panel 10m according to a thirteenth embodiment of the present invention. The embodiment of FIG. 15 follows the component numbers and parts of the embodiments of FIGS. 4 and 14. Content, in which the same or similar reference numerals are used to indicate the same or similar elements, and the description of the same technical content is omitted. For the description of the omitted parts, reference may be made to the foregoing embodiments, and details are not described herein.

如圖15所示,在第十三實施例中,第二溝槽502位在第一溝槽501與畫素陣列200之間,而第一無機薄膜封裝層410與有機薄膜封裝層430會分別延伸到第一溝槽501與第二溝槽502中。並且,顯示面板10m包括擋牆600,擋牆600位於外圍區120並位於第一絕緣層310上,且溝槽500b(第一溝槽501與第二溝槽502)位於擋牆600以及畫素陣列200之間,而封裝層400則接觸並覆蓋於擋牆600上,且第一無機薄膜封裝層410與有機薄膜封裝層430的一部分會分別填入第一溝槽501與第二溝槽502中。 As shown in FIG. 15, in the thirteenth embodiment, the second trench 502 is located between the first trench 501 and the pixel array 200, and the first inorganic thin film encapsulation layer 410 and the organic thin film encapsulation layer 430 are respectively Extending into the first trench 501 and the second trench 502. In addition, the display panel 10m includes a retaining wall 600, the retaining wall 600 is located in the peripheral area 120 and on the first insulating layer 310, and the groove 500b (the first groove 501 and the second groove 502) is located on the retaining wall 600 and the pixel Between the array 200, and the encapsulation layer 400 contacts and covers the retaining wall 600, and a part of the first inorganic thin film encapsulation layer 410 and the organic thin film encapsulation layer 430 will fill the first trench 501 and the second trench 502, respectively. in.

請參照圖16,圖16為本發明第十四實施例之顯示面板10n的剖視圖,其中圖16的實施例沿用圖1及圖2的實施例的元件標號與部分內容,其中採用相同或近似的標號來表示相同或近似的元件,並且省略了相同技術內容的說明。關於省略部分的說明可參考前述實施例,在此不贅述。 Please refer to FIG. 16. FIG. 16 is a cross-sectional view of a display panel 10n according to a fourteenth embodiment of the present invention. The embodiment of FIG. 16 follows the component numbers and parts of the embodiments of FIGS. 1 and 2. The same or similar components are used. Numbers are used to indicate the same or similar elements, and descriptions of the same technical content are omitted. For the description of the omitted parts, reference may be made to the foregoing embodiments, and details are not described herein.

如圖16所示,在第十四實施例中,溝槽500貫穿第一絕緣層310與第二絕緣層320,而有機薄膜封裝層430會延伸到溝槽500中,第一無機薄膜封裝層410和第二無機薄膜封裝層420並不延伸到溝槽500中。在本實施例中,溝槽500中沒有填入有機絕緣填料340,而在封裝層400的第一無機薄膜封裝層410成形時,會覆蓋畫素陣列200與複合絕緣層300,但不會覆蓋溝槽500,因而在第一無機薄膜封裝層410成形之後,溝槽500中並不存在第一無機薄膜封裝層410的一部分。接著在封裝層400的有機薄膜封裝層430的成形過程中,有機薄膜封裝層430會流入溝槽500,並填入溝槽500。換言之,溝槽500中僅具有有機薄膜封裝層430。此外,在有機薄膜 封裝層430的成形過程中,溝槽500可讓過多的有機薄膜封裝層430流入,因而溝槽500亦有防止有機薄膜封裝層430溢流的功能。並且,相較於一般無機絕緣材料,溝槽500中的有機薄膜封裝層430會具有更佳的柔韌性,因此溝槽500中的有機薄膜封裝層430可吸收應力,以減少裂痕的產生或阻擋裂痕的延伸。 As shown in FIG. 16, in the fourteenth embodiment, the trench 500 penetrates the first insulating layer 310 and the second insulating layer 320, and the organic thin film encapsulation layer 430 extends into the trench 500. The first inorganic thin film encapsulation layer 410 and the second inorganic thin film encapsulation layer 420 do not extend into the trench 500. In this embodiment, the trench 500 is not filled with the organic insulating filler 340. When the first inorganic thin film encapsulation layer 410 of the encapsulation layer 400 is formed, the pixel array 200 and the composite insulating layer 300 are covered, but they are not covered. The trench 500, therefore, after the first inorganic thin film encapsulation layer 410 is formed, a part of the first inorganic thin film encapsulation layer 410 does not exist in the trench 500. During the forming process of the organic thin film encapsulation layer 430 of the encapsulation layer 400, the organic thin film encapsulation layer 430 flows into the trench 500 and fills the trench 500. In other words, the trench 500 includes only the organic thin film encapsulation layer 430. In addition, in organic thin films During the forming process of the encapsulation layer 430, the trench 500 can allow too much organic thin film encapsulation layer 430 to flow in. Therefore, the trench 500 also has a function of preventing the organic thin film encapsulation layer 430 from overflowing. In addition, compared with general inorganic insulating materials, the organic thin film encapsulation layer 430 in the trench 500 has better flexibility. Therefore, the organic thin film encapsulation layer 430 in the trench 500 can absorb stress to reduce the generation or blocking of cracks. The extension of the crack.

請參照圖17,圖17為本發明第十五實施例之顯示面板10o的剖視圖,其中圖17的實施例沿用圖3與圖16的實施例的元件標號與部分內容,其中採用相同或近似的標號來表示相同或近似的元件,並且省略了相同技術內容的說明。關於省略部分的說明可參考前述實施例,在此不贅述。 Please refer to FIG. 17. FIG. 17 is a cross-sectional view of a display panel 10o according to a fifteenth embodiment of the present invention. The embodiment of FIG. 17 follows the component numbers and parts of the embodiments of FIGS. 3 and 16, and the same or similar components are used. Numbers are used to indicate the same or similar elements, and descriptions of the same technical content are omitted. For the description of the omitted parts, reference may be made to the foregoing embodiments, and details are not described herein.

如圖17所示,在第十五實施例中,溝槽500a更貫穿第三絕緣層330。並且,由於溝槽500a貫穿第一絕緣層310、第二絕緣層320與第三絕緣層330,因此有機薄膜封裝層430會延伸到第一絕緣層310、第二絕緣層320與第三絕緣層330。溝槽500a在垂直方向Dv上比溝槽500更深,且有機薄膜封裝層430在垂直方向Dv上亦更深入複合絕緣層300中,因此,溝槽500a與其中的有機薄膜封裝層430能吸收更多的應力,並能更有效地避免裂痕的產生與阻止裂痕的延伸。 As shown in FIG. 17, in the fifteenth embodiment, the trench 500 a further penetrates the third insulating layer 330. In addition, since the trench 500a penetrates the first insulating layer 310, the second insulating layer 320, and the third insulating layer 330, the organic thin film encapsulation layer 430 will extend to the first insulating layer 310, the second insulating layer 320, and the third insulating layer. 330. The trench 500a is deeper than the trench 500 in the vertical direction Dv, and the organic thin film encapsulation layer 430 penetrates deeper into the composite insulating layer 300 in the vertical direction Dv. Therefore, the trench 500a and the organic thin film encapsulation layer 430 therein can absorb more More stress, and can more effectively avoid the generation of cracks and prevent the cracks from extending.

請參照圖18,圖18為本發明第十六實施例之顯示面板10p的剖視圖,其中圖18的實施例沿用圖9與圖17的實施例的元件標號與部分內容,其中採用相同或近似的標號來表示相同或近似的元件,並且省略了相同技術內容的說明。關於省略部分的說明可參考前述實施例,在此不贅述。 Please refer to FIG. 18. FIG. 18 is a cross-sectional view of a display panel 10p according to a sixteenth embodiment of the present invention. The embodiment of FIG. 18 follows the component numbers and parts of the embodiments of FIGS. 9 and 17, and the same or similar components are used. Numbers are used to indicate the same or similar elements, and descriptions of the same technical content are omitted. For the description of the omitted parts, reference may be made to the foregoing embodiments, and details are not described herein.

如圖18所示,在第十六實施例中,第二溝槽502位在第一溝槽501與畫素陣列200之間。有機薄膜封裝層430會分別延伸到第一溝槽501 與第二溝槽502中。第一溝槽501、第二溝槽502與其中的有機薄膜封裝層430能吸收更多的應力,並且即使在裂痕穿過第一溝槽501的情況下,仍有第二溝槽502可以阻擋裂痕的延伸,進而減少裂痕延伸至顯示區110的風險。 As shown in FIG. 18, in the sixteenth embodiment, the second trench 502 is located between the first trench 501 and the pixel array 200. The organic thin film encapsulation layers 430 will extend to the first trenches 501, respectively. And in the second trench 502. The first trench 501, the second trench 502, and the organic thin film encapsulation layer 430 therein can absorb more stress, and even if the crack passes through the first trench 501, the second trench 502 can still block The extension of the cracks further reduces the risk of the cracks extending to the display area 110.

請參照圖19,圖19為本發明第十七實施例之顯示面板10q的剖視圖,其中圖19的實施例沿用圖7與圖16的實施例的元件標號與部分內容,其中採用相同或近似的標號來表示相同或近似的元件,並且省略了相同技術內容的說明。關於省略部分的說明可參考前述實施例,在此不贅述。 Please refer to FIG. 19. FIG. 19 is a cross-sectional view of a display panel 10q of a seventeenth embodiment of the present invention. The embodiment of FIG. 19 follows the component numbers and parts of the embodiments of FIGS. 7 and 16. Numbers are used to indicate the same or similar elements, and descriptions of the same technical content are omitted. For the description of the omitted parts, reference may be made to the foregoing embodiments, and details are not described herein.

如圖19所示,在第十七實施例中,溝槽500貫穿第一絕緣層310與第二絕緣層320,而顯示面板10q更包括至少一擋牆600,且有機薄膜封裝層430會延伸到溝槽500中。並且,在有機薄膜封裝層430的成形過程中,有機薄膜封裝層430會受到擋牆600的限制而不易溢流出去,且溝槽500也可讓過多的有機薄膜封裝層430流入,因而擋牆600與溝槽500互相配合可更有效地防止有機薄膜封裝層430溢流。 As shown in FIG. 19, in the seventeenth embodiment, the trench 500 penetrates the first insulating layer 310 and the second insulating layer 320, and the display panel 10q further includes at least one retaining wall 600, and the organic thin film encapsulation layer 430 extends Into the trench 500. In addition, during the forming process of the organic thin film encapsulation layer 430, the organic thin film encapsulation layer 430 is restricted by the retaining wall 600 and cannot easily overflow, and the trench 500 can allow too much organic thin film encapsulation layer 430 to flow in, so the retaining wall The cooperation between 600 and the trench 500 can more effectively prevent the organic thin film encapsulation layer 430 from overflowing.

請參照圖20,圖20為本發明第十八實施例之顯示面板10r的剖視圖,其中圖20的實施例沿用圖17與圖19的實施例的元件標號與部分內容,其中採用相同或近似的標號來表示相同或近似的元件,並且省略了相同技術內容的說明。關於省略部分的說明可參考前述實施例,在此不贅述。 Please refer to FIG. 20. FIG. 20 is a cross-sectional view of a display panel 10r according to an eighteenth embodiment of the present invention. The embodiment of FIG. 20 follows the component numbers and parts of the embodiments of FIGS. 17 and 19, and the same or similar components are used. Numbers are used to indicate the same or similar elements, and descriptions of the same technical content are omitted. For the description of the omitted parts, reference may be made to the foregoing embodiments, and details are not described herein.

如圖20所示,在第十八實施例中,溝槽500a貫穿第一絕緣層310、第二絕緣層320與第三絕緣層330,而有機薄膜封裝層430會延伸到溝槽500a中。並且,顯示面板10r更包括擋牆600,擋牆600位於外圍區120並位於第一絕緣層310上,且溝槽500a位於擋牆600以及畫素陣列200之間。 封裝層400接觸並覆蓋於擋牆600上,且有機薄膜封裝層430的一部分會填入溝槽500a中。 As shown in FIG. 20, in the eighteenth embodiment, the trench 500a penetrates the first insulating layer 310, the second insulating layer 320, and the third insulating layer 330, and the organic thin film encapsulation layer 430 extends into the trench 500a. In addition, the display panel 10r further includes a blocking wall 600, which is located in the peripheral region 120 and on the first insulating layer 310, and the trench 500a is located between the blocking wall 600 and the pixel array 200. The encapsulation layer 400 contacts and covers the barrier wall 600, and a part of the organic thin film encapsulation layer 430 is filled in the trench 500 a.

請參照圖21,圖21為本發明第十九實施例之顯示面板10s的剖視圖,其中圖21的實施例沿用圖18與圖20的實施例的元件標號與部分內容,其中採用相同或近似的標號來表示相同或近似的元件,並且省略了相同技術內容的說明。關於省略部分的說明可參考前述實施例,在此不贅述。 Please refer to FIG. 21, which is a cross-sectional view of a display panel 10s of a nineteenth embodiment of the present invention. The embodiment of FIG. 21 follows the component numbers and parts of the embodiments of FIGS. 18 and 20, and the same or similar components are used. Numbers are used to indicate the same or similar elements, and descriptions of the same technical content are omitted. For the description of the omitted parts, reference may be made to the foregoing embodiments, and details are not described herein.

如圖21所示,在第十九實施例中,第二溝槽502位在第一溝槽501與畫素陣列200之間,而有機薄膜封裝層430會分別延伸到第一溝槽501與第二溝槽502中。並且,顯示面板10s更包括擋牆600,擋牆600位於外圍區120並位於第一絕緣層310上,封裝層400接觸並覆蓋於擋牆600上,舉例來說,第二無機薄膜封裝層420接觸並覆蓋於擋牆600上,且有機薄膜封裝層430的一部分會分別填入第一溝槽501與第二溝槽502中。 As shown in FIG. 21, in the nineteenth embodiment, the second trench 502 is located between the first trench 501 and the pixel array 200, and the organic thin film encapsulation layer 430 extends to the first trench 501 and In the second trench 502. In addition, the display panel 10s further includes a blocking wall 600. The blocking wall 600 is located in the peripheral area 120 and on the first insulating layer 310. The encapsulation layer 400 contacts and covers the blocking wall 600. For example, the second inorganic thin film encapsulation layer 420 The barrier wall 600 is contacted and covered, and a part of the organic thin film encapsulation layer 430 is filled in the first trench 501 and the second trench 502, respectively.

綜上所述,根據本發明所提出的顯示面板的諸多實施例,在顯示面板的外圍區設置有溝槽,且溝槽中還填有填料,藉由溝槽與填料來吸收應力並形成緩衝,從而可降低外圍區在被切割時產生裂痕的可能,且即使有裂痕產生,裂痕也會被溝槽與填料阻止而無法往顯示區的方向延伸。如此一來,可避免顯示面板的電性元件因為裂痕而破損或斷裂,確保顯示面板的品質。 In summary, according to many embodiments of the display panel provided by the present invention, grooves are provided in the peripheral area of the display panel, and the grooves are also filled with fillers, and the grooves and fillers are used to absorb stress and form buffers. This can reduce the possibility of cracks in the peripheral area when being cut, and even if cracks occur, the cracks will be blocked by the grooves and fillers and cannot extend in the direction of the display area. In this way, the electrical components of the display panel can be prevented from being damaged or broken due to cracks, thereby ensuring the quality of the display panel.

雖然本發明的技術內容已經以較佳實施例揭露如上,然其並非用以限定本發明,任何熟習此技藝者,在不脫離本發明之精神所作些許之更動與潤飾,皆應涵蓋於本發明的範疇內,因此本發明之保護範圍當視後附之申請專利範圍所界定者為準。 Although the technical content of the present invention has been disclosed as above with preferred embodiments, it is not intended to limit the present invention. Any person skilled in the art and making some changes and retouching without departing from the spirit of the present invention should be covered by the present invention. Therefore, the scope of protection of the present invention shall be determined by the scope of the appended patent application.

Claims (13)

一種顯示面板,包括:一基底,具有一顯示區、一外圍區與一電路區,該外圍區實質上圍繞該顯示區,該電路區位於該顯示區與該外圍區之間;一畫素陣列,位於該基底上且位於該顯示區內,該畫素陣列包括:複數薄膜電晶體,各該薄膜電晶體包括:一主動層;一閘絕緣層,位於該主動層上;一閘極,位於該閘絕緣層上;一層間絕緣層,位於該閘極上;以及一源極與一汲極,位於該層間絕緣層上且分別藉由複數第一接觸洞而電性連接該主動層,該些第一接觸洞貫穿該層間絕緣層與該閘絕緣層;複數電激發光元件,分別電性連接對應的該薄膜電晶體的該汲極;以及一畫素定義層,位於該層間絕緣層上,其中各該電激發光元件包括:一下電極,位於該層間絕緣層與該畫素定義層之間;一上電極;以及一發光層,位於貫穿該畫素定義層的一開口中且位於該下電極以及該上電極之間, 其中該畫素陣列更包括一平坦層位於該層間絕緣層與該畫素定義層之間,該平坦層具有複數第二接觸洞,其中該些電激發光元件的該下電極分別藉由該些第二接觸洞電性連接至對應的該薄膜電晶體的該汲極;一複合絕緣層,位於該基底上且位於該外圍區,該複合絕緣層包括:一第一絕緣層,與該層間絕緣層由同一材料層形成;一第二絕緣層,位於該第一絕緣層與該基底之間,該第二絕緣層與該閘絕緣層由同一材料層形成,其中至少一溝槽貫穿該第一絕緣層與該第二絕緣層;以及一有機絕緣填料,該有機絕緣填料完全填充該至少一溝槽並與該至少一溝槽側壁處之該第一絕緣層與該第二絕緣層接觸;一封裝層,位於該畫素陣列與該複合絕緣層上,該封裝層與該至少一溝槽重疊,該封裝層包括一第一無機薄膜封裝層、一有機薄膜封裝層與一第二無機薄膜封裝層,該第一無機薄膜封裝層位於該畫素陣列與該複合絕緣層上,該有機薄膜封裝層位於該第一無機薄膜封裝層與該第二無機薄膜封裝層之間;至少一擋牆,位於該第一絕緣層上,其中該至少一溝槽位於該至少一擋牆以及該畫素陣列之間,該封裝層覆蓋該至少一擋牆,且第二無機薄膜封裝層更覆蓋該擋牆之外的該第一絕緣層;以及一閘極驅動電路,位於該基底上且位於該電路區內,該閘極驅動電路電性連接該畫素陣列,其中該畫素定義層以及該平坦層係從該顯示區延伸至該電路區,該閘極驅動電路係被該畫素定義層以及該平坦層覆蓋,該第 二無機薄膜封裝層覆蓋該閘極驅動電路、該畫素定義層、該平坦層、該至少一溝槽以及該至少一擋牆,該有機薄膜封裝層覆蓋該閘極驅動電路、該畫素定義層、該平坦層以及該至少一溝槽但不覆蓋該至少一擋牆之全部,該至少一溝槽位於該閘極驅動電路以及該至少一擋牆之間。 A display panel includes: a substrate having a display area, a peripheral area, and a circuit area, the peripheral area substantially surrounding the display area, the circuit area being located between the display area and the peripheral area; a pixel array Located on the substrate and in the display area, the pixel array includes: a plurality of thin film transistors, each of the thin film transistors includes: an active layer; a gate insulation layer on the active layer; a gate electrode, On the gate insulation layer; an interlayer insulation layer on the gate electrode; and a source and a drain electrode on the interlayer insulation layer and electrically connected to the active layer through a plurality of first contact holes, respectively A first contact hole penetrates the interlayer insulation layer and the gate insulation layer; a plurality of electrically excited light elements are respectively electrically connected to the drain electrodes of the corresponding thin film transistors; and a pixel definition layer is located on the interlayer insulation layer, Each of the electro-optical light-emitting elements includes a lower electrode located between the interlayer insulating layer and the pixel defining layer; an upper electrode; and a light emitting layer located in an opening penetrating the pixel defining layer and located at And a lower electrode between the upper electrode, The pixel array further includes a flat layer between the interlayer insulating layer and the pixel defining layer, the flat layer has a plurality of second contact holes, and the lower electrodes of the electro-active light emitting elements pass through the A second contact hole is electrically connected to the drain electrode of the corresponding thin film transistor; a composite insulating layer on the substrate and in the peripheral region, the composite insulating layer includes: a first insulating layer that is insulated from the interlayer The layer is formed of the same material layer; a second insulating layer is located between the first insulating layer and the substrate, the second insulating layer and the gate insulating layer are formed of the same material layer, and at least one trench runs through the first An insulating layer and the second insulating layer; and an organic insulating filler that completely fills the at least one trench and contacts the first insulating layer and the second insulating layer at the sidewall of the at least one trench; An encapsulation layer is located on the pixel array and the composite insulating layer. The encapsulation layer overlaps the at least one trench. The encapsulation layer includes a first inorganic thin film encapsulation layer, an organic thin film encapsulation layer, and a second inorganic thin film. The first inorganic thin film encapsulation layer is located on the pixel array and the composite insulating layer, the organic thin film encapsulation layer is located between the first inorganic thin film encapsulation layer and the second inorganic thin film encapsulation layer; at least one retaining wall Located on the first insulating layer, wherein the at least one trench is located between the at least one retaining wall and the pixel array, the encapsulating layer covers the at least one retaining wall, and the second inorganic thin film encapsulating layer further covers the retaining wall The first insulating layer outside the wall; and a gate driving circuit located on the substrate and in the circuit area, the gate driving circuit is electrically connected to the pixel array, wherein the pixel defining layer and the flat The layer system extends from the display area to the circuit area. The gate driving circuit is covered by the pixel definition layer and the flat layer. Two inorganic thin film encapsulation layers cover the gate driving circuit, the pixel definition layer, the flat layer, the at least one trench, and the at least one retaining wall. The organic thin film encapsulation layer covers the gate driving circuit and the pixel definition. Layer, the flat layer and the at least one trench but not covering all of the at least one retaining wall, the at least one trench is located between the gate driving circuit and the at least one retaining wall. 如請求項1所述的顯示面板,其中該畫素陣列更包括一緩衝層位於該基底與該主動層之間,該複合絕緣層更包括一第三絕緣層位於該基底與該第二絕緣層之間,該第三絕緣層與該緩衝層由同一材料層形成。 The display panel according to claim 1, wherein the pixel array further includes a buffer layer between the substrate and the active layer, and the composite insulating layer further includes a third insulating layer between the substrate and the second insulating layer In between, the third insulating layer and the buffer layer are formed of the same material layer. 如請求項2所述的顯示面板,其中該至少一溝槽更貫穿該第三絕緣層。 The display panel according to claim 2, wherein the at least one trench further penetrates the third insulating layer. 如請求項3所述的顯示面板,其中該至少一溝槽包括一第一溝槽與一第二溝槽,該第二溝槽位在該第一溝槽與該畫素陣列之間。 The display panel according to claim 3, wherein the at least one groove includes a first groove and a second groove, and the second groove is located between the first groove and the pixel array. 如請求項2所述的顯示面板,其中該至少一溝槽包括一第一溝槽與一第二溝槽,該第二溝槽位在該第一溝槽與該畫素陣列之間。 The display panel according to claim 2, wherein the at least one groove includes a first groove and a second groove, and the second groove is located between the first groove and the pixel array. 如請求項1所述的顯示面板,其中該至少一擋牆與該畫素定義層由同一材料層形成。 The display panel according to claim 1, wherein the at least one retaining wall and the pixel definition layer are formed of a same material layer. 如請求項1所述的顯示面板,其中,該有機絕緣填料與該畫素定義層由同一材料層形成。 The display panel according to claim 1, wherein the organic insulating filler and the pixel definition layer are formed of a same material layer. 如請求項1所述的顯示面板,其中該有機薄膜封裝層之一部分填入該至少一溝槽內。 The display panel according to claim 1, wherein a part of the organic thin film encapsulation layer is filled in the at least one trench. 如請求項1所述的顯示面板,其中該第一無機薄膜封裝層之一部分與該有機薄膜封裝層之一部分填入該至少一溝槽內。 The display panel according to claim 1, wherein a portion of the first inorganic thin film encapsulation layer and a portion of the organic thin film encapsulation layer are filled in the at least one trench. 如請求項1所述的顯示面板,其中該基底更具有一電路區,該電路區位於該顯示區與該外圍區之間,該顯示面板更包括一閘極驅動電路位於該基底上且位於該電路區內,該閘極驅動電路電性連接該畫素陣列,其中該畫素定義層以及該平坦層係從該顯示區延伸至該電路區,該閘極驅動電路係被該畫素定義層以及該平坦層覆蓋。 The display panel according to claim 1, wherein the substrate further has a circuit region, the circuit region is located between the display region and the peripheral region, and the display panel further includes a gate driving circuit on the substrate and on the substrate. In the circuit area, the gate driving circuit is electrically connected to the pixel array. The pixel definition layer and the flat layer extend from the display area to the circuit area. The gate driving circuit is defined by the pixel definition layer. And the flat layer covers. 如請求項1所述的顯示面板,其中該第一絕緣層與該層間絕緣層直接連接。 The display panel according to claim 1, wherein the first insulating layer is directly connected to the interlayer insulating layer. 如請求項1所述的顯示面板,其中該第二絕緣層與該閘絕緣層直接連接。 The display panel according to claim 1, wherein the second insulating layer is directly connected to the gate insulating layer. 一種顯示面板,包括:一基底,具有一顯示區、一外圍區與一電路區,該外圍區實質上圍繞該顯示區,該電路區位於該顯示區與該外圍區之間;一畫素陣列,位於該基底上且位於該顯示區內,該畫素陣列包括:複數薄膜電晶體,各該薄膜電晶體包括:一主動層;一閘絕緣層,位於該主動層上;一閘極,位於該閘絕緣層上;一層間絕緣層,位於該閘極上;以及一源極與一汲極,位於該層間絕緣層上且分別藉由複數第一接觸洞而電性連接該主動層,該些第一接觸洞貫穿該層間絕緣層與該閘絕緣層; 複數電激發光元件,分別電性連接對應的該薄膜電晶體的該汲極;以及一畫素定義層,位於該層間絕緣層上,其中各該電激發光元件包括:一下電極,位於該層間絕緣層與該畫素定義層之間;一上電極;以及一發光層,位於貫穿該畫素定義層的一開口中且位於該下電極以及該上電極之間,其中該畫素陣列更包括一平坦層位於該層間絕緣層與該畫素定義層之間,該平坦層具有複數第二接觸洞,其中該些電激發光元件的該下電極分別藉由該些第二接觸洞電性連接至對應的該薄膜電晶體的該汲極;一複合絕緣層,位於該基底上且位於該外圍區,該複合絕緣層包括:一第一絕緣層,與該層間絕緣層由同一材料層形成;一第二絕緣層,位於該第一絕緣層與該基底之間,該第二絕緣層與該閘絕緣層由同一材料層形成,其中至少一溝槽貫穿該第一絕緣層與該第二絕緣層;以及一有機絕緣填料,該有機絕緣填料完全填充該至少一溝槽並與該至少一溝槽側壁處之該第一絕緣層與該第二絕緣層接觸;一封裝層,位於該畫素陣列與該複合絕緣層上,該封裝層與該至少一溝槽重疊,該封裝層包括一第一無機薄膜封裝層、一有機薄膜封裝層與一第二無機薄膜封裝層,該第一無機薄膜封裝層位於該畫素陣列與該複合絕 緣層上,該有機薄膜封裝層位於該第一無機薄膜封裝層與該第二無機薄膜封裝層之間;至少一擋牆,位於該第一絕緣層上,其中該至少一溝槽位於該至少一擋牆以及該畫素陣列之間,該封裝層覆蓋該至少一擋牆,且第一無機薄膜封裝層更覆蓋該擋牆之外的該第一絕緣層;以及一閘極驅動電路,位於該基底上且位於該電路區內,該閘極驅動電路電性連接該畫素陣列,其中該畫素定義層以及該平坦層係從該顯示區延伸至該電路區,該閘極驅動電路係被該畫素定義層以及該平坦層覆蓋,該第一無機薄膜封裝層覆蓋該閘極驅動電路、該畫素定義層、該平坦層、該至少一溝槽以及該至少一擋牆,該有機薄膜封裝層覆蓋該閘極驅動電路、該畫素定義層、該平坦層以及該至少一溝槽但不覆蓋該至少一擋牆之全部,該至少一溝槽位於該閘極驅動電路以及該至少一擋牆之間。A display panel includes: a substrate having a display area, a peripheral area, and a circuit area, the peripheral area substantially surrounding the display area, the circuit area being located between the display area and the peripheral area; a pixel array Located on the substrate and in the display area, the pixel array includes: a plurality of thin film transistors, each of the thin film transistors includes: an active layer; a gate insulation layer on the active layer; a gate electrode, On the gate insulation layer; an interlayer insulation layer on the gate electrode; and a source and a drain electrode on the interlayer insulation layer and electrically connected to the active layer through a plurality of first contact holes, respectively A first contact hole penetrates the interlayer insulating layer and the gate insulating layer; A plurality of electrically excited light elements are respectively electrically connected to the drain electrodes of the corresponding thin film transistors; and a pixel definition layer is located on the interlayer insulating layer, wherein each of the electrically excited light elements includes a lower electrode located between the layers; An insulating layer and the pixel defining layer; an upper electrode; and a light emitting layer located in an opening penetrating the pixel defining layer and between the lower electrode and the upper electrode, wherein the pixel array further includes A flat layer is located between the interlayer insulating layer and the pixel-defining layer. The flat layer has a plurality of second contact holes, and the lower electrodes of the electro-active light emitting elements are electrically connected through the second contact holes, respectively. To the corresponding drain electrode of the thin film transistor; a composite insulating layer on the substrate and in the peripheral region, the composite insulating layer including: a first insulating layer formed of the same material layer as the interlayer insulating layer; A second insulating layer is located between the first insulating layer and the substrate, the second insulating layer and the gate insulating layer are formed of the same material layer, and at least one trench runs through the first insulating layer and the second insulating layer. A margin layer; and an organic insulating filler that completely fills the at least one trench and contacts the first insulating layer and the second insulating layer at the sidewall of the at least one trench; an encapsulation layer located on the picture The element array and the composite insulating layer, the encapsulation layer overlaps the at least one trench, the encapsulation layer includes a first inorganic thin film encapsulation layer, an organic thin film encapsulation layer and a second inorganic thin film encapsulation layer, the first inorganic A thin film encapsulation layer is located between the pixel array and the composite insulation On the edge layer, the organic thin film encapsulation layer is located between the first inorganic thin film encapsulation layer and the second inorganic thin film encapsulation layer; at least one retaining wall is disposed on the first insulating layer, and the at least one groove is disposed on the at least Between a barrier wall and the pixel array, the encapsulation layer covers the at least one barrier wall, and the first inorganic thin film encapsulation layer further covers the first insulation layer outside the barrier wall; and a gate driving circuit is located at The gate driving circuit is electrically connected to the pixel array on the substrate and is located in the circuit region. The pixel definition layer and the flat layer extend from the display region to the circuit region. The gate driving circuit is Covered by the pixel definition layer and the flat layer, the first inorganic thin film encapsulation layer covers the gate driving circuit, the pixel definition layer, the flat layer, the at least one trench and the at least one retaining wall, the organic The thin-film encapsulation layer covers the gate driving circuit, the pixel definition layer, the flat layer, and the at least one trench but does not cover all of the at least one retaining wall, and the at least one trench is located in the gate driving circuit and the at least one First gear Between.
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