TWI663816B - Interleaved high step-up dc-dc converter - Google Patents

Interleaved high step-up dc-dc converter Download PDF

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TWI663816B
TWI663816B TW107114501A TW107114501A TWI663816B TW I663816 B TWI663816 B TW I663816B TW 107114501 A TW107114501 A TW 107114501A TW 107114501 A TW107114501 A TW 107114501A TW I663816 B TWI663816 B TW I663816B
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diode
winding
capacitor
voltage
lifting
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TW201946360A (en
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陳信助
楊松霈
黃昭明
蘇偉府
陳郁樺
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崑山科技大學
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    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02B—CLIMATE CHANGE MITIGATION TECHNOLOGIES RELATED TO BUILDINGS, e.g. HOUSING, HOUSE APPLIANCES OR RELATED END-USER APPLICATIONS
    • Y02B70/00—Technologies for an efficient end-user side electric power management and consumption
    • Y02B70/10—Technologies improving the efficiency by using switched-mode power supplies [SMPS], i.e. efficient power electronics conversion e.g. power factor correction or reduction of losses in power supplies or efficient standby modes

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Abstract

本發明係有關於一種交錯式高升壓直流-直流轉換器，其主要係符合高電壓增益、高效率及高功率應用之需求，可適用於再生能源電力系統中的電能轉換，轉換器利用三繞組耦合電感和電壓倍增單元，導入電壓舉升與電壓疊加的串接與疊接技術達到提高輸出電壓的目的，電壓倍增單元是由二極體，電容及耦合電感的第二繞組或第三繞組串聯組成，因此轉換器可以利用調整耦合電感匝數比，增加高電壓增益的設計自由度，高電壓增益的達成，轉換器不必操作在極大的導通比，功率開關電壓應力遠低於輸出電壓，降低導通損失，交錯式操作，降低輸入電流漣波，耦合電感的漏電感能量能夠回收再利用，不但能提升效率，也能避免開關的電壓突波問題。 The invention relates to an interleaved high-boost DC-DC converter, which mainly meets the requirements of high voltage gain, high efficiency, and high power applications. It can be applied to electrical energy conversion in renewable energy power systems. The winding is coupled with an inductor and a voltage doubling unit. The series connection and cascade technology of voltage lifting and voltage superposition is introduced to achieve the purpose of increasing the output voltage. The voltage doubling unit is a second winding or a third winding of a diode, a capacitor, and a coupled inductor. In series, the converter can adjust the turns ratio of the coupled inductor to increase the design freedom of high voltage gain. The high voltage gain can be achieved without the converter operating at a very large conduction ratio. The power switch voltage stress is much lower than the output voltage. Reduce the conduction loss, staggered operation, reduce the input current ripple, the leakage inductance energy of the coupled inductor can be recovered and reused, which can not only improve the efficiency, but also avoid the voltage surge problem of the switch.

Description

交錯式高升壓直流-直流轉換器 Interleaved high boost DC-DC converter

本發明係有關於一種交錯式高升壓直流-直流轉換器，尤其是指一種達成高電壓增益，不必操作在極大的導通比，且可降低導通損失，並可降低輸入電流漣波大小，具有分擔輸入電流的效果，適合高輸入電流應用，同時令二極體的反向恢復損失得以改善，更能改善效率，避免造成電壓突波問題，而在其整體施行使用上更增實用功效特性者。 The invention relates to an interleaved high-boost DC-DC converter, in particular to a method for achieving high voltage gain without having to operate at a large turn-on ratio, which can reduce the turn-on loss and reduce the size of input current ripple. Sharing the effect of input current, suitable for high input current applications, while improving the reverse recovery loss of the diode, which can improve the efficiency, avoid the problem of voltage surge, and increase the practical efficiency characteristics in its overall implementation and use .

按，2015年12月於法國巴黎舉行「聯合國氣候變化綱要公約第21次締約方會議」〔COP21〕，與會的195國與歐盟代表通過了遏阻全球暖化的《巴黎協定》〔Paris Agreement〕。各國將致力於大幅減少溫室氣體〔greenhouse gas〕排放，力保在本世紀結束之前，全球均溫上升不超過攝氏2度，進而追求不超過攝氏1.5度的更艱難目標。希望各國透過再生能源，用更有效的方式達成減排目標，追求經濟的「綠色成長」。爰此，再生能源將成為最主要 的電力型態，也是各國綠色低碳能源發展的重點方向，包含太陽能、風力能、燃料電池、水力能、地熱能、潮汐能及生質能等。 According to the "21st Meeting of the Parties to the United Nations Framework Convention on Climate Change" [COP21] held in Paris, France in December 2015, representatives of the 195 countries and the EU adopted the Paris Agreement to curb global warming [Paris Agreement] . Countries will work to significantly reduce greenhouse gas emissions, and strive to ensure that the global average temperature rise does not exceed 2 degrees Celsius before the end of this century, and then pursues the more difficult goal of not exceeding 1.5 degrees Celsius. It is hoped that countries will use renewable energy to achieve emission reduction goals in a more effective way and pursue "green growth" of the economy. Therefore, renewable energy will become the most important The type of electricity is also the focus of green and low-carbon energy development in various countries, including solar energy, wind energy, fuel cells, hydropower, geothermal energy, tidal energy and biomass energy.

目前我國政府積極推動再生能源電力系統，例如能源局公告的「太陽光電2年推動計畫」、「風力發電4年推動計畫」，並以2025年再生能源發電量占比達20%為努力的方向，未來將以太陽光電及離岸風力發電作為推動再生能源設置的主力，其中的太陽光電目標是將於2025年達20 GW，預估年發電量達250億度電；風力發電總裝置容量達44.2 GW。 At present, the Chinese government actively promotes renewable energy power systems, such as the "Solar Photovoltaic 2 Years Promotion Plan" and "Wind Power 4 Years Promotion Plan" announced by the Energy Bureau, and strives to generate 20% of renewable energy power generation in 2025. In the future, solar photovoltaic and offshore wind power will be used as the main force to promote the setting of renewable energy sources. The solar photovoltaic target is to reach 20 GW by 2025, and the estimated annual power generation will reach 25 billion kWh; the total wind power installation The capacity reaches 44.2 GW.

在日本、歐洲與美國裝設於屋頂的住宅型太陽能併網電力系統，最近也成為成長快速的市場。另外，由於燃料電池是經由利用氫及氧的化學反應，產生電流及水，不但完全無污染，也避免了傳統電池充電耗時的問題，是極具發展前景的新能源方式，應用在車輛及發電系統上，將能顯著改善空氣污染及溫室效應。因此，在再生能源電力系統應用中，太陽能發電系統及燃料電池發電系統及風力發電系統常在分散式發電系統〔distributed generation system〕，扮演重要的角色。 Residential solar grid-connected power systems installed on rooftops in Japan, Europe, and the United States have recently become fast-growing markets. In addition, fuel cells generate electricity and water through a chemical reaction using hydrogen and oxygen, which is not only completely pollution-free, but also avoids the time-consuming problem of traditional battery charging. It is a promising new energy method for applications in vehicles and vehicles. The power generation system will significantly improve air pollution and the greenhouse effect. Therefore, in the application of renewable energy power systems, solar power generation systems, fuel cell power generation systems, and wind power generation systems often play an important role in distributed generation systems.

一般而言，應用太陽能電池或燃料電池模組的再生能源電力系統，由於安全性與可靠性的問題，太陽能電池模組與燃料電池所產生的輸出電壓是屬於低電壓，一般不超過40V，為了達到併網發電或直流微電網的需求，必須先將此低電壓利用高升壓DC-DC轉換器，升壓至一個高電壓直流排。例如：對於一個單相220 Vac 的電網系統而言，此高電壓直流排常為380-400 Vdc，以利全橋式換流器〔full-bridge inverter〕的DC-AC電源轉換。 Generally speaking, for renewable energy power systems using solar cells or fuel cell modules, due to safety and reliability issues, the output voltage generated by solar cell modules and fuel cells is low voltage, generally not exceeding 40V. To meet the needs of grid-connected power generation or DC microgrids, this low voltage must first be boosted to a high-voltage DC bank using a high-boost DC-DC converter. Example: For a single phase 220 Vac In terms of the power grid system, this high-voltage DC bus is often 380-400 Vdc to facilitate the DC-AC power conversion of a full-bridge inverter.

對於直流升壓目的而言，理論上，操作在極高導通比的傳統升壓型〔boost〕轉換器能夠得到高電壓增益，但是實務上受到寄生元件的影響，電壓轉換比受限在約5倍以下，因此當電壓增益高達10倍左右的實務需求時，研發嶄新的高升壓轉換器拓樸是必要的。因此，於近幾年來，高升壓DC-DC轉換器是電力電子工程領域中常見的研究主題之一。 For DC boosting purposes, in theory, traditional boost converters operating at extremely high turn-on ratios can achieve high voltage gains, but in practice are affected by parasitic elements, and the voltage conversion ratio is limited to about 5 When the voltage gain is as high as about 10 times the practical requirement, it is necessary to develop a new high boost converter topology. Therefore, in recent years, high-boost DC-DC converters are one of the common research topics in the field of power electronics engineering.

在電壓增益考量方面：請參閱第二十三圖傳統升壓型轉換器電路示意圖所示，其中電感L的等效串聯電阻為R L ，當考慮理想元件(R L =0)且操作在連續導通模式〔CCM〕模式時，理想上其輸出電壓增益M，如(1)式，電壓增益完全決定於導通比〔duty ratio〕D。 In terms of voltage gain considerations, please refer to the schematic diagram of the traditional boost converter circuit shown in Figure 23, where the equivalent series resistance of the inductor L is R L. When an ideal component ( R L = 0) is considered and the operation is continuous In the conduction mode [CCM] mode, the output voltage gain M is ideal, as in (1), the voltage gain is completely determined by the duty ratio D.

理論上要得到高電壓增益，轉換器必須操作在極大導通比；但是實務上，由於寄生元件的存在，例如R L ≠0，則電壓增益M與轉換效率η對導通比的表示式分別為(2)、(3)式。 In theory, to obtain a high voltage gain, the converter must operate at a very large conduction ratio; but in practice, due to the presence of parasitic elements, such as R L ≠ 0, the voltage gain M and the conversion efficiency η on the conduction ratio are expressed as ( 2), (3).

可知實務上操作在極大導通比的傳統升壓型轉換器其電壓 增益是有所限制，而且轉換效率不佳。另一方面，操作在極大導通比的升壓型轉換器衍生了以下問題：容易產生很大的輸入電流漣波，使得太陽能電池模組輸出端的電解電容數量必須增加，減少燃料電池的使用壽命；另一方面，輸出二極體的反向恢復問題造成嚴重的反向恢復損失及EMI雜訊問題。 It can be known that the voltage of a traditional boost converter that operates at a very large turn-on ratio in practice The gain is limited and the conversion efficiency is poor. On the other hand, the boost converter operating at a very high conduction ratio has the following problems: it is easy to generate a large input current ripple, so that the number of electrolytic capacitors at the output end of the solar cell module must be increased, reducing the service life of the fuel cell; On the other hand, the reverse recovery problem of the output diode causes serious reverse recovery loss and EMI noise problems.

使得為了符合高功率、高輸入電流應用及降低輸入電流漣波的特性，發展出交錯式〔interleaved〕升壓型轉換器，請參閱第二十四圖交錯式升壓型轉換器電路示意圖所示，然而電壓增益有所限制及輸出二極體的反向恢復問題依然存在。 In order to comply with the characteristics of high power, high input current applications and reduce input current ripple, an interleaved boost converter is developed. Please refer to Figure 24 for the schematic diagram of the interleaved boost converter circuit. However, the voltage gain is limited and the problem of reverse recovery of the output diode still exists.

在轉換效率考量方面：由於環保意識高漲，節能減碳是各國的重要政策，轉換器的效率要求日益嚴苛，功率電子開關造成的功率損失必須善加考量。典型交錯式升壓型轉換器之功率開關與輸出二極體之電壓應力均為高壓的輸出電壓，由於高耐壓的MOSFET，一般都具有高導通電阻RDS(ON)的特性，導致較高的導通損失。 In terms of conversion efficiency considerations: Due to the rising awareness of environmental protection, energy conservation and carbon reduction are important policies in various countries. The efficiency requirements of converters are becoming increasingly stringent, and the power loss caused by power electronic switches must be carefully considered. The voltage stress of the power switch and the output diode of a typical staggered boost converter are both high-voltage output voltages. Because of the high withstand voltage MOSFETs, they generally have a high on-resistance R DS (ON) , resulting in higher Loss of continuity.

緣是，發明人有鑑於此，秉持多年該相關行業之豐富設計開發及實際製作經驗，針對現有之結構及缺失再予以研究改良，提供一種交錯式高升壓直流-直流轉換器，以期達到更佳實用價值性之目的者。 The reason is that the inventors have taken this into consideration, and based on many years of rich design, development, and practical production experience in this related industry, they research and improve the existing structure and defects, and provide an interleaved high-boost DC-DC converter in order to achieve more For the purpose of good practical value.

本發明之主要目的在於提供一種交錯式高升壓直流-直流轉換器，主要係達成高電壓增益，不必操作在極大的導通比，且可 降低導通損失，並可降低輸入電流漣波大小，具有分擔輸入電流的效果，適合高輸入電流應用，同時令二極體的反向恢復損失得以改善，更能改善效率，避免造成電壓突波問題，而在其整體施行使用上更增實用功效特性者。 The main object of the present invention is to provide an interleaved high-boost DC-DC converter, which mainly achieves high voltage gain, and does not need to operate at a very large conduction ratio. Reduce the conduction loss and reduce the input current ripple. It has the effect of sharing the input current and is suitable for high input current applications. At the same time, the reverse recovery loss of the diode can be improved, and the efficiency can be improved. , And in its overall implementation and use more practical features.

本發明交錯式高升壓直流-直流轉換器之主要目的與功效，係由以下具體技術手段所達成： 其主要係令轉換器於輸入電壓V in 之正極分別連接有第一耦合電感第一繞組N 11之第一端及第二耦合電感第一繞組N 21之第一端，該輸入電壓V in 之負極進行接地，於該第一耦合電感第一繞組N 11之第二端分別連接有第一功率開關S 1之第一端及第一箝位二極體D c1之正極，於該第二耦合電感第一繞組N 21之第二端分別連接有第二功率開關S 2之第一端及第二箝位二極體D c2之正極，該第一功率開關S 1之第二端及該第二功率開關S 2之第二端皆進行接地，該第一箝位二極體D c1之負極與該第二箝位二極體D c2之負極分別連接箝位電容C c 之第一端及電壓舉升單元〔voltage lift cell〕，該箝位電容C c 之第二端進行接地，該電壓舉升單元係分別由第二舉升二極體D l2、第二舉升電容C l2、第一耦合電感第二繞組N 12、第一舉升二極體D l1、第二耦合電感第二繞組N 22及第一舉升電容C l1所組成，該第二舉升二極體D l2之正極及該第二舉升電容C l2之第一端皆與該第一箝位二極體D c1之負極、該第二箝位二極體D c2之負極及該箝位電容C c 之第一端連接，該第二舉升電容C l2之第二端分別連接該第一耦合電感 第二繞組N 12之第一端與該第一舉升二極體D l1之正極，該第一耦合電感第二繞組N 12之第二端連接該第二耦合電感第二繞組N 22之第二端，該第二耦合電感第二繞組N 22之第一端連接該第二舉升二極體D l2之負極及該第一舉升電容C l1之第一端，該第一舉升電容C l1之第二端連接該第一舉升二極體D l1之負極，令該電壓舉升單元之該第一舉升電容C l1的第二端與該第一舉升二極體D l1的負極皆與一輸出二極體D o 之正極連接，該輸出二極體D o 之負極分別連接有輸出電容C 1之第一端及電壓疊加單元〔voltage stack cell〕，該輸出電容C 1之第二端進行接地，該電壓疊加單元係分別由第一切換電容C 2、第二切換電容C 3、第一耦合電感第三繞組N 13、第二耦合電感第三繞組N 23、第一切換二極體D s1及第二切換二極體D s2所組成，該第一切換電容C 2之第一端及該第二切換二極體D s2之正極皆與該輸出二極體D o 之負極及該輸出電容C 1之第一端連接，該第一切換電容C 2之第二端連接該第一耦合電感第三繞組N 13之第一端及該第二切換電容C 3之第一端，該第一耦合電感第三繞組N 13之第二端連接該第二耦合電感第三繞組N 23之第二端，該第二切換二極體D s2之負極連接該第二耦合電感第三繞組N 23之第一端及該第一切換二極體D s1之正極，該第一切換二極體D s1之負極及該第二切換電容C 3之第二端連接負載R o 之正極，該負載R o 之負極則進行接地；令該轉換器在使用過程中，導通比大於0.5，且該第一功率開關S 1和該第二功率開關S 2以相差半切換週期的交錯式操作。 The main purpose and efficacy of the staggered high-boost DC-DC converter of the present invention are achieved by the following specific technical methods: The main purpose is that the converter is respectively connected to the positive pole of the input voltage V in with a first coupling inductor and a first winding. The first end of N 11 and the first end of the second coupled inductor first winding N 21 , the negative pole of the input voltage V in is grounded, and the second end of the first coupled inductor first winding N 11 is respectively connected to the first end The first end of a power switch S 1 and the positive pole of the first clamping diode D c 1 are respectively connected to the first end of the second power switch S 2 at the second end of the second coupling inductor first winding N 21 . Terminal and the positive pole of the second clamping diode D c 2 , the second terminal of the first power switch S 1 and the second terminal of the second power switch S 2 are grounded, and the first clamping diode The negative electrode of D c 1 and the negative electrode of the second clamping diode D c 2 are respectively connected to the first terminal of the clamping capacitor C c and the voltage lift cell, and the second of the clamping capacitor C c end grounded, the voltage lines are respectively the second lifting means lifting diode D l 2, the second lifting capacitor C l 2 First coupling inductor second winding N 12, lifting the first diode D l 1, a second winding N 22 of the second coupled inductor and the first capacitor C l 1 lift composed of the second diode lift The positive electrode of D l 2 and the first end of the second lifting capacitor C l 2 are both the negative electrode of the first clamped diode D c 1, the negative electrode of the second clamped diode D c 2 , and the the clamping capacitor C c connected to a first end of the second lift of the second end of the capacitor C l 2 are respectively connected to the first coupling a second inductor winding N 12 of the first end of the first lift diode D The positive terminal of l1 , the second terminal of the first coupled inductor second winding N 12 is connected to the second terminal of the second coupled inductor second winding N 22, and the first terminal of the second coupled inductor second winding N 22 is connected lifting the second diode D l 2 of the negative electrode and the first capacitor C l lift the first end 1, the first lifting of the second end of the capacitor C l 1 connected to the first lifting diode The negative pole of D l 1 causes the second end of the first lifting capacitor C l 1 of the voltage lifting unit and the negative pole of the first lifting diode D l 1 to be connected to an output diode D o the positive electrode is connected to the output of the diode D o negative Are connected to a first terminal of the output capacitor C 1 and a voltage superimposing unit voltage stack cell [], the second terminal of the output capacitor C 1 is grounded, the voltage superimposing unit by the first line switching capacitor C 2, a second switch The capacitor C 3 , the first coupled inductor third winding N 13 , the second coupled inductor third winding N 23 , the first switching diode D s 1 and the second switching diode D s 2 are composed of the first switch a first terminal of capacitor C 2 and the second switching diode D s 2 of both the positive and the negative output of the diode D o and said first output terminal of the capacitor C 1 is connected to a first switching capacitor C 2 A second terminal of the first coupled inductor third winding N 13 is connected to the first terminal of the first coupled inductor third winding N 13 and a second terminal of the second switched capacitor C 3 is connected to the second terminal of the first coupled inductor third winding N 13 . The second end of the third winding N 23 of the coupled inductor, the negative pole of the second switching diode D s 2 is connected to the first end of the third winding N 23 of the second coupling inductor and the first switching diode D s 1 the positive electrode, the first switching diode D s 1 and the negative electrode of the second switching capacitor C 3 connected to the second end of the load R o of the positive electrode, R o is the negative electrode of the load is grounded; enabling the converter during use, the conduction ratio is greater than 0.5, and the switch S 1 is the first power and the second power switch S 2 to the phase difference half-interleaved switching cycle of operation.

本發明交錯式高升壓直流-直流轉換器的較佳實施例，其中， 該第一耦合電感第一繞組N 11、第二繞組N 12、第三繞組N 13構成匝數N 11：N 12：N 13之理想變壓器。 The present invention is highly interleaved boost DC - DC converter of the preferred embodiment, wherein the first inductor coupling a first winding N 11, the second winding N 12, N 13 constituting the third winding turns N 11: N 12 : Ideal transformer for N 13 .

本發明交錯式高升壓直流-直流轉換器的較佳實施例，其中，該第二耦合電感第一繞組N 21、第二繞組N 22、第三繞組N 23構成匝數N 21：N 22：N 23之理想變壓器。 According to a preferred embodiment of the interleaved high-boost DC-DC converter of the present invention, the first winding N 21 , the second winding N 22 , and the third winding N 23 of the second coupled inductor form the number of turns N 21 : N 22 : Ideal transformer for N 23 .

本發明交錯式高升壓直流-直流轉換器的較佳實施例，其中，該第一耦合電感第一繞組N 11包含有第一磁化電感L m1及第一漏電感L k1。 According to a preferred embodiment of the interleaved high-boost DC-DC converter of the present invention, the first coupling inductor N 11 includes a first magnetizing inductance L m 1 and a first leakage inductance L k 1 .

本發明交錯式高升壓直流-直流轉換器的較佳實施例，其中，該第二耦合電感第一繞組N 21包含有第二磁化電感L m2及第二漏電感L k2。 According to a preferred embodiment of the interleaved high-boost DC-DC converter of the present invention, the first winding N 21 of the second coupling inductor includes a second magnetizing inductance L m 2 and a second leakage inductance L k 2 .

(1)‧‧‧轉換器 (1) ‧‧‧Converter

(11)‧‧‧電壓舉升單元 (11) ‧‧‧Voltage lifting unit

(12)‧‧‧電壓疊加單元 (12) ‧‧‧Voltage Superposition Unit

第一圖：本發明之電路圖 First figure: circuit diagram of the present invention

第二圖：本發明之等效電路圖 Second figure: equivalent circuit diagram of the present invention

第三圖：本發明之主要元件穩態波形圖 Third figure: steady state waveform diagram of the main components of the present invention

第四圖：本發明之第一操作階段等效電路圖 Figure 4: Equivalent circuit diagram of the first operation stage of the present invention

第五圖：本發明之第二操作階段等效電路圖 Figure 5: Equivalent circuit diagram of the second operation stage of the present invention

第六圖：本發明之第三操作階段等效電路圖 Figure 6: Equivalent circuit diagram of the third operation stage of the present invention

第七圖：本發明之第四操作階段等效電路圖 Figure 7: Equivalent circuit diagram of the fourth operation stage of the present invention

第八圖：本發明之第五操作階段等效電路圖 Figure 8: Equivalent circuit diagram of the fifth operation stage of the present invention

第九圖：本發明之第六操作階段等效電路圖 Ninth diagram: The equivalent circuit diagram of the sixth operation stage of the present invention

第十圖：本發明之第七操作階段等效電路圖 Tenth diagram: equivalent circuit diagram of the seventh operation stage of the present invention

第十一圖：本發明之第八操作階段等效電路圖 Figure 11: Equivalent circuit diagram of the eighth operation stage of the present invention

第十二圖：本發明之不同耦合係數和電壓增益的關係曲線圖 Twelfth graph: the relationship curve between different coupling coefficients and voltage gains of the present invention

第十三圖：本發明之電壓增益與導通比及耦合電感匝數比的曲線圖 Thirteenth graph: a graph of the voltage gain, the conduction ratio, and the turns ratio of the coupled inductor of the present invention

第十四圖：本發明之模擬電路示意圖 Figure 14: Schematic diagram of the analog circuit of the present invention

第十五圖：本發明之開關驅動信號、輸入電壓及輸出電壓的模擬波形圖 Figure 15: Analog waveforms of switch driving signals, input voltage and output voltage of the present invention

第十六圖：本發明之開關電壓應力的模擬波形圖 Figure 16: Analog waveform diagram of switching voltage stress of the present invention

第十七圖：本發明之交錯式操作降低輸入電流漣波的模擬波形圖 Figure 17: Simulated waveform diagram of the staggered operation of the present invention to reduce input current ripple

第十八圖：本發明之各電容的電壓波形模擬圖 Figure 18: Voltage waveform simulation diagram of each capacitor of the present invention

第十九圖：本發明之箝位二極體的電流及電壓波形模擬圖 Figure 19: Current and voltage waveform simulation diagram of the clamp diode of the present invention

第二十圖：本發明之舉升二極體的電流及電壓波形模擬圖 Figure 20: Current and voltage waveform simulation diagram of a lifting diode of the present invention

第二十一圖：本發明之切換二極體的電流及電壓波形模擬圖 Figure 21: Current and voltage waveform simulation diagram of the switching diode of the present invention

第二十二圖：本發明之輸出二極體的電流及電壓波形模擬圖 Figure 22: Current and voltage waveform simulation diagram of the output diode of the present invention

第二十三圖：傳統升壓型轉換器電路示意圖 Figure 23: Schematic of a traditional boost converter circuit

第二十四圖：交錯式升壓型轉換器電路示意圖 Figure 24: Schematic diagram of interleaved boost converter circuit

為令本發明所運用之技術內容、發明目的及其達成之功效有更完整且清楚的揭露，茲於下詳細說明之，並請一併參閱所揭之圖式及圖號：首先，請參閱第一圖本發明之電路圖所示，本發明之轉換器(1)主要係於輸入電壓V in 之正極分別連接有第一耦合電感第一繞組N 11之第一端及第二耦合電感第一繞組N 21之第一端，該輸入電壓V in 之負極進行接地，於該第一耦合電感第一繞組N 11之第二端分別連接有第一功率開關S 1之第一端及第一箝位二極體D c1之正極，於該第二耦合電感第一繞組N 21之第二端分別連接有第二功率開關S 2之第一端及第二箝位二極體D c2之正極，該第一功率開關S 1之第二端及該第二功率開關S 2之第二端皆進行接地，該第一箝位二極體D c1之負極與該第二箝位二極體D c2之負極分別連接箝位電容C c 之第一端及電壓舉升單元〔voltage lift cell〕(11)，該箝位電容C c 之第二端進行接地，該電壓舉升單元(11)係分別由第二舉升二極體D l2、第二舉升電容C l2、第一耦合電感第二繞組N 12、第一舉升二極體D l1、第二耦合電感第二繞組N 22及第一舉升電容C l1所組成，該第二舉升二極體D l2之正極及該第二舉升電容C l2之第一端皆與該第一箝位二極體D c1之負極、該第二箝位二極體D c2之負極及該箝位電容C c 之第 一端連接，該第二舉升電容C l2之第二端分別連接該第一耦合電感第二繞組N 12之第一端與該第一舉升二極體D l1之正極，該第一耦合電感第二繞組N 12之第二端連接該第二耦合電感第二繞組N 22之第二端，該第二耦合電感第二繞組N 22之第一端連接該第二舉升二極體D l2之負極及該第一舉升電容C l1之第一端，該第一舉升電容C l1之第二端連接該第一舉升二極體D l1之負極，令該電壓舉升單元(11)之該第一舉升電容C l1的第二端與該第一舉升二極體D l1的負極皆與一輸出二極體D o 之正極連接，該輸出二極體D o 之負極分別連接有輸出電容C 1之第一端及電壓疊加單元〔voltage stack cell〕(12)，該輸出電容C 1之第二端進行接地，該電壓疊加單元(12)係分別由第一切換電容C 2、第二切換電容C 3、第一耦合電感第三繞組N 13、第二耦合電感第三繞組N 23、第一切換二極體D s1及第二切換二極體D s2所組成，該第一切換電容C 2之第一端及該第二切換二極體D s2之正極皆與該輸出二極體D o 之負極及該輸出電容C 1之第一端連接，該第一切換電容C 2之第二端連接該第一耦合電感第三繞組N 13之第一端及該第二切換電容C 3之第一端，該第一耦合電感第三繞組N 13之第二端連接該第二耦合電感第三繞組N 23之第二端，該第二切換二極體D s2之負極連接該第二耦合電感第三繞組N 23之第一端及該第一切換二極體D s1之正極，該第一切換二極體D s1之負極及該第二切換電容C 3之第二端連接負載R o 之正極，該負載R o 之負極則進行接地。 In order to provide a more complete and clear disclosure of the technical content, the purpose of the invention and the effect achieved by the present invention, it is described in detail below, and please also refer to the disclosed drawings and numbers: First, please refer to As shown in the first circuit diagram of the present invention, the converter (1) of the present invention is mainly connected to the positive terminal of the input voltage V in respectively connected to the first end of the first coupling inductor first winding N 11 and the second coupling inductor first The first end of the winding N 21 , the negative pole of the input voltage V in is grounded, and the first end of the first power switch S 1 and the first clamp are connected to the second end of the first coupling inductor first winding N 11 respectively. The positive pole of the second diode D c 1 is connected to the first end of the second power switch S 2 and the second clamp diode D c 2 respectively at the second end of the first winding N 21 of the second coupling inductor. The positive terminal, the second terminal of the first power switch S 1 and the second terminal of the second power switch S 2 are grounded. The negative terminal of the first clamping diode D c 1 and the second clamping diode. D c of anode body 2 are connected to a first end of the clamping capacitor C c of the lifting unit, and a voltage [voltage lift cell] (11), The second end of the clamp capacitor C c to ground, the voltage lifting means (11) respectively, by a second lift-based diode D l 2, the second lifting capacitor C l 2, the second winding of the first coupled inductor N 12 , the first lifting diode D l 1 , the second coupled inductor second winding N 22 and the first lifting capacitor C l 1 , the positive pole of the second lifting diode D l 2 and the the second lift of a first end of the capacitor C l 2 are the first clamping diode D c of the negative electrode 1, the second clamp diode D c of the negative electrode 2 and the clamping capacitor C c of One end is connected, and the second end of the second lifting capacitor C l 2 is respectively connected to the first end of the first coupling inductor second winding N 12 and the positive end of the first lifting diode D l 1 . A second end of a coupled inductor second winding N 12 is connected to a second end of the second coupled inductor second winding N 22 , and a first end of the second coupled inductor second winding N 22 is connected to the second lifting diode. D l of the anode body 2 and the first lifting the first end of the capacitor C l 1, the first lifting of the second end of the capacitor C l 1 connected to the first diode D l lifting the anode 1, so The first lifting of the voltage lifting unit (11) A second terminal of the capacitor C L with the first lift diode D l 1 of the anode are connected to a positive electrode o the output diode D, the output of the diode D o are connected to the negative output capacitor C The first end of 1 and the voltage stack cell (12), the second end of the output capacitor C 1 is grounded, and the voltage stacking unit (12) is switched by the first switching capacitor C 2 and the second The capacitor C 3 , the first coupled inductor third winding N 13 , the second coupled inductor third winding N 23 , the first switching diode D s 1 and the second switching diode D s 2 are composed of the first switch a first terminal of capacitor C 2 and the second switching diode D s 2 of both the positive and the negative output of the diode D o and said first output terminal of the capacitor C 1 is connected to a first switching capacitor C 2 A second terminal of the first coupled inductor third winding N 13 is connected to the first terminal of the first coupled inductor third winding N 13 and a second terminal of the second switched capacitor C 3 is connected to the second terminal of the first coupled inductor third winding N 13 . The second end of the third winding N 23 of the coupled inductor, the negative end of the second switching diode D s 2 is connected to the first end of the third winding N 23 of the second coupling inductor and The anode of the first switching diode D s 1, the anode of the first switching diode D s 1 and the second end of the second switching capacitor C 3 are connected to the anode of a load R o, and the anode of the load R o Ground it.

請再一併參閱第二圖本發明之等效電路圖所示，令該第一耦合電感第一繞組N 11、第二繞組N 12、第三繞組N 13構成匝數N 11：N 12： N 13之理想變壓器，令該第二耦合電感第一繞組N 21、第二繞組N 22、第三繞組N 23構成匝數N 21：N 22：N 23之理想變壓器，且於該第一耦合電感第一繞組N 11包含有第一磁化電感L m1及第一漏電感L k1，並於該第二耦合電感第一繞組N 21包含有第二磁化電感L m2及第二漏電感L k2。 Please refer to the second diagram together as shown in the equivalent circuit diagram of the present invention, so that the first coupling inductor N 11 , the second winding N 12 , and the third winding N 13 constitute the number of turns N 11 : N 12 : N The ideal transformer of 13 is such that the first winding N 21 , the second winding N 22 , and the third winding N 23 of the second coupled inductor form an ideal transformer with the number of turns N 21 : N 22 : N 23 , and the first coupled inductor The first winding N 11 includes a first magnetizing inductance L m 1 and a first leakage inductance L k 1 , and the second winding N 21 includes a second magnetizing inductance L m 2 and a second leakage inductance L k 2 .

而該轉換器(1)在使用過程中，為了達到高升壓性能，導通比大於0.5，而且該第一功率開關S 1和該第二功率開關S 2以相差半切換週期的交錯式操作，穩態時，該轉換器(1)根據各功率開關及各二極體的ON/OFF狀態，在一個切換週期內該轉換器(1)可分成8個操作階段，假設： During the use of the converter (1), in order to achieve high boost performance, the turn-on ratio is greater than 0.5, and the first power switch S 1 and the second power switch S 2 operate in an interleaved manner with a half switching period. In the steady state, the converter (1) can be divided into 8 operating phases in one switching cycle according to the ON / OFF state of each power switch and each diode. Assume:

1.功率半導體元件〔各功率開關及各二極體〕均為理想，即導通壓降為零。 1. Power semiconductor components (each power switch and each diode) are ideal, that is, the on-voltage drop is zero.

2.各電容值夠大，電容電壓可視為定電壓，因此輸出電壓V o 可視為常數。 2. Each capacitor value is large enough, the capacitor voltage can be regarded as a constant voltage, so the output voltage V o can be regarded as a constant.

3.該第一耦合電感與該第二耦合電感的匝數比相等(n=N 12/N 11=N 13/N 11=N 22/N 21=N 23/N 21)，且該第一磁化電感L m1與該第二磁化電感L m2之電感值相等(L m1=L m2=L m )，該第一漏電感L k1與該第二漏電感L k2之電感值相等(L k1=L k2=L k )，L m >>L k ，耦合係數k=L m /(L m +L k )。 3. The first and the second coupled inductor coupled inductor turns ratio is equal to (n = N 12 / N 11 = N 13 / N 11 = N 22 / N 21 = N 23 / N 21), and the first The inductance values of the magnetizing inductance L m 1 and the second magnetizing inductance L m 2 are equal ( L m 1 = L m 2 = L m ), and the inductances of the first leakage inductance L k 1 and the second leakage inductance L k 2 The values are equal ( L k 1 = L k 2 = L k ), L m >> L k , and the coupling coefficient k = L m / ( L m + L k ).

4.該第一耦合電感之該第一磁化電感L m1與該第二耦合電感之該第二磁化電感L m2的電流操作在連續導通模式〔Continuous Conduction Mode,CCM〕。 4. The current of the first magnetizing inductance L m 1 of the first coupling inductor and the second magnetizing inductance L m 2 of the second coupling inductor is operated in a Continuous Conduction Mode (CCM).

其各線性階段線性等效電路以及主要元件波形如下所示，請再一併參閱第三圖本發明之主要元件穩態波形圖所示： 第一階段〔t 0~t 1〕：〔第一功率開關S 1：OFF→ON、第二功率開關S 2：ON、輸出二極體D o ：ON、第一切換二極體D s1：ON、第一箝位二極體D c1：OFF、第二箝位二極體D c2：OFF、第一舉升二極體D l1：OFF、第二舉升二極體D l2：OFF、第二切換二極體D s2：OFF〕：請再一併參閱第四圖本發明之第一操作階段等效電路圖所示，在t=t 0，該第一功率開關S 1由OFF切換成ON，且該第二功率開關S 2仍保持ON。該第一漏電感L k1之電流i Lk1上升，當該第一漏電感L k1之電流i Lk1小於該第一磁化電感L m1之電流i Lm1時〔i Lk1<i Lm1〕，該第一磁化電感L m1所儲存的能量持續傳送至該第一耦合電感第二繞組N 12及該第一耦合電感第三繞組N 13。該輸出二極體D o 及該第一切換二極體D s1保持導通。該第一箝位二極體D c1、該第二箝位二極體D c2、該第一舉升二極體D l1、該第二舉升二極體D l2、該第二切換二極體D s2均為逆向偏壓，該輸出二極體D o 及該第一切換二極體D s1的電流下降速率受到該第一漏電感L k1與該第二漏電感L k2的控制，這緩和了該輸出二極體D o 及該第一切換二極體D s1反向恢復問題。當t=t 1，該第一漏電感L k1之電流i Lk1上升至等於該第一磁化電感L m1之電流i Lm1時〔i Lk1=i Lm1〕，該輸出二極體D o 之電流i Do 及該第一切換二極體D s1之電流i Ds1下降至0，該輸出二極體D o 及該第一切換二極體D s1自然轉態為 OFF，本階段結束。 The linear equivalent circuit of each linear stage and the waveforms of the main components are shown below. Please refer to the third figure again for the steady state waveform diagrams of the main components of the present invention: First stage [ t 0 ~ t 1 ]: [first Power switch S 1 : OFF → ON, second power switch S 2 : ON, output diode D o : ON, first switching diode D s 1 : ON, first clamping diode D c 1 : OFF, second clamped diode D c 2 : OFF, first lifted diode D l 1 : OFF, second lifted diode D l 2 : OFF, second switched diode D s 2 : OFF]: Please refer to the fourth figure again as shown in the equivalent circuit diagram of the first operation stage of the present invention. At t = t 0 , the first power switch S 1 is switched from OFF to ON, and the second power switch S 2 remains ON. The first current of the leakage inductance L k 1 i Lk 1 rises when the first current is the leakage inductance L k 1 i Lk 1 is smaller than the first current of the magnetizing inductance L m 1 i Lm 1 when [i Lk 1 <i Lm 1 ], the energy stored in the first magnetizing inductor L m 1 is continuously transmitted to the first coupled inductor second winding N 12 and the first coupled inductor third winding N 13 . The output diode D o and the first switching diode D s 1 remain on. The first clamped diode D c 1 , the second clamped diode D c 2 , the first lifted diode D l 1 , the second lifted diode D l 2 , the first The two switching diodes D s 2 are both reverse biased. The current drop rate of the output diode D o and the first switching diode D s 1 is affected by the first leakage inductance L k 1 and the second leakage current. Sense L k 2 control, which alleviates the reverse recovery problem of the output diode D o and the first switching diode D s 1 . When t = t 1 , the current i Lk 1 of the first leakage inductance L k 1 rises to be equal to the current i Lm 1 of the first magnetizing inductance L m 1 [ i Lk 1 = i Lm 1 ], the output pole The current i Do of the body D o and the current i Ds 1 of the first switching diode D s 1 drop to 0, and the output diode D o and the first switching diode D s 1 naturally turn off. This phase is over.

第二階段〔t 1~t 2〕：〔第一功率開關S 1：ON、第二功率開關S 2：ON、輸出二極體D o ：ON→OFF、第一切換二極體D s1：ON→OFF、第一箝位二極體D c1：OFF、第二箝位二極體D c2：OFF、第一舉升二極體D l1：OFF、第二舉升二極體D l2：OFF、第二切換二極體D s2：OFF〕：請再一併參閱第五圖本發明之第二操作階段等效電路圖所示，在t=t 1，該輸出二極體D o 及該第一切換二極體D s1轉態為OFF，所有二極體均為逆向偏壓而OFF，該第一功率開關S 1及該第二功率開關S 2皆保持為ON。該輸入電壓V in 跨於兩個耦合電感的初級側，該第一磁化電感L m1、該第一漏電感L k1、該第二磁化電感L m2、該第二漏電感L k2皆跨該輸入電壓V in ，該第一漏電感L k1之電流i Lk1和該第二漏電感L k2之電流i Lk2線性上升，斜率均為V in /(L m +L k )，從能量觀點而言，耦合電感在本階段作儲存能量。當t=t 2，該第二功率開關S 2切換成OFF時，本階段結束。 Second stage [ t 1 ~ t 2 ]: [First power switch S 1 : ON, second power switch S 2 : ON, output diode D o : ON → OFF, first switching diode D s 1 : ON → OFF, first clamp diode D c 1 : OFF, second clamp diode D c 2 : OFF, first lift diode D l 1 : OFF, second lift diode Body D l 2 : OFF, the second switching diode D s 2 : OFF]: Please refer to the fifth figure together as shown in the equivalent circuit diagram of the second operation stage of the present invention. At t = t 1 , the output two The pole body D o and the first switching diode D s 1 are turned OFF, and all the diodes are reverse biased and turned off, and the first power switch S 1 and the second power switch S 2 are maintained as ON. The input voltage V in is across the primary side of two coupled inductors, the first magnetizing inductance L m 1 , the first leakage inductance L k 1 , the second magnetizing inductance L m 2 , and the second leakage inductance L k 2 are across the input voltage V in, the first current of the leakage inductance L k 1 i Lk 1 second and the leakage inductance L k 2 of the current i Lk 2 rises linearly, the slope of both V in / (L m + L k ), From the energy point of view, the coupled inductor is used to store energy at this stage. When t = t 2 and the second power switch S 2 is switched to OFF, this phase ends.

第三階段〔t 2~t 3〕：〔第一功率開關S 1：ON、第二功率開關S 2：ON→OFF、輸出二極體D o ：OFF、第一切換二極體D s1：OFF、第一箝位二極體D c1：OFF→ON、第二箝位二極體D c2：OFF、第一舉升二極體D l1：OFF→ON、第二舉升二極體D l2：OFF→ON、第二切換二極體D s2：OFF→ON〕：請再一併參閱第六圖本發明之第三操作階段等效電路圖所示，在t=t 2，該第二功率開關S 2切換成OFF時，該第二漏電感L k2之電流i Lk2的連續性使得該第二箝位二極體D c2 轉態為ON，該第二漏電感L k2之電流i Lk2線性下降，該第二漏電感L k2之電流i Lk2流經該第二箝位二極體D c2對該箝位電容C c 充電。該第二磁化電感L m2所儲存的能量以返馳式模式傳送能量至該第二耦合電感第二繞組N 22及該第二耦合電感第三繞組N 23，使得該第一舉升二極體D l1、該第二舉升二極體D l2及該第二切換二極體D s2轉態為ON，該第一舉升二極體D l1之電流i Dl1、該第二舉升二極體D l2之電流i Dl2及該第二切換二極體D s2之電流i Ds2分別對該第一舉升電容C l1、該第二舉升電容C l2及該第一切換電容C 2充電。當t=t 3，該第二漏電感L k2儲存的能量釋放完畢，即該第二漏電感L k2之電流i Lk2為0〔i Lk2=0〕，該第二箝位二極體D c2自然轉態成OFF時，本階段結束。 Third stage [ t 2 ~ t 3 ]: [First power switch S 1 : ON, second power switch S 2 : ON → OFF, output diode D o : OFF, first switching diode D s 1 : OFF, first clamped diode D c 1 : OFF → ON, second clamped diode D c 2 : OFF, first lifted diode D l 1 : OFF → ON, second lifted Diode D l 2 : OFF → ON, the second switching diode D s 2 : OFF → ON]: Please refer to FIG. 6 again, as shown in the equivalent circuit diagram of the third operation stage of the present invention, at t = t 2 , when the second power switch S 2 is turned OFF, the continuity of the current i Lk 2 of the second leakage inductance L k 2 causes the second clamped diode D c 2 to turn ON, and the first two leakage inductance L k 2 of the current i Lk 2 decreases linearly, the second leakage inductance L k 2 of the current i Lk 2 flowing through the second clamp diode D c 2 charging the clamping capacitor C c. The energy stored in the second magnetizing inductance L m 2 transfers energy to the second coupled inductor second winding N 22 and the second coupled inductor third winding N 23 in a flyback mode, so that the first lifted two poles Body D l 1 , the second lifting diode D l 2 and the second switching diode D s 2 are turned ON, and the current i Dl 1 of the first lifting diode D l 1 , the The current i Dl 2 of the second lifting diode D l 2 and the current i Ds 2 of the second switching diode D s 2 are respectively for the first lifting capacitor C l 1 and the second lifting capacitor C l 2 and the first switching capacitor C 2 are charged. When t = t 3 , the energy stored in the second leakage inductance L k 2 is released, that is, the current i Lk 2 of the second leakage inductance L k 2 is 0 [ i Lk 2 = 0], and the second clamp second This phase ends when the polar body D c 2 naturally turns to OFF.

第四階段〔t 3~t 4〕：〔第一功率開關S 1：ON、第二功率開關S 2：OFF、輸出二極體D o ：OFF、第一切換二極體D s1：OFF、第一箝位二極體D c1：OFF、第二箝位二極體D c2：ON→OFF、第一舉升二極體D l1：ON、第二舉升二極體D l2：ON、第二切換二極體D s2：ON〕：請再一併參閱第七圖本發明之第四操作階段等效電路圖所示，在t=t 3，該第二漏電感L k2能量完全釋放到箝位電容C c ，該第二漏電感L k2之電流i Lk2為0〔i Lk2=0〕，該第二箝位二極體D c2自然轉態成OFF。該第二磁化電感L m2之電流i Lm2由該第二耦合電感第一繞組N 21反射到該第二耦合電感第二繞組N 22及該第二耦合電感第三繞組N 23，該第一舉升二極體D l1之電流i Dl1、該第二舉升二極體D l2之電流i Dl2及該第二切換二極體D s2之電流i DS2分別對該第一舉升電容C l1、該第二舉升電容C l2及該第一切換電容C 2充電。此階段流過該第一功 率開關S 1的電流i S1=i Lm1+i Lm2。當t=t 4，該第二功率開關S 2切換成ON時，本階段結束。 Fourth stage [ t 3 ~ t 4 ]: [first power switch S 1 : ON, second power switch S 2 : OFF, output diode D o : OFF, first switching diode D s 1 : OFF the first clamping diode D c 1: OFF, the second clamp diode D c 2: ON → OFF, the first lifting diode D l 1: ON, the second lift diode D l 2 : ON, the second switching diode D s 2 : ON]: Please refer to the seventh diagram together as shown in the equivalent circuit diagram of the fourth operation stage of the present invention. At t = t 3 , the second leakage inductance The energy of L k 2 is completely released to the clamping capacitor C c , the current i Lk 2 of the second leakage inductance L k 2 is 0 [ i Lk 2 = 0], and the second clamping diode D c 2 naturally transitions. To OFF. The current i Lm 2 of the second magnetizing inductance L m 2 is reflected by the second coupled inductor first winding N 21 to the second coupled inductor second winding N 22 and the second coupled inductor third winding N 23 . a lift diode D l currents 1 i Dl 1, lifting the second diode D l 2 of the current i Dl 2 and the second switching diode D s 2 of the current i DS 2 are the The first lifting capacitor C l 1 , the second lifting capacitor C l 2, and the first switching capacitor C 2 are charged. The current i S 1 = i Lm 1 + i Lm 2 flowing through the first power switch S 1 at this stage. When t = t 4 and the second power switch S 2 is turned ON, this phase ends.

第五階段〔t 4~t 5〕：〔第一功率開關S 1：ON、第二功率開關S 2：OFF→ON、輸出二極體D o ：OFF、第一切換二極體D s1：OFF、第一箝位二極體D c1：OFF、第二箝位二極體D c2：OFF、第一舉升二極體D l1：ON、第二舉升二極體D l2：ON、第二切換二極體D s2：ON〕：請再一併參閱第八圖本發明之第五操作階段等效電路圖所示，在t=t 4，該第二功率開關S 2切換成ON，該第二漏電感L k2之電流i Lk2上升，當該第二漏電感L k2之電流i Lk2小於該第二磁化電感L m2之電流i Lm2時〔i Lk2<i Lm2〕，該第二磁化電感L m2所儲存的能量持續傳送至該第二耦合電感第二繞組N 22及該第二耦合電感第三繞組N 23。該第一舉升二極體D l1、該第二舉升二極體D l2及該第二切換二極體D s2仍保持導通狀態。該第一箝位二極體D c1、該第二箝位二極體D c2、該第一切換二極體D s1、該輸出二極體D o 均為逆向偏壓，該第一舉升二極體D l1、該第二舉升二極體D l2及該第二切換二極體D s2電流的下降速率受到該第一漏電感L k1與該第二漏電感L k2的控制，因此緩和該第一舉升二極體D l1、該第二舉升二極體D l2及該第二切換二極體D s2的反向恢復問題。當t=t 5，該第二漏電感L k2之電流i Lk2上升至等於該第二磁化電感L m2之電流i Lm2時〔i Lk2=i Lm2〕，該第一舉升二極體D l1之電流i Dl1、該第二舉升二極體D l2之電流i Dl2及該第二切換二極體D s2之電流i Ds2下降至0，該第一舉升二極體D l1、該第二舉升二極體D l2及該第二切換二極體D s2自然轉態成OFF，本階段結束。 Fifth stage [ t 4 ~ t 5 ]: [First power switch S 1 : ON, second power switch S 2 : OFF → ON, output diode D o : OFF, first switching diode D s 1 : OFF, first clamped diode D c 1 : OFF, second clamped diode D c 2 : OFF, first lifted diode D l 1 : ON, second lifted diode D l 2 : ON, second switching diode D s 2 : ON]: Please refer to the eighth figure again as shown in the equivalent circuit diagram of the fifth operation stage of the present invention. At t = t 4 , the second power switch S 2 is switched to ON, the second current leakage inductance L k i Lk 2 of 2 increase, when the second current leakage inductance L k i Lk 2 of 2 less than the second magnetizing inductance L m 2 of the current i Lm 2 [ I Lk 2 < i Lm 2 ], the energy stored in the second magnetizing inductor L m 2 is continuously transmitted to the second coupled inductor second winding N 22 and the second coupled inductor third winding N 23 . The first lifting diode D l 1 , the second lifting diode D l 2 and the second switching diode D s 2 remain in a conducting state. The first clamped diode D c 1 , the second clamped diode D c 2 , the first switching diode D s 1 , and the output diode D o are all reverse biased. The falling rates of the currents of the lifting diode D l 1 , the second lifting diode D l 2 and the second switching diode D s 2 are affected by the first leakage inductance L k 1 and the second leakage current. Sense the control of L k 2 , thereby alleviating the reverse recovery problem of the first lifting diode D l 1 , the second lifting diode D 1 2 and the second switching diode D s 2 . When t = t 5 , the current i Lk 2 of the second leakage inductance L k 2 rises to be equal to the current i Lm 2 of the second magnetization inductance L m 2 [ i Lk 2 = i Lm 2 ]. diode D l l currents 1 i Dl 1, lifting the second diode D l 2 of the current i Dl 2 and the second switching diode D s 2 of the current i Ds 2 down to 0, the The first lifted diode D l 1 , the second lifted diode D l 2, and the second switched diode D s 2 naturally transition to OFF, and this phase ends.

第六階段〔t 5~t 6〕：〔第一功率開關S 1：ON、第二功率開關S 2：ON、輸出二極體D o ：OFF、第一切換二極體D s1：OFF、第一箝位二極體D c1：OFF、第二箝位二極體D c2：OFF、第一舉升二極體D l1：ON→OFF、第二舉升二極體D l2：ON→OFF、第二切換二極體D s2：ON→OFF〕：請再一併參閱第九圖本發明之第六操作階段等效電路圖所示，在t=t 5，該第一舉升二極體D l1、該第二舉升二極體D l2、該第二切換二極體D s2轉態為OFF，所有二極體均為逆向偏壓而OFF，該第一功率開關S 1及該第二功率開關S 2皆為ON。該輸入電壓V in 跨於兩個耦合電感的初級側，該第一磁化電感L m1、該第一漏電感L k1、該第二磁化電感L m2、該第二漏電感L k2皆跨該輸入電壓V in ，該第一漏電感L k1之電流i Lk1和該第二漏電感L k2之電流i Lk2線性上升，斜率均為V in /(L m +L k )，從能量觀點而言，耦合電感在本階段作儲存能量。當t=t 6，該第一功率開關S 1切換成OFF時，本階段結束。 Sixth stage [ t 5 ~ t 6 ]: [First power switch S 1 : ON, second power switch S 2 : ON, output diode D o : OFF, first switching diode D s 1 : OFF 1. The first clamped diode D c 1 : OFF, the second clamped diode D c 2 : OFF, the first lifted diode D l 1 : ON → OFF, and the second lifted diode D. l 2 : ON → OFF, second switching diode D s 2 : ON → OFF]: Please refer to the ninth figure together with the equivalent circuit diagram of the sixth operation stage of the present invention. At t = t 5 , the The first lifted diode D l 1 , the second lifted diode D l 2 , and the second switched diode D s 2 are turned OFF, and all the diodes are reverse biased and turned OFF, The first power switch S 1 and the second power switch S 2 are both ON. The input voltage V in is across the primary side of two coupled inductors, the first magnetizing inductance L m 1 , the first leakage inductance L k 1 , the second magnetizing inductance L m 2 , and the second leakage inductance L k 2 are across the input voltage V in, the first current of the leakage inductance L k 1 i Lk 1 second and the leakage inductance L k 2 of the current i Lk 2 rises linearly, the slope of both V in / (L m + L k ), From the energy point of view, the coupled inductor is used to store energy at this stage. When t = t 6 and the first power switch S 1 is switched to OFF, this phase ends.

第七階段〔t 6~t 7〕：〔第一功率開關S 1：ON→OFF、第二功率開關S 2：ON、輸出二極體D o ：OFF→ON、第一切換二極體D s1：OFF→ON、第一箝位二極體D c1：OFF→ON、第二箝位二極體D c2：OFF、第一舉升二極體D l1：OFF、第二舉升二極體D l2：OFF、第二切換二極體D s2：OFF〕：請再一併參閱第十圖本發明之第七操作階段等效電路圖所示，在t=t 6，該第一功率開關S 1切換成OFF時，該第一漏電感L k1之電流i Lk1的連續性使得該第一箝位二極體D c1轉態為ON，第一漏電感L k1之電流i Lk1流經該第一箝位二極體D c1對該箝位電容C c 充電，該第一漏電感L k1之電流i Lk1呈線性下降，該第一磁化電感 L m1的儲能以返馳式模式傳送至該第一耦合電感第二繞組N 12及該第一耦合電感第三繞組N 13，使得該輸出二極體D o 及該第一切換二極體D s1轉態為ON，該第一切換二極體D s1之電流i Ds1對該第二切換電容C 3充電，該輸出二極體D o 之電流i Do 對該第一舉升電容C l1及該第二舉升電容C l2放電。當t=t 7，該第一漏電感L k1之電流i Lk1下降至0，該第一箝位二極體D c1自然轉態成OFF時，本階段結束。 Seventh stage [ t 6 ~ t 7 ]: [First power switch S 1 : ON → OFF, second power switch S 2 : ON, output diode D o : OFF → ON, first switching diode D s 1 : OFF → ON, first clamped diode D c 1 : OFF → ON, second clamped diode D c 2 : OFF, first lifted diode D l 1 : OFF, second Lifting diode D l 2 : OFF, second switching diode D s 2 : OFF]: Please also refer to the tenth figure together with the equivalent circuit diagram of the seventh operation stage of the present invention, at t = t 6 When the first power switch S 1 is turned OFF, the continuity of the current i Lk 1 of the first leakage inductance L k 1 causes the first clamped diode D c 1 to turn ON, and the first leakage inductance The current i Lk 1 of L k 1 flows through the first clamping diode D c 1 to charge the clamping capacitor C c , and the current i Lk 1 of the first leakage inductance L k 1 decreases linearly, and the first The energy storage of the magnetized inductor L m 1 is transferred to the first coupled inductor second winding N 12 and the first coupled inductor third winding N 13 in a flyback mode, so that the output diode D o and the first switch Diode D s 1 transitions to ON, the first switching diode D s 1 The current i Ds 1 charges the second switching capacitor C 3 , and the current i Do of the output diode D o discharges the first lifting capacitor C l 1 and the second lifting capacitor C l 2 . When t = t 7 , the current i Lk 1 of the first leakage inductance L k 1 drops to 0, and when the first clamped diode D c 1 naturally turns to OFF, this stage ends.

第八階段〔t 7~t 8〕：〔第一功率開關S 1：OFF、第二功率開關S 2：ON、輸出二極體D o ：OFF、第一切換二極體D s1：OFF、第一箝位二極體D c1：ON→OFF、第二箝位二極體D c2：OFF、第一舉升二極體D l1：OFF、第二舉升二極體D l2：OFF、第二切換二極體D s2：OFF〕：請再一併參閱第十一圖本發明之第八操作階段等效電路圖所示，在t=t 7，該第一箝位二極體D c1自然轉態成OFF。該第一磁化電感L m1之電流i Lm1由該第一耦合電感第一繞組N 11反射到該第一耦合電感第二繞組N 12及該第一耦合電感第三繞組N 13，該輸出二極體D o 之電流i Do 對該輸出電容C 1充電，該第一切換二極體D s1之電流i DS1對該第二切換電容C 3充電。此階段流過該第二功率開關S 2的電流i S2=i Lm1+i Lm2。當t=t 8=T s +t 0，該第一功率開關S 1切換成ON時，本階段結束，進入下一個切換週期。 Eighth stage [ t 7 ~ t 8 ]: [first power switch S 1 : OFF, second power switch S 2 : ON, output diode D o : OFF, first switching diode D s 1 : OFF 1. The first clamped diode D c 1 : ON → OFF, the second clamped diode D c 2 : OFF, the first lifted diode D l 1 : OFF, the second lifted diode D l 2 : OFF, the second switching diode D s 2 : OFF]: Please refer to FIG. 11 again for the equivalent circuit diagram of the eighth operation stage of the present invention. At t = t 7 , the first clamp The bit diode D c 1 naturally transitions to OFF. The current i Lm 1 of the first magnetizing inductance L m 1 is reflected by the first coupling inductance first winding N 11 to the first coupling inductance second winding N 12 and the first coupling inductance third winding N 13. The output The current i Do of the diode D o charges the output capacitor C 1 , and the current i DS 1 of the first switching diode D s 1 charges the second switching capacitor C 3 . The current i S 2 = i Lm 1 + i Lm 2 flowing through the second power switch S 2 at this stage. When t = t 8 = T s + t 0 , when the first power switch S 1 is switched to ON, this phase ends and the next switching cycle is entered.

由以上的電路分析可知，當第一功率開關S 1和第二功率開關S 2切換為ON時，因為有耦合電感的漏電感存在，而且漏電感電流為零，所以開關電流不會瞬間跳躍式的驟升，達到開關零電流切換 (ZCS)turn ON的性能。另一方面，所有二極體由ON轉態為OFF時，都能在二極體電流先下降至零之後，二極體才自然轉態為OFF，達到二極體零電流切換(ZCS)turn OFF的性能，改善反向恢復損失及EMI問題。 From the above circuit analysis, it can be known that when the first power switch S 1 and the second power switch S 2 are switched ON, because the leakage inductance of the coupled inductor exists and the leakage inductance current is zero, the switching current does not jump instantly. The sharp rise of the switch achieves the performance of the switch zero current switching (ZCS) turn ON. On the other hand, when all diodes change from ON to OFF, the diodes will naturally turn OFF after the diode current first drops to zero, reaching the zero-current-switching (ZCS) turn of the diodes. OFF performance improves reverse recovery loss and EMI issues.

以下進行該轉換器(1)穩態特性分析：而為為了簡化分析，忽略各開關及各二極體導通壓降為零及；電容值夠大，電容電壓在一個切換週期內視為常數。從第一階段到第六階段，第一功率開關S 1為ON，此六階段的總時間為DT s ，第一磁化電感L m1電壓 The analysis of the steady state characteristics of the converter (1) is as follows: In order to simplify the analysis, the on-state voltage drop of each switch and each diode is ignored; the capacitance value is large enough, and the capacitor voltage is regarded as a constant during a switching period. From the first stage to the sixth stage, the first power switch S 1 is ON, the total time of these six stages is DT s , and the first magnetizing inductance L m 1 voltage

在第七階段與第八階段，第一功率開關S 1為OFF，此兩階段的總時間(1-D)T s ，第一磁化電感L m1電壓 In the seventh and eighth stages, the first power switch S 1 is OFF, the total time (1- D ) T s of these two stages, and the voltage of the first magnetizing inductance L m 1

穩態時，電感器滿足伏秒平衡定理，即電感器在一個切換週期的平均電壓為零，因此kV in (DT s )+k(V in -V Cc )(1-D)T s =0 (6) In the steady state, the inductor satisfies the volt-second balance theorem, that is, the average voltage of the inductor during a switching cycle is zero, so kV in ( DT s ) + k ( V in - V Cc ) (1- D ) T s = 0 (6)

整理可得箝位電容C c 電壓 Finishing to get the clamping capacitor C c voltage

在第三階段中，可知 In the third stage, we know

V Cl1=V Cl2=V N12-V N22=nkV in -nk(V in -V Cc )=nkV Cc (9) V Cl 1 = V Cl 2 = V N 12 - V N 22 = nkV in - nk ( V in - V Cc ) = nkV Cc (9)

V C2=V N13-V N23=nkV in -nk(V in -V Cc )=nkV Cc (10) V C 2 = V N 13 - V N 23 = nkV in - nk ( V in - V Cc ) = nkV Cc (10)

將(7)式的結果代入(9)式和(10)式，可得第一舉升電容C l1、第二舉升電容C l2電壓及第一切換電容C 2電壓 Substituting the results of equation (7) into equations (9) and (10), the voltages of the first lifting capacitor C l 1 , the second lifting capacitor C l 2, and the voltage of the first switching capacitor C 2 can be obtained.

在第七階段中，可知 In the seventh stage, we know

V C3=V N23-V N13=nkV in -nk(V in -V Cc )=nkV Cc (13) V C 3 = V N 23 - V N 13 = nkV in - nk ( V in - V Cc ) = nkV Cc (13)

V C1=V Cl1+V Cl2+V Cc +V N22+V N12=3nkV Cc +V Cc (14) V C 1 = V Cl 1 + V Cl 2 + V Cc + V N 22 + V N 12 = 3nkV Cc + V Cc (14)

整理可得第二切換電容C 3電壓及輸出電容C 1電壓 Sorting can get the voltage of the second switching capacitor C 3 and the voltage of the output capacitor C 1

因為輸出電壓V o 是輸出電容C 1、第一切換電容C 2、第二切換電容C 3電壓的總和，所以 Because the output voltage V o is the sum of the voltages of the output capacitor C 1 , the first switching capacitor C 2 , and the second switching capacitor C 3 ,

因此該轉換器(1)的電壓增益可表示為 So the voltage gain of this converter (1) can be expressed as

當耦合電感匝數比n=1時，電壓增益與不同耦合係數k(k=1、 0.95、0.9)的關係曲線，即如第十二圖本發明之不同耦合係數和電壓增益的關係曲線圖所示，可知：耦合係數k對電壓增益的影響非常小。當耦合係數k=1，理想的電壓增益M為 When the coupling inductance turns ratio n = 1, the relationship between the voltage gain and the different coupling coefficients k ( k = 1, 0.95, 0.9), that is, the relationship between the different coupling coefficients and the voltage gain of the present invention as shown in Figure 12 It can be seen that the influence of the coupling coefficient k on the voltage gain is very small. When the coupling coefficient k = 1, the ideal voltage gain M is

從上式可知該轉換器(1)的電壓增益具有耦合電感匝數比n和導通比D兩個設計自由度。該轉換器(1)可藉由適當設計耦合電感的匝數比，達到高電壓增益，而不必操作在極大的導通比。對應於耦合電感匝數比n和導通比D的電壓增益曲線，請參閱第十三圖本發明之電壓增益與導通比及耦合電感匝數比的曲線圖所示，可知當導通比D=0.6、匝數比n=1時，電壓增益為15倍。 It can be known from the above formula that the voltage gain of the converter (1) has two design degrees of freedom: the coupling inductance turn ratio n and the conduction ratio D. The converter (1) can achieve a high voltage gain by properly designing the turns ratio of the coupled inductor without having to operate at a very large turn-on ratio. The voltage gain curve corresponding to the coupling inductance turns ratio n and the conduction ratio D is shown in the thirteenth graph of the voltage gain, the conduction ratio, and the coupling inductance turns ratio of the present invention. It can be seen that when the conduction ratio D = 0.6, When the turns ratio n = 1, the voltage gain is 15 times.

由轉換器電路動作的第三階段與第七階段可求得第一功率開關S 1與第二功率開關S 2的電壓應力為 According to the third and seventh stages of the converter circuit operation, the voltage stress of the first power switch S 1 and the second power switch S 2 can be obtained as

同時也可求得第一箝位二極體D c1、第二箝位二極體D c2、第一舉升二極體D l1、第二舉升二極體D l2、第一切換二極體D s1、第二切換二極體D s2、輸出二極體D o 的電壓應力為 At the same time, the first clamped diode D c 1 , the second clamped diode D c 2 , the first lifted diode D l 1 , the second lifted diode D l 2 , the first The voltage stress of the first switching diode D s 1 , the second switching diode D s 2 , and the output diode D o is

該轉換器(1)的功率開關電壓應力僅為輸出電壓V o 的1/(5n+1)倍，因此可使用低額定耐壓具有較低導通電阻的MOSFET，可降低開關導通損失。另一方面，較低電壓應力的二極體可採用蕭特基二極體，因為典型蕭特基二極體的順向壓降〔約0.3V〕低於一般功率二極體的順向壓降，可降低二極體導通損失。另一方面，蕭特基二極體中的金屬-矽障壁不受逆向暫態特性影響，而且相較於P-N接面二極體，蕭特基二極體導通與截止較為快速。 The power switch voltage stress of the converter (1) is only 1 / (5 n +1) times the output voltage V o , so a MOSFET with a low rated withstand voltage and a low on-resistance can be used, which can reduce the switching conduction loss. On the other hand, Schottky diodes can be used for diodes with lower voltage stress, because the forward voltage drop of a typical Schottky diode (about 0.3V) is lower than that of a normal power diode. It can reduce the diode conduction loss. On the other hand, metal-silicon barriers in Schottky diodes are not affected by reverse transient characteristics, and Schottky diodes turn on and off faster than PN junction diodes.

依據上述電路動作分析結果，使用IsSpice模擬軟體及實作結果驗證。設定該轉換器(1)之相關參數為：輸入電壓28V、輸出電壓380V、最大輸出功率1000W、切換頻率50kHz，耦合電感匝數比n=1；以下以模擬波形與實作結果檢驗該轉換器(1)的特點〔請再一併參閱第十四圖本發明之模擬電路示意圖所示〕： Based on the above circuit operation analysis results, use IsSpice simulation software and verify the results. Set the relevant parameters of the converter (1) as: input voltage 28V, output voltage 380V, maximum output power 1000W, switching frequency 50kHz, coupled inductor turns ratio n = 1; the converter is tested with simulated waveforms and implementation results below (1) Features [please refer to Figure 14 again for the schematic diagram of the analog circuit of the present invention]:

A.驗證穩態特性：請再一併參閱第十五圖本發明之開關驅動信號、輸入電壓及輸出電壓的模擬波形圖所示，滿載1000W時，開關導通比大約D=0.6，高電壓增益的達成，確實不必操作在極大的導通比。 A. Verification of steady state characteristics: Please refer to Figure 15 together with the simulated waveforms of the switch driving signal, input voltage, and output voltage of the present invention. When the load is 1000W, the switch conduction ratio is approximately D = 0.6, and the high voltage gain It does not have to be operated at a very large conduction ratio.

B.驗證開關低電壓應力：請再一併參閱第十六圖本發明之開關電壓應力的模擬波形圖所示，當第一功率開關S 1或第二功率開 關S 2OFF時，其跨壓都僅為輸出電壓的六分之一，符合(19)式的分析結果，與交錯式升壓型轉換器比較，該轉換器(1)具有開關低電壓應力的優點。可以使用RDS(ON)較小的功率開關，降低導通損失。 B. Verify the low voltage stress of the switch: Please refer to Figure 16 again for the simulated waveform diagram of the switch voltage stress of the present invention. When the first power switch S 1 or the second power switch S 2 is OFF, its voltage across Both are only one-sixth of the output voltage, which is consistent with the analysis result of (19). Compared with the interleaved boost converter, the converter (1) has the advantage of switching low voltage stress. Power switches with smaller R DS (ON) can be used to reduce conduction losses.

C.驗證具有低輸入漣波電流性能：請再一併參閱第十七圖本發明之交錯式操作降低輸入電流漣波的模擬波形圖所示，滿載1000W時，第一漏電感L k1之電流i Lk1、第二漏電感L k2之電流i Lk2的漣波電流約43A，而總輸入電流i in 的漣波電流僅為約1.2A，明顯地，交錯式操作具有降低輸入漣波電流效用。 C. Verification of low input ripple current performance: please refer to Figure 17 again for the staggered operation of the present invention to reduce the input current ripple as shown in the analog waveform diagram. When the full load is 1000W, the first leakage inductance L k 1 The ripple current of the current i Lk 1 and the current I Lk 2 of the second leakage inductance L k 2 is about 43A, and the ripple current of the total input current i in is only about 1.2A. Obviously, the interleaved operation has a reduced input ripple. Wave current utility.

D.驗證電容電壓：請再一併參閱第十八圖本發明之各電容的電壓波形模擬圖所示，輸出電容C 1之電壓V C1大約等於253V，第一切換電容C 2之電壓V C2及第二切換電容C 3之電壓V C3大約等於63V，符合(11)和(15)式的分析結果。 D. Verify the capacitor voltage: please refer to the eighteenth figure of the voltage waveform simulation diagram of each capacitor of the present invention, the voltage V C 1 of the output capacitor C 1 is approximately equal to 253 V , and the voltage V of the first switching capacitor C 2 The voltage V C 3 of C 2 and the second switching capacitor C 3 is approximately equal to 63 V , which meets the analysis results of equations (11) and (15).

E.驗證二極體反向恢復問題：請再一併參閱第十九圖本發明之箝位二極體的電流及電壓波形模擬圖、第二十圖本發明之舉升二極體的電流及電壓波形模擬圖、第二十一圖本發明之切換二極體的電流及電壓波形模擬圖、第二十二圖本發明之輸出二極體的電流及電壓波形模擬圖所示，第一箝位二極體D c1和第二箝位二極體D c2的電壓應力約為輸出電壓的六分之一；第一舉升二極體D l1和第二舉升二極體D l2、第一切換二極體D s1和第二切換二極體D s2及輸出二極體D o 的電壓應力均約為輸出電壓的三分之一，符合(20)~(24)式的分析 結果。另外，可知二極體電流已經先下降至0準位，二極體才自然轉態為OFF，因此可改善二極體反向恢復損失及EMI問題。 E. Verify the reverse recovery of the diode: please refer to Figure 19 again for the current and voltage waveform simulation diagrams of the clamped diode of the present invention, and Figure 20 for the lifted diode current of the present invention And voltage waveform simulation diagram, FIG. 21 is a current and voltage waveform simulation diagram of the switching diode of the present invention, and FIG. 22 is a current and voltage waveform simulation diagram of the output diode of the present invention. The voltage stress of the clamped diode D c 1 and the second clamped diode D c 2 is about one sixth of the output voltage; the first lifted diode D l 1 and the second lifted diode The voltage stresses of D l 2 , the first switching diode D s 1 and the second switching diode D s 2 and the output diode D o are all about one-third of the output voltage, in accordance with (20) ~ ( 24). In addition, it can be seen that the diode current has first dropped to the 0 level, and the diode naturally turns to OFF, so the reverse recovery loss of the diode and the EMI problem can be improved.

藉由以上所述，本發明之使用實施說明可知，本發明與現有技術手段相較之下，本發明主要係具有下列優點： From the above description of the use and implementation of the present invention, it can be known that compared with the prior art, the present invention mainly has the following advantages:

1.本案由於在交錯式升壓型轉換器導入電壓舉升的串接技術與電壓疊加的疊接技術，所以高電壓增益的達成，不必操作在極大的導通比。 1. In this case, because the series connection technology of voltage lifting and the superposition technology of voltage superposition are introduced into the staggered boost converter, the high voltage gain can be achieved without operating at a very high conduction ratio.

2.本案由於轉換器兩個功率開關的電壓應力遠低於輸出電壓，可以使用導通電阻R DS(ON)較小的低額定耐壓MOSFET，所以可降低導通損失。 2. In this case, because the voltage stress of the two power switches of the converter is much lower than the output voltage, a low rated withstand voltage MOSFET with a small on-resistance R DS (ON) can be used, so the conduction loss can be reduced.

3.本案由於交錯式操作，耦合電感初級側的電流漣波能相消，降低輸入電流漣波大小。轉換器輸入並聯架構，具有分擔輸入電流的效果，適合高輸入電流應用。 3. Due to the staggered operation in this case, the current ripple on the primary side of the coupled inductor can be canceled, reducing the input current ripple. The converter input parallel architecture has the effect of sharing the input current and is suitable for high input current applications.

4.本案之耦合電感的漏電感緩和了二極體的反向恢復問題，所以二極體的反向恢復損失得以改善。 4. The leakage inductance of the coupled inductor in this case eases the reverse recovery problem of the diode, so the reverse recovery loss of the diode is improved.

5.本案之耦合電感的漏電感能量能夠回收利用，不但能改善效率，也能避免造成電壓突波問題。 5. The leakage inductance energy of the coupled inductor in this case can be recycled, which can not only improve efficiency, but also avoid causing voltage surge problems.

然而前述之實施例或圖式並非限定本發明之產品結構或使用方式，任何所屬技術領域中具有通常知識者之適當變化或修飾，皆應視為不脫離本發明之專利範疇。 However, the foregoing embodiments or drawings do not limit the product structure or usage of the present invention, and any appropriate changes or modifications by those with ordinary knowledge in the technical field should be regarded as not departing from the patent scope of the present invention.

綜上所述，本發明實施例確能達到所預期之使用功效，又其所揭露之具體構造，不僅未曾見諸於同類產品中，亦未曾公開於申請前，誠已完全符合專利法之規定與要求，爰依法提出發明專利之申請，懇請惠予審查，並賜准專利，則實感德便。 In summary, the embodiments of the present invention can indeed achieve the expected use effect, and the specific structure disclosed has not only been seen in similar products, nor has it been disclosed before the application. It has fully complied with the provisions of the Patent Law. In accordance with the law, the application for an invention patent was submitted in accordance with the law, and we are kindly requested to review it and grant the patent.

Claims (5)

一種交錯式高升壓直流-直流轉換器，其主要係令轉換器於輸入電壓V in 之正極分別連接有第一耦合電感第一繞組N 11之第一端及第二耦合電感第一繞組N 21之第一端，該輸入電壓V in 之負極進行接地，於該第一耦合電感第一繞組N 11之第二端分別連接有第一功率開關S 1之第一端及第一箝位二極體D c1之正極，於該第二耦合電感第一繞組N 21之第二端分別連接有第二功率開關S 2之第一端及第二箝位二極體D c2之正極，該第一功率開關S 1之第二端及該第二功率開關S 2之第二端皆進行接地，該第一箝位二極體D c1之負極與該第二箝位二極體D c2之負極分別連接箝位電容C c 之第一端及電壓舉升單元〔voltage lift cell〕，該箝位電容C c 之第二端進行接地，該電壓舉升單元係分別由第二舉升二極體D l2、第二舉升電容C l2、第一耦合電感第二繞組N 12、第一舉升二極體D l1、第二耦合電感第二繞組N 22及第一舉升電容C l1所組成，該第二舉升二極體D l2之正極及該第二舉升電容C l2之第一端皆與該第一箝位二極體D c1之負極、該第二箝位二極體D c2之負極及該箝位電容C c 之第一端連接，該第二舉升電容C l2之第二端分別連接該第一耦合電感第二繞組N 12之第一端與該第一舉升二極體D l1之正極，該第一耦合電感第二繞組N 12之第二端連接該第二耦合電感第二繞組N 22之第二端，該第二耦合電感第二繞組N 22之第一端連接該第二舉升二極體D l2之負極及該第一舉升電容C l1之第一端，該第一舉升電容C l1之第二端連接該第一舉升二極體D l1之負極，令該電壓舉升單元之該第一舉升電容C l1的第二端與該第一舉升二極體D l1的負極皆與一輸出二極體D o 之正極連接，該輸出二極體D o 之負極分別連接有輸出電容C 1之第一端及電壓疊加單元〔voltage stack cell〕，該輸出電容C 1之第二端進行接地，該電壓疊加單元係分別由第一切換電容C 2、第二切換電容C 3、第一耦合電感第三繞組N 13、第二耦合電感第三繞組N 23、第一切換二極體D s1及第二切換二極體D s2所組成，該第一切換電容C 2之第一端及該第二切換二極體D s2之正極皆與該輸出二極體D o 之負極及該輸出電容C 1之第一端連接，該第一切換電容C 2之第二端連接該第一耦合電感第三繞組N 13之第一端及該第二切換電容C 3之第一端，該第一耦合電感第三繞組N 13之第二端連接該第二耦合電感第三繞組N 23之第二端，該第二切換二極體D s2之負極連接該第二耦合電感第三繞組N 23之第一端及該第一切換二極體D s1之正極，該第一切換二極體D s1之負極及該第二切換電容C 3之第二端連接負載R o 之正極，該負載R o 之負極則進行接地；令該轉換器在使用過程中，導通比大於0.5，且該第一功率開關S 1和該第二功率開關S 2以相差半切換週期的交錯式操作。An interleaved high-boost DC-DC converter, which mainly connects the first end of the first coupled inductor first winding N 11 and the second coupled inductor first winding N to the positive pole of the input voltage V in respectively. The first terminal of 21 , the negative terminal of the input voltage V in is grounded, and the first terminal of the first power switch S 1 and the first clamp two are respectively connected to the second terminal of the first winding N 11 of the first coupling inductor. The positive electrode of the pole body D c 1 is connected to the first end of the second power switch S 2 and the positive pole of the second clamping diode D c 2 at the second end of the first winding N 21 of the second coupling inductor, The second end of the first power switch S 1 and the second end of the second power switch S 2 are grounded. The negative pole of the first clamp diode D c 1 and the second clamp diode D are grounded. The negative electrode of c 2 is respectively connected to the first terminal of the clamping capacitor C c and the voltage lift cell. The second terminal of the clamping capacitor C c is grounded. The voltage lifting units are respectively Lifting diode D l 2 , second lifting capacitor C l 2 , first coupling inductor second winding N 12 , first lifting diode D l 1 , The second coupling inductor is composed of the second winding N 22 and the first lifting capacitor C l 1. The positive terminal of the second lifting diode D 1 2 and the first terminal of the second lifting capacitor C l 2 are both connected with The negative electrode of the first clamping diode D c 1, the negative electrode of the second clamping diode D c 2 , and the first end of the clamping capacitor C c are connected, and the second lifting capacitor C l 2 The second end is respectively connected to the first end of the first coupled inductor second winding N 12 and the positive pole of the first lifting diode D l 1 , and the second end of the first coupled inductor second winding N 12 is connected to the a second inductor coupled to a second winding N 22 of the second end, a second inductor coupled to the second winding N 22 of the first end connected to the second D l lifting two of the negative electrode 2 and the first lift diode capacitance C The first end of l 1 and the second end of the first lifting capacitor C l 1 are connected to the negative pole of the first lifting diode D l 1 , so that the first lifting capacitor C l of the voltage lifting unit 1, the second end are connected to the first negative lift diode D l 1 and D o of a positive output diode, D o of the output diode anode are connected to an output of a first capacitor C One terminal and voltage superimposing unit (vol tage stack cell], the second end of the output capacitor C 1 is grounded, and the voltage superimposing unit is respectively composed of a first switching capacitor C 2 , a second switching capacitor C 3 , a first coupling inductor third winding N 13 , and a second The coupling inductor is composed of a third winding N 23 , a first switching diode D s 1 and a second switching diode D s 2. A first end of the first switching capacitor C 2 and the second switching diode D. s are the positive electrode 2 negative electrode and the output diode D o and the output of a first terminal of capacitor C 1 is connected to a first terminal of a second switch of the capacitor C 2 connected to the first coupling inductor of the third winding N 13 The first terminal and the first terminal of the second switching capacitor C 3, the second terminal of the first coupling inductor third winding N 13 is connected to the second terminal of the second coupling inductor third winding N 23 , and the second switching and said first switching diode D s positive diode D s connected to the negative electrode 2 of the second coupling inductor third winding N 23 of the first terminal 1, the first switching diode D s of the anode 1 and the second switched capacitor C 3 connected to the second end of the load R o of the positive electrode, the negative electrode of the load R o is grounded; enabling the converter during use , The turn-on ratio is greater than 0.5, and the first power switch S 1 and the second power switch S 2 operate in a staggered manner with a half switching period. 如申請專利範圍第1項所述交錯式高升壓直流-直流轉換器，其中，該第一耦合電感第一繞組N 11、第二繞組N 12、第三繞組N 13構成匝數N 11：N 12：N 13之理想變壓器。The scope of the patent application to item 1 of the interleaved High Boost DC - DC converter, wherein the first coupling a first inductor winding N 11, the second winding N 12, N 13 constituting the third winding turns N 11: N 12 : Ideal transformer for N 13 . 如申請專利範圍第1項所述交錯式高升壓直流-直流轉換器，其中，該第二耦合電感第一繞組N 21、第二繞組N 22、第三繞組N 23構成匝數N 21：N 22：N 23之理想變壓器。The interleaved high-boost DC-DC converter according to item 1 of the scope of the patent application, wherein the first winding N 21 , the second winding N 22 , and the third winding N 23 of the second coupling inductor constitute the number of turns N 21 : N 22 : Ideal transformer for N 23 . 如申請專利範圍第1項所述交錯式高升壓直流-直流轉換器，其中，該第一耦合電感第一繞組N 11包含有第一磁化電感L m1及第一漏電感L k1。The staggered high boost DC-DC converter according to item 1 of the scope of the patent application, wherein the first coupling inductor N 11 includes a first magnetizing inductance L m 1 and a first leakage inductance L k 1 . 如申請專利範圍第1項所述交錯式高升壓直流-直流轉換器，其中，該第二耦合電感第一繞組N 21包含有第二磁化電感L m2及第二漏電感L k2。The interleaved high boost DC-DC converter according to item 1 of the scope of the patent application, wherein the first winding N 21 of the second coupling inductor includes a second magnetizing inductance L m 2 and a second leakage inductance L k 2 .
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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI839223B (en) * 2023-05-17 2024-04-11 崑山科技大學 High-boost dc converter

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN109698618B (en) * 2019-01-04 2021-02-26 国网山东省电力公司淄博供电公司 High-gain boost converter realized by coupling inductor boost unit and control method thereof
TWI832074B (en) * 2021-08-02 2024-02-11 崑山科技大學 Interleaved high step-up dc converter

Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20070216319A1 (en) * 2006-03-17 2007-09-20 Yuan Ze University High efficiency single stage bidirectional converter
CN101714815A (en) * 2009-12-14 2010-05-26 浙江大学 Boost type converter for realizing high-gain voltage multiplication by coupling inductors
TW201332272A (en) * 2012-01-20 2013-08-01 Univ Nat Cheng Kung High step-up DC-DC converter and method thereof
CN103929058A (en) * 2014-04-24 2014-07-16 安徽工业大学 Two-phase interleaved converter based on coupled inductors
TW201541829A (en) * 2014-04-29 2015-11-01 Univ Hungkuang DC power boost circuit with high-efficiency and large-range output voltage
TW201737607A (en) * 2016-04-11 2017-10-16 崑山科技大學 Interleaved boost converter comprising first to second transformers, first to second input capacitors, first to six diodes, and first to second switches and first to third output capacitors

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20070216319A1 (en) * 2006-03-17 2007-09-20 Yuan Ze University High efficiency single stage bidirectional converter
CN101714815A (en) * 2009-12-14 2010-05-26 浙江大学 Boost type converter for realizing high-gain voltage multiplication by coupling inductors
TW201332272A (en) * 2012-01-20 2013-08-01 Univ Nat Cheng Kung High step-up DC-DC converter and method thereof
CN103929058A (en) * 2014-04-24 2014-07-16 安徽工业大学 Two-phase interleaved converter based on coupled inductors
TW201541829A (en) * 2014-04-29 2015-11-01 Univ Hungkuang DC power boost circuit with high-efficiency and large-range output voltage
TW201737607A (en) * 2016-04-11 2017-10-16 崑山科技大學 Interleaved boost converter comprising first to second transformers, first to second input capacitors, first to six diodes, and first to second switches and first to third output capacitors

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI839223B (en) * 2023-05-17 2024-04-11 崑山科技大學 High-boost dc converter

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