TWI661534B - 在互補式金屬氧化物半導體晶圓中的超音波轉換器及相關設備和方法 - Google Patents

在互補式金屬氧化物半導體晶圓中的超音波轉換器及相關設備和方法 Download PDF

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TWI661534B
TWI661534B TW104112350A TW104112350A TWI661534B TW I661534 B TWI661534 B TW I661534B TW 104112350 A TW104112350 A TW 104112350A TW 104112350 A TW104112350 A TW 104112350A TW I661534 B TWI661534 B TW I661534B
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cmos
metallization layer
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強納森Ｍ 羅斯貝格
凱斯Ｇ 法菲
尼瓦達Ｊ 桑雪茲
蘇珊Ａ 阿里
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美商蝴蝶網路公司
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Abstract

本發明描述的是形成在互補式金屬氧化物半導體(CMOS)晶圓中之微加工的超音波轉換器，也描述了製造此種裝置的方法。CMOS晶圓的金屬化層可以藉由犧牲性釋放物而移除以生成超音波轉換器的腔穴。剩餘層可以形成超音波轉換器的隔膜。

Description

在互補式金屬氧化物半導體晶圓中的超音波轉換器及相關設備和方法 相關申請案
本申請案於35 U.S.C.§119(e)的規範下主張代理案號為第B1348.70010US00號且在2014年4月18日提申的美國臨時專利申請案第61/981,464號的權益，該案標題為「在互補式金屬氧化物半導體晶圓中的超音波轉換器及相關設備和方法」，本文以引用的方式將其完整併入。
在此所述的技術關於微加工的超音波轉換器以及相關的設備和方法。
電容式微加工的超音波轉換器(capacitive micromachined ultrasonic transducer，CMUT)是已知的裝置，其包括在微加工之腔穴上方的隔膜。隔膜可以用於將聲音訊號轉換成電訊號，或者反之亦可。因此，CMUT可以操作成為超音波轉換器。
二種製程可以用於製造CMUT。犧牲層製程在基板上而在犧牲層上方形成CMUT的隔膜，然後移除犧牲層以在隔膜之下形成CMUT的腔穴。晶圓結合製程則把二個晶圓結合在一起以形成具有隔膜的腔穴。
本技術的諸多態樣態樣提供在互補式金屬氧化物半導體 (complementary metal oxide semiconductor，CMOS)晶圓中之微加工的超音波轉換器(譬如CMUT)，其利用CMOS晶圓之移除的金屬化作為用於一或更多個微加工之超音波轉換器的聲音腔穴。據此，超音波轉換器可以整合於CMOS晶圓並且形成於晶圓中，而避免任何晶圓結合的需求以製造超音波轉換器。相較於若使用晶圓結合而言，超音波轉換器與CMOS晶圓的整合因而可以被簡化和做得更穩健。此外，使用移除的CMOS金屬化層作為超音波轉換器的腔穴則可以有利於在CMOS晶圓上而在超音波轉換器之下形成積體電路(integrated circuits，ICs)，因此使在CMOS晶圓上形成整合之超音波轉換器和積體電路所需的空間有所減少或減到最少。結果，依據某些實施例，可以形成具有單塊整合的超音波轉換器和CMOS ICs之小型的互補式金屬氧化物半導體(CMOS)超音波轉換器(CUT)。
根據本技術的一態樣，互補式金屬氧化物半導體(CMOS)晶 圓包括半導體基板和超音波轉換器。超音波轉換器包括代表CMOS晶圓之移除的第一金屬化層之腔穴、配置在腔穴和半導體基板之間的電極、包括CMOS晶圓之介電層和第二金屬化層的CMOS晶圓之聲音隔膜。腔穴可以配置在半導體基板和聲音隔膜之間。CMOS晶圓可以進一步包括在半導體基板上的積體電路，其耦合於超音波轉換器並且建構成控制超音波轉換器的操作。
根據本技術的一態樣，設備包括在互補式金屬氧化物半導體 (CMOS)晶圓中的超音波轉換器，而金屬化層的移除部分界定超音波轉換器之至少部分的聲音腔穴。
根據本技術的一態樣，互補式金屬氧化物半導體(CMOS)晶 圓包括半導體基板、第一金屬化層及超音波轉換器。超音波轉換器包括形成於第一金屬化層中的腔穴、配置在腔穴和半導體基板之間的電極及包括CMOS晶圓之介電層和第二金屬化層的CMOS晶圓之聲音隔膜。腔穴可以配置在半導體基板和聲音隔膜之間。CMOS晶圓進一步包括在半導體基板上的積體電路，其耦合於超音波轉換器並且建構成控制超音波轉換器的操作。
根據本技術的一態樣，方法包括藉由堆疊包括互補式金屬氧 化物半導體(CMOS)晶圓的至少一介電層和第一金屬化層之CMOS晶圓的多層，而於CMOS晶圓中形成超音波轉換器的聲音隔膜。方法進一步包括生成對於CMOS晶圓之第二金屬化層的至少一存取孔洞，而第二金屬化層包括由第一和第二導電襯墊層所侷限的金屬內層，該等襯墊層於某些實施例中包括金屬。方法進一步包括藉由使用選擇性蝕刻而經由至少一存取孔洞來移除第一金屬化層之至少部分的金屬內層，以於CMOS晶圓中形成腔穴，藉此釋放聲音隔膜而同時實質維持第一和第二導電襯墊層。方法進一步包括以絕緣材料來密封至少一存取孔洞，並且將第一和第二導電襯墊層耦合於CMOS晶圓的積體電路。
根據本案的一態樣，方法包括藉由移除互補式金屬氧化物半 導體(CMOS)晶圓之至少部分的金屬化層，而於CMOS晶圓中至少部分界定超音波轉換器的聲音腔穴。
100‧‧‧裝置
102‧‧‧CMOS晶圓
104‧‧‧超音波轉換器
105‧‧‧多晶矽層
106a、106b、106c、106d‧‧‧金屬化層
107‧‧‧介電或絕緣層
108‧‧‧聲音腔穴
110‧‧‧隔膜
112‧‧‧積體電路
114‧‧‧基底層
116‧‧‧密封的存取孔洞
118‧‧‧襯墊底層
120‧‧‧襯墊頂層
122‧‧‧抗反射披覆層
124、126‧‧‧通孔
128‧‧‧鈍化層
200‧‧‧在CMOS晶圓中製造超音波轉換器的方法
202~208‧‧‧本發明的方法階段
302‧‧‧導電層
304‧‧‧介電或絕緣層
306‧‧‧金屬化層
308‧‧‧介電或絕緣層
310‧‧‧導電層
312‧‧‧介電或絕緣層
313‧‧‧鈍化層
314‧‧‧存取孔洞
316‧‧‧密封劑層
D1‧‧‧深度
W1‧‧‧寬度
本案的多樣態樣和實施例將參考以下圖形來描述。應體會圖 形未必按照比例來繪製。出現在多個圖形中的項目在它們所出現的所有圖中是以相同的參考數字所指示。
圖1示範根據本案的非限制性實施例而形成於CMOS晶圓中 並且整合了CMOS IC以形成CUT的電容式微加工的超音波轉換器(CMUT)；圖2是示範根據本案的非限制性實施例而在CMOS晶圓中製造CMUT的製程的流程圖。
圖3A~3J示範根據本案的非限制性實施例而與圖2過程一致之在CMOS晶圓中製造CMUT的製造順序。
本技術的諸多態樣源自本申請人體會到標準之CMOS晶圓的特定特色尺度對於至少某些應用來說實質對應於超音波轉換器的特定目標特色尺度，因此超音波轉換器可以利用此種對應性而製造於CMOS晶圓中。也就是說，本申請人已經體會CMOS晶圓的至少某些金屬化層所具有之厚度實質匹配超音波轉換器的目標腔穴深度。本申請人也已經體會覆蓋金屬化層之CMOS晶圓的層厚度實質匹配超音波轉換器的目標隔膜厚度。因此，本申請人已經體會藉由利用適當尺度的CMOS金屬化層作為要被釋放的犧牲層以界定超音波轉換器的腔穴，則超音波轉換器可以製造於(因而整合於)CMOS晶圓中。此種製造提供簡單和穩健的方式來達到超音波轉換器與CMOS晶圓的高度整合。因此，本案的諸多態樣可以有利於形成具有整合之超音波轉換器和電路的超音波單晶片系統裝置。
此外，本申請人已經體會使用具有適當座落之襯墊層的犧牲性CMOS金屬化層則可以進一步簡化超音波轉換器在CMOS晶圓中的製 造。藉由僅移除犧牲性CMOS金屬化層的內金屬，則剩餘的襯墊層可以作為超音波轉換器的電極，而緩和了做進一步處理以生成電極的任何需求。就此意義而言，超音波轉換器電極已經「內建」(built in)於CMOS金屬化層。
據此，本技術的諸多態樣提供在CMOS晶圓中之微加工的超音波轉換器(譬如CMUT)，其利用CMOS晶圓之移除的金屬化作為一或更多個微加工的超音波轉換器之聲音腔穴。金屬化可以代表訊號線金屬化以在CMOS晶圓上安排訊號的接線，並且金屬化層之不須移除以形成超音波轉換器之聲音腔穴的部分可以維持在CMOS晶圓上並且建構成訊號線。金屬化層可以具有多層組態，其包括內金屬和一或更多個襯墊層。於某些實施例，可以移除內金屬以形成聲音腔穴，同時可以維持襯墊層並且將之建構成超音波轉換器的電極。
根據本技術的一態樣，利用犧牲釋放技術以從CMOS晶圓移除CMOS金屬化層，而生成CMOS晶圓中所形成之超音波轉換器的聲音腔穴。被犧牲釋放當成目標的金屬化所可以具有的厚度實質對應於聲音腔穴的目標深度。於某些實施例，在進行犧牲釋放之前，可以實質完成超音波轉換器，使得犧牲性釋放物可以完成(或幾乎完成)超音波轉換器的形成。積體電路可以可選用的形成於CMOS晶圓中而在超音波轉換器之下，並且於某些實施例可以建構成控制超音波轉換器的操作。
下面進一步描述上述態樣和實施例以及額外的態樣和實施例。這些態樣和/或實施例可以單獨使用、一起使用或以二或更多者的任何組合來使用，因為本案在這態樣並無限制。
根據本技術的一態樣，CMOS晶圓包括在當中形成的一或更 多個超音波轉換器，而CMOS晶圓之部分或完全移除的金屬化層至少部分界定(多個)超音波轉換器的腔穴。圖1示範此種裝置的非限制性範例。
如所示，裝置100包括CMOS晶圓102，而超音波轉換器104 形成在CMOS晶圓102中。雖然示範單一超音波轉換器104，但是應體會本案的諸多態樣在CMOS晶圓中提供多個超音波轉換器，因此圖1是非限制性的示範。此種組態可以有利於形成超音波單晶片系統裝置(ultrasound system-on-a-chip device)或超音波單晶片次系統裝置(ultrasound sub-system-on-a-chip device)，其包括整合的超音波轉換器和電路(譬如類比和/或數位電路，例如前端和/或後端電路，而控制超音波轉換器的操作和/或處理此種轉換器所產生的訊號，舉例而言以形成和/或顯示超音波影像)。於至少某些實施例，超音波單晶片系統裝置可以在單一基板上包括整合於類比和數位電路之超音波轉換器的安排，並且可以能夠進行超音波成像功能，例如發射和接收超音波以及處理接收的超音波來產生超音波影像。
CMOS晶圓102包括多晶矽層105、多個金屬化層106a~106d 及至少部分界定超音波轉換器104之聲音腔穴108的移除之金屬化層。超音波轉換器104的隔膜110是由腔穴108上剩餘之CMOS晶圓102的多層之組合所形成。積體電路112可以形成於基底層114中而在超音波轉換器104之下。積體電路可以是CMOS電路，並且可以整合於超音波轉換器104以形成CUT。於所示的非限制性範例，積體電路是直接在超音波轉換器104之下。多晶矽層105可以形成部分的積體電路，舉例來說代表電晶體的閘極層。於某些非限制性的實施例，雖然高壓接線可以配置在腔穴之上，但是所有的電路可以定位在超音波轉換器之下。
CMOS晶圓102可以是任何適合形成CMOS積體電路的 CMOS晶圓，並且包括一或更多個金屬化層。於所示範的範例，雖然CMOS晶圓102包括五個金屬化層(除了代表腔穴108之移除的金屬化層，還有金屬化層106a~106d)，但是可以替代而言使用其他的數目。
金屬化層106a~106d以及用於形成腔穴108之移除的金屬化 層可以建構成標準的CMOS金屬化層而用於訊號接線。因此，於至少某些實施例，它們可以是實質平坦的，並且可以在CMOS晶圓裡佔據適當部分的平面以發揮訊號接線層的功能。舉例而言，於某些實施例，一或更多個金屬化層可以在圖案化之前先於CMOS晶圓裡佔據實質整個平面以界定想要的訊號接線組態。此外，金屬化層可以由任何適合的(多種)材料所形成。 舉例而言，可以使用鋁(Al)、銅(Cu)或其他金屬。
於某些實施例，包括所示範者，一或更多個金屬化層可以包 括多層(亦即多層組態)，例如具有上和下襯墊(或阻障)層的金屬內層。於圖1的範例，每個示範的金屬化層包括襯墊底層(譬如由氮化鈦(TiN)所做成)、Al層、襯墊頂層(譬如由TiN所做成)、在襯墊頂層上作為微影術階段之抗反射披覆的氧氮化矽(SiON)層。用於要被犧牲性移除之金屬化的多層結構可以是有利的，因為襯墊層可以建構和維持成超音波轉換器的電極。以此方式，當起初形成要被犧牲性移除的金屬化層時，就簡單且穩健的形成了超音波轉換器的電極。腔穴108可以藉由僅移除金屬化的金屬內層而留下襯墊層來形成。此種選擇性移除可以使用適當的選擇性蝕刻過程而達成，例如選擇性溼式蝕刻，其對於金屬化的內金屬材料是有選擇性的(亦即要蝕刻)，並且對於襯墊層的材料是非選擇性的(亦即不蝕刻)。以此方式，也簡化了腔穴 的製造，因為不需要定時蝕刻以獲得想要的腔穴尺度。於某些實施例，蝕刻可以是氫氟酸(HF)蝕刻，雖然可能有替代方案。
舉例而言，參見裝置100，腔穴108的底部上由層118所侷 限並且頂部上由層120和122所侷限。層118可以代表被移除以界定腔穴108之金屬化層的襯墊底層(譬如由TiN所做成)。層120可以代表移除之金屬化層的襯墊頂層(譬如由TiN所做成)。層122可以代表移除之金屬化層的抗反射披覆。層118和120可以建構成超音波轉換器104的電極。對電極的電連接(舉例而言藉由CMOS晶圓的一或更多個剩餘金屬化層來為之)可以藉由一或更多條導線(譬如通孔，例如通孔124和126)或以任何其他適合的方式而做到。
於某些實施例，當移除內金屬材料時，多層的金屬化層可以 由絕緣隔膜來建構。舉例而言，金屬化層可以依序包括TiN-氧化鋁-Al-氧化鋁-TiN-SiON，使得當移除鋁時，絕緣隔膜形成在TiN電極上。
於至少某些實施例，被至少部分移除以形成超音波轉換器之 腔穴的金屬化層事實上並未完全移除。就此意義而言，移除可以是局部的而非全面的。可以維持部分的金屬化層以在CMOS晶圓之不形成聲音腔穴的區域來發揮訊號線的功能，舉例而言以攜載可應用於裝置100之多樣類型的訊號，以非限制性範例來說，例如電力、控制訊號或感測訊號。也就是說，相同的CMOS金屬化層可以用於CMOS晶圓的一或更多個區域而作為訊號線，並且可以在CMOS晶圓的其他區域被移除以界定一或更多個超音波轉換器的聲音腔穴。此種雙重功能性要與單純為了使用金屬作為犧牲層而在CMOS晶圓上沉積金屬來加以區別。
圖1也示範CMOS晶圓102在金屬化層之間包括了適合的介 電或絕緣層，例如層107。這些可以由任何適合的材料(譬如非導電的，例如SiO2)所形成而具有任何適合的厚度。
也包括了密封的存取孔洞116。一或更多個存取孔洞可以藉 由適合的蝕刻(譬如方向性蝕刻，例如反應性離子蝕刻)而形成，以存取被移除來形成腔穴108的金屬化層。金屬化層的金屬材料可以經由一或更多個存取孔洞而移除，舉例而言藉由選擇性溼式蝕刻(例如HF蝕刻)來為之。後續而言，存取孔洞可加以密封以生成密封的腔穴，如所示，其於某些實施例中可以是真空腔穴，雖然也可以形成非真空的腔穴。可以使用任何適合的密封劑材料，其非限制性範例是Si3N4。
圖1示範用於腔穴108的二個存取孔洞。然而，應體會可以 使用其他數目(任一或更多者)。存取孔洞可以定位在相對於腔穴之任何適合的(多個)位置(譬如如所示的在周邊、在中央、在周邊和中央二者……)，以允許充分移除金屬化層的金屬材料來生成腔穴。而且，孔洞可以可選用的被蝕刻，然後可選用的繞著腔穴邊界被填充以在轉換器之間或多組轉換器之間提供隔絕(譬如聲音隔絕)。於此種實施例，孔洞可以不通過隔膜110但可以可選用的延伸到腔穴108。
於某些實施例，可以適當的定位多個存取孔洞以允許移除金 屬化層的金屬材料，同時也適當的安排以允許金屬訊號連接跨越晶片(譬如在相鄰的超音波轉換器之間)。舉特定但非限制性的範例而言，多個存取孔洞可以安排在腔穴的周邊，但在至少二個存取孔洞之間可以有足夠的空間以允許金屬訊號線使相鄰之超音波轉換器的金屬化層106d交互連接。考慮 此種組態的俯視圖，則腔穴可以是圓形，並且多個存取孔洞可以形成圍繞著周邊而呈圓形，而金屬訊號線在某些存取孔洞之間延伸。可能有替代的方案。舉例而言，所述的圓形腔穴形狀可以替代而言為矩形、方形、六邊形或具有任何其他適合的形狀。
超音波轉換器104可以具有任何適合的尺度。尺度可以至少 部分由轉換器所打算的應用來指定，舉例而言是要提供想要的頻率行為、想要的裝置尺寸、想要的成像開孔或其他有興趣的特徵。底下提供非限制性的範例。
於某些實施例，腔穴尺度和/或覆蓋腔穴之任何隔膜的隔膜 厚度可以影響隔膜的頻率行為，因此可加以選擇來提供想要的頻率行為(譬如想要的隔膜共振頻率)。舉例而言，於某些實施例，可以想要具有在以下之中央共振頻率的超音波轉換器：在差不多20千赫茲和差不多200百萬赫茲之間、在差不多1百萬赫茲和差不多40百萬赫茲之間、在差不多1百萬赫茲和差不多10百萬赫茲之間、在差不多2百萬赫茲和差不多5百萬赫茲之間、在差不多5百萬赫茲和差不多15百萬赫茲之間、在差不多10百萬赫茲和差不多20百萬赫茲之間、在差不多20百萬赫茲和差不多40百萬赫茲之間、在差不多50千赫茲和差不多200千赫茲、差不多2.5百萬赫茲、差不多4百萬赫茲、當中的任何頻率或頻率範圍、或任何其他適合的頻率。 舉例而言，可以想要在空氣、氣體、水或其他環境中來使用裝置，舉例而言是為了醫學成像、材料分析、或為了可以想要有多樣操作頻率的其他理由。腔穴和/或隔膜的尺度可以據此選擇。
以非限制性範例來說，腔穴108的寬度W1可以在差不多5 微米和差不多500微米之間、在差不多20微米和差不多100微米之間，而可以是差不多30微米、差不多40微米、差不多50微米、當中的任何寬度或寬度範圍、或任何其他適合的寬度。於某些實施例，寬度可以選擇成使空洞比例(亦即腔穴所消耗的面積量相較於周圍結構所消耗的面積量)達到最大。寬度也可以用於識別腔穴的開孔尺寸，因此腔穴可以具有上述任何數值或任何其他適合之數值的開孔。
腔穴108可以具有深度D1，其可以在差不多0.05微米和差 不多10微米之間、在差不多0.1微米和差不多5微米之間、在差不多0.5微米和差不多1.5微米之間、當中的任何深度或深度範圍、或任何其他適合的深度。如之前所述，本申請人已經體會用於標準CMOS晶圓之某些金屬化層的厚度可以實質對應於聲音腔穴的目標深度，因此腔穴108的深度可以至少部分由使用作為犧牲層之金屬化層的厚度所界定。舉例來說，於一實施例，深度D1可以是差不多1/4微米，其可以實質對應於提供在CMOS晶圓上的金屬化厚度。
隔膜110可以包括CMOS晶圓102的一或更多個層和/或結 構而界定厚度Tm。於圖1的非限制性範例，隔膜110包括通孔(譬如通孔126)、金屬層(例如金屬化層106d)、介電或絕緣層(譬如層107)。鈍化層128(例如由Si3N4所形成)則使表面鈍化。厚度Tm(例如大致平行於深度D1所測量)可以小於100微米、小於50微米、小於40微米、小於30微米、小於20微米、小於10微米、小於5微米、小於1微米、小於0.1微米、當中的任何厚度範圍(譬如在差不多1~5微米之間、在差不多1~2微米之間……)或任何其他適合的厚度。於某些實施例，厚度可以基於隔膜所想要的聲音行為(例 如隔膜所想要的共振頻率)來選擇。此外，本申請人已經體會對於某些標準的CMOS晶圓而言，在金屬化頂層之下使用金屬化層作為犧牲層來界定超音波轉換器腔穴則導致覆蓋性隔膜110具有差不多是(並且於某些情形實質上是)超音波轉換器的目標厚度(譬如在差不多1~2微米之間)。因此，在金屬化頂層之下使用金屬化層作為犧牲層可以顯著簡化在CMOS晶圓中之超音波轉換器的製造。
厚度Tm可以藉由對隔膜的上表面添加/移除材料而調 整。此種材料的移除可以使用化學機械拋光(chemical mechanical polishing，CMP)、任何形式的蝕刻(包括選擇性蝕刻、方向性蝕刻、溼式蝕刻或雷射蝕刻)或任何其他適合的技術而完成。此外，於某些實施例，隔膜可以具有非均勻的厚度，舉例而言，腔穴上的中央部分較厚而在腔穴的周邊上較薄以形成活塞結構。此種結構可以提供對於超音波轉換器之操作頻率的控制。
以腔穴深度和寬度以及隔膜厚度之適合尺度的非限制性範 例來說，於一實施例，深度D1可以是差不多1/4微米，寬度W1可以是差不多50微米，而隔膜110的厚度Tm可以是差不多1~2微米。可能有替代的尺度。
積體電路112可以形成於CMOS晶圓102的基底層114中。 舉例而言，基底層114可以是整塊矽層或其他的半導體基板，並且積體電路112可以包括一或更多個主動矽電路元件(譬如在矽中具有摻雜之源極和汲極區域的MOS電晶體)、電容器、電阻器或其他電路構件。積體電路112可以適合以傳送和/或接收模式來操作超音波轉換器104。
如所示，超音波轉換器104可以連接到IC 112，舉例而言藉 由層118到通孔124所示範的連接來為之。可能有其他製作連接的方式。
根據本技術的一態樣，提供的是在CMOS晶圓中製造超音 波轉換器的方法，其涉及移除CMOS晶圓之至少部分的金屬化層以生成超音波轉換器的腔穴。圖2是示範方法之範例的流程圖。
方法200包括在階段202製備CMOS晶圓。CMOS晶圓包括 至少一金屬化層和結構而部分界定超音波轉換器。舉例而言，可以形成電極和聲音隔膜，例如電極是由金屬化襯墊層所界定，而此種聲音隔膜是由圖1的聲音隔膜110所代表。
在階段204，一或更多個存取孔洞形成至CMOS晶圓的金屬 化層。如之前關於圖1所述，存取孔洞可以採取任何適合的方式而生成(譬如方向性蝕刻)，並且可以相對於超音波轉換器而定位在任何適合的(多個)位置，包括在要變成超音波轉換器腔穴之區域的周邊和/或中央。
在階段206，超音波轉換器的腔穴可以藉由使用適合的蝕刻 技術來移除至少部分的金屬化層而生成於CMOS晶圓中。舉例而言，可以使用選擇性蝕刻，其對於要被移除之金屬化層的材料(例如金屬)是有選擇性的。於某些實施例，移除可以是局部的而非全面的。也就是說，金屬化層可以在CMOS晶圓中之超音波轉換器所在的區域被移除，但可以維持在CMOS晶圓的其他區域中，舉例而言作為訊號線。
在階段208，形成於階段204的存取孔洞可加以密封以生成 密封的超音波轉換器腔穴。存取孔洞可以使用任何適合的材料(例如絕緣材料)而以任何適合的方式來密封。於某些實施例，可以進行電漿增強的化學氣相沉積(plasma enhanced chemical vapor deposition，PECVD)以密封存取孔 洞。舉例而言，PECVD Si3N4可以用於某些實施例，其可以使密封材料側向侵入腔穴的程度減到最少。
方法200可以進行在晶圓層級，如參考通過圖2的CMOS 晶圓所應體會。因此，多個超音波轉換器可以採取陣列或其他安排而形成於CMOS晶圓中。此種製造技術的一個好處在於大量的超音波轉換器(譬如CMUT)可以採取相對簡單、有成本效益的方式而形成在單一晶圓上。此種技術因而可以有利於利用微加工的超音波轉換器之陣列(或其他安排)來製造超音波單晶片系統裝置。
應體會方法200的諸多階段於某些實施例可以由不同方來 進行。舉例而言，CMOS晶圓製造商的一方可以進行階段202。第二方(譬如CMOS晶圓的購買者)然後可以進行階段204、206、208。於其他實施例，單一個體可以進行方法的所有階段。
圖3A~3J示範根據本案的非限制性實施例而與圖2過程一致 之於CMOS晶圓中製造CMUT的製造順序。順序的起點顯示於圖3A，並且包括基底層114、圖案化的多晶矽層105、金屬化層106a、金屬化層106b、層107。
如圖3B~3D所示，可以形成圖1的通孔124(完成的顯示在 圖3D)。於預期形成通孔時，如圖3B所示，最上層107可加以適當的蝕刻，並且可以沉積導電層302。導電層302可以由想要的通孔材料所形成，例如鎢(W)。襯墊材料(譬如TiN)可以在鎢之前先沉積，因此導電層302可以具有如所示的多層組態。
如圖3C所示，導電層302可加以平坦化(譬如使用CMP)， 然後可以形成金屬化層106c並且圖案化。介電或絕緣層304(譬如SiO2)可以形成在表面上。
如圖3D所示，介電或絕緣層304可加以圖案化而允許形成通孔124。通孔124可以由想要的通孔材料所形成，例如鎢(W)。襯墊材料(譬如TiN)可以在鎢之前先沉積，而導致所示範之通孔124的多層特色。
然後於圖3E，形成金屬化層306。金屬化層306可以代表犧牲性金屬化層，而圖1的腔穴108(也顯示於圖3I)是要由此來形成。因此，包括了之前描述的層118、120、122。介電或絕緣層(例如SiO2)308可以形成在最上面的表面上。
於圖3F，介電或絕緣層308可加以圖案化，並且預期形成圖1的通孔126(也顯示於圖3G)而沉積了導電層310。導電層310可以由想要的通孔材料所形成，例如鎢(W)。襯墊材料(譬如TiN)可以在鎢之前先沉積，因此導電層310可以具有如所示的多層組態。
如圖3G所示，導電層310可加以平坦化以形成通孔126，並且可以形成金屬化層106d和做圖案化。介電或絕緣層312可以形成在結構的最上表面上。
於圖3H，可以形成鈍化層313(譬如由Si3N4所做成)，並且可以對金屬化層306形成存取孔洞314。適合的蝕刻過程可以用於形成存取孔洞。
然後，如圖所3I示，腔穴108可以經由存取孔洞314來移除至少部分的金屬化層306而生成。舉例而言，金屬化層可以包括金屬內層，其被選擇性蝕刻(舉例而言藉由溼式蝕刻來為之，例如HF蝕刻)，而留 下層118和120。
於圖3J，存取孔洞314可以用適合的密封劑層316來密封。密封劑層可以包括鈍化材料，例如Si3N4。也可能有其他的材料。因此，圖1的裝置100可以經由這製造順序而達成。
雖然圖3A-3J示範適合用於鋁金屬化層的製造順序，不過應體會在此所述的多樣態樣在這態樣沒有限制。舉例而言，本技術的諸多態樣可以利用銅金屬化層而非鋁。於某些實施例，可以使用襯墊了鉭的銅。
而且，雖然本案的諸多態樣已經描述成利用CMOS晶圓之多層的金屬化層來界定超音波轉換器的腔穴，不過替代方案可以改為利用金屬-絕緣體-金屬(metal-insulator-metal，MIM)層。舉例而言，MIM層的絕緣體可以採取在此相對於移除金屬化層之內金屬材料所述的方式而從相鄰的金屬層之間移除。
此外，根據某些實施例，可以形成超音波轉換器，而沒有建構成相鄰於轉換器腔穴之電極的金屬襯墊層。舉例而言，參見圖1，於替代性實施例，可以省略層118和120(以及122)，而通孔126反而可以適當配置而組合操作成電極。舉例而言，通孔126可以相對於彼此而隔開差不多0.1微米到差不多0.5微米(譬如在差不多0.2微米和差不多0.3微米之間)。此種通孔的陣列可以組合操作成電極來控制超音波轉換器的操作。於此種實施例，通孔可以具有任何適合的尺度，其非限制性的範例是截面差不多0.2微米×0.2微米、截面差不多0.3×微米0.3微米、或任何其他適合的尺度。
本案的諸多態樣可以用於建造超音波裝置，例如超音波探針。探針可以適合將各式各樣的物體加以成像。依據某些實施例的超音波 探針可以包括各式各樣的前端和/或後端電子器件。於某些實施例，探針可以是超音波單晶片系統裝置。
本案的諸多態樣可以提供一或更多個好處，而之前已經描述 了某些好處。現在描述的是此種好處的某些非限制性範例。應體會並非所有的態樣和實施例必然提供現在描述的所有好處。此外，應體會本案的諸多態樣可以提供附加於現在描述的好處。
本案的諸多態樣提供適合形成單塊整合之超音波轉換器和 CMOS結構(譬如CMOS IC)的製程。於至少某些實施例，此等過程在進行上可以是簡單、穩健、相對不昂貴的，並且可以縮放到大量的超音波轉換器。 可以避免關於晶圓結合的困難，例如結合強度差、產出率低、使用高溫退火。本案的諸多態樣提供製造適當尺寸的超音波轉換器之過程以關於低電壓CMOS IC來操作。依據本案的一或更多個態樣，也可以提供其他的好處。
因此已經描述了本案技術的幾個態樣和實施例，故要體會此技藝中的一般技術者將輕易想要多樣的更動、修改和改良。此種更動、修改和改良打算是在本案所述之技術的精神和範圍裡。舉例而言，此技藝中的一般技術者將輕易看出各式各樣的其他手段和/或結構來進行在此所述的功能和/或得到結果和/或一或更多個優點，並且每個此種變化和/或修改視為落於在此所述之實施例的範圍裡。熟於此技藝者將體察或能夠確定在使用不超過常規的實驗下，在此所述的特定實施例有許多等同者。因而，要了解前面的實施例僅是藉由舉例而提出，並且在所附申請專利範圍及其等同者裡，發明的實施例可以不如特定所述的來實施。附帶而言，在此所述之二或更多個特色、系統、物件、材料、套件和/或方法的任何組 合(如果此種特色、系統、物件、材料、套件和/或方法並非互相不一致的話)係包括在本揭示的範圍裡。
而且，如所述，某些態樣可以具體為一或更多個方法。進行成部分方法的動作則可以採取任何適合的方式來排序。據此，實施例可以建構成以不同於所示範的次序來進行動作，其可以包括同時進行某些動作，即使在示範性實施例中顯示成依序動作。
如在此所界定和使用的所有定義應理解為受控制於字典定義、併入以為參考之文件中的定義和/或所界定之詞彙的通常意義。
如在此用於說明書和申請專利範圍中的不定冠詞「一」和「該」除非有清楚的相反指示，否則應理解為意謂「至少一」。
如在此用於說明書和申請專利範圍的「和/或」用語應理解為意謂如此結合之元件當中「任一或二者」，亦即元件結合出現於某些情況並且不結合出現於其他情況。以「和/或」所列出的多重元件應以相同的方式來解讀，亦即如此結合之元件當中的「一或更多者」。可以可選用的存在不是「和/或」所特定識別的其他元件，而不論其相關或不相關於所特定識別的元件。因此，以非限制性範例來說，對於「A和/或B」的參考當配合開放端用語(例如「包括」)來使用時可以在一實施例中僅指A(可選用的包括不是B的元件)；在另一實施例中僅指B(可選用的包括不是A的元件)；而在又一實施例中指A和B二者(可選用的包括其他元件)……。
如在此用於說明書和申請專利範圍，參考一列一或更多個元件的「至少一者」用語應理解為意謂選自該列元件當中任一或更多個元件的至少一元件，但未必包括特定列在該列元件中之每一個元件當中至少一 者，並且不排除該列元件中之元件的任何組合。這定義也允許元件可以可選用的存在了不是「至少一者」用語所指稱之該列元件所特定識別的元件，而不論相關或不相關於所特定識別的元件。因此，以非限制性範例來說，「A和B當中至少一者」(或等同於「A或B當中至少一者」，或等同於「A和/或B當中至少一者」)可以在一實施例指稱至少一A，其可選用的包括多於一者而無B存在(並且可選用的包括不是B的元件)；在另一實施例指稱至少一B，其可選用的包括多於一者而無A存在(並且可選用的包括不是A的元件)；而在又一實施例指稱至少一A(可選用的包括多於一者)和至少一B(可選用的包括多於一者)，並且可選用的包括其他元件……。
而且，在此所用的用語和術語是為了敘述，並且不應視為限制性的。在此使用「包括」、「包含」或「具有」、「含有」、「涉及」及其變化係意謂涵蓋在它之後所列的項目、其等同者以及額外的項目。
於申請專利範圍以及上面的說明書，例如「包括」、「包含」、「載有」、「具有」、「含有」、「涉及」、「握有」、「由……所組成」和類似者的所有過渡性用語是要理解為開放端的，亦即意謂包括但不限於此。只有「由……所構成」和「基本上由……所構成」的過渡性用語將分別是封閉的或半封閉的過渡性用語。

Claims (12)

  1. 一種互補式金屬氧化物半導體(CMOS)晶圓，其包括：半導體基板；超音波轉換器，其包括：腔穴，其藉由該CMOS晶圓的第一金屬化層的部分移除而產生；電極，其配置在該腔穴和該半導體基板之間；以及聲音隔膜，其包括該CMOS晶圓的介電層和第二金屬化層，該腔穴係配置在該半導體基板和該聲音隔膜之間；以及在該半導體基板中的積體電路，其耦合於該超音波轉換器並且建構成控制該超音波轉換器的操作；其中配置在該腔穴和該半導體基板之間的該電極是該超音波轉換器的第一電極，並且其中該超音波轉換器進一步包括第二電極，其配置成相對於該第一電極，該第二電極配置在該腔穴和該第二金屬化層之間的該聲音隔膜中。
  2. 如申請專利範圍第1項的CMOS晶圓，其中配置在該腔穴和該半導體基板之間的該電極包含經部份移除的該第一金屬化層之襯墊層。
  3. 如申請專利範圍第1項的CMOS晶圓，其中該聲音隔膜包括一或更多個導電通孔。
  4. 如申請專利範圍第3項的CMOS晶圓，其中該聲音隔膜的該一或更多個導電通孔當中至少一者電連接到該第二電極。
  5. 如申請專利範圍第1項的CMOS晶圓，進一步包括至少一填充的存取孔洞，其通過至少部分的該聲音隔膜而到該腔穴。
  6. 如申請專利範圍第1項的CMOS晶圓，其包括包含該超音波轉換器的多個超音波轉換器。
  7. 如申請專利範圍第1項的CMOS晶圓，其中該第二金屬化層嵌埋在該聲音隔膜的該介電層裡。
  8. 如申請專利範圍第1項的CMOS晶圓，其進一步包括至少一孔洞，其定位成不通過該聲音隔膜。
  9. 一種互補式金屬氧化物半導體(CMOS)晶圓，其包括：半導體基板；超音波轉換器，其包括：腔穴，其藉由該CMOS晶圓的第一金屬化層的部分移除而產生；電極，其配置在該腔穴和該半導體基板之間；以及聲音隔膜，其包括該CMOS晶圓的介電層和第二金屬化層，該腔穴係配置在該半導體基板和該聲音隔膜之間；以及在該半導體基板中的積體電路，耦合於該超音波轉換器並且建構成控制該超音波轉換器的操作；其中配置在該腔穴和該半導體基板之間的該電極是該超音波轉換器的底部電極，並且其中該超音波轉換器進一步包括頂部電極，該頂部電極配置在該腔穴和該第二金屬化層之間，而該腔穴係配置在該底部電極和該頂部電極之間，並且其中該等底部和頂部電極包含經部份移除的該第一金屬化層之襯墊層。
  10. 一種互補式金屬氧化物半導體(CMOS)晶圓，其包括：半導體基板；第一金屬化層；以及超音波轉換器，其包括：腔穴，其形成於該第一金屬化層中；第一電極，其配置在該腔穴和該半導體基板之間，該第一電極包含該第一金屬化層的第一部分；以及聲音隔膜，其包括介電層、第二電極和第二金屬化層，該腔穴係配置在該半導體基板和該聲音隔膜之間，該第二電極包含該第一金屬化層的第二部分，並且該第二電極配置在該腔穴和該第二金屬化層之間；以及在該半導體基板中的積體電路，耦合於該超音波轉換器並且建構成控制該超音波轉換器的操作。
  11. 如申請專利範圍第10項的互補式金屬氧化物半導體(CMOS)晶圓，其中該第一金屬化層建構成在該基板的周邊區域來傳送電訊號。
  12. 如申請專利範圍第10項的互補式金屬氧化物半導體(CMOS)晶圓，其中該第一金屬化層具有在當中形成的多個腔穴，並且其中每個腔穴對應於不同的超音波轉換器。
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