TWI661189B - Method for detecting defects of thin-film transistor panel and device thereof - Google Patents

Method for detecting defects of thin-film transistor panel and device thereof Download PDF

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TWI661189B
TWI661189B TW106133959A TW106133959A TWI661189B TW I661189 B TWI661189 B TW I661189B TW 106133959 A TW106133959 A TW 106133959A TW 106133959 A TW106133959 A TW 106133959A TW I661189 B TWI661189 B TW I661189B
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detection
probe
defect
line
electrical signal
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TW106133959A
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TW201915476A (en
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黃文炯
莊文忠
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興城科技股份有限公司
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Abstract

本發明揭露一種薄膜電晶體(Thin-Film Transistor，TFT)面板缺陷之檢測方法及其裝置，該方法包括以探針加電壓至面板之線路的複數個位置，以獲得複數個位置之複數筆的電流以及電壓值資料，以及比對複數筆電流值資料與正常電流或電壓值以檢測出異常電流值，當判斷該異常電流或電壓值所相對應位置之電流或電壓值超過於使用者設定範圍時，即將與各異常電流相對應的所有位置標示為存有缺陷之位置，並增高探針的電流或電壓值將該位置的缺陷強制熔斷，俾利於進行後續製程。 The invention discloses a thin-film transistor (Thin-Film Transistor, TFT) panel defect detection method and a device thereof. The method includes applying a probe to apply voltage to a plurality of positions of a panel line to obtain a plurality of positions of a plurality of pens. Current and voltage value data, and compare multiple current value data with normal current or voltage value to detect abnormal current value. When it is judged that the current or voltage value corresponding to the abnormal current or voltage value exceeds the user-set range At this time, all the positions corresponding to the abnormal currents are marked as defective positions, and the current or voltage value of the probe is increased to forcibly fuse the defects at the positions, which is conducive to subsequent processes.

Description

薄膜電晶體面板缺陷之檢測方法及其裝置 Method and device for detecting defects of thin film transistor panel

本發明為一種薄膜電晶體(Thin-Film Transistor，TFT)面板缺陷之檢測方法及其裝置，尤指一種利用強制熔斷缺陷之以利後續檢測方法及其裝置。 The invention relates to a thin-film transistor (Thin-Film Transistor, TFT) panel defect detection method and a device thereof, and particularly to a method and a device for facilitating subsequent detection by using a forced fusing defect.

目前台灣的面板業是以薄膜電晶體(Thin-Film Transistor，TFT)液晶顯示器(Liquid Crystal Display,LCD)為主，其利用一片TFT面板與另一片彩色濾光片(Color Filter,CF)相貼合後，再灌入液晶而形成。其製程包括陣列(Array)段之前段及面板(Cell)組裝之後段，而TFT面板(Panel)在製作的過程中，必須先使用一種電性檢測設備對其缺陷進行檢測，俾確保產品的品質無虞。 At present, the panel industry in Taiwan is mainly based on Thin-Film Transistor (TFT) liquid crystal displays (LCDs). It uses a TFT panel to be attached to another color filter (CF). After closing, it is filled with liquid crystal. The manufacturing process includes the front section of the Array section and the rear section of the Cell assembly. During the production process of the TFT panel, it is necessary to first use an electrical testing equipment to detect its defects to ensure the quality of the product. No worries.

請參閱第一圖，顯示出針對一TFT面板10缺陷的非接觸式之檢測技術，是使用一個感應器頭(sensor head)11做為一給電電極，並利用交流電施加約500V(視產品及使用者設定)的電壓至一線路12，而感應器頭11與線路12之間保持有一段150~100μm的距離DP，即利用此空間的空氣當作介質，然後利用電容原理產生微小的感應 電流，並在感應它的微小電流之後，經過一非接觸式之接收電極13及一放大器14放大信號，即可輸出相對應的電壓。當檢測出線路15有出現如第二圖所示之一訊號變化SC時，即得以檢測出線路15中具有此斷線(Open)或短路(Short)的缺陷(Defect)之位置20。 Please refer to the first figure, which shows a non-contact detection technology for a defect of a TFT panel 10, which uses a sensor head 11 as a power supply electrode, and applies about 500V with alternating current (depending on the product and use) (Set by the person) to a line 12, and a distance of 150 ~ 100μm is maintained between the sensor head 11 and the line 12, that is, using the air in this space as a medium, and then using the capacitance principle to generate a small induction After the current is sensed, the signal is amplified through a non-contact receiving electrode 13 and an amplifier 14 after inducing its tiny current, and a corresponding voltage can be output. When it is detected that there is a signal change SC in the line 15 as shown in the second figure, the position 20 in the line 15 having the defect (Defect) of the open or short circuit can be detected.

請參閱第三圖，顯示出另一種對一TFT面板30缺陷的接觸式檢測技術，是使用位於探針台(Prober)上的一個探針(Probe)31做為一給電電極，並利用直流電(DC)施加約20V(視產品及使用者設定)的電壓至一線路32，而此探針31與線路32是直接接觸以感應線路的電壓或電流，經過另一探針33做為一接收電極及一放大器34放大信號。當檢測出線路32有出現如第四圖所示之一訊號變化SC時，即得以檢測出線路35是具有此斷線(Open)或短路(Short)之缺陷(Defect)位置40。 Please refer to the third figure, which shows another contact detection technology for a defect of a TFT panel 30. A probe 31 on a prober (Prober) is used as a power supply electrode, and a direct current ( DC) Apply a voltage of about 20V (depending on the product and user settings) to a line 32, and this probe 31 is in direct contact with the line 32 to sense the voltage or current of the line, and another probe 33 is used as a receiving electrode And an amplifier 34 amplifies the signal. When it is detected that the line 32 has a signal change SC as shown in the fourth figure, it can be detected that the line 35 has a defect position 40 of this open (short) or short (short).

請參閱第五圖，顯示出另一種對一TFT面板50缺陷的接觸式檢測技術，是使用一個探針51做為一給電電極，並利用交流電施加電壓至一線路52，探針51與線路52是直接接觸的，但是在接收電極的部分則改為一非接觸式之接收電極53及一放大器54放大信號。 Please refer to the fifth figure, which shows another contact detection technology for a defect of a TFT panel 50, which uses a probe 51 as a power supply electrode and applies AC voltage to a line 52. The probe 51 and the line 52 It is in direct contact, but the part of the receiving electrode is changed to a non-contact receiving electrode 53 and an amplifier 54 to amplify the signal.

然而以上三種檢測方式仍有其無法克服的缺點，包括：外圍線路的斷線及短路缺陷、驅動IC線路缺陷(GOA)、畫素線路區斷線及短路缺陷。 However, the above three detection methods still have their insurmountable shortcomings, including: disconnection and short-circuit defects of peripheral circuits, driver IC circuit defects (GOA), pixel circuit area disconnection and short-circuit defects.

如第六圖所示的線路61、62之一的微短路缺陷63，其中微短路缺陷63可能是一些顆粒(Particle)等雜 質而造成的，其原本是屬於圖案(Pattern)的一部份，經清洗機清洗而剝離掉落，當施加一驅動電壓V至線路61、62時(虛線DR表示電流方向)，由於電流在尚未中斷但已缺掉一大片而僅剩下一絲絲的微短路缺陷63處仍然是流得過去，因此在正常方式下是檢測不出來的，但是微短路缺陷63在製成產品後，經過長期的使用後，可能因為持續電流的驅動而劣化而崩斷，造成線路功能的故障。 As shown in the sixth figure, the micro-short-circuit defect 63 of one of the lines 61 and 62, wherein the micro-short-circuit defect 63 may be some particles or other impurities. Due to the quality, it was originally a part of the pattern. It was peeled off after being cleaned by a washing machine. When a driving voltage V was applied to the lines 61 and 62 (the dotted line DR indicates the direction of the current), due to the current in the The micro short-circuit defect 63 that has not been interrupted but has a large piece missing and only a trace remains is still passing, so it cannot be detected in the normal way, but the micro short-circuit defect 63 has been in the product for a long period of time. After use, it may be broken due to continuous current driving and cause line function failure.

請參閱第七圖，由於製程的失誤，使得導電異物721黏附於線路71及72甚至於線路73上，而造成線路71、72及73之間不正常的電性連接而短路，而導致線路功能的故障。 Please refer to the seventh figure. Due to a process error, the conductive foreign matter 721 adheres to the lines 71 and 72 and even the line 73, resulting in an abnormal electrical connection between the lines 71, 72, and 73 and a short circuit, which results in the function of the line failure.

上述的缺陷在Array段並不易檢測出，通常會在Cell段之點燈站點才發現缺陷，而在Cell段點燈站雖可檢出缺陷，但修補的良率卻是偏低的。況且斷線的缺陷於面板修補站(Cell Repair)是無法進行修補，因為斷線的缺陷需於Array段中的雷射化學氣相沉積(Laser CVD)段才可進行修補，至於短路的缺陷雖可在Cell Repair進行修補，但相對於Array段，在此Repair修補的成功率是偏低的。 The above-mentioned defects are not easy to detect in the Array section. Usually, the defects are only found at the lighting section of the Cell section. Although the defects can be detected at the lighting section of the Cell section, the repair rate is low. Moreover, the defect of the disconnection cannot be repaired at the Cell Repair, because the defect of the disconnection can only be repaired by the Laser CVD segment in the Array segment. Can be repaired in Cell Repair, but compared to the Array segment, the success rate of Repair is relatively low.

職是之故，如何解決在Array段時前述缺陷檢出不易之問題，經發明人致力於實驗、測試及研究後，終於獲得一種薄膜電晶體面板缺陷之檢測方法及其裝置，除了有效地檢出在Array段的前述缺陷之外，亦能兼具有提高修補良率之功效。亦即本發明所欲解決的課題為如何克 服在Array段的線路之斷線及短路缺陷不易檢測出的問題，而使得線路之斷線及短路缺陷在Array段就能進行修補，又如何克服存有缺陷的位置需予以定位之問題，以及如何克服依循修補路徑對缺陷位置進行修補的問題等。 The reason is how to solve the problem that the aforementioned defects are not easy to detect in the Array section. After the inventor devoted himself to experiments, tests and studies, he finally obtained a method and device for detecting defects in thin-film transistor panels. In addition to the aforementioned defects of the Array segment, it can also have the effect of improving the repair yield. That is, how to solve the problem The problem of disconnection and short-circuit defects of the line in the Array segment is difficult to detect, so that the disconnection and short-circuit defects of the line can be repaired in the Array segment, and how to overcome the problem of the location of the defect, and How to overcome the problem of repairing defect locations by following the repair path.

本發明揭露一種薄膜電晶體(Thin-Film Transistor，TFT)面板缺陷之檢測方法，其中該TFT面板包括複數線路，包括複數第一偵測點、複數第二偵測點及相異於該複數第一偵測點與複數該第二偵測點的複數第三偵測點，該檢測方法包括：以一第一探針對該各該第一偵測點施加具有一第一參數的一第一電氣信號，以使該線路的該複數第一偵測點與該複數第三偵測點之間的一缺陷呈現一狀態；將一第二探針對各該第二偵測點施加具有一第二參數的一第二電氣信號，其中該第一參數高於該第二參數；將一回路探針接觸至各該第三偵測點，測量複數個第三電氣信號；以及以各該第三電氣信號相對於該狀態的第三參數，確定該第一偵測點及該第三偵測點間的該缺陷被熔斷。 The invention discloses a thin-film transistor (TFT) panel defect detection method, wherein the TFT panel includes a plurality of lines, including a plurality of first detection points, a plurality of second detection points, and a number different from the plurality of first detection points. A detection point and a plurality of third detection points of the second detection point, the detection method comprising: applying a first electrical probe with a first parameter to each of the first detection points with a first probe; Signal to cause a defect between the first detection point and the third detection point of the line to present a state; applying a second probe to each of the second detection points with a second parameter A second electrical signal, wherein the first parameter is higher than the second parameter; contacting a loop probe to each of the third detection points, measuring a plurality of third electrical signals; and using each of the third electrical signals Relative to the third parameter of the state, it is determined that the defect between the first detection point and the third detection point is blown.

又按照一主要技術的觀點來看，本發明還揭露一種半導體之缺陷檢測方法，其中該半導體具至少一線路，且該至少一線路包含複數個位置，該檢測方法包括：使該至少一線路通電，使該位置的一缺陷熔斷；逐一量測各該位置之電壓，以獲得該複數個位置之複數筆電壓資料；以及比對各該電壓資料與一參考電壓資料，以確定該 缺陷被熔斷。 According to a viewpoint of a main technology, the present invention also discloses a semiconductor defect detection method, wherein the semiconductor has at least one line, and the at least one line includes a plurality of positions, and the detection method includes: energizing the at least one line To blow a defect at that location; measure the voltage at each location one by one to get multiple pieces of voltage data at the multiple locations; and compare each of the voltage data with a reference voltage data to determine the The defect was blown.

如按照其他可採行的觀點，本發明還揭露一種檢測一半導體的缺陷之裝置，其中該半導體具至少一線路、該至少一線路包含複數個位置、且該複數個位置等距相鄰分布，該裝置包括：一量測通電元件，用以施加一量測電氣信號至該至少一線路上各該複數個位置；一量測元件，用以逐一量測各該複數個位置，以獲得複數個輸出電氣信號；一比對元件，用以比對各該輸出電氣信號與一參考電氣信號，當各該輸出電氣信號與該參考電氣信號的一差值超出一使用者設定值範圍時，即判斷為一異常輸出電氣信號，並確定該異常輸出電氣信號所對應之線路為一缺陷線路並標示該缺陷的位置；以及一強制通電元件，用以施加一強制電氣信號至該缺陷的位置以熔斷該缺陷。 According to other applicable viewpoints, the present invention also discloses a device for detecting a defect of a semiconductor, wherein the semiconductor has at least one circuit, the at least one circuit includes a plurality of positions, and the plurality of positions are adjacently spaced adjacently, The device includes: a measuring energizing element for applying a measuring electrical signal to each of the plurality of positions on the at least one line; a measuring element for measuring each of the plurality of positions one by one to obtain a plurality of outputs An electrical signal; a comparison element for comparing each of the output electrical signal with a reference electrical signal; when a difference between each of the output electrical signal and the reference electrical signal exceeds a user-set value range, it is judged as An abnormal output electrical signal, and determining that the line corresponding to the abnormal output electrical signal is a defective line and indicating the position of the defect; and a forcible power-on element for applying a forcible electrical signal to the position of the defect to fuse the defect .

本案亦可以為一種檢測一半導體裝置一缺陷之方法，其中該半導體裝置具至少一線路，該方法包括：提供一治具，其中該治具具二探針，且該二探針具一固定距離；依該固定距離將該至少一線路分成複數檢測區段；提供一強制信號至各該檢測區段以熔斷該缺陷；以及提供一檢測信號，逐一檢測各該檢測區段，以獲得各該檢測區段之一檢測參數；以及比較該檢測參數與一參考參數，以決定各該檢測區段的該缺陷是否已被熔斷。。 This case can also be a method for detecting a defect of a semiconductor device, wherein the semiconductor device has at least one circuit, the method includes: providing a jig, wherein the jig has two probes, and the two probes have a fixed distance ; Dividing the at least one line into a plurality of detection sections according to the fixed distance; providing a mandatory signal to each of the detection sections to fuse the defect; and providing a detection signal to detect each of the detection sections one by one to obtain each of the detections A detection parameter of one of the sections; and comparing the detection parameter with a reference parameter to determine whether the defect of each of the detection sections has been blown. .

本案亦可以為一種準備存有一缺陷之一半導體裝置以供一進一步修復之方法，其中該半導體裝置具至少一線路，該方法包括：提供一治具，其中該治具具一探 針；將該至少一線路分成複數檢測區段；提供一電力至各該檢測區段以熔斷該檢測區段上缺陷；以及提供一檢測信號，逐一檢測各該檢測區段，以決定各該檢測區段的該缺陷是否熔斷。 This case may also be a method for preparing a semiconductor device having a defect for further repair, wherein the semiconductor device has at least one circuit, and the method includes: providing a jig, wherein the jig is a probe Divide the at least one line into a plurality of detection sections; provide a power to each of the detection sections to fuse a defect on the detection section; and provide a detection signal to detect each of the detection sections one by one to determine each of the detections Whether the defect of the segment is blown.

本案亦可以為一種準備存有一導電異物之一半導體裝置以供一進一步修復之方法，其中該半導體裝置具至少二線路，該方法包括：提供一治具，其中該治具具二探針；將該至少二線路分成複數跨線檢測區段；提供一熔斷電力透過該相關探針至各該跨線檢測區段以熔斷各該跨檢測區段的該導電異物；以及提供一檢測信號，逐一檢測各該跨線檢測區段，以決定各該跨線檢測區段該導電異物是否已被熔斷。 This case may also be a method for preparing a semiconductor device having a conductive foreign object for further repair, wherein the semiconductor device has at least two lines, and the method includes: providing a jig, wherein the jig has two probes; The at least two lines are divided into a plurality of cross-line detection sections; a fuse is provided to pass through the relevant probe to each of the cross-line detection sections to fuse the conductive foreign objects in each of the cross-detection sections; and a detection signal is provided to detect one by one Each of the cross-line detection sections is to determine whether the conductive foreign object in each of the cross-line detection sections has been blown out.

10‧‧‧TFT面板 10‧‧‧TFT panel

11‧‧‧感應器頭 11‧‧‧ sensor head

12‧‧‧線路 12‧‧‧ route

DP‧‧‧距離 DP‧‧‧ Distance

13‧‧‧接收電極 13‧‧‧Receiving electrode

14‧‧‧放大器 14‧‧‧ Amplifier

15‧‧‧線路 15‧‧‧ route

20‧‧‧缺陷之位置 20‧‧‧ Defect location

30‧‧‧面板 30‧‧‧ Panel

31‧‧‧探針 31‧‧‧ Probe

32‧‧‧線路 32‧‧‧ route

33‧‧‧探針 33‧‧‧ Probe

34‧‧‧放大器 34‧‧‧amplifier

35‧‧‧線路 35‧‧‧ route

40‧‧‧缺陷之位置 40‧‧‧ Defect location

50‧‧‧TFT面板 50‧‧‧TFT panel

51‧‧‧探針 51‧‧‧ Probe

52‧‧‧線路 52‧‧‧ route

53‧‧‧接收電極 53‧‧‧Receiving electrode

54‧‧‧放大器 54‧‧‧Amplifier

61、62‧‧‧線路 61, 62‧‧‧ route

63‧‧‧微短路缺陷 63‧‧‧Micro short circuit defect

71、72‧‧‧外圍線路 71, 72‧‧‧ Peripheral lines

721、916‧‧‧導電異物 721, 916‧‧‧ conductive foreign matter

81、82、83‧‧‧外圍線路 81, 82, 83‧‧‧ Peripheral lines

84、85、914、915‧‧‧缺陷 84, 85, 914, 915‧‧‧ Defects

91、91’、91”‧‧‧複數線路 91, 91 ’, 91” ‧‧‧ plural lines

910‧‧‧玻璃基板 910‧‧‧ glass substrate

911‧‧‧第一偵測點 911‧‧‧first detection point

912‧‧‧第二偵測點 912‧‧‧Second detection point

913‧‧‧第三偵測點 913‧‧‧Third detection point

913’‧‧‧第四偵測點 913’‧‧‧ the fourth detection point

92‧‧‧第一探針治具 92‧‧‧The first probe fixture

920‧‧‧第一探針 920‧‧‧first probe

921、931‧‧‧第二探針 921, 931‧‧‧ Second Probe

922‧‧‧第四信號接點 922‧‧‧The fourth signal contact

923‧‧‧第五信號接點 923‧‧‧The fifth signal contact

924‧‧‧第六信號接點 924‧‧‧ sixth signal contact

93‧‧‧第二探針治具 93‧‧‧Second Probe Fixture

930‧‧‧第一回路探針 930‧‧‧first loop probe

930’‧‧‧第二回路探針 930’‧‧‧Second Loop Probe

932‧‧‧第一信號接點 932‧‧‧First signal contact

933‧‧‧第二信號接點 933‧‧‧Second signal contact

934‧‧‧第三信號接點 934‧‧‧Third signal contact

951‧‧‧強制信號產生裝置 951‧‧‧ Forced signal generating device

952‧‧‧量測信號產生裝置 952‧‧‧Measurement signal generating device

953‧‧‧量測信號接收裝置 953‧‧‧Measurement signal receiving device

96‧‧‧控制及比對裝置 96‧‧‧Control and comparison device

961、962‧‧‧控制信號連線 961、962‧‧‧Control signal connection

97‧‧‧顯示裝置 97‧‧‧display device

第一圖：是習知的TFT面板缺陷之非接觸式檢測技術之側視示意圖；第二圖：是第一圖中的檢測技術於發現缺陷時之側視示意圖；第三圖：是習知的TFT面板缺陷之接觸式檢測技術之側視示意圖；第四圖：是第三圖中的檢測技術於發現缺陷時之側視示意圖；第五圖：是習知的TFT面板缺陷之接觸式及非接觸 式混合檢測技術之側視示意圖；第六圖：是習知的TFT面板之正常線路與具有微斷線缺陷的線路之俯視示意圖；第七圖：是習知的薄膜電晶體(TFT)面板缺陷的外圍線路之俯視示意圖；第八A圖：是本發明較佳實施例之一種薄膜電晶體(TFT)玻璃基板的四探針缺陷檢測裝置示意圖；第八B圖：是本發明較佳實施例之一種薄膜電晶體(TFT)玻璃基板的四探針缺陷檢測位置示意圖；第九A圖：是本發明較佳實施例之一種薄膜電晶體(TFT)玻璃基板的三探針缺陷檢測裝置示意圖；第九B圖：是本發明較佳實施例之一種薄膜電晶體(TFT)玻璃基板的三探針全線式線路缺陷檢測位置示意圖；第九C圖：是本發明較佳實施例之一種薄膜電晶體(TFT)玻璃基板的三探針區段式線路的缺陷檢測位置示意圖；第十A圖：是本發明較佳實施例之一種薄膜電晶體(TFT)玻璃基板的三探針跨線路缺陷檢測裝置；第十B圖：是本發明較佳實施例之一種薄膜電晶體(TFT)玻璃基板的三探針全線式跨線路缺陷檢測位置示意圖；第十C圖：是本發明較佳實施例之一種薄膜電晶體 (TFT)玻璃基板的三探針區段式跨線路缺陷檢測位置示意圖；第十一A圖：是本發明較佳實施例之一種薄膜電晶體(TFT)玻璃基板的雙探針缺陷檢測裝置示意圖；第十一B圖：是本發明較佳實施例之一種薄膜電晶體(TFT)玻璃基板的雙探針全線式線路缺陷檢測位置示意圖；第十一C圖：是本發明較佳實施例之一種薄膜電晶體(TFT)玻璃基板的雙探針區段式線路的缺陷檢測位置示意圖；第十二A圖：是本發明較佳實施例之一種薄膜電晶體(TFT)玻璃基板的雙探針跨線路缺陷檢測裝置示意圖；第十二B圖：是本發明較佳實施例之一種薄膜電晶體(TFT)玻璃基板的雙探針全線式跨線路缺陷檢測位置示意圖；以及第十二C圖：是本發明較佳實施例之一種薄膜電晶體(TFT)玻璃基板的雙探針區段式跨線路缺陷檢測位置示意圖。 The first picture: a schematic side view of the conventional non-contact detection technology of TFT panel defects; the second picture: the side view of the detection technology in the first figure when a defect is found; the third picture: the conventional Side view of the contact detection technology of TFT panel defects; Figure 4: Side view of the detection technology in Figure 3 when a defect is found; Figure 5: Contact and non contact Side view of the hybrid detection technology; Figure 6 is a schematic plan view of the normal circuit of a conventional TFT panel and a circuit with a micro-breakage defect; Figure 7 is a conventional thin film transistor (TFT) panel defect Top view of the peripheral circuit; Figure 8A is a schematic diagram of a four-probe defect detection device of a thin film transistor (TFT) glass substrate according to a preferred embodiment of the present invention; Figure 8B is a preferred embodiment of the present invention A schematic diagram of a four-probe defect detection position of a thin film transistor (TFT) glass substrate; FIG. 9A is a schematic diagram of a three-probe defect detection device of a thin film transistor (TFT) glass substrate according to a preferred embodiment of the present invention; FIG. 9B is a schematic diagram of a three-probe full-line line defect detection position of a thin film transistor (TFT) glass substrate of a preferred embodiment of the present invention; FIG. 9C is a thin film of a preferred embodiment of the present invention Schematic diagram of defect detection position of three-probe section line of a TFT glass substrate; Figure 10A is a three-probe cross-line defect detection of a thin film transistor (TFT) glass substrate according to a preferred embodiment of the present invention Figure 10B is a schematic diagram of a three-probe full-line cross-line defect detection position of a thin film transistor (TFT) glass substrate according to a preferred embodiment of the present invention; Figure 10C is a preferred embodiment of the present invention Thin film transistor (TFT) glass substrate three-probe sectional cross-line defect detection location diagram; Figure 11A is a schematic diagram of a thin-film transistor (TFT) glass substrate double-probe defect inspection device of a preferred embodiment of the present invention Figure 11B is a schematic diagram of a dual-probe full-line line defect detection position of a thin film transistor (TFT) glass substrate according to a preferred embodiment of the present invention; Figure 11C is a preferred embodiment of the present invention Schematic diagram of the defect detection position of a double-probe section line of a thin-film transistor (TFT) glass substrate; Figure 12A is a dual-probe of a thin-film transistor (TFT) glass substrate of a preferred embodiment of the present invention Schematic diagram of a cross-line defect detection device; FIG. 12B is a schematic diagram of a dual-probe full-line cross-line defect detection position of a thin film transistor (TFT) glass substrate according to a preferred embodiment of the present invention; and FIG. 12C: It is a schematic diagram of a double-probe section cross-line defect detection position of a thin film transistor (TFT) glass substrate according to a preferred embodiment of the present invention.

為了讓前述習知的缺陷在Array段即能被檢出，本發明提出以下的薄膜電晶體(TFT)面板缺陷之檢測方法及其裝置。然而，本發明所提出的檢測方法及其裝置，不只限於使用在薄膜電晶體(TFT)面板，亦可應用到 其他種類的線路缺陷之檢測。 In order to enable the aforementioned conventional defects to be detected in the Array segment, the present invention proposes the following method and device for detecting defects in a thin film transistor (TFT) panel. However, the detection method and the device provided by the present invention are not limited to being used in a thin film transistor (TFT) panel, but can also be applied to Detection of other types of line defects.

本發明的缺陷檢測裝置及方法提供熔斷及量測模式，前述兩種模式可依不同需求而組合成不同應用的情況。 The defect detection device and method of the present invention provide a fusing and measurement mode. The foregoing two modes can be combined into different applications according to different needs.

在第一種情況下，為了節省檢測時間，可先將缺陷檢測裝置設定為熔斷模式，以對薄膜電晶體(TFT)玻璃基板上的線路，先以第一探針施加具第一參數的第一電氣信號於第一偵測點，以使該線路上可能存在而且以一般儀器難以偵測的微細缺陷先行加以熔斷，而後將缺陷檢測裝置設定為量測模式，以第二探針施加具第二參數的量測之第二電氣信號於第二偵測點以檢測該線路，並以第二回路探針於第四偵測點得到代表量測結果的第三電氣信號，根據第三電氣信號之第三參數，以確定該等缺陷已被熔斷。具體而言，在熔斷模式完成時，第三電氣信號的第三參數如電壓及電流應該消失，則可確定各該複數線路上的缺陷已被熔斷，然後缺陷檢測裝置移至下一個線路進行同樣的操作，但如果當前述微細缺陷不存在時，第三電氣信號的第三參數仍然與正常線路一樣。因此本發明所提出的檢測方法及裝置，可以加速檢測，另外由於事先對所有線路先進行熔斷處理，然後再進行量測等一貫作業的方式，可以簡化工廠測試流程，提高檢測效率。 In the first case, in order to save the inspection time, the defect detection device can be set to a fusing mode first to apply a first probe with a first parameter to a circuit on a thin film transistor (TFT) glass substrate. An electrical signal is applied to the first detection point, so that the circuit may be fused with micro-defects that are difficult to detect by ordinary instruments, and then the defect detection device is set to the measurement mode. The second electrical signal of the two parameter measurement is detected at the second detection point to detect the line, and the third electrical signal representing the measurement result is obtained at the fourth detection point by the second loop probe. According to the third electrical signal, The third parameter is to determine that these defects have been blown. Specifically, when the fuse mode is completed, the third parameter of the third electrical signal, such as voltage and current, should disappear, it can be determined that the defects on each of the plurality of lines have been blown, and then the defect detection device is moved to the next line to perform the same Operation, but if the aforementioned fine defect does not exist, the third parameter of the third electrical signal is still the same as the normal line. Therefore, the detection method and device provided by the present invention can speed up the detection. In addition, since all the circuits are first fused and then measured in a consistent manner, the factory test process can be simplified and the detection efficiency can be improved.

在第二種情況下，為了先確定線路缺陷的位置，先將缺陷檢測裝置設定為量測模式，以第二探針先施加具第二參數的量測之第二電氣信號於第二偵測點以檢 測該線路，並以第二回路探針於第四偵測點所得到代表量測結果的第三電氣信號之第三參數，與事先設定相對於該線路的參考值作比較。 In the second case, in order to determine the position of the line defect first, the defect detection device is set to the measurement mode, and the second probe first applies the second electrical signal with the second parameter measurement to the second detection. Check Measure the line, and compare the third parameter of the third electrical signal representing the measurement result obtained by the second loop probe at the fourth detection point with the reference value set in advance with respect to the line.

具體而言，請參閱第六圖，當類似第六圖之微短路缺陷63的缺陷存在線路上，使得線路之電阻值變高，因此第三電氣信號的第三參數中的電流值比相對於該線路的參考電流值為小，因此可以判斷微短路缺陷63缺陷的存在。在另一種情況，如果線路出現斷路缺陷，使得第三電氣信號的第三參數中的電流值及電壓都為零，因此可以判斷斷路缺陷的存在。 Specifically, please refer to the sixth figure. When a defect similar to the micro short-circuit defect 63 of the sixth figure exists on the line, the resistance value of the line becomes high, so the current value ratio in the third parameter of the third electrical signal is relative to The reference current value of this line is small, so the existence of the micro-short defect 63 can be judged. In another case, if a disconnection defect occurs on the line, the current value and voltage in the third parameter of the third electrical signal are both zero, so the existence of the disconnection defect can be determined.

在確定該線路存在缺陷之後，缺陷檢測裝置被設定為熔斷模式，以第一探針於第一偵測點對存在缺陷的線路，施加具第一參數的第一電氣信號，將以一般儀器難以偵測的微細缺陷加以熔斷，然後將缺陷檢測裝置移至下一個線路進行同樣的操作。如果在確定該線路並不存在缺陷時或者該缺陷為斷路缺陷，缺陷檢測裝置不會被設定為熔斷模式，而是將缺陷檢測裝置移至下一個線路進行同樣的操作。 After it is determined that the line has a defect, the defect detection device is set to a fusing mode. A first probe is used to apply a first electrical signal with a first parameter to the line with a defect at a first detection point, which will be difficult with ordinary instruments. The micro defects detected are blown, and the defect detection device is moved to the next line for the same operation. If it is determined that there is no defect in the line or the defect is an open-circuit defect, the defect detection device will not be set to the fusing mode, but the defect detection device will be moved to the next line for the same operation.

前述缺陷熔斷及量測可以針對薄膜電晶體(TFT)玻璃基板910上的不同線路同時進行，以加速檢測時間。 The aforementioned defect fusing and measurement can be performed simultaneously for different circuits on the thin film transistor (TFT) glass substrate 910 to speed up the inspection time.

第一參數、第二參數及第三參數為電壓值或電流值的其中之一。熔斷模式所使用的第一參數，即第一電氣信號之電壓值或電流值高於量測模式所使用的第二 參數，即第二電氣信號之電壓值或電流值。第一參數的高電壓值或高電流值，必須考量不同薄膜電晶體(TFT)玻璃基板910上不同線路的尺寸及其對應的耐受電壓或電流，在不會損害在薄膜電晶體(TFT)玻璃基板910上正常線路的情況下，事先設定以利於檢測作業。 The first parameter, the second parameter, and the third parameter are one of a voltage value or a current value. The first parameter used in the fuse mode, that is, the voltage or current value of the first electrical signal is higher than the second parameter used in the measurement mode The parameter is the voltage or current value of the second electrical signal. The high voltage value or high current value of the first parameter must consider the size of different circuits on different thin film transistor (TFT) glass substrates 910 and their corresponding withstand voltage or current, so as not to damage the thin film transistor (TFT). In the case of a normal circuit on the glass substrate 910, it is set in advance to facilitate the inspection operation.

請一併參閱第一圖的非接觸式混合檢測方式與第五圖的接觸式及非接觸式混合檢測方式。本發明並不限於接觸式的缺陷量測，在實際缺陷檢測，非接觸式的缺陷量測也可以應用於本發明。 Please also refer to the non-contact hybrid detection method in the first figure and the contact and non-contact hybrid detection method in the fifth figure. The present invention is not limited to contact-type defect measurement. In actual defect detection, non-contact-type defect measurement can also be applied to the present invention.

如果需要對一TFT面板的複數線路同時進行檢偵測時，各複數線路的量測信號可分別使用頻率不同的交流電壓，以避免各複數線路的量測信號彼此互相干擾。 If multiple lines of a TFT panel need to be detected and detected at the same time, the measurement signals of each of the multiple lines can use AC voltages of different frequencies, respectively, to avoid the measurement signals of each of the multiple lines from interfering with each other.

以下的實施例是針對薄膜電晶體(TFT)面板來說明，但是本發明的線路缺陷檢測裝置可應用到任何其他電子裝置的導電線路。 The following embodiments are described with reference to a thin film transistor (TFT) panel, but the line defect detection device of the present invention can be applied to the conductive lines of any other electronic device.

請一併參閱第八A圖及第八B圖，顯示出本發明較佳實施例之一種薄膜電晶體(TFT)玻璃基板910上的缺陷檢測裝置。本實施例為在不同線路的缺陷同時進行熔斷及量測，線路缺陷檢測裝置包括第一探針治具92(即探針治具1)、第二探針治具93(即探針治具2)、強制信號產生裝置951、量測信號產生裝置952、量測信號接收裝置953、控制及比對裝置96以及顯示裝置97。第一探針治具92包括第一探針920及第二探針921，第一探針920與強制信號產生裝置951連接，第二探針921與量測信號產生裝置 952連接，第一探針920的檢測端與第二探針921的檢測端分別與受測的複數線路91的第一偵測點911及與受測的複數線路91’的第二偵測點912接觸。在實際應用上，第一探針920的檢測端與第二探針921的檢測端相隔的距離，可根據受測的複數線路91與複數線路91’的間距來設定。第二探針治具93包括第一回路探針930、第二回路探針930’，分別與受測複數線路91的第三偵測點913及與受測複數線路91’的第四偵測點913’接觸。 Please refer to FIG. 8A and FIG. 8B together, which shows a defect detection device on a thin film transistor (TFT) glass substrate 910 according to a preferred embodiment of the present invention. This embodiment is to perform fusing and measurement of defects on different lines at the same time. The line defect detection device includes a first probe jig 92 (that is, probe jig 1) and a second probe jig 93 (that is, a probe jig). 2). Forced signal generating device 951, measurement signal generating device 952, measurement signal receiving device 953, control and comparison device 96, and display device 97. The first probe jig 92 includes a first probe 920 and a second probe 921. The first probe 920 is connected to the forced signal generating device 951, and the second probe 921 is connected to the measurement signal generating device. 952 connection, the detection end of the first probe 920 and the detection end of the second probe 921 are respectively with the first detection point 911 of the complex line 91 being tested and the second detection point with the complex line 91 'being tested respectively 912 contacts. In practical applications, the distance between the detection end of the first probe 920 and the detection end of the second probe 921 can be set according to the distance between the measured plurality of lines 91 and the plurality of lines 91 '. The second probe jig 93 includes a first loop probe 930 and a second loop probe 930 ', which are respectively connected to a third detection point 913 of the plurality of lines 91 to be tested and a fourth detection to the plurality of lines 91' to be tested Point 913 'to contact.

在使用非接觸式檢測方式時，第二探針921改為非接觸式給電電極，第二回路探針930’改為非接觸式感應頭，而另外在複數線路91’接近第二回路探針930’的一端，與一接地探針(未示出)接觸。 When using the non-contact detection method, the second probe 921 is changed to a non-contact power supply electrode, the second loop probe 930 'is changed to a non-contact induction head, and the second loop probe is approached on the multiple line 91'. One end of 930 'is in contact with a ground probe (not shown).

在使用接觸式與非接觸式混合檢測方式時，第二回路探針930’改為非接觸式感應頭，而另外在複數線路91’接近第二回路探針930’的一端與一接地探針(未示出)接觸。 When using a contact and non-contact hybrid detection method, the second loop probe 930 'is changed to a non-contact inductive head, and an end of the plurality of lines 91' close to the second loop probe 930 'is connected to a ground probe. (Not shown) contact.

在第一種情況下，第一探針920將強制信號產生裝置951的高電壓或高電流的第一電氣信號施加於受測的複數線路91，第一電氣信號經過第一偵測點911至第三偵測點913，由第一回路探針930回到強制信號產生裝置951以形成一強制信號回路，使複數線路91上可能存在的微細缺陷先行加以熔斷。 In the first case, the first probe 920 applies the high-voltage or high-current first electrical signal of the forced signal generating device 951 to the complex line 91 to be tested, and the first electrical signal passes the first detection point 911 to The third detection point 913 is returned by the first loop probe 930 to the forced signal generating device 951 to form a forced signal loop, so that the minute defects that may exist on the complex line 91 are fused in advance.

當進行熔斷操作時，第二探針921將量測信號產生裝置952的第二電氣信號施加於已經過上一次熔斷操 作的複數線路91’，第二電氣信號經過第二偵測點912至第四偵測點913’形成第三電氣信號，第三電氣信號經由第二回路探針930’送到量測信號接收裝置953以形成一量測信號回路，第三電氣信號由量測信號接收裝置953送到控制及比對裝置96，對第三電氣信號的第三參數加以分析以確定熔斷操作完成，並標定位置。 When the fusing operation is performed, the second probe 921 applies the second electrical signal of the measurement signal generating device 952 to the last fusing operation. The second electrical signal passes through the second detection point 912 to the fourth detection point 913 'to form a third electrical signal, and the third electrical signal is sent to the measurement signal through the second loop probe 930'. The device 953 is used to form a measurement signal loop. The third electrical signal is sent from the measurement signal receiving device 953 to the control and comparison device 96. The third parameter of the third electrical signal is analyzed to determine the completion of the fusing operation and to calibrate the position. .

而後移動第一探針治具92及第二探針治具93，使第一探針920與第一回路探針930移至下一複數線路91”，對複數線路91”進行下一個熔斷操作，而第二探針921與第二回路探針930’移至複數線路91，以確定之前的缺陷熔斷已經完成。 Then move the first probe jig 92 and the second probe jig 93 to move the first probe 920 and the first loop probe 930 to the next plural line 91 ", and perform the next fusing operation on the plural line 91". The second probe 921 and the second loop probe 930 'are moved to the plurality of lines 91 to determine that the previous defect fusing has been completed.

經過前述連續操作，線路的微細缺陷檢測裝置對薄膜電晶體(TFT)玻璃基板的所有線路逐一做缺陷的檢測。由於在第一探針920、第一回路探針930與第二探針921及第二回路探針930’在同時到達各對應的偵測點之後，可隨即同時進行熔斷與量測操作。因此本發明所提出的檢測方法及裝置，可以節省檢測時間及提高檢測效率並利於後續的修補製程。 After the foregoing continuous operation, the circuit's fine defect detection device detects defects of all the circuits of the thin film transistor (TFT) glass substrate one by one. Because the first probe 920, the first loop probe 930, the second probe 921, and the second loop probe 930 'can reach the corresponding detection points at the same time, the fusing and measuring operations can be performed at the same time. Therefore, the detection method and device provided by the present invention can save detection time, improve detection efficiency, and facilitate subsequent repair processes.

在第二種情況下，第二探針921將量測信號產生裝置952的具第二參數之第二電氣信號施加至複數線路91’，第二電氣信號經過第二偵測點912至第四偵測點913’形成第三電氣信號，第三電氣信號經由第二回路探針930’送到量測信號接收裝置953，第三電氣信號由量測信號接收裝置953送到控制及比對裝置96，控制及比對裝置96將 各該複數線路91’所量測到的第三電氣信號轉換為第三參數值，並與各該複數線路91’所對應之參考電氣信號數值加以比對，並將其間差異值與事先設定的門檻值比較，如果差異值不在門檻值的範圍內，可確定各該複數線路91’的第二偵測點912至第四偵測點913’之間是否有存在缺陷，並標定位置，其結果並顯示在顯示裝置97及/或傳至中央控制裝置(未示出)。 In the second case, the second probe 921 applies the second electrical signal with the second parameter of the measurement signal generating device 952 to the complex line 91 ', and the second electrical signal passes the second detection point 912 to the fourth The detection point 913 'forms a third electrical signal. The third electrical signal is sent to the measurement signal receiving device 953 through the second loop probe 930'. The third electrical signal is sent to the control and comparison device by the measurement signal receiving device 953. 96, control and comparison device 96 will The third electrical signal measured by each of the plurality of lines 91 'is converted into a third parameter value, and is compared with the value of the reference electrical signal corresponding to each of the plurality of lines 91', and the difference therebetween is compared with a preset value. Threshold value comparison. If the difference value is not within the threshold value range, it can be determined whether there is a defect between the second detection point 912 to the fourth detection point 913 'of each of the plurality of lines 91', and the position is calibrated. The result is It is displayed on the display device 97 and / or transmitted to a central control device (not shown).

在確定各該複數線路91’的第二偵測點912至第四偵測點913’之間有存在缺陷之後，可將第二探針921向第四偵測點913’移動，並進行前述量測操作，以更精確定位缺陷在複數線路91’的位置。 After it is determined that there is a defect between the second detection point 912 to the fourth detection point 913 'of each of the plurality of lines 91', the second probe 921 can be moved to the fourth detection point 913 'and the foregoing is performed. Measurement operation to more accurately locate the position of the defect on the plurality of lines 91 '.

當在第二探針921對複數線路91’進行量測的同時，第一探針920將強制信號產生裝置951的高電壓或高電流的第一電氣信號，施加於上一次檢測時確定存在缺陷的複數線路91，使複數線路91上存在的缺陷先行熔斷。第一探針治具920及第一回路探針930即移至下一複數線路91，以進行下一個熔斷操作，而第二探針921及第二回路探針930’即移至下一線路(未示出)，以進行下一個的量測操作。但若是上一次檢測時各該複數線路91沒有存在缺陷，或是所存在的缺陷為斷路缺陷915的狀態，線路缺陷檢測裝置不會進行熔斷操作。 When the second probe 921 measures the plurality of lines 91 ′, the first probe 920 will force the high-voltage or high-current first electrical signal of the signal generating device 951 to determine the existence of a defect during the previous inspection. The plurality of lines 91 cause the defects existing on the plurality of lines 91 to be blown first. The first probe jig 920 and the first loop probe 930 are moved to the next plural line 91 for the next fusing operation, and the second probe 921 and the second loop probe 930 'are moved to the next line. (Not shown) for the next measurement operation. However, if there is no defect in each of the plurality of lines 91 at the time of the last inspection, or if the existing defects are in the state of open-circuit defect 915, the line defect detection device will not perform the fusing operation.

根據上述的面板缺陷檢測方法，複數線路91、91’及91”上微細缺陷被熔斷所形成的斷路，根據前述量測所標定的位置，將以例如雷射修補等後續製程進行修 補。 According to the panel defect detection method described above, the breaks formed by fusing the micro-defects on the plurality of lines 91, 91 ', and 91 "will be repaired in subsequent processes such as laser repair according to the positions calibrated by the aforementioned measurement. Make up.

在實際應用上，針對陣列式排列的複數線路，例如TFT面板的線路，其線路間的距離都相同，因此第一探針920、第二探針921可以整合在同一個治具中，並使配置在同一個治具中的第一探針920與第二探針921之間的距離，配合TFT面板的線路間距作適當的安排。 In practical applications, for array-type plural lines, such as TFT panel lines, the distances between the lines are the same, so the first probe 920 and the second probe 921 can be integrated in the same jig, and The distance between the first probe 920 and the second probe 921 arranged in the same jig is appropriately arranged according to the line spacing of the TFT panel.

請參閱第九A圖，顯示出本發明較佳實施例之一種薄膜電晶體(TFT)玻璃基板910上的缺陷檢測裝置，類似前一個實施例，本實施例為在同一線路進行熔斷及量測。 Please refer to FIG. 9A, which shows a defect detection device on a thin film transistor (TFT) glass substrate 910 according to a preferred embodiment of the present invention. Similar to the previous embodiment, this embodiment performs fusing and measurement on the same line. .

本實施例的線路缺陷檢測裝置及方法也提供熔斷及量測模式。在第一種情況下，先進行熔斷模式以熔斷線路的可能存在的缺陷，而後以量測模式以確定該微細缺陷已經熔斷。在第二種情況下，則先進行量測模式以確定線路存在缺陷，而後將已經確定的缺陷加以熔斷。 The line defect detection device and method of this embodiment also provide fusing and measurement modes. In the first case, the fusing mode is performed first to fuse possible defects of the line, and then the measurement mode is used to determine that the fine defect has been blown. In the second case, a measurement mode is performed to determine that the line is defective, and then the identified defect is blown.

線路缺陷檢測裝置包括第一探針治具92(即探針治具1)、第二探針治具93(即探針治具2)、量測信號產生裝置952、量測信號接收裝置953、強制信號產生裝置951、控制及比對裝置96以及顯示裝置97。第一探針治具92包括第一探針920及第二探針921，第一探針920與強制信號產生裝置951連接，第二探針921與量測信號產生裝置952連接，第一探針920的測試端與第二探針921的測試端分別與受測的複數線路91接觸於第一偵測點911與第二偵測點912。在實際應用上，第一探針920的測試端與第二探 針921的測試端相隔的距離可視不同應用來設定。第二探針治具93包括第一回路探針930、第一信號接點932、第二信號接點933及第三信號接點934，第一回路探針930與受測複數線路91接觸於第三偵測點913。 The line defect detection device includes a first probe jig 92 (that is, probe jig 1), a second probe jig 93 (that is, probe jig 2), a measurement signal generating device 952, and a measurement signal receiving device 953 , A forced signal generating device 951, a control and comparison device 96, and a display device 97. The first probe jig 92 includes a first probe 920 and a second probe 921. The first probe 920 is connected to the forced signal generating device 951, and the second probe 921 is connected to the measurement signal generating device 952. The test end of the needle 920 and the test end of the second probe 921 are in contact with the measured plurality of lines 91 at the first detection point 911 and the second detection point 912, respectively. In practical applications, the test end of the first probe 920 and the second probe The distance between the test ends of the pins 921 can be set according to different applications. The second probe jig 93 includes a first loop probe 930, a first signal contact 932, a second signal contact 933, and a third signal contact 934. The first loop probe 930 is in contact with the plurality of circuits 91 to be tested. Third detection point 913.

在使用非接觸式檢測方式時，第二探針921改為非接觸式給電電極，第一回路探針930改為非接觸式感應頭，而另外在複數線路91接近第一回路探針930的一端，與一接地探針(未示出)接觸。 When using the non-contact detection method, the second probe 921 is changed to a non-contact power supply electrode, the first loop probe 930 is changed to a non-contact induction head, and the plurality of lines 91 are close to the first loop probe 930. One end is in contact with a ground probe (not shown).

在使用接觸式與非接觸式混合檢測方式時，第一回路探針930改為非接觸式感應頭，而另外在複數線路91’接近第一回路探針930的一端，與一接地探針(未示出)接觸。 When using a contact and non-contact hybrid detection method, the first loop probe 930 is changed to a non-contact induction head, and in addition, one end of the plurality of lines 91 'near the first loop probe 930 is connected to a ground probe ( (Not shown) contact.

在熔斷模式時，控制及比對裝置96經由控制信號連線962控制第二探針治具93，將第一信號接點932與第二信號接點933連接，透過第一探針920將強制信號產生裝置951的第一電氣信號輸出至各該複數線路91。第一電氣信號在流經第一探針920及存在缺陷的各該複數線路91之後，透過第一回路探針930及第一信號接點932與第二信號接點933，回到強制信號產生裝置951以形成回路，使該回路上的缺陷被熔斷。 In the fuse mode, the control and comparison device 96 controls the second probe jig 93 via the control signal connection 962, connects the first signal contact point 932 to the second signal contact point 933, and forces the The first electrical signal of the signal generating device 951 is output to each of the plurality of lines 91. After the first electrical signal flows through the first probe 920 and each of the plurality of lines 91 with defects, it passes through the first loop probe 930, the first signal contact 932, and the second signal contact 933, and returns to the forced signal generation. The device 951 is configured to form a loop so that defects on the loop are blown.

在量測模式時，控制及比對裝置96經由控制信號連線962控制第二探針治具93，將第一信號接點932與第三信號接點934連接，使量測信號產生裝置952的第二電氣信號在流經第二探針921及受測的各該複數線路91的 第二偵測點912之後所形成的第三電氣信號，透過第一回路探針930及第一信號接點932與第三信號接點934，送至量測信號接收裝置953，量測信號接收裝置953並將其收到的各該複數線路91所量測的第三電氣信號輸出至控制及比對裝置96。 In the measurement mode, the control and comparison device 96 controls the second probe jig 93 via the control signal connection 962, and connects the first signal contact point 932 and the third signal contact point 934, so that the measurement signal generating device 952 Of the second electrical signal flowing through the second probe 921 and each of the plurality of lines 91 tested The third electrical signal formed after the second detection point 912 is sent to the measurement signal receiving device 953 through the first loop probe 930, the first signal contact 932, and the third signal contact 934, and the measurement signal is received. The device 953 outputs the third electrical signals measured by each of the plurality of lines 91 to the control and comparison device 96.

在第一種情況下，線路缺陷檢測裝置先設定為熔斷模式，將複數線路91上的缺陷熔斷後，線路缺陷檢測裝置隨即以量測模式確定缺陷已經被熔斷，然後第一探針920及第二探針921被移至下一個線路進行下一個線路缺陷檢測。 In the first case, the line defect detection device is first set to a fusing mode. After the defects on the plurality of lines 91 are blown, the line defect detection device then determines in a measurement mode that the defect has been blown, and then the first probe 920 and the first The second probe 921 is moved to the next line for the next line defect detection.

在第二種情況下，線路缺陷檢測裝置先設定為量測模式下，控制及比對裝置96將接收到的第三電氣信號轉換為數值，並與各該複數線路91’所對應之參考電氣信號的轉換數值加以比對，並將其間差異值與事先設定的門檻值比較，以確定各該複數線路91的第一偵測點911與第三偵測點913之間是否有缺陷存在，其結果並顯示在顯示裝置97及/或傳至中央控制裝置(未示出)。當確定缺陷存在時，線路缺陷檢測裝置隨即以熔斷模式將缺陷熔斷，然後第一探針920及第二探針921被移至下一個線路進行下一個線路缺陷檢測。 In the second case, the line defect detection device is first set to the measurement mode, and the control and comparison device 96 converts the received third electrical signal into a value, and the reference electrical corresponding to each of the plural lines 91 ' The converted values of the signals are compared, and the difference between them is compared with a preset threshold to determine whether there is a defect between the first detection point 911 and the third detection point 913 of each of the plurality of lines 91. The results are displayed on the display device 97 and / or transmitted to a central control device (not shown). When it is determined that a defect exists, the line defect detection device immediately blows the defect in a fusing mode, and then the first probe 920 and the second probe 921 are moved to the next line for the next line defect detection.

但若是各該複數線路91不存在缺陷或所存在的缺陷為斷路缺陷915的狀態，在量測模式完成後，線路缺陷檢測裝置不會被設定為熔斷模式，而是將第一探針920、第二探針921與第一回路探針930移至下一個線路以 進行缺陷檢測。 However, if there is no defect in each of the plurality of lines 91 or the existing defect is a disconnection defect 915, after the measurement mode is completed, the line defect detection device will not be set to the fuse mode, but the first probe 920, The second probe 921 and the first loop probe 930 move to the next line to Perform defect inspection.

本發明中的缺陷檢測裝置在第一探針920及第二探針921到達各該複數線路91之特定位置(如第一偵測點911與第二偵測點912)之後，可一次完成缺陷的定位及熔斷作業，因此本發明的缺陷檢測及熔斷可以縮短檢測時間並提高檢測效率。 The defect detection device in the present invention can complete the defect at one time after the first probe 920 and the second probe 921 reach specific positions (such as the first detection point 911 and the second detection point 912) of each of the plurality of lines 91. Positioning and fusing operation, the defect detection and fusing of the present invention can shorten the detection time and improve the detection efficiency.

第九A圖中線路缺陷檢測裝置對各該複數線路91的檢測可使用全線或分段的方式進行。 The detection of each of the plurality of lines 91 by the line defect detection device in FIG. 9A may be performed in a full line or in a segmented manner.

請參閱第九B圖，其為在第九A圖的架構下的另一個較佳實施例。在全線方式下，第一探針920及第二探針921與各該複數線路91的前端(即第一偵測點911及第二偵測點912)分別接觸，而第一回路探針930與各該複數線路91的末端(即第三偵測點913)接觸，因此在量測模式下，第二探針921的第二電氣信號可流過整個各該複數線路91，以偵測整個各該複數線路91上的缺陷。而在熔斷模式下，第一探針920的強制第一電氣信號使得各該複數線路91上的微短路缺陷914被熔斷。 Please refer to FIG. 9B, which is another preferred embodiment under the structure of FIG. 9A. In the full line mode, the first probe 920 and the second probe 921 are in contact with the front ends of the plurality of lines 91 (ie, the first detection point 911 and the second detection point 912), and the first loop probe 930 It is in contact with the end of each of the plural lines 91 (ie, the third detection point 913). Therefore, in the measurement mode, the second electrical signal of the second probe 921 can flow through the entire plural lines 91 to detect the entire Defects in each of the plurality of lines 91. In the fuse mode, the forced first electrical signal of the first probe 920 causes the micro short-circuit defects 914 on each of the plurality of lines 91 to be blown.

請參閱第九C圖，其為在第九A圖的架構下的另一個較佳實施例，使用第一探針920及第二探針921以分段方式以檢測複數線路91上微短路缺陷914及斷路缺陷915。在前述第九B圖全線檢測的方式下，若複數線路91上同時存在微短路缺陷914及斷路缺陷915時，由於斷路缺陷915，使得微短路缺陷914無法被檢測出來。 Please refer to FIG. 9C, which is another preferred embodiment under the structure of FIG. 9A. The first probe 920 and the second probe 921 are used to detect micro-short defects on the plurality of lines 91 in a segmented manner. 914 and open circuit defect 915. In the aforementioned full-line detection method of the ninth figure B, if the micro-short defect 914 and the open-circuit defect 915 are simultaneously present on the plurality of lines 91, the micro-short defect 914 cannot be detected due to the open-circuit defect 915.

在分段的方式下，各該複數線路91被劃分為 複數個區段，第一探針920及第一探針921與各該區段的前端(即第一偵測點911及第二偵測點912)接觸，而第一回路探針930與各該區段的末端(即第三偵測點913)接觸。 In a segmented manner, each of the plural lines 91 is divided into A plurality of sections, the first probe 920 and the first probe 921 are in contact with the front end of each section (ie, the first detection point 911 and the second detection point 912), and the first loop probe 930 is in contact with each The end of the segment (ie, the third detection point 913) touches.

因此在熔斷模式下，第一探針920的第一電氣信號可流過整個區段，熔斷第一偵測點911與第三偵測點913之間微斷的微短路缺陷914。在量測模式下，第二探針921的第二電氣信號可流過整個區段，以偵測區段中第二偵測點912與第三偵測點913之間的微短路缺陷914是否存在。 Therefore, in the fuse mode, the first electrical signal of the first probe 920 can flow through the entire section, and the micro-short defect 914 that is slightly broken between the first detection point 911 and the third detection point 913 is fused. In the measurement mode, the second electrical signal of the second probe 921 can flow through the entire section to detect whether the micro-short defect 914 between the second detection point 912 and the third detection point 913 in the section is presence.

在完成前述對各該複數線路91的某一區段缺陷的量測及熔斷處理後，第一探針920、第二探針921及回路探針930即沿著各該複數線路91而移至各該複數線路91的下一個區段，而在完成前述對各該複數線路91的所有區段的量測及熔斷處理後，第一探針920、第二探針921及回路探針930即被移至下一個複數線路91，以進行下一個量測及熔斷處理的步驟。 After completing the foregoing measurement and fusing processing of defects in a certain section of each of the plurality of lines 91, the first probe 920, the second probe 921, and the loop probe 930 are moved along each of the plurality of lines 91 to The next section of each of the plurality of lines 91, and after completing the measurement and fusing processing of all the sections of each of the plurality of lines 91, the first probe 920, the second probe 921, and the loop probe 930 are It is moved to the next plural line 91 for the next measurement and fusing processing steps.

在前述分段的檢測方式下，線路缺陷位置可以區段為單位標示出來，而得到更精確的缺陷定位，有利於後續修補製程。另外在對線路缺陷的熔斷處理時，強制信號也被局限在缺陷所在的區段內，而能避免其流過其他沒有缺陷的區段所造成的傷害。尤其在一線路同時存在多個缺陷時，分段方式能將各該缺陷一一標示在各該區段的位置，並確保各區段的各該缺陷能被熔斷。 In the aforementioned segmented detection method, the position of the line defect can be marked in units of sections, and more accurate defect positioning can be obtained, which is beneficial to the subsequent repair process. In addition, during the fusing process of the line defect, the forced signal is also limited to the section where the defect is located, and it can avoid the damage caused by flowing through other non-defective sections. Especially when there are multiple defects on a line at the same time, the segmentation method can mark each of the defects at the position of each section and ensure that each of the defects in each section can be blown.

請參閱第十A圖，顯示出本發明較佳實施例之一種薄膜電晶體(TFT)玻璃基板910上跨越複數線路91 及其相鄰的複數線路91’之間導電異物916的檢測裝置。第十A圖所示之缺陷檢測裝置與第九A圖完全相同，其差別在於其檢測的對象為橫跨於複數線路91及其相鄰複數線路91’之間的導電異物916。另外第一探針920及第二探針921均分別與複數線路91接觸於第一偵測點911及第二偵測點912，而第一回路探針930與複數線路91’接觸於第三偵測點913。 Please refer to FIG. 10A, which shows a thin film transistor (TFT) glass substrate 910 crossing a plurality of lines 91 in a preferred embodiment of the present invention. Detection device for conductive foreign matter 916 between plural adjacent lines 91 'and adjacent ones thereof. The defect detection device shown in Fig. 10A is completely the same as that in Fig. 9A. The difference is that the detection object is a conductive foreign object 916 that spans between the plural lines 91 and the adjacent plural lines 91 '. In addition, the first probe 920 and the second probe 921 are in contact with the plurality of lines 91 at the first detection point 911 and the second detection point 912, respectively, and the first loop probe 930 is in contact with the plurality of lines 91 'at the third Detection point 913.

在使用非接觸式檢測方式時，第二探針921改為非接觸式給電電極，第一回路探針930改為非接觸式感應頭，而另外在複數線路91’接近第一回路探針930的一端，與一接地探針(未示出)接觸。 When using the non-contact detection method, the second probe 921 is changed to a non-contact power supply electrode, the first loop probe 930 is changed to a non-contact induction head, and the first loop probe 930 is approached on a plurality of lines 91 ′. One end is in contact with a ground probe (not shown).

在使用接觸式與非接觸式混合檢測方式時，第一回路探針930改為非接觸式感應頭，而另外在複數線路91’接近第一回路探針930的一端，與一接地探針(未示出)接觸。 When using a contact and non-contact hybrid detection method, the first loop probe 930 is changed to a non-contact induction head, and in addition, one end of the plurality of lines 91 'near the first loop probe 930 is connected to a ground probe ( (Not shown) contact.

在第一種情況下，線路缺陷檢測裝置先設定為熔斷模式，將橫跨於複數線路91的第一偵測點911與其相鄰複數線路91’的第三偵測點913之間的導電異物916熔斷後，線路缺陷檢測裝置隨即以量測模式確定缺陷已經被熔斷，然後第一探針920及第二探針921被移至下一個線路進行下一個線路缺陷檢測。 In the first case, the line defect detection device is first set to a fusing mode, and a conductive foreign object spanning between the first detection point 911 of the plurality of lines 91 and the third detection point 913 of the adjacent plurality of lines 91 '. After the 916 is blown, the line defect detection device then determines in a measurement mode that the defect has been blown, and then the first probe 920 and the second probe 921 are moved to the next line for the next line defect detection.

在第二種情況下，線路缺陷檢測裝置先設定為量測模式，控制及比對裝置96將接收到的第三電氣信號轉換為數值，並與各該複數線路91’所對應之參考電氣信 號的轉換數值加以比對，並將其間差異值與事先設定的門檻值比較，以確定各該複數線路91的第一偵測點911與各該複數線路91’的第三偵測點913之間是否有導電異物916存在，其結果並顯示在顯示裝置97及/或傳至中央控制裝置(未示出)。當確定導電異物916存在時，線路缺陷檢測裝置隨即以熔斷模式將導電異物916熔斷，然後第一探針920及第二探針921被移至下一個線路進行下一個線路缺陷檢測。 In the second case, the line defect detection device is first set to a measurement mode, and the control and comparison device 96 converts the received third electrical signal into a value, and the reference electrical signal corresponding to each of the plural lines 91 ' The conversion value of the number is compared, and the difference value is compared with a preset threshold value to determine the first detection point 911 of each of the plurality of lines 91 and the third detection point 913 of each of the plurality of lines 91 '. Whether a conductive foreign object 916 is present, and the result is displayed on the display device 97 and / or transmitted to a central control device (not shown). When it is determined that the conductive foreign body 916 exists, the line defect detection device immediately blows the conductive foreign body 916 in a fusing mode, and then the first probe 920 and the second probe 921 are moved to the next line for the next line defect detection.

請參閱第十B圖，在全線方式下，第一探針920及第二探針921分別與各該複數線路91的前端的第一偵測點911及第二偵測點912接觸，而第一回路探針930與各該複數線路91的相鄰的複數線路91’末端的第三偵測點913接觸。 Please refer to FIG. 10B. In the full line mode, the first probe 920 and the second probe 921 are in contact with the first detection point 911 and the second detection point 912 at the front end of each of the plurality of lines 91, respectively. The primary circuit probe 930 is in contact with the third detection point 913 at the end of each of the plurality of lines 91 adjacent to the plurality of lines 91 ′.

在量測模式時，第二電氣信號可透過第一探針920，在流過複數線路91的部份段後，經過導電異物916的缺陷，再流到相鄰的複數線路91’的部份段直至第一回路探針930，使得橫跨於複數線路91及91’位於第一偵測點911與第三偵測點913之間的導電異物916可以被檢測到。 In the measurement mode, the second electrical signal can pass through the first probe 920, flow through a part of the plurality of lines 91, and then pass through the defect of the conductive foreign matter 916, and then flow to the adjacent plurality of lines 91 ' Segment up to the first loop probe 930, so that conductive foreign objects 916 spanning the plurality of lines 91 and 91 'and located between the first detection point 911 and the third detection point 913 can be detected.

在熔斷模式時，強制的第一電氣信號透過第一探針920，經過複數線路91的部份段、導電異物916及複數線路91’的部份段，而後到達第一回路探針930的路徑，使得路徑上的導電異物916被熔斷。 In the fuse mode, the forced first electrical signal passes through the first probe 920, passes through a part of the complex line 91, conductive foreign matter 916, and a part of the complex line 91 ', and then reaches the path of the first loop probe 930 , So that the conductive foreign matter 916 on the path is blown.

請參閱第十C圖，其為本發明另一較佳實施例之分段檢測方式。在分段檢測方式下，各該複數線路91 及與其相鄰的複數線路91’都被劃分為複數個區段，各該複數線路91的區段及與其相鄰的複數線路91’的區段一一對應。第一探針920及第二探針921分別與各該複數線路91的各該區段的前端(即第一偵測點911及第二偵測點912)分別接觸，而第一回路探針930與各該複數線路91所對應的各該複數線路91’的區段的末端(即第三偵測點913)接觸。 Please refer to FIG. 10C, which is a segment detection method according to another preferred embodiment of the present invention. In the segment detection mode, each of the plural lines 91 And the plural lines 91 'adjacent thereto are divided into a plurality of sections, and each of the plural lines 91 and the adjacent plural lines 91' have a one-to-one correspondence. The first probe 920 and the second probe 921 are respectively in contact with the front end of each segment of the plurality of lines 91 (ie, the first detection point 911 and the second detection point 912), and the first loop probe 930 is in contact with the end (ie, the third detection point 913) of the section of each of the plurality of lines 91 'corresponding to each of the plurality of lines 91.

因此在量測模式時，第二電氣信號可透過第一探針920，在流過複數線路91的各該區段之第一偵測點911後，經過導電異物916，再流到相鄰的複數線路91’相對應區段的部份段直至第一回路探針930所接觸的第三偵測點913，使得橫跨於複數線路91及複數線路91’的導電異物916可以被量測到。 Therefore, in the measurement mode, the second electrical signal can pass through the first probe 920, and after passing through the first detection point 911 of each section of the plurality of lines 91, it passes through the conductive foreign matter 916 and then flows to the adjacent Part of the corresponding section of the plurality of lines 91 'up to the third detection point 913 contacted by the first loop probe 930, so that the conductive foreign matter 916 spanning the plurality of lines 91 and the plurality of lines 91' can be measured. .

在熔斷處理時，強制的第一電氣信號透過第二探針921，流經複數線路91、導電異物916及相鄰的複數線路91’的路徑，使得路徑上的導電異物916被熔斷。 During the fusing process, the forced first electrical signal passes through the second probe 921 and flows through the paths of the complex line 91, the conductive foreign body 916, and the adjacent complex line 91 ', so that the conductive foreign body 916 on the path is blown.

在實際應用上，針對陣列式排列的複數線路，例如TFT面板的線路，其線路間的距離都相同，第一探針920、第二探針921可以整合在同一個治具中，並使配置在同一個治具中的第一探針920與第二探針921之間的距離，配合TFT面板的線路間距作適當的安排。第九B圖及第十A圖的第一探針920應盡量靠近第二探針921，使量測模式時的第二電氣信號與熔斷模式時的第一電氣信號送至受測線路的接觸點接近。 In practical applications, for array-shaped plural lines, such as lines of TFT panels, the distance between the lines is the same. The first probe 920 and the second probe 921 can be integrated in the same jig, and the configuration The distance between the first probe 920 and the second probe 921 in the same jig is appropriately arranged according to the line spacing of the TFT panel. The first probe 920 in Figures 9B and 10A should be as close as possible to the second probe 921 so that the second electrical signal in the measurement mode and the first electrical signal in the fuse mode are sent to the contact of the circuit under test. Point close.

請參閱第十一A圖，顯示出本發明較佳實施例之一種薄膜電晶體(TFT)玻璃基板910上複數線路91的缺陷檢測裝置。在本實施例中，量測信號產生裝置952所產生之量測的第二電氣信號，以及控制及比對裝置96分析所接收到的第三電氣信號以確定各該複數線路91上缺陷是否存在的方法，以及以強制信號產生裝置951所產生的第一電氣信號以熔斷該複數線路91上缺陷的方法與第九A圖所對應的實施例相同，其差別在於本實施例使用兩個探針。與前面的實施例相同，缺陷檢測裝置在檢測時也分為量測及熔斷模式，可應用到全線方式或分段方式，而熔斷模式與量測模式的先後順序可針對需求調整。 Please refer to FIG. 11A, which shows a defect detection device for a plurality of lines 91 on a thin film transistor (TFT) glass substrate 910 according to a preferred embodiment of the present invention. In this embodiment, the measured second electrical signal generated by the measurement signal generating device 952 and the control and comparison device 96 analyze the received third electrical signal to determine whether a defect exists on each of the plurality of lines 91. The method of using the first electrical signal generated by the forced signal generating device 951 to fuse the defects on the complex line 91 is the same as that of the embodiment corresponding to the ninth figure A. The difference is that two probes are used in this embodiment. . Similar to the previous embodiments, the defect detection device is also divided into measurement and fusing modes during detection, which can be applied to the full line mode or the segmented mode, and the order of the fusing mode and the measuring mode can be adjusted according to demand.

本實施例的線路缺陷檢測裝置包括第一探針治具92(即探針治具1)、第二探針治具93(即探針治具2)、強制信號產生裝置951、量測信號產生裝置952、量測信號接收裝置953、控制及比對裝置96以及顯示裝置97。第一探針治具92包括第一探針920、第四信號接點922、第五信號接點923及第六信號接點924，第二探針治具93包括第二探針931、第一信號接點932、第二信號接點933及第三信號接點934。控制及比對裝置96分別透過控制信號連線961及962控制第一探針治具92與第二探針治具93。 The line defect detection device of this embodiment includes a first probe jig 92 (that is, probe jig 1), a second probe jig 93 (that is, probe jig 2), a forced signal generating device 951, and a measurement signal The generating device 952, the measurement signal receiving device 953, the control and comparison device 96, and the display device 97. The first probe jig 92 includes a first probe 920, a fourth signal contact 922, a fifth signal contact 923, and a sixth signal contact 924. The second probe jig 93 includes a second probe 931, a first A signal contact 932, a second signal contact 933, and a third signal contact 934. The control and comparison device 96 controls the first probe jig 92 and the second probe jig 93 through control signal connections 961 and 962, respectively.

在實際應用上，針對陣列式排列的複數線路，例如TFT面板的線路，其線路間的距離都相同，因此在區段檢測的應用時，第一探針920、第二探針931可以整合在同一個探針治具中，並使配置在整合治具中的第一探 針920與第二探針931之間的距離，配合TFT面板的線路間距作適當的安排，第一探針920可儘量靠近第二探針931，以降低線路區段的長度，提高量測的精度。 In practical applications, for array-shaped plural lines, such as TFT panel lines, the distances between the lines are the same. Therefore, in the application of segment detection, the first probe 920 and the second probe 931 can be integrated in The same probe fixture, and the first probe configured in the integrated fixture The distance between the pin 920 and the second probe 931 is appropriately arranged in accordance with the line spacing of the TFT panel. The first probe 920 can be as close as possible to the second probe 931 to reduce the length of the line section and improve the measurement accuracy. Precision.

與前面的實施例相同，缺陷檢測裝置可設定為量測及熔斷模式，並應用到全線或分段方式，熔斷模式與量測模式的先後順序可針對需求調整。 As in the previous embodiment, the defect detection device can be set to the measurement and fusing modes and applied to the full line or segmented mode. The order of the fusing mode and the measuring mode can be adjusted according to demand.

在第一種情況下，線路缺陷檢測裝置先設定為熔斷模式，第一探針920將複數線路91上第一偵測點911與第三偵測點912之間的缺陷熔斷後，線路缺陷檢測裝置隨即在量測模式下，經由第二探針931所接收到的電氣信號確定缺陷已經被熔斷，然後第一探針920及第二探針931被移至下一個線路進行下一個線路缺陷檢測。 In the first case, the line defect detection device is first set to a fuse mode, and the first probe 920 fuses a defect between the first detection point 911 and the third detection point 912 on the plurality of lines 91, and then the line defect detection In the measurement mode, the device then determines that the defect has been blown through the electrical signal received by the second probe 931, and then the first probe 920 and the second probe 931 are moved to the next line for the next line defect detection. .

在第二種情況下，線路缺陷檢測裝置先設定為量測模式，控制及比對裝置96將經由第二探針931所接收到的電氣信號轉換為數值，並與各該複數線路91’所對應之參考電氣信號的轉換數值加以比對，並將其間差異值與事先設定的門檻值比較，以確定各該複數線路91的第一偵測點911與第三偵測點913之間是否有缺陷存在，其結果並顯示在顯示裝置97及/或傳至中央控制裝置(未示出)。當確定缺陷存在時，線路缺陷檢測裝置隨即在熔斷模式由第一探針920將缺陷熔斷，然後第一探針920及第二探針931被移至下一個線路進行下一個線路缺陷檢測。 In the second case, the line defect detection device is first set to the measurement mode, and the control and comparison device 96 converts the electrical signal received through the second probe 931 into a value, and compares it with each of the plurality of lines 91 ′. The conversion values of the corresponding reference electrical signals are compared, and the difference between them is compared with a preset threshold to determine whether there is a gap between the first detection point 911 and the third detection point 913 of each of the plurality of lines 91. A defect exists, and the result is displayed on the display device 97 and / or transmitted to a central control device (not shown). When it is determined that a defect exists, the line defect detection device immediately blows the defect in the fusing mode by the first probe 920, and then the first probe 920 and the second probe 931 are moved to the next line for the next line defect detection.

請參閱第十一B圖，為全線方式的檢測位置示意圖，當在量測模式時，第一探針920與各該複數線路91 的前端(即第一偵測點911)接觸，而第二探針931與各該複數線路91的末端(即第二偵測點912)接觸，因此量測的第二電氣信號可檢測到整個各該複數線路91上位於第一偵測點911與第二偵測點912之間的微短路缺陷914或斷路缺陷915。在熔斷模式時，強制信號產生裝置951的第一電氣信號經由第一探針920到各該複數線路91而後到第二探針931的路徑，使各該複數線路91上的微短路缺陷914可以被第一電氣信號所熔斷。如同前述第九C圖全線檢測的方式一樣，在第十一B圖中的複數線路91上，若同時存在微短路缺陷914及斷路缺陷915時，則微短路缺陷914無法檢測出來。 Please refer to FIG. 11B, which is a schematic diagram of the detection position of the full line method. When in the measurement mode, the first probe 920 and each of the plural lines 91 The front end (ie, the first detection point 911) is in contact, and the second probe 931 is in contact with the end of each of the plurality of lines 91 (ie, the second detection point 912), so the measured second electrical signal can detect the entire Each of the plurality of lines 91 has a micro-short defect 914 or a disconnect defect 915 located between the first detection point 911 and the second detection point 912. In the fusing mode, the path of the first electrical signal of the forced signal generating device 951 to each of the plurality of lines 91 through the first probe 920 and then to the second probe 931 makes the micro-short defect 914 on each of the plurality of lines 91 possible. Fused by the first electrical signal. As with the aforementioned full-line detection method of the ninth C figure, if the micro short-circuit defect 914 and the open-circuit defect 915 are simultaneously present on the plurality of lines 91 in the eleventh B figure, the micro-short defect 914 cannot be detected.

請參閱第十一C圖，在分段的方式下，第一探針920與各該複數線路91的各該區段前端(即第一偵測點911)接觸，而第二探針931與各該複數線路91的各該區段末端(即第二偵測點912)接觸，因此量測模式時的第二電氣信號可檢測到該區段上位於第一偵測點911與第二偵測點912之間的微短路缺陷914或斷路缺陷915，而在熔斷模式時，使各該複數線路91的各該區段中的微短路缺陷914被強制的第一電氣信號所熔斷。 Please refer to FIG. 11C. In the segmented manner, the first probe 920 is in contact with the front end of each section of the plurality of lines 91 (ie, the first detection point 911), and the second probe 931 is in contact with The end of each segment (ie, the second detection point 912) of each of the plurality of lines 91 is in contact, so the second electrical signal in the measurement mode can detect that the segment is located at the first detection point 911 and the second detection point. The micro short-circuit defect 914 or the open-circuit defect 915 between the measurement points 912, and in the fuse mode, the micro-short defect 914 in each of the sections of the plurality of lines 91 is blown by the forced first electrical signal.

複數線路91請參閱第十二A圖，顯示出本發明較佳實施例之一種薄膜電晶體(TFT)玻璃基板910上跨越複數線路91及其相鄰複數線路91’的缺陷檢測裝置示意圖。第十二A圖所示之缺陷檢測裝置與第十一A圖完全相同，其差別在於其檢測的對象為橫跨於複數線路91與複數 線路91’的導電異物916。 Please refer to FIG. 12A for a plurality of lines 91, which shows a schematic diagram of a defect detection device across a plurality of lines 91 and its adjacent plurality of lines 91 'on a thin film transistor (TFT) glass substrate 910 according to a preferred embodiment of the present invention. The defect detection device shown in Fig. 12A is exactly the same as that in Fig. 11A. The difference lies in that the detection object is across the plural lines 91 and plural. Conductive foreign matter 916 of the line 91 '.

缺陷檢測裝置也可設定為量測及熔斷模式，並應用到全線或分段檢測時方式，熔斷模式與量測模式的先後順序可針對需求調整。 The defect detection device can also be set to the measurement and fusing mode, and applied to the full line or segmented detection mode. The sequence of the fusing mode and the measuring mode can be adjusted according to demand.

在第一種情況下，線路缺陷檢測裝置先設定為熔斷模式，將橫跨於複數線路91的第一偵測點911與其相鄰複數線路91’的第二偵測點912之間的導電異物916熔斷後，線路缺陷檢測裝置隨即以第二探針931在量測模式下確定缺陷已經被熔斷，然後第一探針920及第二探針931被移至下一個線路進行下一個線路缺陷檢測。 In the first case, the line defect detection device is first set to a fuse mode, and will conduct conductive foreign objects across the first detection point 911 of the plurality of lines 91 and the second detection point 912 of the adjacent plurality of lines 91 '. After the 916 is blown, the line defect detection device then uses the second probe 931 to determine that the defect has been blown in the measurement mode, and then the first probe 920 and the second probe 931 are moved to the next line for the next line defect detection. .

在第二種情況下，線路缺陷檢測裝置先設定為量測模式，控制及比對裝置96將經由第二探針931所接收到的電氣信號轉換為數值，並與各該複數線路91’第二偵測點912所對應之參考電氣信號的轉換數值加以比對，並將其間差異值與事先設定的門檻值比較，以確定各該複數線路91的第一偵測點911與各該複數線路91’的第二偵測點912之間是否有導電異物916存在，其結果並顯示在顯示裝置97及/或傳至中央控制裝置(未示出)。當確定導電異物916存在時，線路缺陷檢測裝置隨即以熔斷模式將導電異物916熔斷，然後第一探針920及第二探針931被移至下一個線路進行下一個線路缺陷檢測。 In the second case, the line defect detection device is first set to the measurement mode, and the control and comparison device 96 converts the electrical signal received through the second probe 931 into a value, and compares the electrical signal received with each of the plural lines 91 ' The converted values of the reference electrical signals corresponding to the two detection points 912 are compared, and the difference between them is compared with a preset threshold to determine the first detection point 911 of each of the plurality of lines 91 and each of the plurality of lines. Whether a conductive foreign object 916 exists between the second detection points 912 of 91 ′, and the result is displayed on the display device 97 and / or transmitted to a central control device (not shown). When it is determined that the conductive foreign body 916 is present, the line defect detection device immediately blows the conductive foreign body 916 in a fusing mode, and then the first probe 920 and the second probe 931 are moved to the next line for the next line defect detection.

請參閱第十二B圖，在全線方式下，第一探針920與各該複數線路91的的前端(即第一偵測點911)接觸，而第二探針931與各該複數線路91相鄰的該複數線路 91’的末端(即第二偵測點912)接觸，因此在量測模式下，第二電氣信號可透過第一探針920流過跨在各該相鄰之複數線路91上的第一偵測點911與複數線路91’上的第二偵測點912之間的導電異物916之後，到達第二探針931所接觸的第二偵測點912，使導電異物916被量測到。而在熔斷模式下，第一電氣信號也透過第一探針920流過與量測的第二電氣信號相同的路徑，使跨在各該相鄰之複數線路91與91’的導電異物916被熔斷。 Please refer to FIG. 12B. In the full line mode, the first probe 920 is in contact with the front end of each of the plurality of lines 91 (ie, the first detection point 911), and the second probe 931 is in contact with each of the plurality of lines 91. Adjacent plural lines The end of 91 '(ie, the second detection point 912) is in contact, so in the measurement mode, the second electrical signal can flow through the first probe across the adjacent plural lines 91 through the first probe 920. After the conductive foreign object 916 between the measurement point 911 and the second detection point 912 on the plurality of lines 91 ', it reaches the second detection point 912 contacted by the second probe 931, so that the conductive foreign object 916 is measured. In the fuse mode, the first electrical signal also flows through the first probe 920 through the same path as the measured second electrical signal, so that the conductive foreign matter 916 across each of the adjacent plural lines 91 and 91 'is removed. Fuse.

請參閱第十二C圖，在分段的方式下，第一探針920及與各該複數線路91的各該區段前端(即第一偵測點911)接觸，而第二探針931與各該複數線路91相鄰的該複數線路91’的各該區段的末端(即第二偵測點912)接觸，因此在量測模式下，第二電氣信號可透過第一探針920流過跨在各該相鄰之複數線路91上的第一偵測點911與複數線路91’上的第二偵測點912之間的導電異物916之後，到達第二探針931所接觸的第二偵測點912，使各該區段之間的導電異物916被量測到。而在熔斷模式下，第一電氣信號也透過第一探針920經由與量測的二電氣信號相同的路徑使跨在各該相鄰之複數線路91與91’的區段之間導電異物916被熔斷。 Please refer to FIG. 12C. In the segmented manner, the first probe 920 is in contact with the front end of each section of the plurality of lines 91 (ie, the first detection point 911), and the second probe 931 The end of each segment of the plurality of lines 91 ′ adjacent to each of the plurality of lines 91 (ie, the second detection point 912) is in contact, so that in the measurement mode, the second electrical signal can pass through the first probe 920 After passing through the conductive foreign matter 916 between the first detection point 911 on each of the adjacent plural lines 91 and the second detection point 912 on the plural lines 91 ', it reaches the contact made by the second probe 931 The second detection point 912 enables the conductive foreign matter 916 between the respective sections to be measured. In the fuse mode, the first electrical signal also passes through the first probe 920 through the same path as the measured two electrical signals to make a conductive foreign object 916 across each of the adjacent plural lines 91 and 91 '. Is blown.

在前述的實施例中，量測信號產生裝置952所產生的第二電氣信號基本上為直流電壓，根據受測的線路缺陷之狀態，第二電氣信號在流過線路缺陷後，形成電壓值及/或電流值與正常線路不同的第三電氣信號。如果需 要對一TFT面板的複數線路以複數個探針組(即第一探針920、第二探針921/931及第一回路探針930、第二回路探針930’的組合)同時進行檢偵測時，各探針組的複數第二電氣信號可分別使用頻率不同的交流電壓，以避免各探針組的複數第二電氣信號彼此互相干擾，而接收裝置952則以各個探針組所對應的不同頻率的濾波器，將所接收來自不同線路所分別形成的複數第三電氣信號加以分離，以便作後續的比較分析。 In the foregoing embodiment, the second electrical signal generated by the measurement signal generating device 952 is basically a DC voltage. According to the state of the measured line defect, the second electrical signal forms a voltage value and And / or a third electrical signal having a current value different from a normal line. If needed The multiple lines of a TFT panel should be inspected simultaneously with multiple probe sets (i.e., the combination of the first probe 920, the second probe 921/931, and the first loop probe 930, the second loop probe 930 '). During detection, the plurality of second electrical signals of each probe group may use AC voltages of different frequencies, respectively, to avoid the plurality of second electrical signals of each probe group from interfering with each other, and the receiving device 952 uses each of the probe groups. Corresponding filters of different frequencies separate the complex third electrical signals received from different lines for subsequent comparison and analysis.

另外，在偵測跨線缺陷時，導電異物916會使複數線路91上的第一偵測點911與複數線路91’上的第三偵測點913(請參考第10B圖)或第二偵測點912(請參考第12B圖)形成一導電的通路，在全線式的檢測方式下，該通路的長度至少為受測線路的長度，導電異物916可能存在於該通路上的複數線路91與複數線路91’之間的任何位置，因此會使難以準確的定位。為了精確定位導電異物916，應選擇區段式檢測，使該通路長度局限在區段的長度內，而且第二探針921與第二回路探針930’(請參考第10C圖)以及第一探針920與第二探針931(請參考第12C圖)分別配置在複數線路91與複數線路91’上相同的相對位置，以更準確的確定導電異物916的位置。 In addition, when detecting cross-line defects, conductive foreign matter 916 will cause the first detection point 911 on the multiple line 91 and the third detection point 913 on the multiple line 91 '(please refer to FIG. 10B) or the second detection point. The measuring point 912 (refer to FIG. 12B) forms a conductive path. In the full-line detection mode, the length of the path is at least the length of the circuit under test. Conductive foreign objects 916 may exist in the multiple lines 91 and Any position between the plurality of lines 91 ', thus making accurate positioning difficult. In order to accurately locate the conductive foreign object 916, segment detection should be selected so that the path length is limited to the length of the segment, and the second probe 921 and the second loop probe 930 '(please refer to FIG. 10C) and the first The probe 920 and the second probe 931 (please refer to FIG. 12C) are respectively disposed at the same relative positions on the complex line 91 and the complex line 91 'to more accurately determine the position of the conductive foreign body 916.

在前述配置的方式下，由於第二探針921與第二回路探針930’及第一探針920與第二探針931在遠離導電異物916時回路電阻較高，而當第二探針921與第二回路探針930’及第一探針920與第二探針931在接近導電異物 916時回路電阻值較低，因此可以由第三電氣信號的電流值或是由電壓值及電流值所導出的電阻值，來判斷導電異物的位置。具體而言，當移動第二探針921與第二回路探針930’及第一探針920與第二探針931，以改變其分別接觸受測複數線路91與91’的位置時，如果出現電流值或電阻值由高變低然後變高的方式，表示第二探針921與第二回路探針930’及第一探針920與第二探針931其分別接觸受測複數線路91與91’的位置，是先朝向導電異物接近而後遠離，因此可判斷導電異物的位置是在當第三電氣信號的電流值或電阻值最低時，其所對應的第二探針921與第二回路探針930’及第一探針920與第二探針931複數線路91在複數線路91’的位置之間。 In the foregoing configuration mode, since the second probe 921 and the second loop probe 930 'and the first probe 920 and the second probe 931 are far away from the conductive foreign matter 916, the loop resistance is high, and when the second probe 921 and the second loop probe 930 'and the first probe 920 and the second probe 931 are approaching a conductive foreign body At 916, the loop resistance value is low, so the position of the conductive foreign body can be judged by the current value of the third electrical signal or the resistance value derived from the voltage value and the current value. Specifically, when the second probe 921 and the second loop probe 930 'and the first probe 920 and the second probe 931 are moved to change the positions where they contact the tested plural lines 91 and 91', respectively, if The appearance of the current value or resistance value changing from high to low and then high indicates that the second probe 921 and the second loop probe 930 'and the first probe 920 and the second probe 931 are in contact with the complex circuit 91 to be tested, respectively. The position of 91 'is close to the conductive foreign object first and then away. Therefore, it can be determined that the position of the conductive foreign object is when the third electrical signal has the lowest current value or resistance value, and the corresponding second probe 921 and second The loop probe 930 ′, the first probe 920 and the second probe 931 are located between the plurality of lines 91 ′.

薄膜電晶體(Thin-Film Transistor，TFT)面板的線路除了可以是外圍線路之外，亦可以為驅動IC線路或畫素區線路，且該存有缺陷之位置具有斷線缺陷、短路缺陷或微斷線缺陷。該驅動IC線路係採用陣列基板閘極驅動技術(Gate Driver on Array,GOA)製作而成。 Thin-Film Transistor (TFT) panel circuits can be peripheral circuits, or drive IC circuits or pixel area circuits, and the defective locations have disconnection defects, short-circuit defects, or micro-circuits. Disconnection defect. The driver IC circuit is made using Gate Driver on Array (GOA).

實施例Examples

1.一種薄膜電晶體(Thin-Film Transistor，TFT)面板缺陷之檢測方法，其中該TFT面板包括複數線路，包括複數第一偵測點、複數第二偵測點及相異於該複數第一偵測點與複數該第二偵測點的複數第三偵測點，該檢測方法包括：以一第一探針對該各該第一偵測點施加具有一第 一參數的一第一電氣信號，以使該線路的該複數第一偵測點與該複數第三偵測點之間的一缺陷呈現一狀態；將一第二探針對各該第二偵測點施加具有一第二參數的一第二電氣信號，其中該第一參數高於該第二參數；將一回路探針接觸至各該第三偵測點，測量複數個第三電氣信號；以及以各該第三電氣信號相對於該狀態的第三參數，確定該第一偵測點及該第三偵測點間的該缺陷被熔斷。 1. A thin-film transistor (Thin-Film Transistor, TFT) panel defect detection method, wherein the TFT panel includes a plurality of lines, including a plurality of first detection points, a plurality of second detection points, and different from the plurality of first detection points A detection point and a plurality of third detection points of the second detection point, the detection method comprising: applying a first probe to each of the first detection points with a first A parameter of a first electrical signal to cause a defect between the plurality of first detection points and the plurality of third detection points of the line to present a state; a second probe to each of the second detections A second electrical signal having a second parameter is applied at a point, wherein the first parameter is higher than the second parameter; a loop probe is contacted to each of the third detection points to measure a plurality of third electrical signals; and With the third parameter of each of the third electrical signals relative to the state, it is determined that the defect between the first detection point and the third detection point is blown.

2.如實施例1所述的檢測方法，其中該第一探針對該第一偵測點施加該第一電氣信號與該第二探針對該各該第二偵測點施加該第二電氣信號在各該不同線路同時進行。 2. The detection method according to embodiment 1, wherein the first probe applies the first electrical signal to the first detection point and the second probe applies the second electrical signal to each of the second detection points. Simultaneously on each of the different lines.

3.如實施例1或2所述的檢測方法，其中該第一電氣信號、該第二電氣信號及該第三電氣信號包括電流及電壓至少其中之一。 3. The detection method according to embodiment 1 or 2, wherein the first electrical signal, the second electrical signal, and the third electrical signal include at least one of a current and a voltage.

4.如實施例1至3中任一實施例所述的檢測方法，其中該第一參數及該第二參數包括電流值、電壓值至少其中之一，且該第三參數為電壓消失及電流消失其中之一。 4. The detection method according to any one of embodiments 1 to 3, wherein the first parameter and the second parameter include at least one of a current value and a voltage value, and the third parameter is the disappearance of the voltage and the current Disappear one of them.

5.如實施例1至4中任一實施例所述之檢測方法，更包括依循一修補路徑對被熔斷的該缺陷之線路段進行一雷射(Laser)修補。 5. The detection method according to any one of embodiments 1 to 4, further comprising performing a laser repair on the broken line segment of the defect following a repair path.

6.如實施例1至5中任一實施例所述之檢測方法，其中該第一探針與該第二探針為一體形成於一治具。 6. The detection method according to any one of embodiments 1 to 5, wherein the first probe and the second probe are integrally formed in a jig.

7.如實施例1至6中任一實施例所述的檢測方法，其中各該線路為一外圍線路、一驅動IC線路或一畫素區線 路，且該缺陷線路段之位置具有一缺陷，該缺陷包括導電異物、一短路缺陷或一微斷線缺陷。 7. The detection method according to any one of embodiments 1 to 6, wherein each of the lines is a peripheral line, a driving IC line, or a pixel area line And the position of the defective line segment has a defect, and the defect includes a conductive foreign body, a short-circuit defect, or a micro-disconnection defect.

8.如實施例1至7中任一實施例所述的檢測方法，其中各該電氣參考信號係對應於一使用者設定值，該驅動IC線路係採用一陣列基板閘極驅動技術(Gate Driver on Array,GOA)製作而成 8. The detection method according to any one of embodiments 1 to 7, wherein each of the electrical reference signals corresponds to a user-set value, and the driving IC circuit uses an array substrate gate driver technology (Gate Driver on Array, GOA)

9.一種半導體之缺陷檢測方法，其中該半導體具至少一線路，且該至少一線路包含複數個位置，該檢測方法包括：使該至少一線路通電，使該位置的一缺陷熔斷；逐一量測各該位置之電壓，以獲得該複數個位置之複數筆電壓資料；以及比對各該電壓資料與一參考電壓資料，以確定該缺陷被熔斷。 9. A semiconductor defect detection method, wherein the semiconductor has at least one line, and the at least one line includes a plurality of positions, the detection method includes: energizing the at least one line to fuse a defect at the position; measuring one by one The voltages at the positions are obtained to obtain a plurality of voltage data of the plurality of positions; and each of the voltage data is compared with a reference voltage data to determine that the defect is blown.

10.如實施例9所述的檢測方法，其中該線路通電包括將該線路施加一強制電壓，使該缺陷位置呈現一隔離狀態，並一後續檢修製程加以修補。 10. The inspection method according to embodiment 9, wherein energizing the line comprises applying a forced voltage to the line, so that the defect position is in an isolated state, and repaired by a subsequent inspection process.

11.一種檢測一半導體的缺陷之裝置，其中該半導體具至少一線路、該至少一線路包含複數個位置、且該複數個位置等距相鄰分布，該裝置包括：一量測通電元件，用以施加一量測電氣信號至該至少一線路上各該複數個位置；一量測元件，用以逐一量測各該複數個位置，以獲得複數個輸出電氣信號；一比對元件，用以比對各該輸出電氣信號與一參考電氣信號，當各該輸出電氣信號與該參考電氣信號的一差值超出一使用者設定值範圍時，即判斷為一異常輸出電氣信號，並確定該異常輸出電氣信號所對應 之線路為一缺陷線路並標示該缺陷的位置；以及一強制通電元件，用以施加一強制電氣信號至該缺陷的位置以熔斷該缺陷。 11. A device for detecting a defect of a semiconductor, wherein the semiconductor has at least one line, the at least one line includes a plurality of positions, and the plurality of positions are equidistantly adjacent to each other, the device comprising: a measuring energizing element, Applying a measurement electrical signal to each of the plurality of positions on the at least one line; a measurement element for measuring each of the plurality of positions one by one to obtain a plurality of output electrical signals; a comparison element for comparing For each of the output electrical signal and a reference electrical signal, when a difference between each of the output electrical signal and the reference electrical signal exceeds a user-set value range, it is determined as an abnormal output electrical signal, and the abnormal output is determined Corresponding to electrical signals The circuit is a defective circuit and marks the location of the defect; and a forced current component is used to apply a forced electrical signal to the location of the defect to fuse the defect.

12.如實施例11所述的檢測方法，其中該強制電氣信號的電壓值或電流值其中之一比該量測電氣信號的電壓值或電流值其中之一高。 12. The detection method according to embodiment 11, wherein one of a voltage value or a current value of the forced electrical signal is higher than one of a voltage value or a current value of the measured electrical signal.

13.一種檢測一半導體裝置一缺陷之方法，其中該半導體裝置具至少一線路，該方法包括：提供一治具，其中該治具具二探針，且該二探針具一固定距離；依該固定距離將該至少一線路分成複數檢測區段；提供一強制信號至各該檢測區段以熔斷該缺陷；以及提供一檢測信號，逐一檢測各該檢測區段，以獲得各該檢測區段之一檢測參數；以及比較該檢測參數與一參考參數，以決定各該檢測區段的該缺陷是否已被熔斷。 13. A method for detecting a defect of a semiconductor device, wherein the semiconductor device has at least one circuit, the method comprising: providing a jig, wherein the jig has two probes, and the two probes have a fixed distance; The fixed distance divides the at least one line into a plurality of detection sections; provides a forced signal to each of the detection sections to fuse the defect; and provides a detection signal to detect each of the detection sections one by one to obtain each of the detection sections. One of the detection parameters; and comparing the detection parameter with a reference parameter to determine whether the defect in each of the detection sections has been blown.

14.一種準備存有一缺陷之一半導體裝置以供一進一步修復之方法，其中該半導體裝置具至少一線路，該方法包括：提供一治具，其中該治具具一探針；將該至少一線路分成複數檢測區段；提供一電力至各該檢測區段以熔斷該檢測區段上缺陷；以及提供一檢測信號，逐一檢測各該檢測區段，以決定各該檢測區段的該缺陷是否熔斷。 14. A method for preparing a semiconductor device having a defect for further repair, wherein the semiconductor device has at least one circuit, the method comprising: providing a jig, wherein the jig has a probe; and the at least one The line is divided into a plurality of detection sections; a power is provided to each of the detection sections to fuse defects in the detection section; and a detection signal is provided to detect each of the detection sections one by one to determine whether the defect of each of the detection sections is Fuse.

15.一種準備存有一導電異物之一半導體裝置以供一進一步修復之方法，其中該半導體裝置具至少二線路，該方法包括：提供一治具，其中該治具具二探針；將該至少二線路分成複數跨線檢測區段；提供一熔斷電力透過該 相關探針至各該跨線檢測區段以熔斷各該跨檢測區段的該導電異物；以及提供一檢測信號，逐一檢測各該跨線檢測區段，以決定各該跨線檢測區段該導電異物是否已被熔斷。 15. A method for preparing a semiconductor device having a conductive foreign object for further repair, wherein the semiconductor device has at least two lines, the method comprising: providing a jig, wherein the jig has two probes; The two lines are divided into a plurality of cross-line detection sections; a fuse power is provided through the A relevant probe goes to each of the cross-line detection sections to fuse the conductive foreign matter in each of the cross-line detection sections; and a detection signal is provided to detect each of the cross-line detection sections one by one to determine each of the cross-line detection sections. Whether conductive foreign objects have been blown.

綜上所述，本發明確能以一新式的設計，藉由利用本發明的缺陷檢測裝置可以在各該探針及探針到達各該複數線路的特定位置之後，即一次連續進行量測及熔斷作業，所以可以縮短檢測時間並提高檢測效率。本發明的缺陷檢測裝置更可對缺陷位置精確定位，以利於後續修補作業。故凡熟習本技藝之人士，得任施匠思而為諸般修飾，然皆不脫如附申請專利範圍所欲保護者。 In summary, the present invention can indeed adopt a novel design. By using the defect detection device of the present invention, after each of the probes and the probes reach a specific position of each of the plurality of lines, the measurement and The fusing operation can shorten the detection time and improve the detection efficiency. The defect detection device of the present invention can accurately locate the defect position, which is beneficial to subsequent repair operations. Therefore, those who are familiar with this technique can be modified by various techniques, but they are not inferior to those who want to protect the scope of patent application.

Claims (14)

一種薄膜電晶體(Thin-Film Transistor，TFT)面板缺陷之檢測方法，其中該TFT面板包括複數線路，包括複數第一偵測點、複數第二偵測點、複數第三偵測點與複數第四偵測點，該檢測方法包括：以一第一探針對各該第一偵測點施加具有一第一參數的一第一電氣信號，該第一電氣信號經由各該線路的各該第一偵測點流經對應的各該第三偵測點，以使各該第一偵測點與對應的各該第三偵測點之間的一缺陷呈現一熔斷狀態；以一第二探針對已施加該第一電氣信號之各該線路之各該第二偵測點施加具有一第二參數的一第二電氣信號，使接收該第二電氣信號之各該第二偵測點和與其對應之各該第四偵測點間形成一具有一第三參數之第三電氣信號，其中該第一參數高於該第二參數；將一回路探針接觸至各該第四偵測點，測量各該第三電氣信號；以及以各該第三電氣信號相對於該熔斷狀態的各該第三參數，確定各該第一偵測點及對應之各該第三偵測點間的該缺陷被熔斷。A method for detecting defects of a thin-film transistor (TFT) panel, wherein the TFT panel includes a plurality of lines, including a plurality of first detection points, a plurality of second detection points, a plurality of third detection points, and a plurality of first detection points. Four detection points, the detection method comprising: applying a first electrical signal having a first parameter to each of the first detection points with a first probe, the first electrical signal passing through each of the first of the lines The detection points flow through the corresponding third detection points, so that a defect between each of the first detection points and the corresponding third detection points presents a blown state; a second probe pair A second electrical signal having a second parameter is applied to each of the second detection points of each of the lines to which the first electrical signal has been applied, so that each of the second detection points receiving the second electrical signal and corresponding to it A third electrical signal having a third parameter is formed between each of the fourth detection points, wherein the first parameter is higher than the second parameter; a loop probe is contacted to each of the fourth detection points to measure Each of the third electrical signals; and each of the third electrical signals With respect to the third parameters of the blown state, it is determined that the defect between each of the first detection points and the corresponding third detection points is blown. 如申請專利範圍第1項所述之檢測方法，其中該第一探針對該第一偵測點施加該第一電氣信號與該第二探針對該各該第二偵測點施加該第二電氣信號在各該線路同時進行。The detection method according to item 1 of the scope of patent application, wherein the first probe applies the first electrical signal to the first detection point and the second probe applies the second electrical signal to each of the second detection points. Signals are performed simultaneously on each of these lines. 如申請專利範圍第1項所述之檢測方法，其中該第一電氣信號、該第二電氣信號及該第三電氣信號包括電流及電壓至少其中之一。The detection method according to item 1 of the scope of patent application, wherein the first electrical signal, the second electrical signal, and the third electrical signal include at least one of a current and a voltage. 如申請專利範圍第1項所述之檢測方法，其中該第一參數及該第二參數包括電流值、電壓值至少其中之一，且該第三參數為電壓消失及電流消失其中之一。The detection method according to item 1 of the scope of patent application, wherein the first parameter and the second parameter include at least one of a current value and a voltage value, and the third parameter is one of a voltage disappearance and a current disappearance. 如申請專利範圍第1項所述之檢測方法，更包括依循一修補路徑對被熔斷的該缺陷之線路段進行一雷射(Laser)修補。According to the detection method described in item 1 of the scope of patent application, the method further includes performing a laser repair on the broken circuit section of the defect following a repair path. 如申請專利範圍第1項所述之檢測方法，其中該第一探針與該第二探針為一體形成於一治具。The detection method according to item 1 of the scope of patent application, wherein the first probe and the second probe are integrally formed in a jig. 如申請專利範圍第1項所述之檢測方法，其中各該線路為一外圍線路、一驅動IC線路或一畫素區線路，且該缺陷線路段之位置具有一缺陷，該缺陷包括導電異物、一短路缺陷或一微斷線缺陷。The detection method as described in item 1 of the scope of patent application, wherein each of the lines is a peripheral line, a driver IC line, or a pixel area line, and the position of the defective line segment has a defect, and the defect includes a conductive foreign object, A short circuit defect or a micro disconnection defect. 如申請專利範圍第7項所述之檢測方法，其中該第一及該第二參數係分別對應於一使用者設定值，該驅動IC線路係採用一陣列基板閘極驅動技術(Gate Driver on Array,GOA)製作而成。The detection method according to item 7 in the scope of patent application, wherein the first and second parameters respectively correspond to a user-set value, and the driving IC circuit uses an array substrate gate drive technology (Gate Driver on Array). , GOA). 一種半導體之缺陷檢測方法，其中該半導體具至少一線路，且該至少一線路包含複數個位置，該檢測方法包括：施加一強制電壓使該至少一線路通電，使該位置的一缺陷熔斷；施加一量測電氣信號逐一量測各該位置之電壓，以獲得該複數個位置之複數筆電壓，其中該強制電壓的電壓值或電流值其中之一比該量測電氣信號的電壓值或電流值其中之一高；以及比對各該電壓與相對各該位置的一參考電壓，當該電壓與該參考電壓的差異不在一門檻值範圍內，確定該缺陷被熔斷。A defect detection method for a semiconductor, wherein the semiconductor has at least one line, and the at least one line includes a plurality of positions, the detection method includes: applying a forced voltage to energize the at least one line to fuse a defect at the position; applying A measurement electrical signal measures the voltage at each position one by one to obtain a plurality of voltages at the plurality of positions, wherein one of the voltage value or the current value of the forced voltage is greater than the voltage value or the current value of the measurement electrical signal. One of them is high; and each of the voltages is compared with a reference voltage at each of the positions. When the difference between the voltage and the reference voltage is not within a threshold range, it is determined that the defect is blown. 如申請專利範圍第9項所述之檢測方法，其中該線路通電包括將該線路施加該強制電壓，使該缺陷位置呈現一隔離狀態，並以一後續檢修製程加以修補。The detection method as described in item 9 of the scope of patent application, wherein energizing the line includes applying the forced voltage to the line, so that the defect position is in an isolated state, and repaired by a subsequent inspection process. 一種檢測一半導體的缺陷之裝置，其中該半導體具至少一線路、該至少一線路包含複數個位置、且該複數個位置等距相鄰分布，該裝置包括：一量測通電元件，用以施加一量測電氣信號至該至少一線路上各該複數個位置；一量測元件，用以逐一量測各該複數個位置，以獲得複數個輸出電氣信號；一比對元件，用以比對各該輸出電氣信號與一參考電氣信號，當各該輸出電氣信號與該參考電氣信號的一差值超出一使用者設定值範圍時，即判斷為一異常輸出電氣信號，並確定該異常輸出電氣信號所對應之線路為一缺陷線路並標示該缺陷的位置；以及一強制通電元件，用以施加一強制電氣信號至該缺陷的位置以熔斷該缺陷，其中該強制電氣信號的電壓值或電流值其中之一比該量測電氣信號的電壓值或電流值其中之一高。A device for detecting a defect of a semiconductor, wherein the semiconductor has at least one line, the at least one line includes a plurality of positions, and the plurality of positions are equidistantly adjacent to each other. The device includes: a measuring energizing element for applying A measurement electrical signal to each of the plurality of positions on the at least one line; a measurement element for measuring each of the plurality of positions one by one to obtain a plurality of output electrical signals; a comparison element for comparing each The output electrical signal and a reference electrical signal. When a difference between each of the output electrical signal and the reference electrical signal exceeds a user set value range, it is determined as an abnormal output electrical signal, and the abnormal output electrical signal is determined. The corresponding line is a defective line and marks the location of the defect; and a forced current component is used to apply a forced electrical signal to the location of the defect to fuse the defect, wherein the voltage or current value of the forced electrical signal is among One is higher than one of the voltage value or current value of the measured electrical signal. 一種檢測一半導體裝置一缺陷之方法，其中該半導體裝置具至少一線路，該方法包括：提供一治具，其中該治具具一第一與一第二探針，且該第一與該第二探針間具一固定距離；依該固定距離將該至少一線路分成複數檢測區段；透過該第一探針提供一強制信號至各該檢測區段以熔斷該缺陷；以及透過該第二探針提供一檢測信號至已經提供該強制信號之各該檢測區段，逐一檢測各該檢測區段，以獲得各該檢測區段之一檢測參數，其中該強制信號的電壓值或電流值其中之一比該檢測信號的電壓值或電流值其中之一高；以及比較該檢測參數與一參考參數，以決定各該檢測區段的該缺陷是否已被熔斷。A method for detecting a defect of a semiconductor device, wherein the semiconductor device has at least one circuit, the method includes: providing a jig, wherein the jig has a first and a second probe, and the first and the first There is a fixed distance between the two probes; the at least one line is divided into a plurality of detection sections according to the fixed distance; a forced signal is provided through the first probe to each of the detection sections to fuse the defect; and through the second The probe provides a detection signal to each of the detection sections that have provided the mandatory signal, and detects each of the detection sections one by one to obtain a detection parameter of each of the detection sections, wherein a voltage value or a current value of the mandatory signal is among One is higher than one of the voltage value or current value of the detection signal; and comparing the detection parameter with a reference parameter to determine whether the defect in each of the detection sections has been blown. 一種準備存有一缺陷之一半導體裝置以供一進一步修復之方法，其中該半導體裝置具至少一線路，該方法包括：提供一治具，其中該治具具一探針；將該至少一線路分成複數檢測區段；透過該探針提供一電力至各該檢測區段以熔斷該檢測區段上缺陷；以及透過該探針提供一檢測信號至已經提供該電力之各該檢測區段，逐一檢測各該檢測區段，以決定各該檢測區段的該缺陷是否熔斷，其中該電力的電壓值或電流值其中之一比該檢測信號的電壓值或電流值其中之一高。A method for preparing a semiconductor device having a defect for further repair, wherein the semiconductor device has at least one circuit, the method includes: providing a jig, wherein the jig has a probe; and dividing the at least one circuit into A plurality of detection sections; providing a power to each of the detection sections through the probe to fuse the defects on the detection section; and providing a detection signal to each of the detection sections that have provided the power through the probe to detect one by one Each of the detection sections determines whether the defect of each of the detection sections is blown out, wherein one of a voltage value or a current value of the power is higher than one of the voltage value or the current value of the detection signal. 一種準備存有一導電異物之一半導體裝置以供一進一步修復之方法，其中該半導體裝置具至少二線路，該方法包括：提供一治具，其中該治具具一第一與一第二探針；將該至少二線路分成複數跨線檢測區段；提供一熔斷電力透過該第一探針至各該跨線檢測區段以熔斷各該跨檢測區段的該導電異物；以及透過該第二探針提供一檢測信號至已經提供該熔斷電力之各該檢測區段，逐一檢測各該跨線檢測區段，以決定各該跨線檢測區段該導電異物是否已被熔斷，其中該熔斷電力的電壓值或電流值其中之一比該檢測信號的電壓值或電流值其中之一高。A method for preparing a semiconductor device having a conductive foreign object for further repair, wherein the semiconductor device has at least two lines, the method includes: providing a jig, wherein the jig has a first and a second probe Dividing the at least two lines into a plurality of cross-line detection sections; providing a fuse power through the first probe to each of the cross-line detection sections to fuse the conductive foreign matter in each of the cross-detection sections; and through the second The probe provides a detection signal to each of the detection sections that have provided the blown power, and detects each of the cross-line detection sections one by one to determine whether the conductive foreign object in each of the cross-line detection sections has been blown, wherein the blown power One of the voltage value or the current value is higher than one of the voltage value or the current value of the detection signal.
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US20130134986A1 (en) * 2011-11-25 2013-05-30 Lg Display Co., Ltd. Display panel for display device and method for detecting defects of signal lines for display devices
CN104297622A (en) * 2014-10-30 2015-01-21 京东方科技集团股份有限公司 Method and device for detecting defects of display panel
TW201732272A (en) * 2017-03-06 2017-09-16 興城科技股份有限公司 Method for detecting defects of thin-film transistor panel and device thereof

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20130134986A1 (en) * 2011-11-25 2013-05-30 Lg Display Co., Ltd. Display panel for display device and method for detecting defects of signal lines for display devices
CN104297622A (en) * 2014-10-30 2015-01-21 京东方科技集团股份有限公司 Method and device for detecting defects of display panel
TW201732272A (en) * 2017-03-06 2017-09-16 興城科技股份有限公司 Method for detecting defects of thin-film transistor panel and device thereof

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