TWI657430B - Voltage providing circuit and control circuit - Google Patents

Voltage providing circuit and control circuit Download PDF

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Publication number
TWI657430B
TWI657430B TW107109495A TW107109495A TWI657430B TW I657430 B TWI657430 B TW I657430B TW 107109495 A TW107109495 A TW 107109495A TW 107109495 A TW107109495 A TW 107109495A TW I657430 B TWI657430 B TW I657430B
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voltage
switch
operating
circuit
output
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TW107109495A
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Chinese (zh)
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TW201941181A (en
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廖偉見
莊銘宏
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友達光電股份有限公司
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Priority to TW107109495A priority Critical patent/TWI657430B/en
Priority to CN201810435316.1A priority patent/CN108630161B/en
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Publication of TW201941181A publication Critical patent/TW201941181A/en

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    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
    • G09G3/3611—Control of matrices with row and column drivers
    • G09G3/3696—Generation of voltages supplied to electrode drivers

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  • Engineering & Computer Science (AREA)
  • Chemical & Material Sciences (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Control Of Indicators Other Than Cathode Ray Tubes (AREA)

Abstract

一種電壓提供電路包括：一輸出電路以及一第一控制電路。第一控制電路用以提供具有一第一電壓位準的一第一控制電壓至該輸出電路，以令該輸出電路據以輸出一第一供應電壓。第一控制電路包括一輸出模組及一控制模組。輸出模組包括一輸出端。控制模組用以根據一第一時脈訊號，提供一第一操作電壓至一第一操作節點，以令該輸出模組根據該第一操作節點上的該第一操作電壓，提供具有該第一電壓位準的該第一控制電壓至該輸出。 A voltage supply circuit includes an output circuit and a first control circuit. The first control circuit is used to provide a first control voltage with a first voltage level to the output circuit, so that the output circuit outputs a first supply voltage accordingly. The first control circuit includes an output module and a control module. The output module includes an output terminal. The control module is configured to provide a first operating voltage to a first operating node according to a first clock signal, so that the output module provides the first operating voltage according to the first operating voltage on the first operating node. A voltage level of the first control voltage to the output.

Description

電壓提供電路與控制電路 Voltage supply circuit and control circuit

本發明涉及一種電子電路。具體而言，本發明涉及一種電壓提供電路與控制電路。 The invention relates to an electronic circuit. Specifically, the present invention relates to a voltage supply circuit and a control circuit.

隨著電子科技的快速進展，顯示裝置已被廣泛地應用在人們的生活當中，諸如行動電話或電腦等。 With the rapid development of electronic technology, display devices have been widely used in people's lives, such as mobile phones or computers.

一般而言，液晶顯示裝置可包括複數電極與液晶層。液晶顯示裝置提供不同電壓至此些電極，以令此些電極間產生電場，以扭轉液晶層中液晶分子。藉由控制液晶分子的扭轉，即可控制液晶顯示裝置的顯示畫面。因此，如何提供電壓至此些電極以控制液晶分子的扭轉，為本領域的重要研究議題。 Generally speaking, a liquid crystal display device may include a plurality of electrodes and a liquid crystal layer. The liquid crystal display device provides different voltages to the electrodes, so that an electric field is generated between the electrodes, and the liquid crystal molecules in the liquid crystal layer are twisted. By controlling the twisting of the liquid crystal molecules, the display screen of the liquid crystal display device can be controlled. Therefore, how to provide voltage to these electrodes to control the twist of liquid crystal molecules is an important research topic in this field.

本發明一實施態樣涉及一種電壓提供電路。根據本發明一實施例，電壓提供電路包括：一輸出電路以及 一第一控制電路。第一控制電路電性連接該輸出電路，用以提供具有一第一電壓位準的一第一控制電壓至該輸出電路，以令該輸出電路據以輸出一第一供應電壓。第一控制電路包括一輸出模組及一控制模組。輸出模組包括一輸出端。控制模組用以根據一第一時脈訊號，提供一第一操作電壓至一第一操作節點，以令該輸出模組根據該第一操作節點上的該第一操作電壓，提供具有該第一電壓位準的該第一控制電壓至該輸出。該控制模組更用以根據一掃描訊號，提供一第一工作電壓至一第一工作節點，以令該輸出模組根據該第一工作節點上的該第一工作電壓，提供具有一第二電壓位準的該第一控制電壓至該輸出端。 An embodiment of the present invention relates to a voltage supply circuit. According to an embodiment of the present invention, the voltage supply circuit includes: an output circuit and -A first control circuit. The first control circuit is electrically connected to the output circuit for providing a first control voltage with a first voltage level to the output circuit, so that the output circuit can output a first supply voltage accordingly. The first control circuit includes an output module and a control module. The output module includes an output terminal. The control module is configured to provide a first operating voltage to a first operating node according to a first clock signal, so that the output module provides the first operating voltage according to the first operating voltage on the first operating node. A voltage level of the first control voltage to the output. The control module is further configured to provide a first working voltage to a first working node according to a scanning signal, so that the output module provides a second working voltage according to the first working voltage on the first working node. The first control voltage of the voltage level is connected to the output terminal.

本發明另一實施態樣涉及一種電壓提供電路。根據本發明一實施例，電壓提供電路包括：一輸出電路、一第一控制電路、一第二控制電路、以及一掃描訊號提供電路。第一控制電路電性連接該輸出電路，用以相應於一掃描訊號，選擇性地提供一第一控制電壓至該輸出電路，以令該輸出電路據以輸出一第一供應電壓。第二控制電路電性連接該輸出電路，用以相應於該掃描訊號，選擇性地提供一第二控制電壓至該輸出電路，以令該輸出電路據以輸出一第二供應電壓。掃描訊號提供電路電性連接該輸出電路，用以提供該掃描訊號至該輸出電路，以令該輸出電路據以輸出一第三供應電壓。該第一供應電壓、該第二供應電壓、及該第三供應電壓的電壓位準彼此不同，且其中該輸出電路於輸出該第一供應電壓及該第二供應電壓之間 輸出該第三供應電壓。 Another aspect of the present invention relates to a voltage supply circuit. According to an embodiment of the present invention, the voltage supply circuit includes: an output circuit, a first control circuit, a second control circuit, and a scan signal supply circuit. The first control circuit is electrically connected to the output circuit for selectively providing a first control voltage to the output circuit corresponding to a scanning signal, so that the output circuit outputs a first supply voltage accordingly. The second control circuit is electrically connected to the output circuit for selectively providing a second control voltage to the output circuit corresponding to the scanning signal, so that the output circuit outputs a second supply voltage accordingly. The scanning signal providing circuit is electrically connected to the output circuit for providing the scanning signal to the output circuit, so that the output circuit can output a third supply voltage accordingly. The voltage levels of the first supply voltage, the second supply voltage, and the third supply voltage are different from each other, and the output circuit is between outputting the first supply voltage and the second supply voltage. This third supply voltage is output.

本發明另一實施態樣涉及一種控制電路。根據本發明一實施例，電壓提供電路包括：一第一輸出開關、一第二輸出開關、一第一開關、一第二開關、一第三開關、一第四開關、以及一操作電容。該第一輸出開關的一第一端用以接收具有一第一電壓位準的一第一控制電壓，該第一輸出開關的一第二端電性連接一輸出端，且該第一輸出開關的一控制端電性連接一第一操作節點。該第二輸出開關的一第一端用以接收具有一第二電壓位準的該第一控制電壓，該第二輸出開關的一第二端電性連接該輸出端，且該第二輸出開關的一控制端電性連接一第一工作節點。該第一開關的一第一端用以接收一第一操作電壓，該第一開關的一第二端電性連接該第一操作節點，且該第一開關的一控制端用以接收一第一時脈訊號。該第二開關的一第一端用以接收一第一工作電壓，該第二開關的一第二端電性連接該第一工作節點，且該第二開關的一控制端用以接收一掃描訊號。該第三開關的一第一端用以接收一第二操作電壓，該第三開關的一第二端電性連接該第一操作節點，且該第二開關的一控制端電性連接該第一工作節點。該第四開關的一第一端用以接收一第二工作電壓，該第四開關的一第二端電性連接該第一工作節點，且該第四開關的一控制端電性連接該第一操作節點。該操作電容的一第一端用以接收該第二時脈訊號，該操作電容的一第二端電性連接該第一工作節點。 Another embodiment of the present invention relates to a control circuit. According to an embodiment of the present invention, the voltage providing circuit includes a first output switch, a second output switch, a first switch, a second switch, a third switch, a fourth switch, and an operation capacitor. A first terminal of the first output switch is used to receive a first control voltage having a first voltage level, a second terminal of the first output switch is electrically connected to an output terminal, and the first output switch A control terminal of is electrically connected to a first operation node. A first terminal of the second output switch is used to receive the first control voltage having a second voltage level, a second terminal of the second output switch is electrically connected to the output terminal, and the second output switch A control terminal of is electrically connected to a first working node. A first terminal of the first switch is used to receive a first operating voltage, a second terminal of the first switch is electrically connected to the first operating node, and a control terminal of the first switch is used to receive a first A clock signal. A first terminal of the second switch is used to receive a first working voltage, a second terminal of the second switch is electrically connected to the first working node, and a control terminal of the second switch is used to receive a scan Signal. A first terminal of the third switch is used to receive a second operating voltage, a second terminal of the third switch is electrically connected to the first operating node, and a control terminal of the second switch is electrically connected to the first switch. A working node. A first terminal of the fourth switch is used to receive a second operating voltage, a second terminal of the fourth switch is electrically connected to the first working node, and a control terminal of the fourth switch is electrically connected to the first An operation node. A first terminal of the operating capacitor is used to receive the second clock signal, and a second terminal of the operating capacitor is electrically connected to the first working node.

藉由應用上述一實施例，輸出電路即可相應於第一控制電路、第二控制電路、及掃描訊號提供電路的操作，在不同期間中輸出具有不同電壓位準的第一供應電壓、第二供應電壓、及第三供應電壓。 By applying the above embodiment, the output circuit can correspond to the operations of the first control circuit, the second control circuit, and the scanning signal providing circuit, and output the first supply voltage and the second voltage having different voltage levels in different periods. Supply voltage, and third supply voltage.

100‧‧‧顯示裝置 100‧‧‧ display device

102‧‧‧像素陣列 102‧‧‧ pixel array

106‧‧‧像素電路 106‧‧‧pixel circuit

110‧‧‧閘極驅動電路 110‧‧‧Gate driving circuit

120‧‧‧源極驅動電路 120‧‧‧Source driving circuit

G(1)-G(N)‧‧‧閘極訊號 G (1) -G (N) ‧‧‧Gate signal

D(1)-D(M)‧‧‧資料電壓 D (1) -D (M) ‧‧‧Data voltage

CF‧‧‧彩色濾光片 CF‧‧‧ Color Filter

OST‧‧‧對向基板 OST‧‧‧ Opposite substrate

AST‧‧‧陣列基板 AST‧‧‧Array substrate

LD‧‧‧液晶分子 LD‧‧‧LCD molecules

ALD‧‧‧像素電極 ALD‧‧‧Pixel electrode

CCM‧‧‧彩色濾光片側共同電極 CCM‧‧‧Common electrode on color filter side

ACM‧‧‧陣列側共同電極 ACM‧‧‧Array side common electrode

BM‧‧‧遮光層 BM‧‧‧Light-shielding layer

OC‧‧‧保護層 OC‧‧‧protective layer

DRV‧‧‧電壓提供電路 DRV‧‧‧Voltage supply circuit

BD(1)-BD(X)‧‧‧區域 BD (1) -BD (X) ‧‧‧area

COM_P(1)-COM_P(X)‧‧‧電壓 COM_P (1) -COM_P (X) ‧‧‧Voltage

COM_N(1)-COM_N(X)‧‧‧電壓 COM_N (1) -COM_N (X) ‧‧‧Voltage

t1-t8‧‧‧時間點 t1-t8‧‧‧time

LVC(1)-LVC(X)‧‧‧工作電路 LVC (1) -LVC (X) ‧‧‧Working circuit

SRC‧‧‧掃描訊號產生電路 SRC‧‧‧scanning signal generating circuit

OTC‧‧‧輸出電路 OTC‧‧‧ output circuit

CTC1、CTC2‧‧‧控制電路 CTC1, CTC2‧‧‧ control circuit

TS1-TS6‧‧‧開關 TS1-TS6‧‧‧ Switch

CU(1)-CU(X)‧‧‧控制訊號 CU (1) -CU (X) ‧‧‧Control signal

CD(1)-CD(X)‧‧‧控制訊號 CD (1) -CD (X) ‧‧‧Control signal

Y(1)-Y(X)‧‧‧掃描訊號 Y (1) -Y (X) ‧‧‧Scan signal

VS1-VS3‧‧‧供應電壓 VS1-VS3‧‧‧ supply voltage

OTM1-OTM2‧‧‧輸出模組 OTM1-OTM2‧‧‧ Output Module

CTM1-CTM2‧‧‧控制模組 CTM1-CTM2‧‧‧Control Module

T1-T5‧‧‧開關 T1-T5‧‧‧ Switch

TO1-TO2‧‧‧開關 TO1-TO2‧‧‧Switch

C1-C3‧‧‧電容 C1-C3‧‧‧Capacitor

CK1、CK2‧‧‧時脈訊號 CK1, CK2‧‧‧clock signal

VGH、VGL‧‧‧電壓 VGH, VGL‧‧‧Voltage

A、B、P、R‧‧‧節點 A, B, P, R‧‧‧ nodes

TR1、TR2‧‧‧開關 TR1, TR2‧‧‧ switch

s1-s11‧‧‧時間點 s1-s11‧‧‧time

TCN1-TCN4‧‧‧開關 TCN1-TCN4‧‧‧Switch

CN‧‧‧控制訊號 CN‧‧‧Control signal

TV1-TV4‧‧‧開關 TV1-TV4‧‧‧Switch

CV1‧‧‧電容 CV1‧‧‧Capacitor

VDD‧‧‧電壓 VDD‧‧‧Voltage

為讓本發明之上述和其他目的、特徵、優點與實施例能更明顯易懂，所附圖式之說明如下：第1圖為根據本發明一實施例所繪示的顯示裝置的示意圖；第2圖為根據本發明一實施例所繪示的顯示裝置的切面示意圖；第3圖為根據本發明一實施例所繪示的顯示裝置的示意圖；第4圖為根據本發明一實施例所繪示的顯示裝置的訊號示意圖；第5圖為根據本發明一實施例所繪示的電壓提供電路的示意圖；第6圖為根據本發明一實施例所繪示的電壓提供電路的訊號示意圖；第7圖為根據本發明一實施例所繪示的控制電路的示意圖；第8圖為根據本發明一實施例所繪示的控制電路的示意圖； 第9圖為根據本發明一實施例所繪示的掃描訊號產生電路的示意圖；第10圖為根據本發明一操作例所繪示的顯示裝置的訊號示意圖；第11圖為根據本發明另一實施例所繪示的電壓提供電路的示意圖；第12圖為根據本發明另一實施例所繪示的控制電路的示意圖；第13圖為根據本發明另一實施例所繪示的控制電路的示意圖；及第14圖為根據本發明另一實施例所繪示的控制電路的示意圖。 In order to make the above and other objects, features, advantages, and embodiments of the present invention more comprehensible, the description of the drawings is as follows: FIG. 1 is a schematic diagram of a display device according to an embodiment of the present invention; FIG. 2 is a schematic cross-sectional view of a display device according to an embodiment of the present invention; FIG. 3 is a schematic view of a display device according to an embodiment of the present invention; FIG. 4 is a schematic view of a display device according to an embodiment of the present invention; FIG. 5 is a schematic diagram of a voltage supply circuit according to an embodiment of the present invention; FIG. 6 is a schematic diagram of a signal of a voltage supply circuit according to an embodiment of the present invention; FIG. 7 is a schematic diagram of a control circuit according to an embodiment of the present invention; FIG. 8 is a schematic diagram of a control circuit according to an embodiment of the present invention; FIG. 9 is a schematic diagram of a scanning signal generating circuit according to an embodiment of the present invention; FIG. 10 is a schematic diagram of a signal of a display device according to an operating example of the present invention; and FIG. 11 is another diagram according to the present invention. FIG. 12 is a schematic diagram of a voltage supply circuit according to an embodiment; FIG. 12 is a schematic diagram of a control circuit according to another embodiment of the present invention; and FIG. 13 is a schematic diagram of a control circuit according to another embodiment of the present invention. And FIG. 14 is a schematic diagram of a control circuit according to another embodiment of the present invention.

以下將以圖式及詳細敘述清楚說明本揭示內容之精神，任何所屬技術領域中具有通常知識者在瞭解本揭示內容之實施例後，當可由本揭示內容所教示之技術，加以改變及修飾，其並不脫離本揭示內容之精神與範圍。 The following will clearly illustrate the spirit of the present disclosure with diagrams and detailed descriptions. Any person with ordinary knowledge in the technical field who understands the embodiments of the present disclosure can be changed and modified by the techniques taught in the present disclosure. It does not depart from the spirit and scope of this disclosure.

關於本文中所使用之『第一』、『第二』、...等，並非特別指稱次序或順位的意思，亦非用以限定本發明，其僅為了區別以相同技術用語描述的元件或操作。 Regarding the "first", "second", ..., etc. used herein, they do not specifically mean the order or order, nor are they used to limit the present invention. They are only used to distinguish elements described in the same technical terms or operating.

關於本文中所使用之『電性連接』，可指二或多個元件相互直接作實體或電性接觸，或是相互間接作實體或電性接觸，而『電性連接』還可指二或多個元件相互 操作或動作。 As used herein, "electrical connection" may refer to two or more components directly making physical or electrical contact with each other, or indirectly making physical or electrical contact with each other, and "electrical connection" may also refer to two or Multiple components with each other Operation or action.

關於本文中所使用之『包含』、『包括』、『具有』、『含有』等等，均為開放性的用語，即意指包含但不限於。 The terms "including", "including", "having", "containing" and the like used in this article are all open-ended terms, which means including but not limited to.

關於本文中所使用之『及/或』，係包括所述事物的任一或全部組合。 As used herein, "and / or" includes any and all combinations of the things described.

關於本文中所使用之用詞(terms)，除有特別註明外，通常具有每個用詞使用在此領域中、在此揭露之內容中與特殊內容中的平常意義。某些用以描述本揭露之用詞將於下或在此說明書的別處討論，以提供本領域技術人員在有關本揭露之描述上額外的引導。 Regarding the terms used in this article, unless otherwise specified, each term usually has the ordinary meaning of being used in this field, the content disclosed here, and the special content. Certain terms used to describe this disclosure are discussed below or elsewhere in this specification to provide additional guidance to those skilled in the art on the description of this disclosure.

第1圖為根據本發明實施例所繪示的顯示裝置100的示意圖。顯示裝置100可包括閘極驅動電路110、源極驅動電路120、以及像素陣列102。像素陣列102可包括複數個以矩陣排列的像素電路106。閘極驅動電路110可依序產生並提供複數筆閘極訊號G(1)、…、G(N)給像素陣列102中的像素電路106的像素電極(如第2圖中的像素電極ALD)，以逐列開啟像素電路106的資料開關，其中N為自然數。源極驅動電路120可產生複數筆資料電壓D(1)、…、D(M)，並提供此些資料電壓D(1)、…、D(M)給資料開關開啟的像素電路106中的像素電極(如第2圖中的像素電極ALD)，以使像素電路106根據資料電壓D(1)、…、D(M)進行顯示操作，其中M為自然數。藉此，顯示裝置100即可顯示影像。 FIG. 1 is a schematic diagram of a display device 100 according to an embodiment of the present invention. The display device 100 may include a gate driving circuit 110, a source driving circuit 120, and a pixel array 102. The pixel array 102 may include a plurality of pixel circuits 106 arranged in a matrix. The gate driving circuit 110 can sequentially generate and provide a plurality of gate signals G (1),... G (N) to the pixel electrodes of the pixel circuit 106 in the pixel array 102 (such as the pixel electrode ALD in FIG. 2). The data switches of the pixel circuit 106 are turned on in columns, where N is a natural number. The source driving circuit 120 can generate a plurality of data voltages D (1), ..., D (M), and provide these data voltages D (1), ..., D (M) to the pixel circuit 106 in the data switch that is turned on. The pixel electrode (such as the pixel electrode ALD in FIG. 2), so that the pixel circuit 106 performs a display operation according to the data voltages D (1),..., D (M), where M is a natural number. Thereby, the display device 100 can display an image.

第2圖為根據本案一實施例所繪示的顯示裝置的剖面示意圖。在本實施例中，顯示裝置包括陣列基板AST及對向基板OST。像素電極ALD及陣列側共同電極ACM設置於陣列基板AST上，且彩色濾光片側共同電極CCM、彩色濾光片CF、遮光層BM、及保護層OC設置於對向基板OST上。液晶層設置於陣列基板AST及對向基板OST之間，並具有複數液晶分子LD。 FIG. 2 is a schematic cross-sectional view of a display device according to an embodiment of the present invention. In this embodiment, the display device includes an array substrate AST and an opposite substrate OST. The pixel electrode ALD and the array-side common electrode ACM are disposed on the array substrate AST, and the color filter-side common electrode CCM, the color filter CF, the light-shielding layer BM, and the protective layer OC are disposed on the counter substrate OST. The liquid crystal layer is disposed between the array substrate AST and the opposite substrate OST, and has a plurality of liquid crystal molecules LD.

在本實施例中，像素電極ALD用以接收前述資料電壓D(1)、…、D(M)，且陣列側共同電極ACM用以接收陣列側共同電壓(如第3圖中的電壓COM_P(1)-COM_P(X)、COM_N(1)-COM_N(X))，像素電極ALD與陣列側共同電極ACM可利用資料電壓D(1)、…、D(M)與陣列側共同電壓形成的電場，以控制液晶分子LD的扭轉，從而改變液晶層的光線穿過量。 In this embodiment, the pixel electrode ALD is used to receive the aforementioned data voltages D (1), ..., D (M), and the array-side common electrode ACM is used to receive the array-side common voltage (such as the voltage COM_P ( 1) -COM_P (X), COM_N (1) -COM_N (X)), the pixel electrode ALD and the array-side common electrode ACM can be formed by using the data voltages D (1), ..., D (M) and the array-side common voltage The electric field controls the twist of the liquid crystal molecules LD, thereby changing the amount of light passing through the liquid crystal layer.

另一方面，像素電極ALD、陣列側共同電極ACM與彩色濾光片側共同電極CCM間亦可形成垂直電場，以控制液晶分子LD的傾斜(tilt)，以改變顯示裝置100的視角寬窄。 On the other hand, a vertical electric field may also be formed between the pixel electrode ALD, the array-side common electrode ACM, and the color filter-side common electrode CCM to control the tilt of the liquid crystal molecules LD to change the viewing angle width of the display device 100.

第3圖為根據本案一實施例所繪示的像素電極ALD與陣列側共同電極ACM的示意圖。在本實施例中，顯示裝置100的像素電極ALD與陣列側共同電極ACM可分為X個區域BD(1)-BD(X)，其中X為自然數，且每一區域BD(1)-BD(X)具有1列陣列側共同電極ACM與8列像素電極ALD。亦即，在本實施例中，每8列像素電極 ALD可對應1列陣列側共同電極ACM。應注意到，以上對應關係僅為例示，每1列陣列側共同電極ACM對應的像素電極的列數可依實際需求進行改變(例如每1列陣列側共同電極ACM對應6列或10列像素電極ALD)。此外，以上像素電極ALD與陣列側共同電極ACM的數量皆僅為例示，本案不以此為限。 FIG. 3 is a schematic diagram illustrating a pixel electrode ALD and an array-side common electrode ACM according to an embodiment of the present invention. In this embodiment, the pixel electrode ALD and the array-side common electrode ACM of the display device 100 can be divided into X regions BD (1) -BD (X), where X is a natural number, and each region BD (1)- BD (X) has a common electrode ACM on one array side and pixel electrodes ALD on eight columns. That is, in this embodiment, every eight columns of pixel electrodes ALD can correspond to one column of array-side common electrodes ACM. It should be noted that the above correspondence is only an example, and the number of columns of pixel electrodes corresponding to the array-side common electrode ACM per column can be changed according to actual needs (for example, each row of the array-side common electrode ACM corresponds to 6 or 10 column pixel electrodes ALD). In addition, the numbers of the above pixel electrode ALD and the array-side common electrode ACM are only examples, and this case is not limited thereto.

在本實施例中，顯示裝置100的電壓提供電路DRV可分別提供電壓COM_P(1)-COM_P(X)至奇數行的陣列側共同電極ACM。例如，電壓提供電路DRV可提供電壓COM_P(1)至第一列且第一、三、五行的陣列側共同電極ACM，提供電壓COM_P(2)至第二列且第一、三、五行的陣列側共同電極ACM，並以此類推。 In this embodiment, the voltage supply circuit DRV of the display device 100 can provide voltages COM_P (1) -COM_P (X) to the array-side common electrode ACM of the odd-numbered rows, respectively. For example, the voltage supply circuit DRV may provide a voltage COM_P (1) to the array-side common electrode ACM of the first column and the first, third, and fifth rows, and a voltage COM_P (2) to the array of the second column and the first, third, and fifth rows. Side common electrode ACM, and so on.

類似地，在本實施例中，電壓提供電路DRV可分別提供電壓COM_N(1)-COM_N(X)至偶數行的陣列側共同電極ACM。例如，電壓提供電路DRV可提供電壓COM_N(1)至第一列且第二、四、六行的陣列側共同電極ACM，提供電壓COM_N(2)至第二列且第二、四、六行的陣列側共同電極ACM，並以此類推。 Similarly, in this embodiment, the voltage supply circuit DRV can respectively provide the voltages COM_N (1) -COM_N (X) to the array-side common electrodes ACM of the even-numbered rows. For example, the voltage supply circuit DRV may provide a voltage COM_N (1) to the first column and the second, fourth, and sixth rows of the array-side common electrode ACM, and a voltage COM_N (2) to the second column and the second, fourth, and sixth rows. Array side common electrode ACM and so on.

參照第4圖，在本實施例中，電壓COM_P(1)-COM_P(X)的波形彼此相似但相位彼此不同。在一實施例中，電壓COM_P(1)-COM_P(X)是逐一進行延遲。類似地，在本實施例中，電壓COM_N(1)-COM_N(X)的波形彼此相似但相位彼此不同。在一實施例中，電壓COM_N(1)-COM_N(X)是逐一進行延遲。在一實施例 中，電壓COM_P(1)-COM_P(X)與電壓COM_N(1)-COM_N(X)彼此反相，以分別提供給不同極性的陣列側共同電極ACM。 Referring to FIG. 4, in this embodiment, the waveforms of the voltages COM_P (1) -COM_P (X) are similar to each other but different in phase from each other. In one embodiment, the voltages COM_P (1) -COM_P (X) are delayed one by one. Similarly, in this embodiment, the waveforms of the voltages COM_N (1) -COM_N (X) are similar to each other but different in phase from each other. In one embodiment, the voltages COM_N (1) -COM_N (X) are delayed one by one. In an embodiment In the embodiment, the voltages COM_P (1) -COM_P (X) and the voltages COM_N (1) -COM_N (X) are opposite to each other to provide the array-side common electrodes ACM with different polarities, respectively.

在本實施例中，每一電壓COM_P(1)-COM_P(X)、COM_N(1)-COM_N(X)皆具有三種不同的電壓位準，亦即第一電壓位準(如高電壓位準(如+5V))(本案中亦稱為第一供應電壓)、第二電壓位準(如低電壓位準(如-5V))(本案中亦稱為第二供應電壓)、及第三電壓位準(如中電壓位準(如0V))(本案中亦稱為第三供應電壓)。 In this embodiment, each of the voltages COM_P (1) -COM_P (X) and COM_N (1) -COM_N (X) has three different voltage levels, that is, the first voltage level (such as a high voltage level) (Such as + 5V)) (also referred to as the first supply voltage in this case), the second voltage level (such as the low voltage level (such as -5V)) (also referred to as the second supply voltage in this case), and the third Voltage level (such as medium voltage level (such as 0V)) (also referred to as the third supply voltage in this case).

在一實施例中，第一供應電壓可提供給對應於正極性狀態下的像素電極ALD之陣列側共同電極ACM，第二供應電壓可提供給對應於負極性狀態下的像素電極ALD之陣列側共同電極ACM，且第三供應電壓可提供給對應於資料寫入狀態下的像素電極ALD之陣列側共同電極ACM。 In one embodiment, the first supply voltage may be provided to the array-side common electrode ACM corresponding to the pixel electrode ALD in the positive polarity state, and the second supply voltage may be provided to the array side corresponding to the pixel electrode ALD in the negative polarity state. The common electrode ACM, and the third supply voltage may be provided to the array-side common electrode ACM corresponding to the pixel electrode ALD in a data writing state.

在一實施例中，對每一電壓COM_P(1)-COM_P(X)、COM_N(1)-COM_N(X)而言，電壓提供電路DRV皆可在輸出第一供應電壓及第二供應電壓之間輸出第三供應電壓。例如，電壓COM_P(1)具有第三電壓位準的期間(如時間點t4至時間點t5)介於電壓COM_P(1)具有第一電壓位準的期間(如時間點t2至時間點t4)與電壓COM_P(1)具有第二電壓位準的期間(如時間點t5至時間點t6)之間，且電壓COM_P(1)另一具有第三電壓位準的期間(如時間點t7至時間點t8)介於電壓COM_P(1)具有第 二電壓位準的期間時間點t5至時間點t6)與電壓COM_P(1)具有第一電壓位準的期間(如時間點t8以後)之間。 In one embodiment, for each of the voltages COM_P (1) -COM_P (X), COM_N (1) -COM_N (X), the voltage supply circuit DRV can output between the first supply voltage and the second supply voltage. The third supply voltage is output. For example, the period during which voltage COM_P (1) has a third voltage level (such as time point t4 to time point t5) is between the period during which voltage COM_P (1) has a first voltage level (such as time point t2 to time point t4) And voltage COM_P (1) has a period with a second voltage level (such as time point t5 to time point t6), and voltage COM_P (1) has another period with a third voltage level (such as time point t7 to time) Point t8) is between voltage COM_P (1) and The period between the two voltage levels is from time point t5 to time point t6) and the period when the voltage COM_P (1) has the first voltage level (for example, after time point t8).

在一實施例中，每一電壓COM_P(1)-COM_P(X)、COM_N(1)-COM_N(X)皆對應8筆閘極訊號G(0)、…、G(N)，而具有第三電壓位準。 In an embodiment, each voltage COM_P (1) -COM_P (X), COM_N (1) -COM_N (X) corresponds to eight gate signals G (0), ..., G (N), and has a first Three voltage levels.

舉例而言，電壓COM_P(1)在時間點t1(即第一幀的閘極訊號G(0)的上升緣)至時間點t2(即第一幀的閘極訊號G(8)的上升緣)之間具有第三電壓位準。而後，電壓COM_P(1)在時間點t2至時間點t4(即第二幀的閘極訊號G(8)的上升緣)之間具有第一電壓位準。而後，電壓COM_P(1)在時間點t4至時間點t5(即第二幀的閘極訊號G(8)的上升緣)之間具有第三電壓位準。而後，電壓COM_P(1)在時間點t5至時間點t7(即第三幀的閘極訊號G(0)的上升緣)之間具有第二電壓位準。 For example, the voltage COM_P (1) at time point t1 (the rising edge of the gate signal G (0) in the first frame) to time point t2 (the rising edge of the gate signal G (8) in the first frame ) Has a third voltage level. Then, the voltage COM_P (1) has a first voltage level between the time point t2 and the time point t4 (that is, the rising edge of the gate signal G (8) of the second frame). Then, the voltage COM_P (1) has a third voltage level between the time point t4 and the time point t5 (that is, the rising edge of the gate signal G (8) of the second frame). Then, the voltage COM_P (1) has a second voltage level between the time point t5 to the time point t7 (that is, the rising edge of the gate signal G (0) in the third frame).

另外，電壓COM_N(1)與電壓COM_P(1)彼此反相，故在此不贅述。 In addition, the voltage COM_N (1) and the voltage COM_P (1) are opposite to each other, so they are not repeated here.

類似地，電壓COM_P(2)在時間點t2至時間點t3(即第一幀的閘極訊號G(16)的上升緣)之間具有第三電壓位準。而後，電壓COM_P(2)在時間點t3至時間點t5(即第二幀的閘極訊號G(8)的上升緣)之間具有第一電壓位準。而後，電壓COM_P(2)在時間點t5至時間點t6(即第二幀的閘極訊號G(16)的上升緣)之間具有第三電壓位準。而後，電壓COM_P(2)在時間點t6至時間點t8(即第 三幀的閘極訊號G(8)的上升緣)之間具有第二電壓位準。 Similarly, the voltage COM_P (2) has a third voltage level between the time point t2 and the time point t3 (that is, the rising edge of the gate signal G (16) of the first frame). Then, the voltage COM_P (2) has a first voltage level between the time point t3 and the time point t5 (that is, the rising edge of the gate signal G (8) of the second frame). Then, the voltage COM_P (2) has a third voltage level between the time point t5 and the time point t6 (that is, the rising edge of the gate signal G (16) of the second frame). Then, the voltage COM_P (2) is from time point t6 to time point t8 (that is, the first There is a second voltage level between the rising edges of the gate signal G (8) of the three frames.

另外，電壓COM_N(2)與電壓COM_P(2)彼此反相，故在此不贅述。 In addition, the voltage COM_N (2) and the voltage COM_P (2) are opposite to each other, so they are not repeated here.

透過上述的操作，可使電壓COM_P(1)-COM_P(X)、COM_N(1)-COM_N(X)相應於閘極訊號G(0)、…、G(N)而具有不同的電壓位準。 Through the above operations, the voltages COM_P (1) -COM_P (X), COM_N (1) -COM_N (X) can have different voltage levels corresponding to the gate signals G (0), ..., G (N) .

應注意到，雖然上述實施例用每一電壓COM_P(1)-COM_P(X)、COM_N(1)-COM_N(X)皆對應8筆閘極訊號G(0)、…、G(N)而具有第三電壓位準為例進行說明，然而實際上每一電壓COM_P(1)-COM_P(X)、COM_N(1)-COM_N(X)可對應多於8筆(如12筆)閘極訊號G(0)、…、G(N)而具有第三電壓位準，故本案並不以上述實施例為限。在不同實施例中，每一電壓COM_P(1)-COM_P(X)、COM_N(1)-COM_N(X)對應的閘極訊號G(0)、…、G(N)的數量可依實際需求進行改變。 It should be noted that although the above embodiments use each voltage COM_P (1) -COM_P (X), COM_N (1) -COM_N (X) to correspond to 8 gate signals G (0), ..., G (N), The third voltage level is used as an example for description. However, each voltage COM_P (1) -COM_P (X), COM_N (1) -COM_N (X) can correspond to more than 8 (such as 12) gate signals. G (0),..., G (N) have the third voltage level, so this case is not limited to the above embodiment. In different embodiments, the number of gate signals G (0), ..., G (N) corresponding to each voltage COM_P (1) -COM_P (X), COM_N (1) -COM_N (X) can be based on actual demand Make changes.

第5圖為根據本案一實施例所繪示的電壓提供電路DRV的示意圖。在本實施例中，電壓提供電路DRV包括X級工作電路LVC(1)-LVC(X)。工作電路LVC(1)-LVC(X)分別用以產生電壓COM_P(1)-COM_P(X)、COM_N(1)-COM_N(X)。例如，工作電路LVC(1)用以產生電壓COM_P(1)、COM_N(1)，且工作電路LVC(2)用以產生電壓COM_P(2)、COM_N(2)，並以此類推。 FIG. 5 is a schematic diagram of a voltage supply circuit DRV according to an embodiment of the present invention. In this embodiment, the voltage supply circuit DRV includes X-level operating circuits LVC (1) -LVC (X). The working circuits LVC (1) -LVC (X) are respectively used to generate voltages COM_P (1) -COM_P (X) and COM_N (1) -COM_N (X). For example, the working circuit LVC (1) is used to generate the voltages COM_P (1) and COM_N (1), and the working circuit LVC (2) is used to generate the voltages COM_P (2) and COM_N (2), and so on.

為使敘述清楚，以下以工作電路LVC(1)為例進行說明。工作電路LVC(2)-LVC(X)可具有相同或相似於工作電路LVC(1)的結構，然本案不以此為限。 To make the description clear, the working circuit LVC (1) is taken as an example for explanation below. The working circuits LVC (2) -LVC (X) may have the same or similar structure to the working circuit LVC (1), but this case is not limited thereto.

在本實施例中，工作電路LVC(1)包括輸出電路OTC、控制電路CTC1、CTC2、以及掃描訊號產生電路SRC。在本實施例中，輸出電路OTC可包括開關TS1-TS6。 In this embodiment, the working circuit LVC (1) includes an output circuit OTC, control circuits CTC1, CTC2, and a scanning signal generating circuit SRC. In this embodiment, the output circuit OTC may include switches TS1-TS6.

應注意到，本揭示內容所述的開關皆可用薄膜電晶體(thin film transistor，TFT)實現，然而其它種類的開關及/或電晶體亦在本案範圍之中。另外，雖然在以下說明中，所有開關皆是以n型電晶體實現，然而在不同實施例中，此些開關亦可用p型電晶體實現，故本案不以下述說明為限。 It should be noted that the switches described in this disclosure can all be implemented by thin film transistors (TFTs), but other types of switches and / or transistors are also within the scope of the present application. In addition, although all switches are implemented by n-type transistors in the following description, in different embodiments, these switches can also be implemented by p-type transistors, so this case is not limited to the following description.

在本實施例中，開關TS1的第一端電性連接供應電壓VS1的電壓源並用以接收供應電壓VS1，開關TS1的第二端電性連接電壓COM_P(1)的輸出端，且開關TS1的控制端用以接收控制電路CTC1產生的控制訊號CU(1)。在一實施例中，開關TS1用以根據控制訊號CU(1)導通，以提供供應電壓VS1至電壓COM_P(1)的輸出端，作為具有第一電壓位準的電壓COM_P(1)。 In this embodiment, the first terminal of the switch TS1 is electrically connected to the voltage source of the supply voltage VS1 and used to receive the supply voltage VS1, the second terminal of the switch TS1 is electrically connected to the output terminal of the voltage COM_P (1), and the The control end is used to receive the control signal CU (1) generated by the control circuit CTC1. In an embodiment, the switch TS1 is turned on according to the control signal CU (1) to provide an output terminal of the supply voltage VS1 to the voltage COM_P (1) as the voltage COM_P (1) having a first voltage level.

在本實施例中，開關TS2的第一端電性連接供應電壓VS2的電壓源並用以接收供應電壓VS2，開關TS2的第二端電性連接電壓COM_P(1)的輸出端，且開關TS2的控制端用以接收控制電路CTC2產生的控制訊號 CD(1)。在一實施例中，開關TS2用以根據控制訊號CD(1)導通，以提供供應電壓VS2至電壓COM_P(1)的輸出端，作為具有第二電壓位準的電壓COM_P(1)。 In this embodiment, the first terminal of the switch TS2 is electrically connected to the voltage source of the supply voltage VS2 and used to receive the supply voltage VS2, the second terminal of the switch TS2 is electrically connected to the output terminal of the voltage COM_P (1), and the switch TS2 The control end is used to receive the control signal generated by the control circuit CTC2 CD (1). In one embodiment, the switch TS2 is used to be turned on according to the control signal CD (1) to provide an output terminal of the supply voltage VS2 to the voltage COM_P (1) as the voltage COM_P (1) having the second voltage level.

在本實施例中，開關TS3的第一端電性連接供應電壓VS3的電壓源並用以接收供應電壓VS3，開關TS3的第二端電性連接電壓COM_P(1)的輸出端，且開關TS3的控制端用以接收掃描訊號產生電路SRC產生的掃描訊號Y(1)。在一實施例中，開關TS3用以根據掃描訊號Y(1)導通，以提供供應電壓VS3至電壓COM_P(1)的輸出端，作為具有第三電壓位準的電壓COM_P(1)。 In this embodiment, the first terminal of the switch TS3 is electrically connected to the voltage source of the supply voltage VS3 and used to receive the supply voltage VS3, the second terminal of the switch TS3 is electrically connected to the output terminal of the voltage COM_P (1), and the switch TS3 The control end is used for receiving the scanning signal Y (1) generated by the scanning signal generating circuit SRC. In an embodiment, the switch TS3 is turned on according to the scan signal Y (1) to provide an output terminal of the supply voltage VS3 to the voltage COM_P (1) as the voltage COM_P (1) having a third voltage level.

在本實施例中，開關TS4的第一端電性連接供應電壓VS2的電壓源並用以接收供應電壓VS2，開關TS4的第二端電性連接電壓COM_N(1)的輸出端，且開關TS4的控制端用以接收控制電路CTC1產生的控制訊號CU(1)。在一實施例中，開關TS4用以根據控制訊號CU(1)導通，以提供供應電壓VS2至電壓COM_N(1)的輸出端，作為具有第二電壓位準的電壓COM_N(1)。 In this embodiment, the first terminal of the switch TS4 is electrically connected to the voltage source of the supply voltage VS2 and is used to receive the supply voltage VS2, the second terminal of the switch TS4 is electrically connected to the output terminal of the voltage COM_N (1), and the switch TS4 is The control end is used to receive the control signal CU (1) generated by the control circuit CTC1. In one embodiment, the switch TS4 is turned on according to the control signal CU (1) to provide an output terminal of the supply voltage VS2 to the voltage COM_N (1) as the voltage COM_N (1) having the second voltage level.

在本實施例中，開關TS5的第一端電性連接供應電壓VS1的電壓源並用以接收供應電壓VS1，開關TS5的第二端電性連接電壓COM_N(1)的輸出端，且開關TS5的控制端用以接收控制電路CTC2產生的控制訊號CD(1)。在一實施例中，開關TS5用以根據控制訊號CD(1)導通，以提供供應電壓VS1至電壓COM_N(1)的輸出端，作為具有第一電壓位準的電壓COM_N(1)。 In this embodiment, the first terminal of the switch TS5 is electrically connected to the voltage source of the supply voltage VS1 and used to receive the supply voltage VS1, the second terminal of the switch TS5 is electrically connected to the output terminal of the voltage COM_N (1), and the switch TS5 The control end is used to receive the control signal CD (1) generated by the control circuit CTC2. In an embodiment, the switch TS5 is turned on according to the control signal CD (1) to provide an output terminal of the supply voltage VS1 to the voltage COM_N (1) as the voltage COM_N (1) having the first voltage level.

在本實施例中，開關TS6的第一端電性連接供應電壓VS3的電壓源並用以接收供應電壓VS3，開關TS6的第二端電性連接電壓COM_N(1)的輸出端，且開關TS6的控制端用以接收掃描訊號產生電路SRC產生的掃描訊號Y(1)。在一實施例中，開關TS6用以根據掃描訊號Y(1)導通，以提供供應電壓VS3至電壓COM_N(1)的輸出端，作為具有第三電壓位準的電壓COM_N(1)。在一些實施例中，開關TS6可以省略而用開關TS3取代。 In this embodiment, the first terminal of the switch TS6 is electrically connected to the voltage source of the supply voltage VS3 and used to receive the supply voltage VS3, the second terminal of the switch TS6 is electrically connected to the output terminal of the voltage COM_N (1), and the The control end is used for receiving the scanning signal Y (1) generated by the scanning signal generating circuit SRC. In one embodiment, the switch TS6 is turned on according to the scan signal Y (1) to provide an output terminal of the supply voltage VS3 to the voltage COM_N (1) as the voltage COM_N (1) having a third voltage level. In some embodiments, the switch TS6 may be omitted and replaced by the switch TS3.

參照第6圖，其為根據本發明一實施例所繪示的電壓提供電路的訊號示意圖。在該實施例中，工作電路LVC(1)-LVC(X)的掃描訊號產生電路SRC依序輸出具有高電壓位準的掃描訊號Y(1)-Y(X)，以依序導通工作電路LVC(1)-LVC(X)的開關TS3、TS6，而使得電壓COM_P(1)-COM_P(X)、COM_N(1)-COM_N(X)依序具有前述第三電壓位準。 Referring to FIG. 6, it is a signal schematic diagram of a voltage supply circuit according to an embodiment of the present invention. In this embodiment, the scanning signal generating circuit SRC of the working circuits LVC (1) -LVC (X) sequentially outputs the scanning signals Y (1) -Y (X) having a high voltage level to sequentially turn on the working circuits. The switches TS3 and TS6 of the LVC (1) -LVC (X) cause the voltages COM_P (1) -COM_P (X) and COM_N (1) -COM_N (X) to have the aforementioned third voltage level in sequence.

另外，在一實施例中，工作電路LVC(1)-LVC(X)的控制電路CTC1依序輸出具有高電壓位準的控制訊號CU(1)-CU(X)，以依序導通工作電路LVC(1)-LVC(X)的開關TS1、TS4，而使得電壓COM_P(1)-COM_P(X)依序具有前述第一電壓位準，並使得電壓COM_N(1)-COM_N(X)依序具有前述第二電壓位準。 In addition, in one embodiment, the control circuit CTC1 of the working circuits LVC (1) -LVC (X) sequentially outputs control signals CU (1) -CU (X) with high voltage levels to sequentially turn on the working circuits. The switches TS1 and TS4 of the LVC (1) -LVC (X) make the voltage COM_P (1) -COM_P (X) sequentially have the aforementioned first voltage level, and make the voltage COM_N (1) -COM_N (X) according to The sequence has the aforementioned second voltage level.

另外，在一實施例中，工作電路LVC(1)-LVC(X)的控制電路CTC2依序輸出具有高電壓 位準的控制訊號CD(1)-CD(X)，以依序導通工作電路LVC(1)-LVC(X)的開關TS2、TS5，而使得電壓COM_P(1)-COM_P(X)依序具有前述第二電壓位準，並使得電壓COM_N(1)-COM_N(X)依序具有前述第一電壓位準。 In addition, in one embodiment, the control circuit CTC2 of the working circuits LVC (1) -LVC (X) sequentially outputs a high voltage The level control signals CD (1) -CD (X) sequentially turn on the switches TS2 and TS5 of the working circuit LVC (1) -LVC (X), so that the voltages COM_P (1) -COM_P (X) are sequentially It has the aforementioned second voltage level and causes the voltages COM_N (1) -COM_N (X) to have the aforementioned first voltage level in sequence.

為使敘述清楚，以下以工作電路LVC(n)的控制電路CTC1、CTC2及掃描訊號產生電路SRC為例進行說明。工作電路LVC(1)-LVC(X)中的其它控制電路CTC1、CTC2及掃描訊號產生電路SRC可具有相同或相似於工作電路LVC(n)的控制電路CTC1、CTC2及掃描訊號產生電路SRC的結構，然本案不以此為限。 In order to make the description clear, the control circuit CTC1, CTC2 and the scan signal generating circuit SRC of the working circuit LVC (n) are described as examples below. The other control circuits CTC1, CTC2 and scanning signal generating circuit SRC in the working circuit LVC (1) -LVC (X) may have the same or similar control circuits CTC1, CTC2 and scanning signal generating circuit SRC of the working circuit LVC (n). Structure, but this case is not limited to this.

第7圖為根據本發明一實施例所繪示的工作電路LVC(n)的控制電路CTC1的示意圖。在一實施例中，控制電路CTC1包括輸出模組OTM1及控制模組CTM1。在本實施例中，控制模組CTM1用以控制輸出模組OTM1輸出控制訊號CU(n)。 FIG. 7 is a schematic diagram of a control circuit CTC1 of the working circuit LVC (n) according to an embodiment of the present invention. In one embodiment, the control circuit CTC1 includes an output module OTM1 and a control module CTM1. In this embodiment, the control module CTM1 is used to control the output module OTM1 to output a control signal CU (n).

在本實施例中，輸出模組OTM1包括開關TO1、TO2、及電容C1。控制模組CTM1包括開關T1-T5、及電容C2。 In this embodiment, the output module OTM1 includes switches TO1, TO2, and a capacitor C1. The control module CTM1 includes switches T1-T5 and a capacitor C2.

在本實施例中，電容C2的第一端用以接收時脈訊號CK2，且電容C2的第二端電性連接控制模組CTM的第一訊號輸出端(下稱節點B)。 In this embodiment, the first terminal of the capacitor C2 is used to receive the clock signal CK2, and the second terminal of the capacitor C2 is electrically connected to the first signal output terminal (hereinafter referred to as a node B) of the control module CTM.

在本實施例中，開關T1的第一端用以接收前一級控制訊號CU(n-1)，開關TO1的第二端電性連接節點 B，且開關T1的控制端用以接收時脈訊號CK1。在本實施例中，開關T1用以根據時脈訊號CK1導通，以提供前一級控制訊號CU(n-1)至節點B。 In this embodiment, the first end of the switch T1 is used to receive the previous-stage control signal CU (n-1), and the second end of the switch TO1 is electrically connected to the node B, and the control end of the switch T1 is used to receive the clock signal CK1. In this embodiment, the switch T1 is used to be turned on according to the clock signal CK1 to provide the previous-stage control signal CU (n-1) to the node B.

在本實施例中，開關T2的第一端電性連接供應電壓VGH(如8.5V)的電壓源並用以接收具有第一電壓位準(如高電壓位準)的供應電壓VGH，開關T2的第二端電性連接控制模組CTM的第二訊號輸出端(下稱節點P)，且開關T2的控制端用以接收掃描訊號Y(n)。在本實施例中，開關T2用以根據掃描訊號Y(n)導通，以提供供應電壓VGH至節點P。 In this embodiment, a first terminal of the switch T2 is electrically connected to a voltage source of a supply voltage VGH (for example, 8.5V) and is used to receive a supply voltage VGH having a first voltage level (for example, a high voltage level). The second terminal is electrically connected to the second signal output terminal (hereinafter referred to as node P) of the control module CTM, and the control terminal of the switch T2 is used to receive the scanning signal Y (n). In this embodiment, the switch T2 is used to be turned on according to the scan signal Y (n) to provide a supply voltage VGH to the node P.

在本實施例中，開關T3的第一端電性連接供應電壓VGL(如-8V)的電壓源並用以接收供應電壓VGL，開關T3的第二端電性連接節點B，且開關T3的控制端用以接收節點P上的電壓。在本實施例中，開關T3用以根據節點P上的電壓導通，以提供供應電壓VGL至節點B。 In this embodiment, the first terminal of the switch T3 is electrically connected to the voltage source of the supply voltage VGL (for example, -8V) and used to receive the supply voltage VGL, the second terminal of the switch T3 is electrically connected to the node B, and the control of the switch T3 The terminal is used to receive the voltage on the node P. In this embodiment, the switch T3 is configured to be turned on according to the voltage on the node P to provide a supply voltage VGL to the node B.

在本實施例中，開關T4的第一端電性連接供應電壓VGL的電壓源並用以接收供應電壓VGL，開關T4的第二端電性連接節點P，且開關T4的控制端用以接收節點B上的電壓。在本實施例中，開關T4用以根據節點B上的電壓導通，以提供供應電壓VGL至節點P。 In this embodiment, the first terminal of the switch T4 is electrically connected to the voltage source of the supply voltage VGL and used to receive the supply voltage VGL, the second terminal of the switch T4 is electrically connected to the node P, and the control terminal of the switch T4 is used to receive the node. Voltage on B. In this embodiment, the switch T4 is used to be turned on according to the voltage on the node B to provide a supply voltage VGL to the node P.

在本實施例中，開關T5的第一端電性連接供應電壓VGH的電壓源並用以接收具有第一電壓位準(如高電壓位準)的供應電壓VGH，開關T5的第二端電性連接節點P，且開關T5的控制端用以接收節點A(關於節點A將 於而後的段落說明)上的電壓。在本實施例中，開關T5用以根據節點A上的電壓(如高電壓準位)導通，以提供供應電壓VGH至節點P。 In this embodiment, a first terminal of the switch T5 is electrically connected to a voltage source of the supply voltage VGH and is used to receive a supply voltage VGH having a first voltage level (such as a high voltage level), and a second terminal of the switch T5 is electrically Connected to node P, and the control end of switch T5 is used to receive node A (about node A will The voltage in the following paragraphs). In this embodiment, the switch T5 is configured to be turned on according to a voltage (such as a high voltage level) at the node A to provide a supply voltage VGH to the node P.

在本實施例中，電容C1電性連接控制訊號CU(n)的輸出端，以維持控制訊號CU(n)的電壓位準。 In this embodiment, the capacitor C1 is electrically connected to the output terminal of the control signal CU (n) to maintain the voltage level of the control signal CU (n).

在本實施例中，開關TO1的第一端電性連接供應電壓VGH的電壓源並用以接收供應電壓VGH，開關TO1的第二端電性連接控制訊號CU(n)的輸出端，且開關TO1的控制端用以接收節點B上的電壓。在本實施例中，開關TO1用以根據節點B上的電壓導通，以提供供應電壓VGH至控制訊號CU(n)的輸出端，作為具有第一電壓位準的控制訊號CU(n)。 In this embodiment, the first terminal of the switch TO1 is electrically connected to the voltage source of the supply voltage VGH and is used to receive the supply voltage VGH, the second terminal of the switch TO1 is electrically connected to the output terminal of the control signal CU (n), and the switch TO1 The control terminal is used to receive the voltage on node B. In this embodiment, the switch TO1 is configured to be turned on according to the voltage on the node B to provide a supply voltage VGH to the output terminal of the control signal CU (n) as a control signal CU (n) having a first voltage level.

在本實施例中，開關TO2的第一端電性連接供應電壓VGL的電壓源並用以接收供應電壓VGL，開關TO2的第二端電性連接控制訊號CU(n)的輸出端，且開關TO2的控制端用以接收節點P上的電壓。在本實施例中，開關TO2用以根據節點P上的電壓導通，以提供供應電壓VGL至控制訊號CU(n)的輸出端，作為具有第二電壓位準的控制訊號CU(n)。 In this embodiment, the first terminal of the switch TO2 is electrically connected to the voltage source of the supply voltage VGL and used to receive the supply voltage VGL, the second terminal of the switch TO2 is electrically connected to the output terminal of the control signal CU (n), and the switch TO2 The control terminal is used to receive the voltage on the node P. In this embodiment, the switch TO2 is used to be turned on according to the voltage at the node P to provide the supply voltage VGL to the output terminal of the control signal CU (n) as the control signal CU (n) with the second voltage level.

第8圖為根據本發明一實施例所繪示的工作電路LVC(n)的控制電路CTC2的示意圖。在一實施例中，控制電路CTC2包括輸出模組OTM2及控制模組CTM2。在本實施例中，控制模組CTM2用以控制輸出模組OTM2輸出控制訊號CD(n)。在本實施例中，輸出模組OTM2與 控制模組CTM2分別相似於前述輸出模組OTM1及控制模組CTM1，故類似的部份可參照前述段落，在此不贅述。 FIG. 8 is a schematic diagram of a control circuit CTC2 of the working circuit LVC (n) according to an embodiment of the present invention. In one embodiment, the control circuit CTC2 includes an output module OTM2 and a control module CTM2. In this embodiment, the control module CTM2 is used to control the output module OTM2 to output a control signal CD (n). In this embodiment, the output module OTM2 and The control module CTM2 is similar to the output module OTM1 and the control module CTM1 respectively, so similar parts can refer to the foregoing paragraphs, and will not be repeated here.

在本實施例中，控制電路CTC2的開關T1的第一端是接收前一級控制訊號CD(n-1)，且控制電路CTC2的開關T1的第二端電性連接前述節點A。此外，控制電路CTC2的開關T5的控制端是接收節點B上的電壓。另外，以下將控制電路CTC2的開關TO2的控制端稱為節點R。 In this embodiment, the first end of the switch T1 of the control circuit CTC2 receives the control signal CD (n-1) of the previous stage, and the second end of the switch T1 of the control circuit CTC2 is electrically connected to the aforementioned node A. In addition, the control terminal of the switch T5 of the control circuit CTC2 is to receive the voltage on the node B. The control terminal of the switch TO2 of the control circuit CTC2 is hereinafter referred to as a node R.

第9圖為根據本發明一實施例所繪示的工作電路LVC(n)的掃描訊號產生電路SRC的示意圖。在本實施例中，掃描訊號產生電路SRC包括開關TR1、TR2、電容C3。 FIG. 9 is a schematic diagram of a scanning signal generating circuit SRC of the working circuit LVC (n) according to an embodiment of the present invention. In this embodiment, the scanning signal generating circuit SRC includes switches TR1, TR2, and a capacitor C3.

在本實施例中，電容C3電性連接掃描訊號Y(n)的輸出端，以維持掃描訊號Y(n)的電壓位準。 In this embodiment, the capacitor C3 is electrically connected to the output terminal of the scanning signal Y (n) to maintain the voltage level of the scanning signal Y (n).

在本實施例中，開關TR1的第一端用以接收閘極訊號G(8×n-8)，開關TR1的第二端電性連接掃描訊號Y(n)的輸出端，且開關TR1的控制端用以接收閘極訊號G(8×n-8)。在本實施例中，開關TR1用以根據閘極訊號G(8×n-8)導通，以提供閘極訊號G(8×n-8)至掃描訊號Y(n)的輸出端。 In this embodiment, the first end of the switch TR1 is used to receive the gate signal G (8 × n-8), the second end of the switch TR1 is electrically connected to the output terminal of the scan signal Y (n), and the The control end is used to receive the gate signal G (8 × n-8). In this embodiment, the switch TR1 is configured to be turned on according to the gate signal G (8 × n-8) to provide the gate signal G (8 × n-8) to the output terminal of the scan signal Y (n).

在本實施例中，開關TR2的第一端電性連接供應電壓VGL的電壓源並用以接收供應電壓VGL，開關TR2的第二端電性連接掃描訊號Y(n)的輸出端，且開關TR2的控制端用以接收閘極訊號G(8×n)。在本實施例中， 開關TR2用以根據閘極訊號G(8×n)導通，以提供供應電壓VGL至掃描訊號Y(n)的輸出端。 In this embodiment, the first terminal of the switch TR2 is electrically connected to the voltage source of the supply voltage VGL and used to receive the supply voltage VGL, the second terminal of the switch TR2 is electrically connected to the output terminal of the scanning signal Y (n), and the switch TR2 The control terminal is used to receive the gate signal G (8 × n). In this embodiment, The switch TR2 is configured to be turned on according to the gate signal G (8 × n) to provide a supply voltage VGL to an output terminal of the scan signal Y (n).

應注意到，在本案不同實施例中，工作電路LVC(1)-LVC(X)的掃描訊號產生電路SRC可利用移位暫存器實現，故本案不以上述實施例為限。 It should be noted that, in different embodiments of the present case, the scanning signal generating circuit SRC of the working circuits LVC (1) -LVC (X) may be implemented by using a shift register, so this case is not limited to the above embodiments.

以下將搭配第10圖，藉由提供一操作例以說明本案一些實施例的細節，然而本案不以此為限。 The following will be combined with FIG. 10 to provide details of some embodiments of the present invention by providing an operation example, but the present invention is not limited thereto.

在時間點s1，掃描訊號產生電路SRC的開關TR1(參照第9圖)根據高電壓位準的閘極訊號G(8×n-8)導通，以提供高電壓位準的閘極訊號G(8×n-8)至掃描訊號Y(n)的輸出端，以對電容C3進行充電，以令掃描訊號Y(n)具有高電壓位準。此時，工作電路LVC(n)的開關TS3根據高電壓位準的掃描訊號Y(n)導通，提供供應電壓VS3至電壓COM_P(n)的輸出端，而使電壓COM_P(n)具有第三電壓位準。 At time s1, the switch TR1 (refer to FIG. 9) of the scanning signal generating circuit SRC is turned on according to the gate signal G (8 × n-8) of the high voltage level, so as to provide the gate signal G of the high voltage level ( 8 × n-8) to the output terminal of the scanning signal Y (n) to charge the capacitor C3 so that the scanning signal Y (n) has a high voltage level. At this time, the switch TS3 of the working circuit LVC (n) is turned on according to the scanning signal Y (n) of the high voltage level, and provides a supply voltage VS3 to the output terminal of the voltage COM_P (n), so that the voltage COM_P (n) has a third Voltage level.

此時，控制電路CTC1的開關T2(參照第7圖)根據高電壓位準的掃描訊號Y(n)導通，以提供供應電壓VGH至節點P，以使控制電路CTC1的開關TO2、T3導通。此時，開關TO2提供供應電壓VGL至控制訊號CU(n)的輸出端，而使控制訊號CU(n)具有低電壓位準。並且，開關T3提供供應電壓VGL至節點B，作為節點B的第二操作電壓。 At this time, the switch T2 (refer to FIG. 7) of the control circuit CTC1 is turned on according to the high-level scanning signal Y (n) to provide a supply voltage VGH to the node P, so that the switches TO2 and T3 of the control circuit CTC1 are turned on. At this time, the switch TO2 provides a supply voltage VGL to the output terminal of the control signal CU (n), so that the control signal CU (n) has a low voltage level. And, the switch T3 provides a supply voltage VGL to the node B as the second operating voltage of the node B.

此時，控制電路CTC2的開關T2(參照第8圖)根據高電壓位準的掃描訊號Y(n)導通，以提供供應電壓 VGH至節點R，以使控制電路CTC2的開關TO2、T3關斷。此時，開關TO2提供供應電壓VGL至控制訊號CU(n)的輸出端，而使控制訊號CD(n)具有低電壓位準。並且，開關T3提供供應電壓VGL至節點A。 At this time, the switch T2 (refer to FIG. 8) of the control circuit CTC2 is turned on according to the scanning signal Y (n) of the high voltage level to provide the supply voltage. VGH to node R, so that the switches TO2 and T3 of the control circuit CTC2 are turned off. At this time, the switch TO2 provides a supply voltage VGL to the output terminal of the control signal CU (n), so that the control signal CD (n) has a low voltage level. And, the switch T3 provides a supply voltage VGL to the node A.

在時間點s1至時間點s2之間，電容C3維持掃描訊號Y(n)於高電壓位準，而使開關TS3持續提供供應電壓VS3至電壓COM_P(n)的輸出端。並且，節點P、R維持在供應電壓VGH，以保持控制電路CTC1、CTC2的開關TO2、T3導通。 Between the time point s1 and the time point s2, the capacitor C3 maintains the scanning signal Y (n) at a high voltage level, so that the switch TS3 continues to provide the output terminal of the supply voltage VS3 to the voltage COM_P (n). In addition, the nodes P and R are maintained at the supply voltage VGH to keep the switches TO2 and T3 of the control circuits CTC1 and CTC2 on.

在時間點s2，掃描訊號產生電路SRC的開關TR2根據高電壓位準的閘極訊號G(8×n)導通，以提供供應電壓VGL至掃描訊號Y(n)的輸出端，以對電容C3進行放電，以令掃描訊號Y(n)具有低電壓位準。 At time s2, the switch TR2 of the scanning signal generating circuit SRC is turned on according to the gate signal G (8 × n) of the high voltage level, so as to provide the supply voltage VGL to the output terminal of the scanning signal Y (n), so as to connect the capacitor C3. Discharge is performed so that the scanning signal Y (n) has a low voltage level.

此時，控制電路CTC1的開關T1(參照第7圖)根據時脈訊號CK1導通，以提供高電壓位準的控制訊號CU(n-1)至節點B，作為節點B的第一操作電壓。此時，控制電路CTC1的開關TO1根據節點B上的電壓導通，以提供供應電壓VGH至控制訊號CU(n)的輸出端，而使控制訊號CU(n)具有高電壓位準。此時，開關TS1(參照第5圖)根據高電壓位準的控制訊號CU(n)導通，提供供應電壓VS1至電壓COM_P(n)的輸出端，而使電壓COM_P(n)具有第一電壓位準。 At this time, the switch T1 (refer to FIG. 7) of the control circuit CTC1 is turned on according to the clock signal CK1 to provide a high-voltage control signal CU (n-1) to the node B as the first operating voltage of the node B. At this time, the switch TO1 of the control circuit CTC1 is turned on according to the voltage on the node B to provide a supply voltage VGH to the output terminal of the control signal CU (n), so that the control signal CU (n) has a high voltage level. At this time, the switch TS1 (refer to FIG. 5) is turned on according to the control signal CU (n) of the high voltage level, and provides the output terminal of the supply voltage VS1 to the voltage COM_P (n) so that the voltage COM_P (n) has the first voltage Level.

另一方面，控制電路CTC2的開關T5(參照第8圖)根據節點B上電壓導通，以提供供應電壓VGH至節 點R。此時，控制電路CTC2的開關TO2根據節點R上的電壓導通，以提供供應電壓VGL至控制訊號CD(n)的輸出端，而使控制訊號CD(n)具有低電壓位準。此時，開關TS2(參照第5圖)根據低電壓位準的控制訊號CD(n)關斷。另外，控制電路CTC2的開關T3根據節點R上的電壓導通，以提供供應電壓VGL至節點A。 On the other hand, the switch T5 (refer to FIG. 8) of the control circuit CTC2 is turned on according to the voltage at the node B to provide the supply voltage VGH to the node. Point R. At this time, the switch TO2 of the control circuit CTC2 is turned on according to the voltage at the node R to provide the supply voltage VGL to the output terminal of the control signal CD (n), so that the control signal CD (n) has a low voltage level. At this time, the switch TS2 (refer to FIG. 5) is turned off in accordance with the control signal CD (n) of the low voltage level. In addition, the switch T3 of the control circuit CTC2 is turned on according to the voltage on the node R to provide a supply voltage VGL to the node A.

在時間點s2至時間點s6之間，控制電路CTC1的開關T1根據時脈訊號CK1間斷地導通(如在時間點s4)，以間斷地提供高電壓位準的控制訊號CU(n-1)至節點B，以令節點B保持高電壓位準。 Between the time point s2 and the time point s6, the switch T1 of the control circuit CTC1 is intermittently turned on according to the clock signal CK1 (for example, at the time point s4) to intermittently provide the high-voltage level control signal CU (n-1) Go to Node B to keep Node B at a high voltage level.

此外，在此期間中，藉由控制電路CTC1的電容C2的電容耦合效應，節點B上的電壓更相應於時脈訊號CK2而進行改變(如在時間點s3、s5)，以提升至更高的電壓位準，從而導通控制電路CTC1的開關T1，以令控制電路CTC1的電容C1得以進行充電，以維持控制訊號CU(n)為供應電壓VGH。 In addition, during this period, due to the capacitive coupling effect of the capacitor C2 of the control circuit CTC1, the voltage at the node B is changed corresponding to the clock signal CK2 (for example, at the time points s3, s5) to improve to a higher level. To turn on the switch T1 of the control circuit CTC1 to charge the capacitor C1 of the control circuit CTC1 to maintain the control signal CU (n) as the supply voltage VGH.

此外，在此期間中，控制電路CTC1的開關T4根據控制電路CTC1的節點B上的電壓導通，以提供供應電壓VGL至節點P，以使控制電路CTC1的開關TO2關斷。 In addition, during this period, the switch T4 of the control circuit CTC1 is turned on according to the voltage on the node B of the control circuit CTC1 to provide a supply voltage VGL to the node P, so that the switch TO2 of the control circuit CTC1 is turned off.

此外，在此期間中，控制電路CTC2的開關T5(參照第8圖)根據節點B上電壓導通，以提供供應電壓VGH至節點R。控制電路CTC2的開關T3根據節點R上的電壓導通，以提供供應電壓VGL至節點A，以保持節點 A為供應電壓VGL，從而避免節點A上的電壓隨時脈訊號CK2改變。 In addition, during this period, the switch T5 (refer to FIG. 8) of the control circuit CTC2 is turned on according to the voltage on the node B to provide the supply voltage VGH to the node R. The switch T3 of the control circuit CTC2 is turned on according to the voltage on the node R to provide a supply voltage VGL to the node A to maintain the node A is the supply voltage VGL, so as to prevent the voltage on node A from changing with the clock signal CK2.

在時間點s6，控制電路CTC1的開關T1(參照第7圖)根據時脈訊號CK1導通，以提供低電壓位準的起始訊號CST1至節點B，以使控制電路CTC1的開關TO1根據節點B上的電壓關斷。 At time s6, the switch T1 (refer to FIG. 7) of the control circuit CTC1 is turned on according to the clock signal CK1 to provide a low-voltage level start signal CST1 to the node B, so that the switch TO1 of the control circuit CTC1 is based on the node B The voltage on is turned off.

在時間點s6至時間點s7之間，控制電路CTC1的電容C1維持控制訊號CU(n)於高電壓位準，而使開關TS1持續提供供應電壓VS1至電壓COM_P(n)的輸出端。 Between the time point s6 and the time point s7, the capacitor C1 of the control circuit CTC1 maintains the control signal CU (n) at a high voltage level, so that the switch TS1 continuously provides the output terminal of the supply voltage VS1 to the voltage COM_P (n).

在時間點s7，掃描訊號產生電路SRC、控制電路CTC1、CTC2的操作類似於在時間點s1掃描訊號產生電路SRC、控制電路CTC1、CTC2的操作，故在此不贅述。 At the time point s7, the operations of the scanning signal generating circuit SRC, the control circuits CTC1, and CTC2 are similar to the operations of the scanning signal generating circuit SRC, the control circuits CTC1, and CTC2 at the time point s1, and therefore are not described herein.

在時間點s7至時間點s8之間，電容C3維持掃描訊號Y(n)於高電壓位準，而使開關TS3持續提供供應電壓VS3至電壓COM_P(n)的輸出端。並且，節點P、R維持在供應電壓VGH，以保持控制電路CTC1、CTC2的開關TO2、T3導通。 Between the time point s7 and the time point s8, the capacitor C3 maintains the scanning signal Y (n) at a high voltage level, so that the switch TS3 continues to provide the output terminal of the supply voltage VS3 to the voltage COM_P (n). In addition, the nodes P and R are maintained at the supply voltage VGH to keep the switches TO2 and T3 of the control circuits CTC1 and CTC2 on.

在時間點s8，掃描訊號產生電路SRC的操作類似於在時間點s2掃描訊號產生電路SRC的操作，故在此不贅述。 At the time point s8, the operation of the scanning signal generating circuit SRC is similar to the operation of the scanning signal generating circuit SRC at the time point s2, so it will not be repeated here.

此外，在時間點s8，控制電路CTC2的操作類似於控制電路CTC1在時間點s2的操作，且控制電路 CTC1的操作類似於控制電路CTC2在時間點s2的操作，故在此不贅述。 In addition, at the time point s8, the operation of the control circuit CTC2 is similar to the operation of the control circuit CTC1 at the time point s2, and the control circuit The operation of CTC1 is similar to the operation of control circuit CTC2 at time s2, so it will not be repeated here.

在時間點s8至時間點s9之間，控制電路CTC2的操作類似於控制電路CTC1在時間點s2至時間點s6之間的操作，且控制電路CTC1的操作類似於控制電路CTC2在時間點s2至時間點s6之間的操作，故在此不贅述。 Between time point s8 and time point s9, the operation of control circuit CTC2 is similar to that of control circuit CTC1 between time point s2 and time point s6, and operation of control circuit CTC1 is similar to control circuit CTC2 at time point s2 to The operation between time points s6 is not repeated here.

在時間點s10，控制電路CTC2的操作類似於控制電路CTC1在時間點s6的操作，故在此不贅述。 At the time point s10, the operation of the control circuit CTC2 is similar to the operation of the control circuit CTC1 at the time point s6, so it is not repeated here.

在時間點s10至時間點s11之間，控制電路CTC2的電容C1維持控制訊號CD(n)於高電壓位準，而使開關TS2持續提供供應電壓VS2至電壓COM_P(n)的輸出端。 Between the time point s10 and the time point s11, the capacitor C1 of the control circuit CTC2 maintains the control signal CD (n) at a high voltage level, so that the switch TS2 continuously provides the output terminal of the supply voltage VS2 to the voltage COM_P (n).

在時間點s11後，控制電路CTC1、控制電路CTC2、及掃描訊號產生電路SRC重覆進行時間點s1至時間點s11間的操作，故在此不贅述。 After the time point s11, the control circuit CTC1, the control circuit CTC2, and the scan signal generating circuit SRC repeatedly perform the operations from the time point s1 to the time point s11, so it is not repeated here.

另一方面，在上述時間點s1至時間點s11之間，工作電路LVC(n)的開關TS4-TS6亦根據控制訊號CU(n)、CD(n)、及掃描訊號Y(n)進行操作，以輸出相反於電壓COM_P(n)的電壓COM_N(n)。關於此部份操作參照上述說明即可清楚而知，故在此不贅述。 On the other hand, between the above time point s1 and time point s11, the switches TS4-TS6 of the working circuit LVC (n) also operate according to the control signals CU (n), CD (n), and scan signals Y (n). To output a voltage COM_N (n) opposite to the voltage COM_P (n). This part of the operation can be clearly known by referring to the above description, so it will not be repeated here.

透過上述的操作，控制電路CTC1可延遲控制訊號CU(n-1)一個掃描訊號Y(n)的期間(即時間點s1與時間點s2的時間差)，以輸出控制訊號CU(n)，且控制電路 CTC2可延遲控制訊號CD(n-1)一個掃描訊號Y(n)的期間(即時間點s7與時間點s8的時間差)，以輸出控制訊號CD(n)。 Through the above operation, the control circuit CTC1 can delay the control signal CU (n-1) for a period of the scanning signal Y (n) (that is, the time difference between the time point s1 and the time point s2) to output the control signal CU (n), and Control circuit CTC2 can delay the control signal CD (n-1) for one scanning signal Y (n) (ie, the time difference between time point s7 and time point s8) to output the control signal CD (n).

因此，藉由將前一級工作電路LVC(n-1)的控制訊號CU(n-1)、CD(n-1)提供至次一級工作電路LVC(n)的控制電路CTC1、CTC2，工作電路LVC(1)-LVC(X)的控制電路CTC1、CTC2即可依序延遲並輸出具有高電壓位準的控制訊號CU(1)-CU(X)、CD(1)-CD(X)，以控制電壓COM_P(1)-COM_P(X)、COM_N(1)-COM_N(X)的輸出。 Therefore, by supplying the control signals CU (n-1) and CD (n-1) of the previous-stage operating circuit LVC (n-1) to the control circuits CTC1 and CTC2 of the second-stage operating circuit LVC (n), the operating circuit The control circuits CTC1 and CTC2 of LVC (1) -LVC (X) can sequentially delay and output the control signals CU (1) -CU (X), CD (1) -CD (X) with high voltage levels, With the control voltage COM_P (1) -COM_P (X), COM_N (1) -COM_N (X) output.

另一方面，透過上述的操作，控制電路CTC1可長時間(如在時間點s2至時間點s6之間)保持控制訊號CU(n)為供應電壓VGH，且控制電路CTC2可長時間(如在時間點s8至時間點s9之間)保持控制訊號CD(n)為供應電壓VGH以避免因漏電而造成的操作錯誤。 On the other hand, through the above-mentioned operation, the control circuit CTC1 can maintain the control signal CU (n) at the supply voltage VGH for a long time (such as between time point s2 and time point s6), and the control circuit CTC2 can be used for a long time (such as in Between the time point s8 and the time point s9), the control signal CD (n) is kept at the supply voltage VGH to avoid operation errors caused by leakage.

在一實施例中，工作電路LVC(1)-LVC(X)中的奇數級電路(如工作電路LVC(1)、LVC(3)、LVC(5)等)的控制電路CTC1、CTC2的開關T1的控制端可接收時脈訊號CK1、電容的第一端可接收時脈訊號CK2(在本實施例中，n為奇數)，且工作電路LVC(1)-LVC(X)中的偶數級電路(如工作電路LVC(2)、LVC(4)、LVC(6)等)的控制電路CTC1、CTC2的開關T1的控制端可接收時脈訊號CK2、電容的第一端可接收時脈訊號CK1，然而本案不以此為限。 In an embodiment, the switches of the control circuits CTC1, CTC2 of the odd-numbered circuits in the working circuits LVC (1) -LVC (X) (such as the working circuits LVC (1), LVC (3), LVC (5), etc.) The control terminal of T1 can receive the clock signal CK1, and the first terminal of the capacitor can receive the clock signal CK2 (in this embodiment, n is an odd number), and the working circuit LVC (1) -LVC (X) is even-numbered. The control circuit of the circuit (such as the working circuit LVC (2), LVC (4), LVC (6), etc.) CTC1, CTC2 The control terminal of the switch T1 can receive the clock signal CK2, the first end of the capacitor can receive the clock signal CK1, however this case is not limited to this.

第11-13圖分別為根據本發明另一實施例所繪 示的工作電路LVC(n)、工作電路LVC(n)的控制電路CTC1、及工作電路LVC(n)的控制電路CTC2的示意圖。在本實施例中，工作電路LVC(n)更包括開關TCN1-TCN4。在本實施例中，工作電路LVC(1)-工作電路LVC(X)中的其它者亦可具有類似於工作電路LVC(n)的結構，但不以此為限。 11-13 are drawn according to another embodiment of the present invention A schematic diagram of the working circuit LVC (n), the control circuit CTC1 of the working circuit LVC (n), and the control circuit CTC2 of the working circuit LVC (n) are shown. In this embodiment, the working circuit LVC (n) further includes switches TCN1-TCN4. In this embodiment, the other of the working circuit LVC (1) -working circuit LVC (X) may have a structure similar to the working circuit LVC (n), but it is not limited thereto.

本實施例中，開關TCN1-TCN4用以接收控制訊號CN，並根據控制訊號CN導通，藉以控制電壓COM_P(n)、電壓COM_N(n)。例如，當顯示裝置100為窄視角模式時，控制訊號CN具有低電壓位準，而使開關TCN1-TCN4關斷。當顯示裝置100為寬視角模式時，控制訊號CN具有高電壓位準，而使開關TCN1-TCN4導通，以令工作電路LVC(1)-工作電路LVC(X)提供的電壓COM_P(n)-COM_P(X)、COM_N(n)-COM_N(X)皆為供應電壓VS3。 In this embodiment, the switches TCN1-TCN4 are used to receive the control signal CN and are turned on according to the control signal CN, thereby controlling the voltage COM_P (n) and the voltage COM_N (n). For example, when the display device 100 is in a narrow viewing angle mode, the control signal CN has a low voltage level, and the switches TCN1-TCN4 are turned off. When the display device 100 is in the wide viewing angle mode, the control signal CN has a high voltage level, and the switches TCN1-TCN4 are turned on, so that the working circuit LVC (1) -the voltage COM_P (n)- COM_P (X) and COM_N (n) -COM_N (X) are the supply voltage VS3.

第14圖為根據本發明另一實施例所繪示的工作電路LVC(n)的控制電路CTC1的示意圖。在本實施例中，控制電路CTC1更包括開關TV1-TV4及電容CV1。在本實施例中，開關TV1電性連接於電壓VDD的電壓源與開關TV2之間，並用以根據節點B上的電壓導通。開關TV2電性連接於開關TV1與電容C2的第二端之間，並用以根據電壓VDD。電容CV1電性連接於節點B與接地電壓之間。開關TV3電性連接於電壓VGH的電壓源與開關T3的第一端之間，並用以根據電容C2的第二端上的電壓導通。開關TV4 電性連接於電壓VGL的電壓源與開關TO2的第一端之間，並用以根據節點P上的電壓導通。藉由如此設置，可防止控制電路CTC1中的漏電。 FIG. 14 is a schematic diagram of the control circuit CTC1 of the working circuit LVC (n) according to another embodiment of the present invention. In this embodiment, the control circuit CTC1 further includes switches TV1-TV4 and a capacitor CV1. In this embodiment, the switch TV1 is electrically connected between the voltage source of the voltage VDD and the switch TV2, and is configured to be turned on according to the voltage at the node B. The switch TV2 is electrically connected between the switch TV1 and the second terminal of the capacitor C2, and is used for the voltage VDD. The capacitor CV1 is electrically connected between the node B and the ground voltage. The switch TV3 is electrically connected between the voltage source of the voltage VGH and the first terminal of the switch T3, and is configured to be turned on according to the voltage on the second terminal of the capacitor C2. Switch TV4 It is electrically connected between the voltage source of the voltage VGL and the first terminal of the switch TO2, and is used for conducting according to the voltage at the node P. By doing so, it is possible to prevent current leakage in the control circuit CTC1.

應注意到，工作電路LVC(1)-工作電路LVC(X)中的其它者的控制電路CTC1亦可具有類似於工作電路LVC(n)的控制電路CTC1的設置，且工作電路LVC(1)-工作電路LVC(X)中的控制電路CTC2亦可具有類似於工作電路LVC(n)的控制電路CTC1的設置，然本案不以此為限。 It should be noted that the other control circuits CTC1 of the working circuit LVC (1) -working circuit LVC (X) may also have a setting similar to the control circuit CTC1 of the working circuit LVC (n), and the working circuit LVC (1) -The control circuit CTC2 in the working circuit LVC (X) may also have a setting similar to the control circuit CTC1 of the working circuit LVC (n), but this case is not limited thereto.

雖然本發明已以實施例揭露如上，然其並非用以限定本發明，任何熟習此技藝者，在不脫離本發明之精神和範圍內，當可作各種之更動與潤飾，因此本發明之保護範圍當視後附之申請專利範圍所界定者為準。 Although the present invention has been disclosed as above by way of example, it is not intended to limit the present invention. Any person skilled in the art can make various modifications and retouches without departing from the spirit and scope of the present invention. Therefore, the protection of the present invention The scope shall be determined by the scope of the attached patent application.

Claims (12)

一種電壓提供電路，包括：一輸出電路；以及一第一控制電路，電性連接該輸出電路，用以提供具有一第一電壓位準的一第一控制電壓至該輸出電路，以令該輸出電路據以輸出一第一供應電壓，其中該第一控制電路包括：一輸出模組，包括一輸出端；及一控制模組，用以根據一第一時脈訊號，提供一第一操作電壓至一第一操作節點，以令該輸出模組根據該第一操作節點上的該第一操作電壓，提供具有該第一電壓位準的該第一控制電壓至該輸出端，且其中該控制模組更用以根據一掃描訊號，提供一第一工作電壓至一第一工作節點，以令該輸出模組根據該第一工作節點上的該第一工作電壓，提供具有一第二電壓位準的該第一控制電壓至該輸出端。A voltage supply circuit includes: an output circuit; and a first control circuit electrically connected to the output circuit to provide a first control voltage with a first voltage level to the output circuit so that the output The circuit outputs a first supply voltage, wherein the first control circuit includes: an output module including an output terminal; and a control module for providing a first operating voltage according to a first clock signal To a first operation node, so that the output module provides the first control voltage having the first voltage level to the output terminal according to the first operation voltage on the first operation node, and wherein the control The module is further configured to provide a first working voltage to a first working node according to a scanning signal, so that the output module provides a second voltage bit according to the first working voltage on the first working node. To the output terminal. 如請求項1所述之電壓提供電路，其中該控制模組更用以相應於一第二時脈訊號，改變該第一操作節點上的該第一操作電壓，以令該輸出模組根據該第一操作節點上改變後的該第一操作電壓，維持該輸出端上的該第一控制電壓。The voltage supply circuit according to claim 1, wherein the control module is further configured to change the first operating voltage on the first operating node corresponding to a second clock signal, so that the output module is The changed first operating voltage on the first operating node maintains the first control voltage on the output terminal. 如請求項1所述之電壓提供電路，其中該控制模組更用以根據該第一工作節點上的該第一工作電壓，提供一第二操作電壓至該第一操作節點。The voltage supply circuit according to claim 1, wherein the control module is further configured to provide a second operating voltage to the first operating node according to the first operating voltage on the first operating node. 如請求項1所述之電壓提供電路，其中該控制模組更用以根據該第一操作節點上的該第一操作電壓，提供一第二工作電壓至該第一工作節點。The voltage supply circuit according to claim 1, wherein the control module is further configured to provide a second operating voltage to the first operating node according to the first operating voltage on the first operating node. 如請求項1所述之電壓提供電路，更包括：一第二控制電路，電性連接該輸出電路，用以根據該第一時脈訊號，提供一第三操作電壓至一第二操作節點，並根據該第二操作節點上的該第三操作電壓，提供具有該第一電壓位準的一第三控制電壓至該輸出電路，以令該輸出電路據以輸出一第二供應電壓，其中該第二供應電壓的電壓位準不同於該第一供應電壓的電壓位準。The voltage supply circuit according to claim 1, further comprising: a second control circuit electrically connected to the output circuit for providing a third operating voltage to a second operating node according to the first clock signal, And providing a third control voltage having the first voltage level to the output circuit according to the third operating voltage on the second operation node, so that the output circuit outputs a second supply voltage accordingly, wherein the The voltage level of the second supply voltage is different from the voltage level of the first supply voltage. 如請求項5所述之電壓提供電路，其中該控制模組更用以根據該第二操作節點上的該第三操作電壓，提供該第一工作電壓至該第一工作節點。The voltage supply circuit according to claim 5, wherein the control module is further configured to provide the first operating voltage to the first operating node according to the third operating voltage on the second operating node. 如請求項1所述之電壓提供電路，更包括：一掃描訊號提供電路，電性連接該輸出電路，用以提供該掃描訊號至該輸出電路，以令該輸出電路據以輸出一第三供應電壓，其中該第三供應電壓的電壓位準不同於該第一供應電壓的電壓位準。The voltage supply circuit according to claim 1, further comprising: a scanning signal providing circuit electrically connected to the output circuit for providing the scanning signal to the output circuit, so that the output circuit outputs a third supply accordingly. Voltage, wherein a voltage level of the third supply voltage is different from a voltage level of the first supply voltage. 如請求項1所述之電壓提供電路，其中該控制模組包括：一第一開關，用以根據該第一時脈訊號，提供該第一操作電壓至該第一操作節點；一第二開關，用以根據該掃描訊號，提供該第一工作電壓至該第一工作節點；一第三開關，用以根據該第一工作節點上的該第一工作電壓，提供一第二操作電壓至該第一操作節點；以及一第四開關，用以根據該第一操作節點上的該第一操作電壓，提供一第二工作電壓至該第一工作節點。The voltage supply circuit according to claim 1, wherein the control module includes: a first switch for providing the first operating voltage to the first operating node according to the first clock signal; a second switch For providing the first working voltage to the first working node according to the scanning signal; and a third switch for providing a second operating voltage to the first working voltage according to the first working voltage on the first working node A first operating node; and a fourth switch for providing a second operating voltage to the first operating node according to the first operating voltage on the first operating node. 如請求項8所述之電壓提供電路，其中該控制模組更包括：一第五開關，用以根據一第二操作節點上的一第三操作電壓，提供該第一工作電壓至該第一工作節點。The voltage supply circuit according to claim 8, wherein the control module further includes: a fifth switch for providing the first operating voltage to the first according to a third operating voltage on a second operating node. Working node. 如請求項1所述之電壓提供電路，其中該控制模組包括：一操作電容，其中該操作電容的一第一端用以接收一第二時脈訊號，該操作電容的一第二端電性連接該第一操作節點，且該操作電容用以令該第一操作節點上的該第一操作電壓相應於該第二時脈訊號改變。The voltage supply circuit according to claim 1, wherein the control module includes: an operating capacitor, wherein a first terminal of the operating capacitor is used to receive a second clock signal, and a second terminal of the operating capacitor is electrically The first operation node is electrically connected, and the operation capacitor is used to make the first operation voltage on the first operation node change corresponding to the second clock signal. 一種電壓提供電路，包括：一輸出電路；一第一控制電路，電性連接該輸出電路，用以相應於一掃描訊號，選擇性地提供一第一控制電壓至該輸出電路，以令該輸出電路據以輸出一第一供應電壓；一第二控制電路，電性連接該輸出電路，用以相應於該掃描訊號，選擇性地提供一第二控制電壓至該輸出電路，以令該輸出電路據以輸出一第二供應電壓；以及一掃描訊號提供電路，電性連接該輸出電路，用以提供該掃描訊號至該輸出電路，以令該輸出電路據以輸出一第三供應電壓；其中該第一供應電壓、該第二供應電壓、及該第三供應電壓的電壓位準彼此不同，且其中該輸出電路於輸出該第一供應電壓及該第二供應電壓之間輸出該第三供應電壓。A voltage supply circuit includes: an output circuit; a first control circuit electrically connected to the output circuit for selectively providing a first control voltage to the output circuit corresponding to a scanning signal, so that the output The circuit outputs a first supply voltage; a second control circuit is electrically connected to the output circuit for selectively providing a second control voltage to the output circuit corresponding to the scanning signal, so that the output circuit A second supply voltage is outputted according to this; and a scanning signal providing circuit is electrically connected to the output circuit for providing the scanning signal to the output circuit so that the output circuit outputs a third supply voltage accordingly; The voltage levels of the first supply voltage, the second supply voltage, and the third supply voltage are different from each other, and the output circuit outputs the third supply voltage between outputting the first supply voltage and the second supply voltage. . 一種控制電路，包括：一第一輸出開關，其中該第一輸出開關的一第一端用以接收具有一第一電壓位準的一第一控制電壓，該第一輸出開關的一第二端電性連接一輸出端，且該第一輸出開關的一控制端電性連接一第一操作節點；一第二輸出開關，其中該第二輸出開關的一第一端用以接收具有一第二電壓位準的該第一控制電壓，該第二輸出開關的一第二端電性連接該輸出端，且該第二輸出開關的一控制端電性連接一第一工作節點；一第一開關，其中該第一開關的一第一端用以接收一第一操作電壓，該第一開關的一第二端電性連接該第一操作節點，且該第一開關的一控制端用以接收一第一時脈訊號；一第二開關，其中該第二開關的一第一端用以接收一第一工作電壓，該第二開關的一第二端電性連接該第一工作節點，且該第二開關的一控制端用以接收一掃描訊號；一第三開關，其中該第三開關的一第一端用以接收一第二操作電壓，該第三開關的一第二端電性連接該第一操作節點，且該第二開關的一控制端電性連接該第一工作節點；一第四開關，其中該第四開關的一第一端用以接收一第二工作電壓，該第四開關的一第二端電性連接該第一工作節點，且該第四開關的一控制端電性連接該第一操作節點；以及一操作電容，其中該操作電容的一第一端用以接收該第二時脈訊號，該操作電容的一第二端電性連接一第一操作節點，其中該第二時脈訊號與該第一時脈訊號的週期彼此相同且相位彼此不同。A control circuit includes a first output switch, wherein a first terminal of the first output switch is used to receive a first control voltage having a first voltage level, and a second terminal of the first output switch An output end is electrically connected, and a control end of the first output switch is electrically connected to a first operation node; a second output switch, wherein a first end of the second output switch is used to receive a second output switch; The first control voltage of the voltage level, a second terminal of the second output switch is electrically connected to the output terminal, and a control terminal of the second output switch is electrically connected to a first working node; a first switch Wherein a first terminal of the first switch is used to receive a first operating voltage, a second terminal of the first switch is electrically connected to the first operating node, and a control terminal of the first switch is used to receive A first clock signal; a second switch, wherein a first end of the second switch is used to receive a first working voltage, a second end of the second switch is electrically connected to the first working node, and A control terminal of the second switch is used for receiving a A signal; a third switch, wherein a first end of the third switch is used to receive a second operating voltage, a second end of the third switch is electrically connected to the first operating node, and the second switch A control end of the fourth switch is electrically connected to the first working node; a fourth switch, wherein a first end of the fourth switch is used to receive a second working voltage, and a second end of the fourth switch is electrically connected to the first working node; A first working node, and a control terminal of the fourth switch is electrically connected to the first operating node; and an operating capacitor, wherein a first terminal of the operating capacitor is used to receive the second clock signal, and the operating capacitor A second terminal of is electrically connected to a first operating node, wherein the periods of the second clock signal and the first clock signal are the same as each other and their phases are different from each other.
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Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20060145978A1 (en) * 2004-12-15 2006-07-06 Nec Corporation Liquid crystal display apparatus, driving method for same, and driving circuit for same
US20100321365A1 (en) * 2009-06-18 2010-12-23 Au Optronics Corp. Display panels
US20110298771A1 (en) * 2010-06-03 2011-12-08 Hydis Technologies Co., Ltd. Display Driving Circuit

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2697296B2 (en) * 1990-11-19 1998-01-14 株式会社デンソー Liquid crystal display
JPH06289817A (en) * 1993-04-01 1994-10-18 Sharp Corp Method and circuit for driving display device
CN100414594C (en) * 2005-04-07 2008-08-27 友达光电股份有限公司 Gamma voltage generator liquid crystal display and control method for liquid crystal device
US7283603B1 (en) * 2006-04-07 2007-10-16 Au Optronics Corporation Shift register with four phase clocks
TWI448885B (en) * 2011-12-13 2014-08-11 Au Optronics Corp Common voltage supply circuit of display, method of supplying common voltage and liquied crystal display thereof

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20060145978A1 (en) * 2004-12-15 2006-07-06 Nec Corporation Liquid crystal display apparatus, driving method for same, and driving circuit for same
US20100321365A1 (en) * 2009-06-18 2010-12-23 Au Optronics Corp. Display panels
US20110298771A1 (en) * 2010-06-03 2011-12-08 Hydis Technologies Co., Ltd. Display Driving Circuit

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