TWI581150B - Touch display device - Google Patents

Touch display device Download PDF

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TWI581150B
TWI581150B TW104139870A TW104139870A TWI581150B TW I581150 B TWI581150 B TW I581150B TW 104139870 A TW104139870 A TW 104139870A TW 104139870 A TW104139870 A TW 104139870A TW I581150 B TWI581150 B TW I581150B
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insulating layer
substrate
disposed
electrode
layer
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TW104139870A
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Chinese (zh)
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TW201643644A (en
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陳宏昆
呂璨朱
蔡居宏
周協利
高毓謙
宋立偉
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群創光電股份有限公司
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Priority to US15/161,070 priority Critical patent/US20160357291A1/en
Publication of TW201643644A publication Critical patent/TW201643644A/en
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Publication of TWI581150B publication Critical patent/TWI581150B/en

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    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/01—Input arrangements or combined input and output arrangements for interaction between user and computer
    • G06F3/03—Arrangements for converting the position or the displacement of a member into a coded form
    • G06F3/041—Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means
    • G06F3/0412—Digitisers structurally integrated in a display
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362—Active matrix addressed cells
    • G02F1/136286—Wiring, e.g. gate line, drain line
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333—Constructional arrangements; Manufacturing methods
    • G02F1/13338—Input devices, e.g. touch panels
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362—Active matrix addressed cells
    • G02F1/1368—Active matrix addressed cells in which the switching element is a three-electrode device
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2203/00—Indexing scheme relating to G06F3/00 - G06F3/048
    • G06F2203/041—Indexing scheme relating to G06F3/041 - G06F3/045
    • G06F2203/04103—Manufacturing, i.e. details related to manufacturing processes specially suited for touch sensitive devices

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  • Physics & Mathematics (AREA)
  • Nonlinear Science (AREA)
  • Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Mathematical Physics (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Chemical & Material Sciences (AREA)
  • Optics & Photonics (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • General Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Human Computer Interaction (AREA)
  • Devices For Indicating Variable Information By Combining Individual Elements (AREA)
  • Liquid Crystal (AREA)

Description

觸控顯示裝置 Touch display device

本揭露實施例係有關於顯示裝置，且特別係有關於一種內嵌式觸控的顯示裝置。 The disclosed embodiments relate to display devices, and in particular to a display device with an in-cell touch.

隨著科技不斷的進步，使得各種資訊設備不斷地推陳出新，例如手機、平板電腦、超輕薄筆電、及衛星導航等。除了一般以鍵盤或滑鼠輸入或操控之外，利用觸控式技術來操控資訊設備是一種相當直覺且受歡迎的操控方式。其中，觸控顯示裝置具有人性化及直覺化的輸入操作介面，使得任何年齡層的使用者都可直接以手指或觸控筆選取或操控資訊設備。 With the continuous advancement of technology, various information devices are constantly being introduced, such as mobile phones, tablet computers, ultra-thin notebooks, and satellite navigation. In addition to keyboard or mouse input or manipulation, the use of touch technology to manipulate information devices is a fairly intuitive and popular way to manipulate. Among them, the touch display device has a user-friendly and intuitive input operation interface, so that users of any age can directly select or manipulate the information device with a finger or a stylus.

其中一種觸控顯示裝置是於顯示面板(例如液晶顯示面板)內設置感測電極之內嵌式觸控(in cell touch)顯示裝置。然而，而目前的內嵌式觸控顯示裝置並非各方面皆令人滿意。 One of the touch display devices is an in-cell touch display device in which a sensing electrode is disposed in a display panel (for example, a liquid crystal display panel). However, the current in-cell touch display device is not satisfactory in all aspects.

因此，業界仍須一種可更進一步提升顯示品質之顯示裝置。 Therefore, the industry still needs a display device that can further improve display quality.

本揭露實施例提供一種觸控顯示裝置，包括：第一基板，具有至少一畫素單元，畫素單元包含非遮光區及遮光區且 包含：電晶體，設於第一基板上；第一絕緣層，設於第一基板且位於電晶體上；觸控訊號線，設於第一絕緣層上；第二絕緣層，設於第一絕緣層上與觸控訊號線上，其中第二絕緣層具有凹口對應非遮光區；及第一電極，設於第二絕緣層上及凹口中；第二基板，相對第一基板設置；以及顯示介質，設於第一基板與第二基板之間。 The embodiment of the present disclosure provides a touch display device including: a first substrate having at least one pixel unit, wherein the pixel unit includes a non-light-shielding region and a light-shielding region and The method includes a transistor disposed on the first substrate, a first insulating layer disposed on the first substrate and located on the transistor, a touch signal line disposed on the first insulating layer, and a second insulating layer disposed on the first substrate On the insulating layer and the touch signal line, wherein the second insulating layer has a recess corresponding to the non-light-shielding region; and the first electrode is disposed on the second insulating layer and the recess; the second substrate is disposed relative to the first substrate; and the display The medium is disposed between the first substrate and the second substrate.

本揭露實施例更提供一種觸控顯示裝置，包括：第一基板，具有至少一畫素單元，畫素單元包含非遮光區及遮光區且包含：電晶體，設於第一基板上；第一絕緣層，設於第一基板且位於電晶體上；第一電極，設於第一絕緣層上；第二絕緣層，設於第一絕緣層上與第一電極上；觸控訊號線，設於第二絕緣層上；第三絕緣層，設於第二絕緣層上且覆蓋觸控訊號線，其中第三絕緣層具有對應非遮光區的第一凹口；及第二電極，設於第三絕緣層上及第一凹口中；第二基板，相對第一基板設置；以及顯示介質，設於第一基板與第二基板之間。 The present disclosure further provides a touch display device, including: a first substrate having at least one pixel unit, the pixel unit including a non-light-shielding region and a light-shielding region, and comprising: a transistor disposed on the first substrate; An insulating layer is disposed on the first substrate and disposed on the transistor; the first electrode is disposed on the first insulating layer; the second insulating layer is disposed on the first insulating layer and the first electrode; and the touch signal line is disposed The second insulating layer is disposed on the second insulating layer and covers the touch signal line, wherein the third insulating layer has a first recess corresponding to the non-light-shielding region; and the second electrode is disposed on the second insulating layer And a first substrate disposed on the third insulating layer; the second substrate is disposed opposite to the first substrate; and the display medium is disposed between the first substrate and the second substrate.

為讓本揭露之特徵、和優點能更明顯易懂，下文特舉出較佳實施例，並配合所附圖式，作詳細說明如下。 In order to make the features and advantages of the present disclosure more comprehensible, the preferred embodiments are described below, and are described in detail below with reference to the accompanying drawings.

100‧‧‧顯示裝置 100‧‧‧ display device

102‧‧‧基板 102‧‧‧Substrate

104‧‧‧閘極線 104‧‧‧ gate line

105‧‧‧開口區 105‧‧‧Open area

106‧‧‧資料線 106‧‧‧Information line

108‧‧‧畫素單元 108‧‧‧ pixel unit

110‧‧‧電晶體 110‧‧‧Optoelectronics

112‧‧‧汲極電極 112‧‧‧汲electrode

114‧‧‧源極電極 114‧‧‧Source electrode

114S‧‧‧表面 114S‧‧‧ surface

116‧‧‧通道區 116‧‧‧Channel area

118‧‧‧閘極電極 118‧‧‧gate electrode

120‧‧‧觸控訊號線 120‧‧‧Touch signal line

120S‧‧‧上表面 120S‧‧‧ upper surface

121A‧‧‧非遮光區 121A‧‧‧Non-light-shielded area

121B‧‧‧遮光區 121B‧‧‧ shading area

122‧‧‧第一基板 122‧‧‧First substrate

124‧‧‧閘極介電層 124‧‧‧ gate dielectric layer

126‧‧‧半導體層 126‧‧‧Semiconductor layer

128‧‧‧第一絕緣層 128‧‧‧First insulation

130‧‧‧第二絕緣層 130‧‧‧Second insulation

130S‧‧‧上表面 130S‧‧‧ upper surface

132‧‧‧開口 132‧‧‧ openings

134‧‧‧畫素電極 134‧‧‧ pixel electrodes

136‧‧‧襯層 136‧‧‧ lining

138‧‧‧第三絕緣層 138‧‧‧ Third insulation layer

138S‧‧‧上表面 138S‧‧‧ upper surface

140‧‧‧凹口 140‧‧‧ notch

142‧‧‧開口 142‧‧‧ openings

144‧‧‧共同電極 144‧‧‧Common electrode

146‧‧‧第二基板 146‧‧‧second substrate

148‧‧‧顯示介質 148‧‧‧Display media

150‧‧‧基板 150‧‧‧Substrate

152‧‧‧遮光層 152‧‧‧Lighting layer

154‧‧‧彩色濾光層 154‧‧‧Color filter layer

156‧‧‧保護層 156‧‧‧Protective layer

158‧‧‧間隔物 158‧‧‧ spacers

160‧‧‧襯層 160‧‧‧ lining

162‧‧‧開口 162‧‧‧ openings

164‧‧‧第四絕緣層 164‧‧‧fourth insulation layer

164S‧‧‧上表面 164S‧‧‧ upper surface

166‧‧‧開口 166‧‧‧ openings

168‧‧‧凹口 168‧‧‧ notch

200‧‧‧顯示裝置 200‧‧‧ display device

300A‧‧‧顯示裝置 300A‧‧‧ display device

300B‧‧‧顯示裝置 300B‧‧‧ display device

A1‧‧‧方向 A1‧‧ Direction

A2‧‧‧方向 A2‧‧‧ direction

T1‧‧‧厚度 T1‧‧‧ thickness

T2‧‧‧厚度 T2‧‧‧ thickness

T3‧‧‧厚度 T3‧‧‧ thickness

T4‧‧‧厚度 T4‧‧‧ thickness

T5‧‧‧厚度 T5‧‧‧ thickness

2A-2A’‧‧‧線段 2A-2A’‧‧‧ Segment

2B-2B’‧‧‧線段 2B-2B’‧‧‧ segment

1B‧‧‧區域 1B‧‧‧Area

D1‧‧‧第一距離 D1‧‧‧First distance

D2‧‧‧第二距離 D2‧‧‧Second distance

第1A圖係本揭露實施例之觸控顯示裝置之上視圖。 FIG. 1A is a top view of a touch display device according to an embodiment of the present disclosure.

第1B圖係第1A圖之區域1B之部分放大圖。 Fig. 1B is a partial enlarged view of a region 1B of Fig. 1A.

第2A圖係沿著第1A-1B圖之線段2A-2A’所繪製之剖面圖。 Fig. 2A is a cross-sectional view taken along line 2A-2A' of Fig. 1A-1B.

第2B圖係沿著第1A-1B圖之線段2B-2B’所繪製之剖面圖。 Fig. 2B is a cross-sectional view taken along line 2B-2B' of Fig. 1A-1B.

第2C圖係本揭露另一實施例沿著第1A-1B圖之線段2A-2A’所繪製之剖面圖。 Fig. 2C is a cross-sectional view of another embodiment taken along line 2A-2A' of Fig. 1A-1B.

第3A圖係本揭露另一實施例沿著第1A-1B圖之線段2A-2A’所繪製之剖面圖。 Fig. 3A is a cross-sectional view of another embodiment taken along line 2A-2A' of Fig. 1A-1B.

第3B圖係本揭露另一實施例沿著第1A-1B圖之線段2B-2B’所繪製之剖面圖。 Fig. 3B is a cross-sectional view of another embodiment taken along line 2B-2B' of Fig. 1A-1B.

第3C圖係本揭露另一實施例沿著第1A-1B圖之線段2B-2B’所繪製之剖面圖。 Figure 3C is a cross-sectional view of another embodiment taken along line 2B-2B' of Figure 1A-1B.

以下針對本揭露實施例之觸控顯示裝置作詳細說明。應了解的是，以下之敘述提供許多不同的實施例或例子，用以實施本揭露實施例之不同樣態。以下所述特定的元件及排列方式僅為簡單清楚描述本揭露實施例。當然，這些僅用以舉例而非本揭露實施例之限定。此外，在不同實施例中可能使用重複的標號或標示。這些重複僅為了簡單清楚地敘述本揭露實施例，不代表所討論之不同實施例及/或結構之間具有任何關連性。再者，當述及一第一材料層位於一第二材料層上或之上時，包括第一材料層與第二材料層直接接觸之情形。或者，亦可能間隔有一或更多其它材料層之情形，在此情形中，第一材料層與第二材料層之間可能不直接接觸。 The touch display device of the embodiment of the present disclosure will be described in detail below. It will be appreciated that the following description provides many different embodiments or examples for implementing the various embodiments of the disclosed embodiments. The specific elements and arrangements described below are merely illustrative of the present disclosure. Of course, these are only examples and are not intended to limit the embodiments. Moreover, repeated numbers or labels may be used in different embodiments. These repetitions are only for the purpose of simplicity and clarity of the present disclosure and are not to be construed as a limitation of the various embodiments and/or structures discussed. Furthermore, when a first material layer is on or above a second material layer, the first material layer is in direct contact with the second material layer. Alternatively, it is also possible to have one or more layers of other materials interposed, in which case there may be no direct contact between the first layer of material and the second layer of material.

必需了解的是，圖式之元件或裝置可以此技術人士所熟知之各種形式存在。此外，當某層在其它層或基板「上」時， 有可能是指「直接」在其它層或基板上，或指某層在其它層或基板上，或指其它層或基板之間夾設其它層。 It must be understood that the elements or devices of the drawings may be in various forms well known to those skilled in the art. In addition, when a layer is "on" another layer or substrate, It is possible to refer to "directly" on other layers or substrates, or to refer to a layer on another layer or substrate, or to sandwich other layers between other layers or substrates.

此外，實施例中可能使用相對性的用語，例如「較低」或「底部」及「較高」或「頂部」，以描述圖式的一個元件對於另一元件的相對關係。能理解的是，如果將圖式的裝置翻轉使其上下顛倒，則所敘述在「較低」側的元件將會成為在「較高」側的元件。 In addition, relative terms such as "lower" or "bottom" and "higher" or "top" may be used in the embodiments to describe the relative relationship of one element of the drawing to another. It will be understood that if the device of the drawing is flipped upside down, the component described on the "lower" side will become the component on the "higher" side.

在此，「約」、「大約」、「大抵」之用語通常表示在一給定值或範圍的20%之內，較佳是10%之內，且更佳是5%之內，或3%之內，或2%之內，或1%之內，或0.5%之內。在此給定的數量為大約的數量，亦即在沒有特定說明「約」、「大約」、「大抵」的情況下，仍可隱含「約」、「大約」、「大抵」之含義。 Here, the terms "about", "about" and "major" generally mean within 20% of a given value or range, preferably within 10%, and more preferably within 5%, or 3 Within %, or within 2%, or within 1%, or within 0.5%. The quantity given here is an approximate quantity, that is, in the absence of specific descriptions of "about", "about" and "major", the meanings of "about", "about" and "major" may still be implied.

能理解的是，雖然在此可使用用語「第一」、「第二」、「第三」等來敘述各種元件、組成成分、區域、層、及/或部分，這些元件、組成成分、區域、層、及/或部分不應被這些用語限定，且這些用語僅是用來區別不同的元件、組成成分、區域、層、及/或部分。因此，以下討論的一第一元件、組成成分、區域、層、及/或部分可在不偏離本揭露之教示的情況下被稱為一第二元件、組成成分、區域、層、及/或部分。 It will be understood that the terms "first", "second", "third", etc. may be used herein to describe various elements, components, regions, layers, and/or portions, such elements, components, and regions. The layers, and/or portions are not to be limited by the terms, and the terms are used to distinguish different elements, components, regions, layers, and/or parts. Therefore, a first element, component, region, layer, and/or portion discussed below may be referred to as a second element, component, region, layer, and/or without departing from the teachings of the disclosure. section.

除非另外定義，在此使用的全部用語(包括技術及科學用語)具有與此篇揭露所屬之一般技藝者所通常理解的相同涵義。能理解的是這些用語，例如在通常使用的字典中定義的用語，應被解讀成具有一與相關技術及本揭露的背景或上下文一致的意思，而不應以一理想化或過度正式的方式解讀，除非在此特別定 義。 Unless otherwise defined, all terms (including technical and scientific terms) used herein have the same meaning meaning It will be understood that these terms, such as those defined in commonly used dictionaries, should be interpreted as having a meaning consistent with the relevant art and the context or context of the present disclosure, and should not be in an idealized or overly formal manner. Interpretation, unless specifically defined here Righteousness.

本揭露實施例可配合圖式一併理解，本揭露之圖式亦被視為揭露說明之一部分。需了解的是，本揭露之圖式並未以實際裝置及元件之比例繪示。在圖式中可能誇大實施例的形狀與厚度以便清楚表現出本揭露之特徵。此外，圖式中之結構及裝置係以示意之方式繪示，以便清楚表現出本揭露之特徵。 The embodiments of the present disclosure can be understood in conjunction with the drawings, and the drawings of the present disclosure are also considered as part of the disclosure. It should be understood that the drawings of the present disclosure are not shown in the form of actual devices and components. The shapes and thicknesses of the embodiments may be exaggerated in the drawings in order to clearly illustrate the features of the present disclosure. In addition, the structures and devices in the drawings are schematically illustrated in order to clearly illustrate the features of the disclosure.

在本揭露中，相對性的用語例如「下」、「上」、「水平」、「垂直」、「之下」、「之上」、「頂部」、「底部」等等應被理解為該段以及相關圖式中所繪示的方位。此相對性的用語僅是為了方便說明之用，其並不代表其所敘述之裝置需以特定方位來製造或運作。而關於接合、連接之用語例如「連接」、「互連」等，除非特別定義，否則可指兩個結構係直接接觸，或者亦可指兩個結構並非直接接觸，其中有其它結構設於此兩個結構之間。且此關於接合、連接之用語亦可包括兩個結構都可移動，或者兩個結構都固定之情況。 In this disclosure, relative terms such as "lower", "upper", "horizontal", "vertical", "lower", "above", "top", "bottom", etc. shall be understood as The orientation shown in the paragraph and related schemas. This relative term is used for convenience of description only, and does not mean that the device described therein is to be manufactured or operated in a particular orientation. Terms such as "joining" and "interconnecting", etc., unless otherwise defined, may mean that two structures are in direct contact, or that two structures are not in direct contact, and other structures are provided here. Between the two structures. The term "joining and joining" may also include the case where both structures are movable or both structures are fixed.

應注意的是，在後文中「基板」一詞可包括透明基板上已形成的元件與覆蓋在基板上的各種膜層，其上方可以已形成任何所需的電晶體元件，不過此處為了簡化圖式，僅以平整的基板表示之。此外，「基板表面」係包括透明基板上最上方且暴露之膜層，例如一絕緣層及/或金屬線。 It should be noted that the term "substrate" may hereinafter include the formed elements on the transparent substrate and the various film layers overlying the substrate, and any desired transistor elements may have been formed thereon, but here to simplify The figure is shown only on a flat substrate. In addition, the "substrate surface" includes the uppermost and exposed film layer on the transparent substrate, such as an insulating layer and/or metal lines.

本揭露實施例係藉由縮短畫素電極與共同電極之間的距離，以增加畫素電極與共同電極之間的電容，並藉此提升裝置之顯示品質。 The disclosed embodiment increases the capacitance between the pixel electrode and the common electrode by shortening the distance between the pixel electrode and the common electrode, thereby improving the display quality of the device.

第1A-1B圖係本揭露實施例之顯示裝置100之基板 102之上視圖。如第1A-1B圖所示，基板102包括沿第一方向A1延伸之掃描線(閘極線)104，以及與此掃描線104交會之資料線106。易言之，此閘極線104係沿著方向A1延伸，而大抵垂直(perpendicular)或正交(orthogonal)此掃描線(閘極線)延伸方向A1之方向係為方向A2。此外，基板102更包括對應每一個畫素單元108(例如次畫素108)設置之薄膜電晶體110。此外，畫素單元108更包括一開口區105(對應後續非遮光區)。 1A-1B is a substrate of the display device 100 of the embodiment. View above 102. As shown in FIGS. 1A-1B, the substrate 102 includes a scan line (gate line) 104 extending in the first direction A1, and a data line 106 intersecting the scan line 104. In other words, the gate line 104 extends along the direction A1, and the direction perpendicular to the perpendicular or orthogonal direction of the scanning line (gate line) extending direction A1 is the direction A2. In addition, the substrate 102 further includes a thin film transistor 110 disposed corresponding to each of the pixel units 108 (eg, sub-pixels 108). In addition, the pixel unit 108 further includes an open area 105 (corresponding to a subsequent non-light-shielding area).

上述資料線106係透過薄膜電晶體110提供訊號至次畫素108，而此掃描線(閘極線)104係透過薄膜電晶體110提供掃描脈衝訊號至次畫素108，並配合上述訊號一同控制次畫素108。 The data line 106 provides a signal to the sub-pixel 108 through the thin film transistor 110, and the scan line (gate line) 104 provides a scan pulse signal to the sub-pixel 108 through the thin film transistor 110, and is controlled together with the signal. Secondary pixels 108.

上述薄膜電晶體110包括汲極電極112、源極電極114、設於汲極電極112與源極電極114之間的通道區116、以及閘極電極118。此閘極電極118係自掃描線104延第二方向A2延伸而出，而此汲極電極112則為資料線106之部分。 The thin film transistor 110 includes a drain electrode 112, a source electrode 114, a channel region 116 provided between the drain electrode 112 and the source electrode 114, and a gate electrode 118. The gate electrode 118 extends from the scan line 104 in the second direction A2, and the drain electrode 112 is part of the data line 106.

此外，基板102更包括一觸控訊號線120，此觸控訊號線120大抵與上述資料線106重疊設置。 In addition, the substrate 102 further includes a touch signal line 120, and the touch signal line 120 is disposed to overlap with the data line 106.

需注意的是，為清楚描述本揭露實施例，上述第1A-1B圖中並未繪示後續之畫素電極以及共同電極。 It should be noted that, in order to clearly describe the disclosed embodiment, the subsequent pixel electrodes and the common electrode are not shown in the above-mentioned 1A-1B.

第2A圖係本揭露實施例之顯示裝置100之剖面圖，該圖係沿著如第1A-1B圖之線段2A-2A’所繪製之剖面圖。第2B圖係沿著第1圖之線段2B-2B’所繪製之剖面圖。如第2B圖所示，基板102(或畫素單元108)具有一非遮光區121A(對應第1A圖之開口區105)及遮光區121B，非遮光區指遮光層與金屬未遮蔽處。此外，如第2A圖所示，基板102可包括一第一基板122，此第一基板122 可包括透明基板，例如為玻璃基板、陶瓷基板、塑膠基板或其它任何適合之基板。而薄膜電晶體110包括設於此第一基板122上之閘極電極118，以及設於閘極電極118及第一基板122上之閘極介電層124。 Fig. 2A is a cross-sectional view of the display device 100 of the present embodiment, which is a cross-sectional view taken along line 2A-2A' as shown in Figs. 1A-1B. Fig. 2B is a cross-sectional view taken along line 2B-2B' of Fig. 1. As shown in FIG. 2B, the substrate 102 (or the pixel unit 108) has a non-light-shielding region 121A (corresponding to the opening region 105 of FIG. 1A) and a light-shielding region 121B, and the non-light-shielding region refers to a light-shielding layer and a metal unshielded portion. In addition, as shown in FIG. 2A, the substrate 102 may include a first substrate 122, and the first substrate 122 A transparent substrate can be included, such as a glass substrate, a ceramic substrate, a plastic substrate, or any other suitable substrate. The thin film transistor 110 includes a gate electrode 118 disposed on the first substrate 122 and a gate dielectric layer 124 disposed on the gate electrode 118 and the first substrate 122.

此閘極電極118可為非晶矽、複晶矽、一或多種金屬、金屬氮化物、導電金屬氧化物、或上述之組合。上述金屬可包括但不限於鉬(molybdenum)、鎢(tungsten)、鈦(titanium)、鉭(tantalum)、鉑(platinum)或鉿(hafnium)。上述金屬氮化物可包括但不限於氮化鉬(molybdenum nitride)、氮化鎢(tungsten nitride)、氮化鈦(titanium nitride)以及氮化鉭(tantalum nitride)。上述導電金屬氧化物可包括但不限於釕金屬氧化物(ruthenium oxide)以及銦錫金屬氧化物(indium tin oxide)。此閘極電極118可藉由前述之化學氣相沉積法(CVD)、濺鍍法、電阻加熱蒸鍍法、電子束蒸鍍法、或其它任何適合的沈積方式形成，例如，在一實施例中，可用低壓化學氣相沈積法(LPCVD)在525~650℃之間沈積而製得非晶矽導電材料層或複晶矽導電材料層，其厚度範圍可為約1000Å至約10000Å。 The gate electrode 118 can be an amorphous germanium, a germanium germanium, one or more metals, a metal nitride, a conductive metal oxide, or a combination thereof. The above metals may include, but are not limited to, molybdenum, tungsten, titanium, tantalum, platinum or hafnium. The above metal nitrides may include, but are not limited to, molybdenum nitride, tungsten nitride, titanium nitride, and tantalum nitride. The above conductive metal oxide may include, but is not limited to, ruthenium oxide and indium tin oxide. The gate electrode 118 can be formed by the aforementioned chemical vapor deposition (CVD), sputtering, resistance heating evaporation, electron beam evaporation, or any other suitable deposition method, for example, in an embodiment. The amorphous germanium conductive material layer or the polycrystalline germanium conductive material layer may be deposited by low pressure chemical vapor deposition (LPCVD) at a temperature between 525 and 650 ° C, and may have a thickness ranging from about 1000 Å to about 10000 Å.

此閘極介電層124可為氧化矽、氮化矽、氮氧化矽、高介電常數(high-k)介電材料、或其它任何適合之介電材料、或上述之組合。此高介電常數(high-k)介電材料之材料可為金屬氧化物、金屬氮化物、金屬矽化物、過渡金屬氧化物、過渡金屬氮化物、過渡金屬矽化物、金屬的氮氧化物、金屬鋁酸鹽、鋯矽酸鹽、鋯鋁酸鹽。例如，此高介電常數(high-k)介電材料可為LaO、AlO、ZrO、TiO、Ta2O5、Y2O3、SrTiO3(STO)、BaTiO3(BTO)、BaZrO、 HfO2、HfO3、HfZrO、HfLaO、HfSiO、HfSiON、LaSiO、AlSiO、HfTaO、HfTiO、HfTaTiO、HfAlON、(Ba,Sr)TiO3(BST)、Al2O3、其它適當材料之其它高介電常數介電材料、或上述組合。此閘極介電層124可藉由化學氣相沉積法(CVD)或旋轉塗佈法形成，此化學氣相沉積法例如可為低壓化學氣相沉積法(low pressure chemical vapor deposition，LPCVD)、低溫化學氣相沉積法(low temperature chemical vapor deposition，LTCVD)、快速升溫化學氣相沉積法(rapid thermal chemical vapor deposition，RTCVD)、電漿輔助化學氣相沉積法(plasma enhanced chemical vapor deposition，PECVD)、原子層化學氣相沉積法之原子層沉積法(atomic layer deposition，ALD)或其它常用的方法。 The gate dielectric layer 124 can be hafnium oxide, tantalum nitride, hafnium oxynitride, a high-k dielectric material, or any other suitable dielectric material, or a combination thereof. The material of the high-k dielectric material may be a metal oxide, a metal nitride, a metal halide, a transition metal oxide, a transition metal nitride, a transition metal telluride, a metal oxynitride, Metal aluminate, zirconium silicate, zirconium aluminate. For example, the high-k dielectric material may be LaO, AlO, ZrO, TiO, Ta 2 O 5 , Y 2 O 3 , SrTiO 3 (STO), BaTiO 3 (BTO), BaZrO, HfO. 2 , HfO 3 , HfZrO, HfLaO, HfSiO, HfSiON, LaSiO, AlSiO, HfTaO, HfTiO, HfTaTiO, HfAlON, (Ba, Sr)TiO 3 (BST), Al 2 O 3 , other high dielectric constants of other suitable materials Dielectric material, or a combination of the above. The gate dielectric layer 124 can be formed by chemical vapor deposition (CVD) or spin coating. The chemical vapor deposition method can be, for example, low pressure chemical vapor deposition (LPCVD). Low temperature chemical vapor deposition (LTCVD), rapid thermal chemical vapor deposition (RTCVD), plasma enhanced chemical vapor deposition (PECVD) Atomic layer deposition (ALD) or other commonly used methods of atomic layer chemical vapor deposition.

薄膜電晶體110更包括設於閘極介電層124上之半導體層126，此半導體層126與閘極電極118重疊，且上述汲極電極112與源極電極114係分別設於半導體層126之兩側，且分別與半導體層126兩側之部分重疊。 The thin film transistor 110 further includes a semiconductor layer 126 disposed on the gate dielectric layer 124. The semiconductor layer 126 overlaps the gate electrode 118, and the gate electrode 112 and the source electrode 114 are respectively disposed on the semiconductor layer 126. Both sides overlap with portions of both sides of the semiconductor layer 126, respectively.

此半導體層126可包括元素半導體，包括矽、鍺(germanium)；化合物半導體，包括氮化鎵(gallium nitride，GaN)、碳化矽(silicon carbide)、砷化鎵(gallium arsenide)、磷化鎵(gallium phosphide)、磷化銦(indium phosphide)、砷化銦(indium arsenide)及/或銻化銦(indium antimonide)；合金半導體，包括矽鍺合金(SiGe)、磷砷鎵合金(GaAsP)、砷鋁銦合金(AlInAs)、砷鋁鎵合金(AlGaAs)、砷銦鎵合金(GaInAs)、磷銦鎵合金(GaInP)及/或磷砷銦鎵合金(GaInAsP)或上述材料之組合。 The semiconductor layer 126 may include an elemental semiconductor including germanium, germanium; a compound semiconductor including gallium nitride (GaN), silicon carbide, gallium arsenide, gallium phosphide ( Gallium phosphide, indium phosphide, indium arsenide and/or indium antimonide; alloy semiconductors including bismuth alloy (SiGe), phosphorus gallium arsenide (GaAsP), arsenic Aluminum indium alloy (AlInAs), arsenic aluminum gallium alloy (AlGaAs), arsenic gallium alloy (GaInAs), indium gallium alloy (GaInP) and/or phosphorus indium gallium alloy (GaInAsP) or a combination thereof.

上述汲極電極112與源極電極114之材料可包括銅、 鋁、鉬、鎢、金、鉻、鎳、鉑、鈦、銥、銠、上述之合金、上述之組合或其它導電性佳的金屬材料，例如可為鉬鋁鉬(Mo/Al/Mo)或鈦鋁鈦(Ti/Al/Ti)之三層結構。於其它實施例中，上述汲極電極112與源極電極114之材料可為一非金屬材料，只要使用之材料具有導電性即可。此汲極電極112與源極電極114之材料可藉由前述之化學氣相沉積法(CVD)、濺鍍法、電阻加熱蒸鍍法、電子束蒸鍍法、或其它任何適合的沉積方式形成。在一些實施例中，上述汲極電極112與源極電極114之材料可相同，且可藉由同一道沈積步驟形成。然而，在其它實施例中，上述汲極電極112與源極電極114亦可藉由不同之沈積步驟形成，且其材料可彼此不同。 The material of the above-mentioned drain electrode 112 and source electrode 114 may include copper, Aluminum, molybdenum, tungsten, gold, chromium, nickel, platinum, titanium, niobium, tantalum, alloys of the above, combinations thereof or other highly conductive metal materials, for example, molybdenum aluminum molybdenum (Mo/Al/Mo) or A three-layer structure of titanium aluminum titanium (Ti/Al/Ti). In other embodiments, the material of the above-mentioned drain electrode 112 and source electrode 114 may be a non-metal material as long as the material used has conductivity. The material of the drain electrode 112 and the source electrode 114 can be formed by the aforementioned chemical vapor deposition (CVD), sputtering, resistance heating evaporation, electron beam evaporation, or any other suitable deposition method. . In some embodiments, the material of the above-mentioned drain electrode 112 and source electrode 114 may be the same and may be formed by the same deposition step. However, in other embodiments, the above-described drain electrode 112 and source electrode 114 may also be formed by different deposition steps, and the materials thereof may be different from each other.

繼續參見第2A圖，基板102更包括覆蓋薄膜電晶體110與閘極介電層124之第一絕緣層128。此第一絕緣層128可為氮化矽、二氧化矽、或氮氧化矽。第一絕緣層128可藉由化學氣相沉積法(CVD)或旋轉塗佈法形成，此化學氣相沉積法例如可為低壓化學氣相沉積法(low pressure chemical vapor deposition，LPCVD)、低溫化學氣相沉積法(low temperature chemical vapor deposition，LTCVD)、快速升溫化學氣相沉積法(rapid thermal chemical vapor deposition，RTCVD)、電漿輔助化學氣相沉積法(plasma enhanced chemical vapor deposition，PECVD)、原子層化學氣相沉積法之原子層沉積法(atomic layer deposition，ALD)或其它常用的方法。 Continuing to refer to FIG. 2A, the substrate 102 further includes a first insulating layer 128 covering the thin film transistor 110 and the gate dielectric layer 124. The first insulating layer 128 may be tantalum nitride, hafnium oxide, or hafnium oxynitride. The first insulating layer 128 can be formed by chemical vapor deposition (CVD) or spin coating. The chemical vapor deposition method can be, for example, low pressure chemical vapor deposition (LPCVD), low temperature chemistry. Low temperature chemical vapor deposition (LTCVD), rapid thermal chemical vapor deposition (RTCVD), plasma enhanced chemical vapor deposition (PECVD), atom Atomic layer deposition (ALD) or other commonly used methods of layer chemical vapor deposition.

接著，此第一絕緣層128上可選擇性設有第二絕緣層130。此第二絕緣層130之材質可為有機之絕緣材料(光感性樹脂)或無機之絕緣材料(氮化矽、氧化矽、氮氧化矽、碳化矽、氧化鋁、 或上述材質之組合)。此外，可藉由兩次蝕刻步驟分別蝕刻上述第二絕緣層130與第一絕緣層128，以形成開口132。此開口132由第二絕緣層130之上表面130S向下延伸至源極電極114，並暴露出源極電極114之部分表面114S。易言之，此開口132露出電晶體110。 Then, a second insulating layer 130 is selectively disposed on the first insulating layer 128. The material of the second insulating layer 130 may be an organic insulating material (photosensitive resin) or an inorganic insulating material (tantalum nitride, cerium oxide, cerium oxynitride, tantalum carbide, aluminum oxide, Or a combination of the above materials). In addition, the second insulating layer 130 and the first insulating layer 128 may be separately etched by two etching steps to form the opening 132. The opening 132 extends downward from the upper surface 130S of the second insulating layer 130 to the source electrode 114 and exposes a portion of the surface 114S of the source electrode 114. In other words, the opening 132 exposes the transistor 110.

接著，上述觸控訊號線120係設於第二絕緣層130上。上述觸控訊號線120之材料可包括銅、鋁、鉬、鎢、金、鉻、鎳、鉑、鈦、銥、銠、上述之合金、上述之組合或其它導電性佳的金屬材料，例如可為鉬鋁鉬(Mo/Al/Mo)或鈦鋁鈦(Ti/Al/Ti)之三層結構。於其它實施例中，上述觸控訊號線120之材料可為一非金屬材料，只要使用之材料具有導電性即可。此觸控訊號線120之材料可藉由前述之化學氣相沉積法(CVD)、濺鍍法、電阻加熱蒸鍍法、電子束蒸鍍法、或其它任何適合的沉積方式形成。 Then, the touch signal line 120 is disposed on the second insulating layer 130. The material of the touch signal line 120 may include copper, aluminum, molybdenum, tungsten, gold, chromium, nickel, platinum, titanium, tantalum, niobium, the above alloy, the above combination or other conductive metal materials, for example, It is a three-layer structure of molybdenum aluminum molybdenum (Mo/Al/Mo) or titanium aluminum titanium (Ti/Al/Ti). In other embodiments, the material of the touch signal line 120 may be a non-metal material as long as the material used is electrically conductive. The material of the touch signal line 120 can be formed by the aforementioned chemical vapor deposition (CVD), sputtering, resistance heating evaporation, electron beam evaporation, or any other suitable deposition method.

繼續參見第2A-2B圖，顯示裝置100更包括畫素電極134，此畫素電極134延伸入開口132中並電性連接電晶體110。詳細而言，此畫素電極134係設於第二絕緣層130上(或第一絕緣層128上)、開口132之側壁上、及源極電極114之表面114S上，並電性連接源極電極114。此外，顯示裝置100更包括設於觸控訊號線120與第二絕緣層130(或第一絕緣層128)之間的襯層136。此襯層136與畫素電極134之材料可相同，且可藉由同一道沈積與微影蝕刻步驟形成。此襯層136與畫素電極134之材料可包括透明導電材料，例如為銦錫氧化物(ITO)、氧化錫(SnO)、氧化銦鋅(IZO)、氧化銦鎵鋅(IGZO)、氧化銦錫鋅(ITZO)、氧化銻錫(ATO)、氧化銻鋅(AZO)、上述之組合或其它任何適合之透明導電氧化物材料。 Continuing to refer to FIG. 2A-2B, the display device 100 further includes a pixel electrode 134 that extends into the opening 132 and is electrically connected to the transistor 110. In detail, the pixel electrode 134 is disposed on the second insulating layer 130 (or on the first insulating layer 128), on the sidewall of the opening 132, and on the surface 114S of the source electrode 114, and is electrically connected to the source. Electrode 114. In addition, the display device 100 further includes a liner 136 disposed between the touch signal line 120 and the second insulating layer 130 (or the first insulating layer 128). The lining 136 and the material of the pixel electrode 134 may be the same and may be formed by the same deposition and lithography etching step. The material of the lining layer 136 and the pixel electrode 134 may include a transparent conductive material such as indium tin oxide (ITO), tin oxide (SnO), indium zinc oxide (IZO), indium gallium zinc oxide (IGZO), indium oxide. Tin zinc (ITZO), antimony tin oxide (ATO), antimony zinc oxide (AZO), combinations of the foregoing or any other suitable transparent conductive oxide material.

繼續參見第2A圖，顯示裝置100更包括設於第二絕緣 層130上(或第一絕緣層128上)且覆蓋觸控訊號線120及畫素電極134之第三絕緣層138。而上述第二絕緣層130係設於第一絕緣層128與第三絕緣層138之間。此第三絕緣層138具有開口142，此開口142由第三絕緣層138之上表面138S向下延伸至觸控訊號線120之上表面120S。 Continuing to refer to FIG. 2A, the display device 100 further includes a second insulation. The layer 130 is on the first insulating layer 128 and covers the touch signal line 120 and the third insulating layer 138 of the pixel electrode 134. The second insulating layer 130 is disposed between the first insulating layer 128 and the third insulating layer 138. The third insulating layer 138 has an opening 142 extending downward from the upper surface 138S of the third insulating layer 138 to the upper surface 120S of the touch signal line 120.

此外，如第2B圖所示，第三絕緣層138於開口區105更具有凹口140，此凹口140大致對應非遮光區121A。在一些實施例中，此凹口140可藉由使用多灰階光罩形成。詳細而言，多灰階光罩可分為干涉型光罩(Gray Tone Mask)和半調式光罩(half tone mask)兩種。干涉型光罩是製作出曝光機解析度以下的微縫，再藉由此微縫部位遮住一部分的光源，以達成半曝光的效果。而半調式光罩是利用「半透明」的膜，來進行半曝光。因為以上兩種方式皆是在一次的曝光過程後即可呈現出「曝光部分半曝光部分」及「未曝光部分」之三種的曝光層次，故在顯影後能夠形成兩種厚度的光阻(感光劑。藉由利用這樣的光阻厚度差異，並配合後續蝕刻製程，即可於第三絕緣層138中形成上述凹口140。 Further, as shown in FIG. 2B, the third insulating layer 138 further has a notch 140 in the opening region 105, and the notch 140 substantially corresponds to the non-light-shielding region 121A. In some embodiments, the notch 140 can be formed by using a multi-gray reticle. In detail, the multi-gray mask can be divided into two types: a Gray Tone Mask and a Half Tone Mask. The interference type mask is a micro slit having a resolution lower than the exposure machine, and a part of the light source is blocked by the micro slit portion to achieve a half exposure effect. The half-tone mask uses a "translucent" film for half exposure. Because the above two methods are all exposed after the exposure process. Three kinds of exposure levels of the half-exposed part and the "unexposed part", so that two kinds of photoresists (sensitizers) can be formed after development. By utilizing such a difference in photoresist thickness and matching the subsequent etching process, The above-described notch 140 is formed in the third insulating layer 138.

此外，在其它實施例中，第三絕緣層138亦可由多層且蝕刻選擇比不同之絕緣層組成，並藉由兩次以上知微影蝕刻步驟形成上述凹口140。 In addition, in other embodiments, the third insulating layer 138 may also be composed of multiple layers and the etching selection is different than the insulating layer, and the notch 140 is formed by two or more lithography etching steps.

顯示裝置100更包括設於第三絕緣層138上且電性連接觸控訊號線120之共同電極144。詳細而言，共同電極144係設於第三絕緣層138上，並延伸至開口142之側壁上及觸控訊號線120之上表面120S上，以電性連接觸控訊號線120。此外，此共同電極144不但是作為觸控時的共同電極，亦是作為顯示裝置的感測電 極。 The display device 100 further includes a common electrode 144 disposed on the third insulating layer 138 and electrically connected to the touch signal line 120. In detail, the common electrode 144 is disposed on the third insulating layer 138 and extends to the sidewall of the opening 142 and the upper surface 120S of the touch signal line 120 to electrically connect the touch signal line 120. In addition, the common electrode 144 is not only a common electrode when touched, but also a sensing power as a display device. pole.

此外，共同電極144更設於上述凹口140中。而如第2B圖所示，本揭露實施例將共同電極144設於凹口140中，可縮短畫素電極134與共同電極144之間的距離，以增加畫素電極134與共同電極144之間的電容，並藉此提升裝置之顯示品質。 Further, the common electrode 144 is further disposed in the above-described recess 140. As shown in FIG. 2B, the present embodiment provides the common electrode 144 in the recess 140 to shorten the distance between the pixel electrode 134 and the common electrode 144 to increase the pixel electrode 134 and the common electrode 144. The capacitance and thereby enhance the display quality of the device.

此外，繼續參見第2B圖，位於非遮光區121A(對應第1A圖之開口區105)中的第三絕緣層138於共同電極144與畫素電極134之間具有厚度T1，而位於遮光區121B中的第三絕緣層138具有厚度T2，且此厚度T1小於厚度T2。 In addition, referring to FIG. 2B, the third insulating layer 138 located in the non-light-shielding region 121A (corresponding to the opening region 105 of FIG. 1A) has a thickness T1 between the common electrode 144 and the pixel electrode 134, and is located in the light-shielding region 121B. The third insulating layer 138 has a thickness T2, and the thickness T1 is smaller than the thickness T2.

如第2B圖所示，本揭露實施例藉由使厚度T1小於厚度T2，可縮短畫素電極134與共同電極144之間的距離，以增加畫素電極134與共同電極144之間的電容，並藉此提升裝置之顯示品質。 As shown in FIG. 2B, the embodiment of the present disclosure can shorten the distance between the pixel electrode 134 and the common electrode 144 by increasing the thickness T1 to be smaller than the thickness T2 to increase the capacitance between the pixel electrode 134 and the common electrode 144. And thereby improve the display quality of the device.

此外，在一些實施例中，在共同電極144未直接接觸觸控訊號線120處，第三絕緣層138於共同電極144與觸控訊號線120之間具有厚度T3，厚度T2與厚度T3相等。 In addition, in some embodiments, the third insulating layer 138 has a thickness T3 between the common electrode 144 and the touch signal line 120, and the thickness T2 is equal to the thickness T3, when the common electrode 144 is not directly in contact with the touch signal line 120.

本揭露實施例藉由使上述厚度T2等於厚度T3，使觸控訊號線120與共同電極144之間保持一固定距離，故可減少觸控訊號線120與共同電極144之間的耦合效應(coupling effect)，故可更進一步提升裝置的顯示品質。 In the embodiment, the thickness T2 is equal to the thickness T3, so that the touch signal line 120 and the common electrode 144 are kept at a fixed distance, so that the coupling effect between the touch signal line 120 and the common electrode 144 can be reduced (coupling) Effect), so that the display quality of the device can be further improved.

在一些實施例中，厚度T1為約1000±500Å，厚度T2為約2000Å至3000Å，而厚度T3為約2000Å至3000Å。 In some embodiments, the thickness T1 is about 1000 ± 500 Å, the thickness T2 is about 2000 Å to 3000 Å, and the thickness T3 is about 2000 Å to 3000 Å.

此外，繼續參見第2A-2B圖，顯示裝置100更包括相對基板102設置之第二基板146以及設於基板102與第二基板146之 間的顯示介質148。 In addition, referring to FIG. 2A-2B , the display device 100 further includes a second substrate 146 disposed opposite the substrate 102 and disposed on the substrate 102 and the second substrate 146 . Display medium 148.

上述顯示裝置100可為觸控液晶顯示器，例如為薄膜電晶體液晶顯示器。或者，此液晶顯示器可為扭轉向列(Twisted Nematic,TN)型液晶顯示器、超扭轉向列(Super Twisted Nematic,STN)型液晶顯示器、雙層超扭轉向列(Double layer Super Twisted Nematic,DSTN)型液晶顯示器、垂直配向(Vertical Alignment,VA)型液晶顯示器、水平電場效應(In-Plane Switching,IPS)型液晶顯示器、膽固醇(Cholesteric)型液晶顯示器、藍相(Blue Phase)型液晶顯示器、邊際電場效應(FFS)型液晶顯示器、或其它任何適合之液晶顯示器。 The display device 100 can be a touch liquid crystal display, such as a thin film transistor liquid crystal display. Alternatively, the liquid crystal display can be a Twisted Nematic (TN) type liquid crystal display, a Super Twisted Nematic (STN) type liquid crystal display, or a Double Layer Super Twisted Nematic (DSTN). Liquid crystal display, Vertical Alignment (VA) type liquid crystal display, In-Plane Switching (IPS) type liquid crystal display, Cholesteric type liquid crystal display, Blue Phase type liquid crystal display, margin An electric field effect (FFS) type liquid crystal display, or any other suitable liquid crystal display.

在一些實施例中，第二基板146為彩色濾光層基板。詳細而言，作為彩色濾光層基板之第二基板146可包括一基板150、設於此基板150上之遮光層152、設於此遮光層152及基板150上之彩色濾光層154、以及覆蓋遮光層152與彩色濾光層154之保護層156。 In some embodiments, the second substrate 146 is a color filter layer substrate. In detail, the second substrate 146 as a color filter layer substrate may include a substrate 150, a light shielding layer 152 disposed on the substrate 150, a color filter layer 154 disposed on the light shielding layer 152 and the substrate 150, and The protective layer 156 of the light shielding layer 152 and the color filter layer 154 is covered.

此外，在一些實施例中，基板102對應上述第二基板146之遮光層152的區域即為遮光區121B，而上述基板102之非遮光區121A係指顯示裝置100中次畫素108顯示的區域。 In addition, in some embodiments, the area of the substrate 102 corresponding to the light shielding layer 152 of the second substrate 146 is the light shielding area 121B, and the non-light shielding area 121A of the substrate 102 refers to the area displayed by the sub-pixel 108 in the display device 100. .

上述基板150可包括透明基板，例如可為玻璃基板、陶瓷基板、塑膠基板或其它任何適合之透明基板，上述遮光層152可包括黑色光阻、黑色印刷油墨、黑色樹脂。而上述彩色濾光層154可包括紅色濾光層、綠色濾光層、藍色濾光層、或其它任何適合之彩色濾光層。 The substrate 150 may include a transparent substrate, such as a glass substrate, a ceramic substrate, a plastic substrate, or any other suitable transparent substrate. The light shielding layer 152 may include a black photoresist, a black printing ink, and a black resin. The color filter layer 154 may include a red filter layer, a green filter layer, a blue filter layer, or any other suitable color filter layer.

顯示裝置100可更包括設於基板102與第二基板146 之間的間隔物158，此間隔物158為用以間隔基板102與第二基板146之主要結構，以防止顯示裝置100被按壓時基板102與第二基板146接觸。 The display device 100 can further include a substrate 102 and a second substrate 146. A spacer 158 is disposed between the substrate 102 and the second substrate 146 to prevent the substrate 102 from contacting the second substrate 146 when the display device 100 is pressed.

第2C圖係本揭露另一實施例之顯示裝置200之剖面圖。應注意的是，後文中與前文相同或相似的元件或膜層將以相同或相似之標號表示，其材料、製造方法與功能皆與前文所述相同或相似，故此部分在後文中將不再贅述。 2C is a cross-sectional view of a display device 200 according to another embodiment of the present disclosure. It should be noted that elements or layers that are the same or similar to those in the foregoing will be denoted by the same or similar reference numerals, and the materials, manufacturing methods and functions thereof are the same or similar to those described above, and therefore will not be described later. Narration.

第2C圖所示之實施例與前述第2A-2B圖之實施例之差別在於基板102更包括設於開口132中的畫素電極134之上之襯層160。此外，上述第三絕緣層138填入開口132，且襯層160係設於畫素電極134與第三絕緣層138之間。 The embodiment shown in FIG. 2C differs from the embodiment of the second embodiment A-2B in that the substrate 102 further includes a liner 160 disposed over the pixel electrode 134 in the opening 132. In addition, the third insulating layer 138 is filled in the opening 132, and the lining layer 160 is disposed between the pixel electrode 134 and the third insulating layer 138.

此襯層160之材料可包括銅、鋁、鉬、鎢、金、鉻、鎳、鉑、鈦、銥、銠、上述之合金、上述之組合或其它導電性佳的金屬材料，例如可為鉬鋁鉬(Mo/Al/Mo)或鈦鋁鈦(Ti/Al/Ti)之三層結構。於其它實施例中，上述襯層160之材料可為一非金屬材料，只要使用之材料具有導電性即可。此襯層160之材料可藉由前述之化學氣相沉積法(CVD)、濺鍍法、電阻加熱蒸鍍法、電子束蒸鍍法、或其它任何適合的沉積方式形成。在一些實施例中，上述觸控訊號線120與襯層160之材料可相同，且可藉由同一道沈積步驟形成。然而，在其它實施例中，上述觸控訊號線120與襯層160亦可藉由不同之沈積步驟形成，且其材料可彼此不同。 The material of the lining layer 160 may include copper, aluminum, molybdenum, tungsten, gold, chromium, nickel, platinum, titanium, niobium, tantalum, the above alloy, the above combination or other conductive metal materials, such as molybdenum. A three-layer structure of aluminum molybdenum (Mo/Al/Mo) or titanium aluminum titanium (Ti/Al/Ti). In other embodiments, the material of the lining layer 160 may be a non-metal material as long as the material used is electrically conductive. The material of the liner 160 can be formed by the aforementioned chemical vapor deposition (CVD), sputtering, resistance heating evaporation, electron beam evaporation, or any other suitable deposition method. In some embodiments, the touch signal line 120 and the liner 160 may be made of the same material and may be formed by the same deposition step. However, in other embodiments, the touch signal line 120 and the lining layer 160 may be formed by different deposition steps, and the materials thereof may be different from each other.

應注意的是，除上述第1A-2C圖所示之實施例以外，本揭露實施例之共同電極、畫素電極與觸控訊號線亦可有其它配置，如第3A圖之實施例所示。本揭露之範圍並不以第1A-2C圖所 示之實施例為限。此部分將於後文詳細說明。 It should be noted that, in addition to the embodiments shown in FIG. 1A-2C, the common electrode, the pixel electrode and the touch signal line of the embodiment of the present disclosure may have other configurations, as shown in the embodiment of FIG. 3A. . The scope of this disclosure is not in the form of Figure 1A-2C. The embodiment shown is limited. This section will be explained in detail later.

第3A圖係本揭露另一實施例之顯示裝置300A沿著第1圖之線段2A-2A’所繪製之剖面圖。第3B圖係本揭露另一實施例之顯示裝置300A沿著第1圖之線段2B-2B’所繪製之剖面圖。應注意的是，後文中與前文相同或相似的元件或膜層將以相同或相似之標號表示，其材料、製造方法與功能皆與前文所述相同或相似，故此部分在後文中將不再贅述。 Fig. 3A is a cross-sectional view of the display device 300A of another embodiment taken along the line segment 2A-2A' of Fig. 1. Fig. 3B is a cross-sectional view of the display device 300A of another embodiment taken along the line segment 2B-2B' of Fig. 1. It should be noted that elements or layers that are the same or similar to those in the foregoing will be denoted by the same or similar reference numerals, and the materials, manufacturing methods and functions thereof are the same or similar to those described above, and therefore will not be described later. Narration.

如第3B圖所示，基板102具有一非遮光區121A及遮光區121B。此外，基板102可包括一第一基板122，此第一基板122可包括透明基板，例如為玻璃基板、陶瓷基板、塑膠基板或其它任何適合之基板。而如第3A圖所示，薄膜電晶體110包括設於此第一基板122上之閘極電極118，以及設於閘極電極118及第一基板122上之閘極介電層124。 As shown in FIG. 3B, the substrate 102 has a non-light-shielding region 121A and a light-shielding region 121B. In addition, the substrate 102 can include a first substrate 122, which can include a transparent substrate, such as a glass substrate, a ceramic substrate, a plastic substrate, or any other suitable substrate. As shown in FIG. 3A, the thin film transistor 110 includes a gate electrode 118 disposed on the first substrate 122, and a gate dielectric layer 124 disposed on the gate electrode 118 and the first substrate 122.

薄膜電晶體110更包括設於閘極介電層124上之半導體層126，此半導體層126與閘極電極118重疊，且上述汲極電極112與源極電極114係分別設於半導體層126之兩側，且分別與半導體層126兩側之部分重疊。 The thin film transistor 110 further includes a semiconductor layer 126 disposed on the gate dielectric layer 124. The semiconductor layer 126 overlaps the gate electrode 118, and the gate electrode 112 and the source electrode 114 are respectively disposed on the semiconductor layer 126. Both sides overlap with portions of both sides of the semiconductor layer 126, respectively.

上述汲極電極112與源極電極114之材料可包括銅、鋁、鉬、鎢、金、鉻、鎳、鉑、鈦、銥、銠、上述之合金、上述之組合或其它導電性佳的金屬材料，例如可為鉬鋁鉬(Mo/Al/Mo)或鈦鋁鈦(Ti/Al/Ti)之三層結構。於其它實施例中，上述汲極電極112與源極電極114之材料可為一非金屬材料，只要使用之材料具有導電性即可。此汲極電極112與源極電極114之材料可藉由前述之化學氣相沉積法(CVD)、濺鍍法、電阻加熱蒸鍍法、電子束蒸 鍍法、或其它任何適合的沉積方式形成。在一些實施例中，上述汲極電極112與源極電極114之材料可相同，且可藉由同一道沈積步驟形成。然而，在其它實施例中，上述汲極電極112與源極電極114亦可藉由不同之沈積步驟形成，且其材料可彼此不同。 The material of the above-mentioned drain electrode 112 and source electrode 114 may include copper, aluminum, molybdenum, tungsten, gold, chromium, nickel, platinum, titanium, niobium, tantalum, the above alloy, the above combination or other conductive metal. The material may be, for example, a three-layer structure of molybdenum aluminum molybdenum (Mo/Al/Mo) or titanium aluminum titanium (Ti/Al/Ti). In other embodiments, the material of the above-mentioned drain electrode 112 and source electrode 114 may be a non-metal material as long as the material used has conductivity. The material of the drain electrode 112 and the source electrode 114 can be vapor deposited by the above-mentioned chemical vapor deposition (CVD), sputtering, resistance heating evaporation, or electron beam evaporation. Plating, or any other suitable deposition means. In some embodiments, the material of the above-mentioned drain electrode 112 and source electrode 114 may be the same and may be formed by the same deposition step. However, in other embodiments, the above-described drain electrode 112 and source electrode 114 may also be formed by different deposition steps, and the materials thereof may be different from each other.

繼續參見第3A圖，基板102更包括覆蓋薄膜電晶體110與閘極介電層124之第一絕緣層128。此第一絕緣層128可為氮化矽、二氧化矽、或氮氧化矽。第一絕緣層128可藉由化學氣相沉積法(CVD)或旋轉塗佈法形成，此化學氣相沉積法例如可為低壓化學氣相沉積法(low pressure chemical vapor deposition，LPCVD)、低溫化學氣相沉積法(low temperature chemical vapor deposition，LTCVD)、快速升溫化學氣相沉積法(rapid thermal chemical vapor deposition，RTCVD)、電漿輔助化學氣相沉積法(plasma enhanced chemical vapor deposition，PECVD)、原子層化學氣相沉積法之原子層沉積法(atomic layer deposition，ALD)或其它常用的方法。 Continuing to refer to FIG. 3A, the substrate 102 further includes a first insulating layer 128 covering the thin film transistor 110 and the gate dielectric layer 124. The first insulating layer 128 may be tantalum nitride, hafnium oxide, or hafnium oxynitride. The first insulating layer 128 can be formed by chemical vapor deposition (CVD) or spin coating. The chemical vapor deposition method can be, for example, low pressure chemical vapor deposition (LPCVD), low temperature chemistry. Low temperature chemical vapor deposition (LTCVD), rapid thermal chemical vapor deposition (RTCVD), plasma enhanced chemical vapor deposition (PECVD), atom Atomic layer deposition (ALD) or other commonly used methods of layer chemical vapor deposition.

接著，此第一絕緣層128上可選擇性設有第二絕緣層130。此第二絕緣層130之材質可為有機之絕緣材料(光感性樹脂)或無機之絕緣材料(氮化矽、氧化矽、氮氧化矽、碳化矽、氧化鋁、或上述材質之組合)。 Then, a second insulating layer 130 is selectively disposed on the first insulating layer 128. The material of the second insulating layer 130 may be an organic insulating material (photosensitive resin) or an inorganic insulating material (tantalum nitride, cerium oxide, cerium oxynitride, tantalum carbide, aluminum oxide, or a combination thereof).

繼續參見第3A-3B圖，基板102更包括設於第二絕緣層130上(或第一絕緣層128上)之共同電極144。此共同電極144可包括透明導電材料，例如為銦錫氧化物(ITO)、氧化錫(SnO)、氧化銦鋅(IZO)、氧化銦鎵鋅(IGZO)、氧化銦錫鋅(ITZO)、氧化銻錫(ATO)、氧化銻鋅(AZO)、上述之組合或其它任何適合之透明導電 氧化物材料。此外，此共同電極144不但是作為觸控時的共同電極，亦是作為顯示裝置的感測電極，其中，其觸控的驅動方式可為自電容驅動方式(self-capacitive type)。 Continuing to refer to FIGS. 3A-3B, the substrate 102 further includes a common electrode 144 disposed on the second insulating layer 130 (or on the first insulating layer 128). The common electrode 144 may include a transparent conductive material such as indium tin oxide (ITO), tin oxide (SnO), indium zinc oxide (IZO), indium gallium zinc oxide (IGZO), indium tin zinc oxide (ITZO), oxidation. A tin, AZO, combinations of the above or any other suitable transparent conductive Oxide material. In addition, the common electrode 144 is not only a common electrode when the touch is used, but also a sensing electrode of the display device. The driving mode of the touch can be a self-capacitive type.

繼續參見第3A-3B圖，顯示裝置300A更包括設於第二絕緣層130上(或第一絕緣層128上)且覆蓋共同電極144之第三絕緣層138。此第三絕緣層138可為氮化矽、二氧化矽、或氮氧化矽。而上述第二絕緣層130係設於第一絕緣層128與第三絕緣層138之間。此第三絕緣層138具有開口162，此開口162由第三絕緣層138之上表面138S向下延伸至共同電極144。 Continuing to refer to FIGS. 3A-3B, the display device 300A further includes a third insulating layer 138 disposed on the second insulating layer 130 (or on the first insulating layer 128) and covering the common electrode 144. The third insulating layer 138 may be tantalum nitride, hafnium oxide, or hafnium oxynitride. The second insulating layer 130 is disposed between the first insulating layer 128 and the third insulating layer 138. This third insulating layer 138 has an opening 162 that extends downward from the upper surface 138S of the third insulating layer 138 to the common electrode 144.

接著，上述觸控訊號線120係設於第三絕緣層138上。此觸控訊號線120係透過上述開口162電性連接共同電極144。 Then, the touch signal line 120 is disposed on the third insulating layer 138. The touch signal line 120 is electrically connected to the common electrode 144 through the opening 162.

上述觸控訊號線120之材料可包括銅、鋁、鉬、鎢、金、鉻、鎳、鉑、鈦、銥、銠、上述之合金、上述之組合或其它導電性佳的金屬材料，例如可為鉬鋁鉬(Mo/Al/Mo)或鈦鋁鈦(Ti/Al/Ti)之三層結構。於其它實施例中，上述觸控訊號線120之材料可為一非金屬材料，只要使用之材料具有導電性即可。此觸控訊號線120之材料可藉由前述之化學氣相沉積法(CVD)、濺鍍法、電阻加熱蒸鍍法、電子束蒸鍍法、或其它任何適合的沉積方式形成。 The material of the touch signal line 120 may include copper, aluminum, molybdenum, tungsten, gold, chromium, nickel, platinum, titanium, tantalum, niobium, the above alloy, the above combination or other conductive metal materials, for example, It is a three-layer structure of molybdenum aluminum molybdenum (Mo/Al/Mo) or titanium aluminum titanium (Ti/Al/Ti). In other embodiments, the material of the touch signal line 120 may be a non-metal material as long as the material used is electrically conductive. The material of the touch signal line 120 can be formed by the aforementioned chemical vapor deposition (CVD), sputtering, resistance heating evaporation, electron beam evaporation, or any other suitable deposition method.

繼續參見第3A-3B圖，顯示裝置300A更包括設於第三絕緣層138上且覆蓋觸控訊號線120之第四絕緣層164。此第四絕緣層164可為氮化矽、二氧化矽、或氮氧化矽。此外，如第3A圖所示，基板102更包括開口166，此開口166延伸穿過第四絕緣層164、第三絕緣層138、第二絕緣層130及第一絕緣層128，並露出電晶體 110，亦即開口166暴露出源極電極114之部分表面114S。 Continuing to refer to FIG. 3A-3B , the display device 300A further includes a fourth insulating layer 164 disposed on the third insulating layer 138 and covering the touch signal line 120 . The fourth insulating layer 164 may be tantalum nitride, hafnium oxide, or hafnium oxynitride. In addition, as shown in FIG. 3A, the substrate 102 further includes an opening 166 extending through the fourth insulating layer 164, the third insulating layer 138, the second insulating layer 130, and the first insulating layer 128, and exposing the transistor. 110, that is, opening 166 exposes a portion of surface 114S of source electrode 114.

繼續參見第3A-3B圖，顯示裝置300A更包括設於第四絕緣層164上且電性連接電晶體110之畫素電極134。此畫素電極134之材料可包括透明導電材料，例如為銦錫氧化物(ITO)、氧化錫(SnO)、氧化銦鋅(IZO)、氧化銦鎵鋅(IGZO)、氧化銦錫鋅(ITZO)、氧化銻錫(ATO)、氧化銻鋅(AZO)、上述之組合或其它任何適合之透明導電氧化物材料。 Continuing to refer to FIG. 3A-3B, the display device 300A further includes a pixel electrode 134 disposed on the fourth insulating layer 164 and electrically connected to the transistor 110. The material of the pixel electrode 134 may include a transparent conductive material such as indium tin oxide (ITO), tin oxide (SnO), indium zinc oxide (IZO), indium gallium zinc oxide (IGZO), indium tin zinc oxide (ITZO). ), antimony tin oxide (ATO), antimony zinc oxide (AZO), combinations of the foregoing or any other suitable transparent conductive oxide material.

如第3A圖所示，此畫素電極134係透過開口166電性連接電晶體110。詳細而言，畫素電極134係設於第四絕緣層164上，並延伸至開口166之側壁上及源極電極114之表面114S上，以電性連接電晶體110之源極電極114。 As shown in FIG. 3A, the pixel electrode 134 is electrically connected to the transistor 110 through the opening 166. In detail, the pixel electrode 134 is disposed on the fourth insulating layer 164 and extends to the sidewall of the opening 166 and the surface 114S of the source electrode 114 to electrically connect the source electrode 114 of the transistor 110.

此外，如第3B圖所示，第四絕緣層164更具有凹口140，且此凹口140大致對應非遮光區121A(對應第1A圖之開口區105)。而畫素電極134更設於上述凹口140中。如第3A圖所示，本揭露實施例將畫素電極134設於凹口140中，可縮短共同電極144與畫素電極134之間的距離，以增加共同電極144與畫素電極134之間的電容，並藉此提升裝置之顯示品質。 Further, as shown in FIG. 3B, the fourth insulating layer 164 further has a notch 140, and the notch 140 substantially corresponds to the non-light-shielding region 121A (corresponding to the opening region 105 of FIG. 1A). The pixel electrode 134 is further disposed in the above recess 140. As shown in FIG. 3A, in the embodiment of the present disclosure, the pixel electrode 134 is disposed in the recess 140, and the distance between the common electrode 144 and the pixel electrode 134 can be shortened to increase the mutual electrode 144 and the pixel electrode 134. The capacitance and thereby enhance the display quality of the device.

此外，繼續參見第3B圖，共同電極144與設於凹口140中的畫素電極134之間的距離於非遮光區121A中為第一距離D1，而於遮光區121B中，第四絕緣層164之上表面164S與共同電極144之間的距離為第二距離D2，且此第一距離D1小於第二距離D2。 In addition, referring to FIG. 3B, the distance between the common electrode 144 and the pixel electrode 134 disposed in the recess 140 is a first distance D1 in the non-light-shielding region 121A, and in the light-shielding region 121B, the fourth insulating layer. The distance between the upper surface 164S of the 164 and the common electrode 144 is the second distance D2, and the first distance D1 is smaller than the second distance D2.

如第3B圖所示，本揭露實施例藉由使第一距離D1小於第二距離D2，可縮短共同電極144與畫素電極134之間的距離，以增加共同電極144與畫素電極134之間的儲存電容與電場，並藉 此提升裝置之顯示品質。 As shown in FIG. 3B, in the embodiment of the present disclosure, the distance between the common electrode 144 and the pixel electrode 134 can be shortened by increasing the first distance D1 to be smaller than the second distance D2 to increase the common electrode 144 and the pixel electrode 134. Between storage capacitors and electric fields, and borrow The display quality of this lifting device.

此外，在一些實施例中，如第3B圖所示，凹口140貫穿第四絕緣層164，且位於凹口140中的畫素電極134係直接接觸第三絕緣層138之上表面138S。 Moreover, in some embodiments, as shown in FIG. 3B, the recess 140 extends through the fourth insulating layer 164, and the pixel electrode 134 located in the recess 140 directly contacts the upper surface 138S of the third insulating layer 138.

此外，繼續參見第3A圖，顯示裝置300A更包括相對基板102設置之第二基板146以及設於基板102與第二基板146之間的顯示介質148。 In addition, referring to FIG. 3A , the display device 300A further includes a second substrate 146 disposed opposite the substrate 102 and a display medium 148 disposed between the substrate 102 and the second substrate 146 .

上述顯示裝置300A可為觸控液晶顯示器，例如為薄膜電晶體液晶顯示器。或者，此液晶顯示器可為扭轉向列(Twisted Nematic,TN)型液晶顯示器、超扭轉向列(Super Twisted Nematic,STN)型液晶顯示器、雙層超扭轉向列(Double layer Super Twisted Nernatic,DSTN)型液晶顯示器、垂直配向(Vertical Alignment,VA)型液晶顯示器、水平電場效應(In-Plane Switching,IPS)型液晶顯示器、膽固醇(Cholesteric)型液晶顯示器、藍相(Blue Phase)型液晶顯示器、邊際電場效應(FFS)型液晶顯示器、或其它任何適合之液晶顯示器。 The display device 300A may be a touch liquid crystal display, such as a thin film transistor liquid crystal display. Alternatively, the liquid crystal display can be a Twisted Nematic (TN) type liquid crystal display, a Super Twisted Nematic (STN) type liquid crystal display, or a Double Layer Super Twisted Nernatic (DSTN). Liquid crystal display, Vertical Alignment (VA) type liquid crystal display, In-Plane Switching (IPS) type liquid crystal display, Cholesteric type liquid crystal display, Blue Phase type liquid crystal display, margin An electric field effect (FFS) type liquid crystal display, or any other suitable liquid crystal display.

在一些實施例中，第二基板146為彩色濾光層基板。詳細而言，作為彩色濾光層基板之第二基板146可包括一基板150、設於此基板150上之遮光層152、設於此遮光層152及基板150上之彩色濾光層154、以及覆蓋遮光層152與彩色濾光層154之保護層156。 In some embodiments, the second substrate 146 is a color filter layer substrate. In detail, the second substrate 146 as a color filter layer substrate may include a substrate 150, a light shielding layer 152 disposed on the substrate 150, a color filter layer 154 disposed on the light shielding layer 152 and the substrate 150, and The protective layer 156 of the light shielding layer 152 and the color filter layer 154 is covered.

此外，基板102對應上述第二基板146之遮光層152的區域即為遮光區121B，而基板102之非遮光區121A係指顯示裝置300A中次畫素108顯示的區域。 Further, the area of the substrate 102 corresponding to the light shielding layer 152 of the second substrate 146 is the light shielding area 121B, and the non-light shielding area 121A of the substrate 102 refers to the area displayed by the sub-pixel 108 in the display device 300A.

上述基板150可包括透明基板，例如可為玻璃基板、陶瓷基板、塑膠基板或其它任何適合之透明基板，上述遮光層152可包括黑色光阻、黑色印刷油墨、黑色樹脂。而上述彩色濾光層154可包括紅色濾光層、綠色濾光層、藍色濾光層、或其它任何適合之彩色濾光層。 The substrate 150 may include a transparent substrate, such as a glass substrate, a ceramic substrate, a plastic substrate, or any other suitable transparent substrate. The light shielding layer 152 may include a black photoresist, a black printing ink, and a black resin. The color filter layer 154 may include a red filter layer, a green filter layer, a blue filter layer, or any other suitable color filter layer.

顯示裝置300A可更包括設於基板102與第二基板146之間的間隔物158，此間隔物158為用以間隔基板102與第二基板146之主要結構，以防止顯示裝置300A被按壓時基板102與第二基板146接觸。 The display device 300A may further include a spacer 158 disposed between the substrate 102 and the second substrate 146. The spacer 158 is a main structure for spacing the substrate 102 and the second substrate 146 to prevent the substrate when the display device 300A is pressed. 102 is in contact with the second substrate 146.

第3C圖係本揭露另一實施例之顯示裝置300B沿著第1圖之線段2B-2B’所繪製之剖面圖。應注意的是，後文中與前文相同或相似的元件或膜層將以相同或相似之標號表示，其材料、製造方法與功能皆與前文所述相同或相似，故此部分在後文中將不再贅述。 Fig. 3C is a cross-sectional view of the display device 300B of another embodiment taken along line 2B-2B' of Fig. 1. It should be noted that elements or layers that are the same or similar to those in the foregoing will be denoted by the same or similar reference numerals, and the materials, manufacturing methods and functions thereof are the same or similar to those described above, and therefore will not be described later. Narration.

第3C圖所示之實施例與前述第3B圖之實施例之差別在於第三絕緣層138亦具有凹口168，此凹口168大致對應非遮光區121A。此外，上述第四絕緣層164係順應性設於第三絕緣層138之凹口168中而形成凹口140。 The difference between the embodiment shown in FIG. 3C and the embodiment of FIG. 3B is that the third insulating layer 138 also has a notch 168 which substantially corresponds to the non-light-shielding region 121A. In addition, the fourth insulating layer 164 is compliantly disposed in the recess 168 of the third insulating layer 138 to form the recess 140.

此外，如第3C圖所示，位於非遮光區121A(對應第1A圖之開口區105)中的第三絕緣層138於共同電極144與畫素電極134之間具有厚度T4，而位於遮光區121B中的第三絕緣層138具有厚度T5，且此厚度T4小於厚度T5。在一些實施例中，厚度T4為1000±500Å，而厚度T5為2000至3000Å。 In addition, as shown in FIG. 3C, the third insulating layer 138 located in the non-light-shielding region 121A (corresponding to the opening region 105 of FIG. 1A) has a thickness T4 between the common electrode 144 and the pixel electrode 134, and is located in the light-shielding region. The third insulating layer 138 in 121B has a thickness T5, and this thickness T4 is smaller than the thickness T5. In some embodiments, the thickness T4 is 1000 ± 500 Å and the thickness T5 is 2000 to 3000 Å.

如第3C圖所示，本揭露實施例藉由使厚度T4小於厚 度T5，可縮短共同電極144與畫素電極134之間的距離，以增加共同電極144與畫素電極134之間的電容，並藉此提升裝置之顯示品質。 As shown in FIG. 3C, the disclosed embodiment reduces the thickness T4 by less than At a degree T5, the distance between the common electrode 144 and the pixel electrode 134 can be shortened to increase the capacitance between the common electrode 144 and the pixel electrode 134, thereby improving the display quality of the device.

綜上所述，本揭露實施例藉由縮短畫素電極與共同電極之間的距離，可增加畫素電極與共同電極之間的電容，並可藉此提升裝置之顯示品質。此外，藉由使觸控訊號線與共同電極之間保持一固定距離，可減少觸控訊號線與共同電極之間的耦合效應(coupling effect)，故可更進一步提升裝置的顯示品質。 In summary, the disclosed embodiment can increase the capacitance between the pixel electrode and the common electrode by shortening the distance between the pixel electrode and the common electrode, and can thereby improve the display quality of the device. In addition, by maintaining a fixed distance between the touch signal line and the common electrode, the coupling effect between the touch signal line and the common electrode can be reduced, thereby further improving the display quality of the device.

此外，應注意的是，熟習本技術領域之人士均深知，本揭露實施例所述之汲極與源極可互換，因其定義係與本身所連接的電壓位準有關。 In addition, it should be noted that those skilled in the art are well aware that the drain and source described in the disclosed embodiments are interchangeable, as the definition is related to the voltage level to which they are connected.

值得注意的是，以上所述之元件尺寸、元件參數、以及元件形狀皆非為本揭露之限制條件。此技術領域中具有通常知識者可以根據不同需要調整這些設定值。另外，本揭露之觸控顯示裝置及其製造方法並不僅限於第1A-3C圖所圖示之狀態。本揭露可以僅包括第1A-3C圖之任何一或複數個實施例之任何一或複數項特徵。換言之，並非所有圖示之特徵均須同時實施於本揭露之觸控顯示裝置及其製造方法中。 It should be noted that the component sizes, component parameters, and component shapes described above are not limitations of the disclosure. Those of ordinary skill in the art can adjust these settings according to different needs. In addition, the touch display device and the method of manufacturing the same according to the present disclosure are not limited to the state illustrated in FIGS. 1A-3C. The disclosure may include only any one or more of the features of any one or a plurality of embodiments of Figures 1A-3C. In other words, not all of the illustrated features must be simultaneously implemented in the touch display device and the method of fabricating the same.

雖然本揭露的實施例及其優點已揭露如上，但應該瞭解的是，任何所屬技術領域中具有通常知識者，在不脫離本揭露之精神和範圍內，當可作更動、替代與潤飾。此外，本揭露之保護範圍並未侷限於說明書內所述特定實施例中的製程、機器、製造、物質組成、裝置、方法及步驟，任何所屬技術領域中具有通常知識者可從本揭露揭示內容中理解現行或未來所發展出的製 程、機器、製造、物質組成、裝置、方法及步驟，只要可以在此處所述實施例中實施大抵相同功能或獲得大抵相同結果皆可根據本揭露使用。因此，本揭露之保護範圍包括上述製程、機器、製造、物質組成、裝置、方法及步驟。另外，每一申請專利範圍構成個別的實施例，且本揭露之保護範圍也包括各個申請專利範圍及實施例的組合。 Although the embodiments of the present disclosure and its advantages are disclosed above, it should be understood that those skilled in the art can make changes, substitutions, and refinements without departing from the spirit and scope of the disclosure. In addition, the scope of the disclosure is not limited to the processes, machines, manufactures, compositions, devices, methods, and steps in the specific embodiments described in the specification, and those of ordinary skill in the art may disclose the disclosure Understand the current or future development system The process, machine, manufacture, material composition, apparatus, method, and procedure may be used in accordance with the present disclosure as long as they can perform substantially the same function or achieve substantially the same result in the embodiments described herein. Accordingly, the scope of protection of the present disclosure includes the above-described processes, machines, manufacturing, material compositions, devices, methods, and procedures. In addition, each patent application scope constitutes an individual embodiment, and the scope of protection of the disclosure also includes a combination of the scope of the patent application and the embodiments.

100‧‧‧顯示裝置 100‧‧‧ display device

102‧‧‧基板 102‧‧‧Substrate

106‧‧‧資料線 106‧‧‧Information line

120‧‧‧觸控訊號線 120‧‧‧Touch signal line

121A‧‧‧非遮光區 121A‧‧‧Non-light-shielded area

121B‧‧‧遮光區 121B‧‧‧ shading area

122‧‧‧第一基板 122‧‧‧First substrate

124‧‧‧閘極介電層 124‧‧‧ gate dielectric layer

128‧‧‧第一絕緣層 128‧‧‧First insulation

130‧‧‧第二絕緣層 130‧‧‧Second insulation

134‧‧‧畫素電極 134‧‧‧ pixel electrodes

136‧‧‧襯層 136‧‧‧ lining

138‧‧‧第三絕緣層 138‧‧‧ Third insulation layer

140‧‧‧凹口 140‧‧‧ notch

144‧‧‧共同電極 144‧‧‧Common electrode

146‧‧‧第二基板 146‧‧‧second substrate

148‧‧‧顯示介質 148‧‧‧Display media

150‧‧‧基板 150‧‧‧Substrate

152‧‧‧遮光層 152‧‧‧Lighting layer

154‧‧‧彩色濾光層 154‧‧‧Color filter layer

156‧‧‧保護層 156‧‧‧Protective layer

2A-2A’‧‧‧線段 2A-2A’‧‧‧ Segment

T1‧‧‧厚度 T1‧‧‧ thickness

T2‧‧‧厚度 T2‧‧‧ thickness

T3‧‧‧厚度 T3‧‧‧ thickness

Claims (11)

一種觸控顯示裝置，包括：一第一基板，具有至少一畫素單元，該畫素單元包含一非遮光區及一遮光區且包含：一電晶體，設於該第一基板上；一第一絕緣層，設於該第一基板且位於該電晶體上；一觸控訊號線，設於該第一絕緣層上；一第二絕緣層，設於該第一絕緣層上與該觸控訊號線上，其中該第二絕緣層具有一凹口對應該非遮光區；及一第一電極，設於該第二絕緣層上及該凹口中；一第二基板，相對該第一基板設置；以及一顯示介質，設於該第一基板與該第二基板之間。 A touch display device includes: a first substrate having at least one pixel unit, the pixel unit comprising a non-light-shielding region and a light-shielding region and comprising: a transistor disposed on the first substrate; An insulating layer is disposed on the first substrate and located on the transistor; a touch signal line is disposed on the first insulating layer; a second insulating layer is disposed on the first insulating layer and the touch a second insulative layer having a recess corresponding to the non-shielding region; and a first electrode disposed on the second insulating layer and the recess; a second substrate disposed opposite to the first substrate; And a display medium disposed between the first substrate and the second substrate. 如申請專利範圍第1項所述之觸控顯示裝置，其中該畫素單元更包含：一第二電極，設於該第一絕緣層與該第二絕緣層之間，該第一絕緣層具有一開口露出該電晶體，且該第二電極透過該開口電性連接該電晶體，其中該第二絕緣層於該非遮光區具有一第一厚度，其中該第二絕緣層位於該遮光區具有一第二厚度，且該第一厚度小於該第二厚度。 The touch display device of claim 1, wherein the pixel unit further comprises: a second electrode disposed between the first insulating layer and the second insulating layer, the first insulating layer having An opening is used to expose the transistor, and the second electrode is electrically connected to the transistor through the opening, wherein the second insulating layer has a first thickness in the non-light-shielding region, wherein the second insulating layer has a first layer in the light-shielding region a second thickness, and the first thickness is less than the second thickness. 如申請專利範圍第2項所述之觸控顯示裝置，其中該第二絕緣層於該第一電極與該觸控訊號線之間具有一第三厚度，該第二厚度大於等於該第三厚度。 The touch display device of claim 2, wherein the second insulating layer has a third thickness between the first electrode and the touch signal line, and the second thickness is greater than or equal to the third thickness . 如申請專利範圍第3項所述之觸控顯示裝置，其中該畫素單元更包括：一第一襯層，設於該觸控訊號線與該第一絕緣層之間。 The touch display device of claim 3, wherein the pixel unit further comprises: a first lining layer disposed between the touch signal line and the first insulating layer. 如申請專利範圍第4項所述之觸控顯示裝置，其中該畫素單元更包含：一第二襯層，設於該開口中之該第二電極上且該第二襯層係設於該第二電極與該第二絕緣層之間。 The touch display device of claim 4, wherein the pixel unit further comprises: a second lining layer disposed on the second electrode in the opening and the second lining layer is disposed on the Between the second electrode and the second insulating layer. 一種觸控顯示裝置，包括：一第一基板，具有至少一畫素單元，該畫素單元包含一非遮光區及一遮光區且包含：一電晶體，設於該第一基板上；一第一絕緣層，設於該第一基板且位於該電晶體上；一第一電極，設於該第一絕緣層上；一第二絕緣層，設於該第一絕緣層上與該第一電極上；一觸控訊號線，設於該第二絕緣層上；一第三絕緣層，設於該第二絕緣層上且覆蓋該觸控訊號線，其中該第三絕緣層具有一對應該非遮光區的第一凹口；及一第二電極，設於該第三絕緣層上及該第一凹口中；一第二基板，相對該第一基板設置；以及一顯示介質，設於該第一基板與該第二基板之間。 A touch display device includes: a first substrate having at least one pixel unit, the pixel unit comprising a non-light-shielding region and a light-shielding region and comprising: a transistor disposed on the first substrate; An insulating layer is disposed on the first substrate and on the transistor; a first electrode is disposed on the first insulating layer; a second insulating layer is disposed on the first insulating layer and the first electrode a touch signal line is disposed on the second insulating layer; a third insulating layer is disposed on the second insulating layer and covers the touch signal line, wherein the third insulating layer has a pair of a first recess of the light-shielding region; and a second electrode disposed on the third insulating layer and the first recess; a second substrate disposed opposite to the first substrate; and a display medium disposed on the first Between a substrate and the second substrate. 如申請專利範圍第6項所述之觸控顯示裝置，其中於該第一凹口中該第一電極與該第二電極之間具有一第一距離， 其中於該遮光區中，該第三絕緣層之一上表面與該第一電極之間具有一第二距離，且該第一距離小於該第二距離。 The touch display device of claim 6, wherein the first recess has a first distance between the first electrode and the second electrode, The upper surface of the third insulating layer has a second distance from the first electrode, and the first distance is smaller than the second distance. 如申請專利範圍第7項所述之觸控顯示裝置，其中該第一凹口貫穿該第三絕緣層，且位於該第一凹口中的該第二電極接觸該第二絕緣層之一上表面。 The touch display device of claim 7, wherein the first recess penetrates the third insulating layer, and the second electrode located in the first recess contacts an upper surface of the second insulating layer . 如申請專利範圍第6項所述之觸控顯示裝置，其中位於該非遮光區中的該第二絕緣層於該第一電極與該第二電極之間具有一第一厚度，其中位於該遮光區中的該第二絕緣層具有一第二厚度，且該第一厚度小於該第二厚度。 The touch display device of claim 6, wherein the second insulating layer in the non-light-shielding region has a first thickness between the first electrode and the second electrode, wherein the light-shielding region is located The second insulating layer has a second thickness, and the first thickness is smaller than the second thickness. 如申請專利範圍第6項所述之觸控顯示裝置，其中該第二絕緣層具有一位於該非遮光區的第二凹口，且該第二凹口與該第一凹口相對應。 The touch display device of claim 6, wherein the second insulating layer has a second recess located in the non-light-shielding region, and the second recess corresponds to the first recess. 如申請專利範圍第6項所述之觸控顯示裝置，其中該第二絕緣層具有一第一開口，且該觸控訊號線係透過該第一開口電性連接該第一電極。 The touch display device of claim 6, wherein the second insulating layer has a first opening, and the touch signal line is electrically connected to the first electrode through the first opening.
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