TWI567452B - Liquid crystal display and element substrate thereof - Google Patents

Liquid crystal display and element substrate thereof Download PDF

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Publication number
TWI567452B
TWI567452B TW103124494A TW103124494A TWI567452B TW I567452 B TWI567452 B TW I567452B TW 103124494 A TW103124494 A TW 103124494A TW 103124494 A TW103124494 A TW 103124494A TW I567452 B TWI567452 B TW I567452B
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Taiwan
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layer
substrate
metal layer
liquid crystal
width
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TW103124494A
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TW201604614A (en
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鍾岳庭
陳俊宇
許紹武
盧永信
王兆祥
邱冠宇
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群創光電股份有限公司
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Priority to TW103124494A priority Critical patent/TWI567452B/en
Priority to JP2014004921U priority patent/JP3194536U/en
Priority to US14/493,173 priority patent/US9360725B2/en
Priority to KR1020150027535A priority patent/KR101705435B1/en
Priority to US15/003,596 priority patent/US9543335B2/en
Publication of TW201604614A publication Critical patent/TW201604614A/en
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Publication of TWI567452B publication Critical patent/TWI567452B/en

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    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362—Active matrix addressed cells
    • G02F1/136227—Through-hole connection of the pixel electrode to the active element through an insulation layer
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333—Constructional arrangements; Manufacturing methods
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333—Constructional arrangements; Manufacturing methods
    • G02F1/1343—Electrodes
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362—Active matrix addressed cells
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362—Active matrix addressed cells
    • G02F1/136286—Wiring, e.g. gate line, drain line
    • H—ELECTRICITY
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    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • H01L27/1222—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or crystalline structure of the active layer
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • H01L27/1222—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or crystalline structure of the active layer
    • H01L27/1225—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or crystalline structure of the active layer with semiconductor materials not belonging to the group IV of the periodic table, e.g. InGaZnO
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • H01L27/124—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or layout of the wiring layers specially adapted to the circuit arrangement, e.g. scanning lines in LCD pixel circuits
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/40—Electrodes ; Multistep manufacturing processes therefor
    • H01L29/41—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions
    • H01L29/417—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions carrying the current to be rectified, amplified or switched
    • H01L29/41725—Source or drain electrodes for field effect devices
    • H01L29/41733—Source or drain electrodes for field effect devices for thin film transistors with insulated gate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/40—Electrodes ; Multistep manufacturing processes therefor
    • H01L29/43—Electrodes ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
    • H01L29/45—Ohmic electrodes
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
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    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/40—Electrodes ; Multistep manufacturing processes therefor
    • H01L29/43—Electrodes ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
    • H01L29/45—Ohmic electrodes
    • H01L29/456—Ohmic electrodes on silicon
    • H01L29/458—Ohmic electrodes on silicon for thin film silicon, e.g. source or drain electrode
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333—Constructional arrangements; Manufacturing methods
    • G02F1/133357—Planarisation layers
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F2201/00—Constructional arrangements not provided for in groups G02F1/00 - G02F7/00
    • G02F2201/40—Arrangements for improving the aperture ratio

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Description

液晶顯示裝置及其元件基板 Liquid crystal display device and component substrate thereof

本發明係有關於一種液晶顯示裝置，特別係有關於一種，具有接觸孔之液晶顯示裝置。 The present invention relates to a liquid crystal display device, and more particularly to a liquid crystal display device having a contact hole.

在液晶顯示裝置之中，接觸孔常用於導通像素電極以及源極電極。然而，參照第1圖，液晶分子2會隨著接觸孔1的輪廓排列，由於接觸孔1設計的剖面形狀往往為上寬下窄的弧形結構，因此隨著接觸孔1輪廓排列的液晶分子2容易造成漏光現象，而使得液晶顯示裝置的對比度降低。 Among liquid crystal display devices, contact holes are often used to turn on the pixel electrode and the source electrode. However, referring to FIG. 1, the liquid crystal molecules 2 are arranged along the contour of the contact hole 1. Since the cross-sectional shape of the contact hole 1 is designed to be an upper-wide narrow curve, the liquid crystal molecules are aligned along the contour of the contact hole 1. 2 It is easy to cause light leakage, and the contrast of the liquid crystal display device is lowered.

參照第1圖，在習知技術中，透過增加接觸孔1底部之源極電極3的面積，可以將產生問題的液晶分子2遮蔽，從而提昇液晶顯示裝置的對比度。然而，此方式會降低液晶顯示裝置的開口率，從而損失液晶顯示裝置的亮度。因此一昧的增大源極電極3的面積，並非良好的問題解決方案。 Referring to Fig. 1, in the prior art, by increasing the area of the source electrode 3 at the bottom of the contact hole 1, the liquid crystal molecules 2 which cause the problem can be shielded, thereby improving the contrast of the liquid crystal display device. However, this method lowers the aperture ratio of the liquid crystal display device, thereby losing the brightness of the liquid crystal display device. Therefore, increasing the area of the source electrode 3 at a glance is not a good solution to the problem.

本發明係為了欲解決習知技術之問題而提供之一種元件基板，包括一基板、一金屬層以及一平坦層。金屬層位於該基板上，其中該金屬層沿一第一方向具有一第一寬度。平坦層位於該金屬層上，其中該平坦層具有一接觸孔，該接觸孔具有一連續壁面以及一底面，該底面暴露該金屬層，其中該底面沿該第一 方向具有一第二寬度。其中，該第一寬度與第二寬度需滿足以下之公式： 其中，L1為該第二金屬層沿該第一方向之該第一寬度，L2為該接觸孔之底面沿該第一方向之該第二寬度，h為該平坦層之厚度，θ為連續壁面之一預設參考點與一基點之間之一直線與該底面的一延伸面的夾角，其中，該預設參考點位於該連續壁面上，且該預設參考點與該平坦層之一底面之垂直距離為0.95h，該基點為該連續壁面與該底面的交界位置。 The present invention provides an element substrate for solving the problems of the prior art, comprising a substrate, a metal layer and a flat layer. A metal layer is on the substrate, wherein the metal layer has a first width along a first direction. The flat layer is located on the metal layer, wherein the flat layer has a contact hole having a continuous wall surface and a bottom surface exposing the metal layer, wherein the bottom surface has a second width along the first direction. Wherein, the first width and the second width are required to satisfy the following formula: Wherein L 1 is the first width of the second metal layer along the first direction, L 2 is the second width of the bottom surface of the contact hole along the first direction, and h is the thickness of the flat layer, θ is One of the continuous wall surfaces presets an angle between a straight line between the reference point and a base point and an extended surface of the bottom surface, wherein the predetermined reference point is located on the continuous wall surface, and the preset reference point and one of the flat layers The vertical distance of the bottom surface is 0.95 h, and the base point is the boundary position between the continuous wall surface and the bottom surface.

本發明亦提供一種元件基板，包括一基板、一金屬層以及一平坦層。金屬層位於該基板上，其中該金屬層沿一第一方向具有一第一邊緣。平坦層位於該金屬層上，其中該平坦層具有一接觸孔，該接觸孔具有一連續壁面以及一底面，該底面暴露該金屬層，連續壁面在一垂直截面上的一輪廓線為曲線，該第一邊緣在一垂直方向上對應該輪廓線之一臨界點，該輪廓線於該臨界點上的切線斜率小於0.176。其中，該金屬層沿一第一方向具有一第一寬度，其中該底面沿該第一方向具有一第二寬度，其中，該第一寬度與第二寬度需滿足以下之公式： 其中，L1為該第二金屬層沿該第一方向之該第一寬度，L2為該接觸孔之底面沿該第一方向之該第二寬度，θ為連續壁面的一預設參考點與一基點之間的一直線與水平面的夾角，其中，該預設參 考點為該連續壁面上距離該底面位置，(1-p)h為該臨界點於該垂直方向上的高度，p≦0.1。 The invention also provides an element substrate comprising a substrate, a metal layer and a flat layer. A metal layer is on the substrate, wherein the metal layer has a first edge along a first direction. a flat layer is disposed on the metal layer, wherein the flat layer has a contact hole having a continuous wall surface and a bottom surface exposing the metal layer, wherein a contour of the continuous wall surface on a vertical section is a curve, The first edge corresponds to a critical point of the contour in a vertical direction, and the tangent slope of the contour at the critical point is less than 0.176. The metal layer has a first width along a first direction, wherein the bottom surface has a second width along the first direction, wherein the first width and the second width are required to satisfy the following formula: Wherein L 1 is the first width of the second metal layer along the first direction, L 2 is the second width of the bottom surface of the contact hole along the first direction, and θ is a predetermined reference point of the continuous wall surface An angle between a straight line and a horizontal point with a base point, wherein the predetermined reference point is a distance from the bottom surface of the continuous wall surface, and (1-p)h is a height of the critical point in the vertical direction, p≦0.1 .

應用本發明之實施例，液晶顯示裝置的開口率與透光率(暗態下的對比)可達到最佳化的狀態，避免了漏光以及對比度降低等問題的產生。 By applying the embodiment of the present invention, the aperture ratio of the liquid crystal display device and the light transmittance (compared in the dark state) can be optimized, and problems such as light leakage and contrast reduction are avoided.

1‧‧‧接觸孔 1‧‧‧Contact hole

2‧‧‧液晶分子 2‧‧‧liquid crystal molecules

3‧‧‧源極電極 3‧‧‧Source electrode

100‧‧‧元件基板 100‧‧‧ element substrate

110‧‧‧基板 110‧‧‧Substrate

120‧‧‧金屬層 120‧‧‧metal layer

121‧‧‧第一邊緣 121‧‧‧ first edge

130‧‧‧平坦層 130‧‧‧flat layer

131、131’、131”‧‧‧接觸孔 131, 131', 131" ‧ ‧ contact holes

132‧‧‧連續壁面 132‧‧‧Continuous wall

133‧‧‧底面 133‧‧‧ bottom

134‧‧‧預設參考點 134‧‧‧Preset reference point

135‧‧‧基點 135‧‧‧ base point

136‧‧‧臨界點 136‧‧ ‧ critical point

137‧‧‧半導體層 137‧‧‧Semiconductor layer

140‧‧‧導電層 140‧‧‧ Conductive layer

150‧‧‧液晶層 150‧‧‧Liquid layer

200‧‧‧液晶顯示裝置 200‧‧‧Liquid crystal display device

201‧‧‧掃瞄線 201‧‧‧ scan line

202‧‧‧信號線 202‧‧‧ signal line

203‧‧‧半導體層 203‧‧‧Semiconductor layer

204‧‧‧汲極電極 204‧‧‧汲electrode

205‧‧‧共用電極 205‧‧‧Common electrode

210‧‧‧像素晶體 210‧‧‧ pixel crystal

222‧‧‧閘絕緣層 222‧‧‧ brake insulation

231‧‧‧接觸孔 231‧‧‧Contact hole

233‧‧‧接觸孔之底面 233‧‧‧The bottom surface of the contact hole

240‧‧‧源極電極 240‧‧‧Source electrode

250‧‧‧液晶層 250‧‧‧Liquid layer

260‧‧‧對向基板 260‧‧‧ opposite substrate

L1‧‧‧第一寬度 L 1 ‧‧‧first width

L2‧‧‧第二寬度 L 2 ‧‧‧second width

h‧‧‧厚度 H‧‧‧thickness

θ‧‧‧夾角 Θ‧‧‧ angle

β‧‧‧夾角 ‧‧‧‧角角

A‧‧‧顯示區 A‧‧‧ display area

B‧‧‧非顯示區 B‧‧‧Non-display area

L‧‧‧直線 L‧‧‧ Straight line

L’‧‧‧切線 L’‧‧‧ tangent

第1圖係顯示習知液晶顯示裝置的元件基板。 Fig. 1 shows an element substrate of a conventional liquid crystal display device.

第2圖係顯示本發明一實施例之元件基板。 Fig. 2 is a view showing an element substrate of an embodiment of the present invention.

第3A圖係顯示本發明實施例之元件基板應用於一液晶顯示裝置。 Fig. 3A shows a case where the element substrate of the embodiment of the present invention is applied to a liquid crystal display device.

第3B圖係顯示第3A圖中之3B部分之細部元件。 Figure 3B shows the detail elements of section 3B in Figure 3A.

第4圖係顯示本發明一變形例之元件基板。 Fig. 4 is a view showing an element substrate of a modification of the present invention.

第5圖係顯示應用本發明實施例之液晶顯示裝置。 Fig. 5 is a view showing a liquid crystal display device to which an embodiment of the present invention is applied.

第6圖係顯示依據本發明之接觸孔的預設值與實際值比對表。 Fig. 6 is a table showing the comparison of the preset value and the actual value of the contact hole according to the present invention.

參照第2圖，其係顯示本發明一實施例之元件基板100，包括一基板110、一金屬層120以及一平坦層130。金屬層120位於該基板110上，其中在一第一方向X的一剖面上，該金屬層120沿第一方向X具有一第一寬度L1。平坦層130位於該金屬層120上，其中該平坦層130具有一接觸孔131，該接觸孔131具有一連續壁面132以及一底面133，該底面133暴露該金屬層120，其中該底面133沿該第一方向X具有一第二寬度L2。 Referring to FIG. 2, an element substrate 100 according to an embodiment of the present invention includes a substrate 110, a metal layer 120, and a flat layer 130. The metal layer 120 is located on the substrate 110, wherein the metal layer 120 has a first width L 1 along the first direction X in a cross section in the first direction X. The flat layer 130 is located on the metal layer 120. The flat layer 130 has a contact hole 131. The contact hole 131 has a continuous wall surface 132 and a bottom surface 133. The bottom surface 133 exposes the metal layer 120. The first direction X has a second width L 2 .

申請人發現，液晶分子係沿連續壁面132排列，穿透率(暗態下的對比)隨連續壁面132的斜率漸變而改變。當連續壁面132的切線斜率約等於tan10°時，此處的液晶分子將不會發生嚴重的漏光情形，因此不會降低液晶顯示裝置的對比度。就設計上的角度來看，金屬層120對接觸孔131的遮蔽，僅僅需要達到在臨界點136之位置，相當於連續壁面132的切線斜率約等於tan10°的位置，液晶顯示裝置的開口率與透光率(暗態下的對比)即達到最佳化的狀態，以符合市場需求。 Applicants have discovered that the liquid crystal molecules are aligned along the continuous wall 132 and the transmittance (comparison in the dark state) changes as the slope of the continuous wall 132 changes. When the tangential slope of the continuous wall surface 132 is approximately equal to tan 10°, the liquid crystal molecules herein will not cause severe light leakage, and thus the contrast of the liquid crystal display device will not be lowered. From a design point of view, the shielding of the contact hole 131 by the metal layer 120 only needs to reach the position at the critical point 136, which corresponds to the position where the tangent slope of the continuous wall surface 132 is approximately equal to tan 10°, and the aperture ratio of the liquid crystal display device is The light transmittance (comparison in the dark state) is optimized to meet market demand.

再參照第2圖，申請人透過曲線公式的推導得知，當該第一寬度與第二寬度需滿足以下之公式時，液晶顯示裝置的開口率與透光率可達到最佳化的狀態： 其中，L1為該金屬層120沿該第一方向X之該第一寬度，L2為該接觸孔131之底面沿該第一方向X之該第二寬度，h為該平坦層130之厚度，θ為連續壁面132之一預設參考點134與一基點135之間之一直線L與該底面的一延伸面的夾角，其中，該預設參考點134位於該連續壁面132上，且該預設參考點134與該平坦層130之一底面之垂直距離為0.95h，該基點135為該連續壁面132與該底面133的交界位置。其中，±1.8為製程中公差容許值。依照上述各參數之調整，連續壁面132的曲率以及形狀可適度變化。 Referring to FIG. 2 again, the applicant derives from the curve formula that when the first width and the second width need to satisfy the following formula, the aperture ratio and the transmittance of the liquid crystal display device can be optimized: Wherein L 1 is the first width of the metal layer 120 along the first direction X, L 2 is the second width of the bottom surface of the contact hole 131 along the first direction X, and h is the thickness of the flat layer 130 θ is an angle between a straight line L between one of the preset reference points 134 and a base point 135 and an extended surface of the bottom surface, wherein the predetermined reference point 134 is located on the continuous wall 132, and the predetermined The vertical distance between the reference point 134 and the bottom surface of the flat layer 130 is 0.95 h, and the base point 135 is the boundary position between the continuous wall surface 132 and the bottom surface 133. Among them, ±1.8 is the tolerance tolerance in the process. The curvature and shape of the continuous wall surface 132 may vary moderately in accordance with the adjustment of the above parameters.

參照第2圖，曲線公式的推導過程如下： Referring to Figure 2, the derivation of the curve formula is as follows:

第一步，曲線公式擬合(假設)，假設該接觸孔的連續壁面之斜面方程式滿足下列公式： y=f(x)=-A’exp(-x).....(1) In the first step, the curve formula is fitted (assumed), assuming that the slope equation of the continuous wall of the contact hole satisfies the following formula: y=f(x)=-A’exp(-x).....(1)

由方程式(1)中，僅是定義出該接觸孔的連續壁面的漸進線，因此方程式(1)需對x以及y進行校正。 From equation (1), only the progressive line of the continuous wall of the contact hole is defined, so equation (1) needs to correct x and y.

第二步，曲線公式擬合(對通過預設參考點134、基點135以及角度θ校正)，假設斜坡上之預設參考點134為距離平坦層頂部的深度總深度h的p倍，且滿足f(R’)關係式，其中，該預設參考點134距離基點135的水平距離為R’，則 In the second step, the curve formula is fitted (corrected by the preset reference point 134, the base point 135, and the angle θ), assuming that the preset reference point 134 on the slope is p times the total depth h of the depth from the top of the flat layer, and satisfies f(R') relationship, wherein the preset reference point 134 is horizontally spaced from the base point 135 by R', then

得到校正參數α Get the correction parameter α

第三步，預設參考點134與基點135的連線形成一直線L，該直線L與相對於水平線的夾角為θ In the third step, the line connecting the preset reference point 134 and the base point 135 forms a straight line L, and the angle L is an angle θ with respect to the horizontal line.

引入材料特徵θ Introducing material features θ

第四步，距離平坦層頂部的深度總深度h的0.05倍，公式(2)與公式(3)聯立可得： The fourth step is 0.05 times the total depth h of the depth of the top of the flat layer. The formula (2) is combined with the formula (3):

得到校正參數α Get the correction parameter α

第五步，因決定平坦層130曲線的角度應為基點135的切線L’與相對於水平線的夾角β，而夾角β約略等於1.5θ，因此需對再曲線公式校正(對角度校正)，則可得： In the fifth step, since the angle of the curve of the flat layer 130 is determined to be the tangent L' of the base point 135 and the angle β with respect to the horizontal line, and the angle β is approximately equal to 1.5 θ , the correction of the recurve formula (for angle correction) is required. Available:

接觸孔曲線方程式 Contact hole curve equation

第六步，其中R=R0+R’，並帶回原方程式可得： The sixth step, where R = R 0 + R ', and brought back to the original equation can be obtained:

接觸孔實際曲線方程式 Contact hole actual curve equation

第七步，推得金屬層120沿該第一方向之該第二寬度的一半 In the seventh step, the half of the second width of the metal layer 120 along the first direction is derived

因在製程的過程中會有誤差，而±1.8為製程中公差容許值，因此彙整上述公式可得到液晶顯示裝置的開口率與透光率可達到最佳化的狀態公式： Since there is an error in the process of the process, and ±1.8 is the tolerance of the tolerance in the process, the above formula can be obtained to obtain a state formula in which the aperture ratio and the transmittance of the liquid crystal display device can be optimized:

在一實施例中，該夾角θ介於20~40度之間，例如，該夾角θ介於25~35度之間。 In an embodiment, the included angle θ is between 20 and 40 degrees, for example, the included angle θ is between 25 and 35 degrees.

參照第2圖，元件基板100更包含一導電層140位於該平坦層130上，並透過該接觸孔131與該金屬層120電性連接。該導電層140可以為透明導電材料或金屬材料。 Referring to FIG. 2 , the device substrate 100 further includes a conductive layer 140 on the planar layer 130 , and is electrically connected to the metal layer 120 through the contact hole 131 . The conductive layer 140 may be a transparent conductive material or a metal material.

該金屬層120可以為一驅動元件之源極電極或汲極電極。在一實施例中，元件基板100更包含一半導體層137位於該金屬層120與該基板110之間。該半導體層137之材料可以為多晶矽材料、非晶矽材料或金屬氧化物材料。 The metal layer 120 can be a source electrode or a drain electrode of a driving element. In an embodiment, the element substrate 100 further includes a semiconductor layer 137 between the metal layer 120 and the substrate 110. The material of the semiconductor layer 137 may be a polycrystalline germanium material, an amorphous germanium material, or a metal oxide material.

參照第3A圖，本發明實施例之元件基板應用於一液晶顯示裝置200，其包括一顯示區(像素區域)A以及一非顯示區B。參照第3B圖，其係顯示第3A圖中之3B部分之細部元件，液晶顯示裝置200更包括掃瞄線201、信號線202、半導體層203、源極電極240、接觸孔231、接觸孔之底面233、汲極電極204、共用電極205以及畫素電極210等等元件於顯示區A內。本發明實施例中，該金屬層120包含源極電極240、汲極電極204、掃描線201以及信號線202。 Referring to FIG. 3A, the element substrate of the embodiment of the present invention is applied to a liquid crystal display device 200 including a display area (pixel area) A and a non-display area B. Referring to FIG. 3B, which shows a detailed component of part 3B in FIG. 3A, the liquid crystal display device 200 further includes a scan line 201, a signal line 202, a semiconductor layer 203, a source electrode 240, a contact hole 231, and a contact hole. The bottom surface 233, the drain electrode 204, the common electrode 205, and the pixel electrode 210 and the like are in the display area A. In the embodiment of the present invention, the metal layer 120 includes a source electrode 240, a drain electrode 204, a scan line 201, and a signal line 202.

再參照第2圖，在另一實施例中，該金屬層120沿第一方向X具有一第一邊緣121，連續壁面132在一垂直截面上的一輪廓線為曲線，該第一邊緣121在一垂直方向上對應該輪廓線之臨界點136，該輪廓線於該臨界點136上的切線斜率小於0.176(tan10°)。相似於前述實施例，一基點135位於該連續壁面132 與該底面133在該垂直截面上的交界位置，該基點135與該預設參考點134位於一直線L之上，θ為該直線L與一水平面的夾角，其中該夾角θ介於20~40度之間，例如，該夾角θ介於25~35度之間。該金屬層120沿第一方向X具有一第一寬度L1，其中該底面133沿該第一方向X具有第二寬度L2，其中，該第一寬度L1與第二寬度L2需滿足以下之公式： 其中，L1為該第二金屬層沿該第一方向之該第一寬度，L2為該接觸孔之底面沿該第一方向之該第二寬度，p為可調整參數，θ為連續壁面的一預設參考點與一基點之間的一直線與水平面的夾角，其中，該預設參考點為該連續壁面上距離該底面位置，(1-p)h為該預設參考點於該垂直方向上的高度，0<p≦0.1，例如，0<p≦0.05。依照上述各參數之調整，連續壁面132的曲率以及形狀可適度變化。 Referring again to FIG. 2, in another embodiment, the metal layer 120 has a first edge 121 along the first direction X. The continuous wall surface 132 has a contour on a vertical cross section. The first edge 121 is at A vertical direction corresponds to the critical point 136 of the contour line, and the tangent slope of the contour at the critical point 136 is less than 0.176 (tan 10°). Similar to the foregoing embodiment, a base point 135 is located at a boundary position of the continuous wall surface 132 and the bottom surface 133 on the vertical cross section, and the base point 135 and the preset reference point 134 are located above the straight line L, where θ is the straight line L and a The angle between the horizontal planes, wherein the angle θ is between 20 and 40 degrees, for example, the angle θ is between 25 and 35 degrees. The metal layer 120 has a first width L 1 along the first direction X, wherein the bottom surface 133 has a second width L 2 along the first direction X, wherein the first width L 1 and the second width L 2 are satisfied. The following formula: Wherein L 1 is the first width of the second metal layer along the first direction, L 2 is the second width of the bottom surface of the contact hole along the first direction, p is an adjustable parameter, and θ is a continuous wall surface An angle between a predetermined reference point and a base point and a horizontal plane, wherein the preset reference point is a distance from the bottom surface of the continuous wall surface, and (1-p)h is the preset reference point at the vertical direction The height in the direction, 0 < p ≦ 0.1, for example, 0 < p ≦ 0.05. The curvature and shape of the continuous wall surface 132 may vary moderately in accordance with the adjustment of the above parameters.

雖然在上述實施例中，接觸孔位於顯示區(像素區域)A之中，然而，上述揭露並未限制本發明。本發明之接觸孔結構亦可用於非顯示區B之中。例如，參照第4圖，在一實施例中，本發明之接觸孔131’內的導電層140可連接信號線202，而接觸孔131’的輪廓與信號線202的寬度之間可符合上述公式，並且透過在平坦層130與閘絕緣層222上的接觸孔131”連接掃描線201，其中接觸孔131”的輪廓與掃描線201的寬度之間可符合上述公式。在上述實施例中，閘絕緣層222形成於信號線202與掃描線201之間。 Although in the above embodiment, the contact hole is located in the display area (pixel area) A, the above disclosure does not limit the present invention. The contact hole structure of the present invention can also be used in the non-display area B. For example, referring to FIG. 4, in an embodiment, the conductive layer 140 in the contact hole 131' of the present invention can be connected to the signal line 202, and the contour of the contact hole 131' and the width of the signal line 202 can conform to the above formula. And the scanning line 201 is connected through the contact hole 131" on the flat layer 130 and the gate insulating layer 222, wherein the contour of the contact hole 131" and the width of the scanning line 201 can conform to the above formula. In the above embodiment, the gate insulating layer 222 is formed between the signal line 202 and the scan line 201.

參照第5圖，其係顯示應用本發明實施例之液晶顯示裝置200，包括元件基板100、液晶層250以及對向基板260。 Referring to Fig. 5, there is shown a liquid crystal display device 200 to which an embodiment of the present invention is applied, including an element substrate 100, a liquid crystal layer 250, and an opposite substrate 260.

參照以下比對表1以及第6圖，由以下比對表以及第6圖可知，依照本發明實施例所預設之金屬層(M2)120寬度，在製造中，會有實際製程上的誤差落入±1.8的公差容許範圍。 Referring to the following comparison table 1 and FIG. 6, it can be seen from the following comparison table and FIG. 6 that the width of the metal layer (M2) 120 preset according to the embodiment of the present invention has an actual process error in manufacturing. It falls within the tolerance range of ±1.8.

應用本發明之實施例，液晶顯示裝置的開口率與透光率(暗態下的對比)可達到最佳化的狀態，避免了漏光以及對比度降低等問題的產生。 By applying the embodiment of the present invention, the aperture ratio of the liquid crystal display device and the light transmittance (compared in the dark state) can be optimized, and problems such as light leakage and contrast reduction are avoided.

雖然本發明已以具體之較佳實施例揭露如上，然其並非用以限定本發明，任何熟習此項技術者，在不脫離本發明之精神和範圍內，仍可作些許的更動與潤飾，因此本發明之保護範 圍當視後附之申請專利範圍所界定者為準。 While the present invention has been described above in terms of the preferred embodiments thereof, it is not intended to limit the invention, and may be modified and modified without departing from the spirit and scope of the invention. Therefore, the protection of the present invention The scope defined in the patent application scope is subject to the definition of patent application.

100‧‧‧元件基板 100‧‧‧ element substrate

110‧‧‧基板 110‧‧‧Substrate

120‧‧‧金屬層 120‧‧‧metal layer

121‧‧‧第一邊緣 121‧‧‧ first edge

130‧‧‧平坦層 130‧‧‧flat layer

131‧‧‧接觸孔 131‧‧‧Contact hole

132‧‧‧連續壁面 132‧‧‧Continuous wall

133‧‧‧底面 133‧‧‧ bottom

134‧‧‧臨界點 134‧‧ ‧ critical point

135‧‧‧基點 135‧‧‧ base point

136‧‧‧臨界點 136‧‧ ‧ critical point

137‧‧‧半導體層 137‧‧‧Semiconductor layer

140‧‧‧導電層 140‧‧‧ Conductive layer

L1‧‧‧第一寬度 L 1 ‧‧‧first width

L2‧‧‧第二寬度 L 2 ‧‧‧second width

h‧‧‧厚度 H‧‧‧thickness

θ‧‧‧夾角 Θ‧‧‧ angle

β‧‧‧夾角 ‧‧‧‧角角

L‧‧‧直線 L‧‧‧ Straight line

L’‧‧‧切線 L’‧‧‧ tangent

Claims (18)

一種元件基板，包括：一基板；一金屬層，位於該基板上；以及一平坦層，位於該金屬層上，其中該平坦層具有一接觸孔，該接觸孔具有一連續壁面以及一底面，該底面暴露該金屬層，其中，在一第一方向的一剖面上，該金屬層沿該第一方向具有一第一寬度L1，該底面沿該第一方向具有一第二寬度L2，該第一寬度L1與第二寬度L2係滿足以下之公式： 其中，h為該平坦層之厚度，θ為該連續壁面之一預設參考點與一基點之間之一直線與該底面的一延伸面的夾角，其中，該預設參考點位於該連續壁面上，且該預設參考點與該平坦層的一底面之垂直距離為0.95h，該基點為該連續壁面與該接觸孔的該底面的交界位置，p為可調整參數，0<p≦0.1。 An element substrate comprising: a substrate; a metal layer on the substrate; and a flat layer on the metal layer, wherein the flat layer has a contact hole having a continuous wall surface and a bottom surface, The bottom surface exposes the metal layer, wherein the metal layer has a first width L 1 along the first direction, and the bottom surface has a second width L 2 along the first direction. The first width L 1 and the second width L 2 satisfy the following formula: Wherein h is the thickness of the flat layer, and θ is an angle between a line between a predetermined reference point and a base point of the continuous wall and an extended surface of the bottom surface, wherein the preset reference point is located on the continuous wall And a vertical distance between the preset reference point and a bottom surface of the flat layer is 0.95 h, the base point is a boundary position between the continuous wall surface and the bottom surface of the contact hole, and p is an adjustable parameter, 0<p≦0.1. 如申請專利範圍第1項所述之元件基板，其中該可調整參數p為0.05。 The component substrate according to claim 1, wherein the adjustable parameter p is 0.05. 如申請專利範圍第1項所述之元件基板，其中該夾角θ介於20~40度之間。 The component substrate according to claim 1, wherein the angle θ is between 20 and 40 degrees. 如申請專利範圍第1項所述之元件基板，其中該夾角θ介於 25~35度之間。 The component substrate according to claim 1, wherein the angle θ is between 25 and 35 degrees. 如申請專利範圍第1項所述之元件基板，其更包含，一導電層位於該平坦層上，並透過該接觸孔與該金屬層電性連接。 The component substrate of claim 1, further comprising a conductive layer on the planar layer and electrically connected to the metal layer through the contact hole. 如申請專利範圍第1項所述之元件基板，其中該金屬層為一驅動元件之源極電極或汲極電極。 The element substrate of claim 1, wherein the metal layer is a source electrode or a drain electrode of a driving element. 如申請專利範圍第1項所述之元件基板，其中該金屬層為一驅動元件之信號線或掃描線。 The component substrate of claim 1, wherein the metal layer is a signal line or a scan line of a driving component. 如申請專利範圍第5項所述之元件基板，其中該導電層為一一透明材料。 The component substrate of claim 5, wherein the conductive layer is a transparent material. 如申請專利範圍第1項所述之元件基板，其更包含，一半導體層位於該金屬層與該基板之間。 The component substrate of claim 1, further comprising a semiconductor layer between the metal layer and the substrate. 如申請專利範圍第9項所述之元件基板，其中該半導體層之材料為多晶矽、非晶矽或金屬氧化物。 The element substrate of claim 9, wherein the material of the semiconductor layer is polycrystalline germanium, amorphous germanium or metal oxide. 如申請專利範圍第5項所述之元件基板，其中該導電層為一金屬材料。 The component substrate of claim 5, wherein the conductive layer is a metal material. 一種液晶顯示裝置，包括：一對向基板；一元件基板，相對於該對向基板；一液晶層，位於該對向基板以及該元件基板之間；其中，該元件基板包括：一基板；一金屬層，位於該基板上；以及 一平坦層，位於該金屬層上，其中該平坦層具有一接觸孔，該接觸孔具有一連續壁面以及一底面，該底面暴露該金屬層，其中，在一第一方向的一剖面上，該金屬層沿該第一方向具有一第一寬度L1，該底面沿該第一方向具有一第二寬度L2，，該第一寬度L1與第二寬度L2係滿足以下之公式： 其中，h為該平坦層之厚度，θ為該連續壁面之一預設參考點與一基點之間之一直線與該底面的一延伸面的夾角，其中，該預設參考點位於該連續壁面上，且該預設參考點與該平坦層的一底面之垂直距離為0.95h，該基點為該連續壁面與該接觸孔的該底面的交界位置，p為可調整參數，0<p≦0.1。 A liquid crystal display device comprising: a pair of substrates; an element substrate opposite to the opposite substrate; a liquid crystal layer between the opposite substrate and the element substrate; wherein the element substrate comprises: a substrate; a metal layer on the substrate; and a flat layer on the metal layer, wherein the flat layer has a contact hole having a continuous wall surface and a bottom surface, the bottom surface exposing the metal layer, wherein In a cross section of the first direction, the metal layer has a first width L 1 along the first direction, and the bottom surface has a second width L 2 along the first direction, the first width L 1 and the second width The L 2 system satisfies the following formula: Wherein h is the thickness of the flat layer, and θ is an angle between a line between a predetermined reference point and a base point of the continuous wall and an extended surface of the bottom surface, wherein the preset reference point is located on the continuous wall And a vertical distance between the preset reference point and a bottom surface of the flat layer is 0.95 h, the base point is a boundary position between the continuous wall surface and the bottom surface of the contact hole, and p is an adjustable parameter, 0<p≦0.1. 如申請專利範圍第12項所述之液晶顯示裝置，其中該可調整參數p為0.05。 The liquid crystal display device of claim 12, wherein the adjustable parameter p is 0.05. 如申請專利範圍第12項所述之液晶顯示裝置，其中該夾角θ介於20~40度之間。 The liquid crystal display device of claim 12, wherein the angle θ is between 20 and 40 degrees. 如申請專利範圍第12項所述之液晶顯示裝置，其中該夾角θ介於25~35度之間。 The liquid crystal display device of claim 12, wherein the angle θ is between 25 and 35 degrees. 如申請專利範圍第12項所述之液晶顯示裝置，其更包含，一導電層位於該平坦層上，並透過該接觸孔與該金屬層電 性連接。 The liquid crystal display device of claim 12, further comprising a conductive layer on the flat layer and electrically transmitting the metal layer through the contact hole Sexual connection. 如申請專利範圍第12項所述之液晶顯示裝置，其更包含，一半導體層位於該金屬層與該基板之間。 The liquid crystal display device of claim 12, further comprising a semiconductor layer between the metal layer and the substrate. 如申請專利範圍第17項所述之液晶顯示裝置，其中該半導體層之材料為多晶矽、非晶矽或金屬氧化物。 The liquid crystal display device of claim 17, wherein the material of the semiconductor layer is polycrystalline germanium, amorphous germanium or metal oxide.
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Publication number Priority date Publication date Assignee Title
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Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6136624A (en) * 1997-03-07 2000-10-24 Kabushiki Kaisha Toshiba Array substrate, liquid crystal display device and their manufacturing method
US6147722A (en) * 1996-08-05 2000-11-14 Sharp Kabushiki Kaisha Liquid crystal display device with contact hole over shading line but offset from center
TW201213944A (en) * 2010-09-20 2012-04-01 Lg Display Co Ltd Liquid crystal display device and method for manufacturing the same
US20130299830A1 (en) * 2012-05-09 2013-11-14 Japan Display East Inc. Display device

Family Cites Families (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2000206561A (en) * 1999-01-08 2000-07-28 Matsushita Electric Ind Co Ltd Production of liquid crystal display device and liquid crystal display device
JP4037117B2 (en) * 2001-02-06 2008-01-23 株式会社日立製作所 Display device
JP2005234091A (en) * 2004-02-18 2005-09-02 Hitachi Displays Ltd Display device
KR20060126167A (en) * 2005-06-03 2006-12-07 삼성전자주식회사 Method of fabricating thin film transistor for liquid crystal display and thin film transistor fabricated by the same
KR20080047085A (en) * 2006-11-24 2008-05-28 엘지디스플레이 주식회사 Array substrate for liquid crystal display device and method of fabricating the same
EP2267522A4 (en) * 2008-04-14 2012-03-07 Sharp Kk Liquid crystal display panel
US8953122B2 (en) * 2009-06-18 2015-02-10 Japan Display Inc. Liquid crystal display device and manufacturing method for same
KR101382119B1 (en) * 2012-04-19 2014-04-09 실리콘 디스플레이 (주) Display device of thin film transistor comprising touch sensor and manufacturing method thereof
JP2014149518A (en) * 2013-01-11 2014-08-21 Panasonic Liquid Crystal Display Co Ltd Display device
JP6347937B2 (en) * 2013-10-31 2018-06-27 株式会社ジャパンディスプレイ Liquid crystal display
JP6250364B2 (en) * 2013-11-06 2017-12-20 株式会社ジャパンディスプレイ Liquid crystal display
JP6208555B2 (en) * 2013-11-18 2017-10-04 株式会社ジャパンディスプレイ Liquid crystal display

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6147722A (en) * 1996-08-05 2000-11-14 Sharp Kabushiki Kaisha Liquid crystal display device with contact hole over shading line but offset from center
US6136624A (en) * 1997-03-07 2000-10-24 Kabushiki Kaisha Toshiba Array substrate, liquid crystal display device and their manufacturing method
TW201213944A (en) * 2010-09-20 2012-04-01 Lg Display Co Ltd Liquid crystal display device and method for manufacturing the same
US20130299830A1 (en) * 2012-05-09 2013-11-14 Japan Display East Inc. Display device

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