TWI545774B - 薄膜電晶體及含有該薄膜電晶體之平板顯示裝置 - Google Patents

薄膜電晶體及含有該薄膜電晶體之平板顯示裝置 Download PDF

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TWI545774B
TWI545774B TW100132650A TW100132650A TWI545774B TW I545774 B TWI545774 B TW I545774B TW 100132650 A TW100132650 A TW 100132650A TW 100132650 A TW100132650 A TW 100132650A TW I545774 B TWI545774 B TW I545774B
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柳春基
崔埈厚
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Description

薄膜電晶體及含有該薄膜電晶體之平板顯示裝置 相關申請案之交互參照
本申請案主張參照於西元2010年10月1日在韓國智慧財產局申請,案號為No.10-2010-0095957之韓國專利申請案所揭露完整內容之效益。
本發明是有關於一種薄膜電晶體及平板顯示裝置,如包含該薄膜電晶體之有機發光顯示裝置或液晶顯示裝置。
一般而言,平板顯示裝置例如有機發光顯示裝置或液晶顯示裝置,其包含薄膜電晶體(TFT)及藉由薄膜電晶體驅動並顯示影像之像素單元。
薄膜電晶體一般具有閘極電極、主動層、以及源極電極與汲極電極堆疊於基板上之構造。因此,當電流透過安裝於基板上的線路施加於閘極電極時,電流透過主動層施加於源極電極與汲極電極,且電流同時施加於連接源極電極與汲極電極之像素單元之像素電極。
像素單元一般包含像素電極、面對像素電極之相反電極、以及插設於像素電極與相反電極之間之發射運作層。當裝置為有機發光顯示裝置時, 發射運作層可為有機發射層以自體發光。當裝置為液晶顯示裝置時,發射運作層可為液晶層以選擇性地允許背光穿透。
在這些裝置中,如上述當電流透過薄膜電晶體施加於像素電極時,最佳的電壓形成於像素電極與相反電極之間。因此,發射運作層產生發射以顯示影像。
本發明提供一種改良以避免當主動層結晶化時熱流至閘極電極之薄膜電晶體、以及包含該薄膜電晶體之平板顯示裝置。
根據一態樣,提供一種薄膜電晶體,其包含基板、形成於基板上且由參雜雜質之矽晶形成之閘極電極、連接閘極電極之閘極配線、形成於閘極電極上之主動層、以及連接主動層之源極電極與汲極電極。
閘極配線可包含參雜與形成閘極電極相同之雜質之矽晶,並與閘極電極位於同一層之矽晶層,且金屬層形成於矽晶層上。
主動層可以藉由加熱而結晶的非晶矽所形成。雜質可為N-型雜質。
薄膜電晶體可更包含位於主動層上,並配置以保護主動層被蝕刻之蝕刻中止層。閘極絕緣層可形成於閘極電極與主動層之間。鈍化層可形成於源極電極與汲極電極上。
根據另一態様,提供一種平板顯示裝置,其包含薄膜電晶體及藉由薄膜電晶體驅動之像素單元,其中薄膜電晶體包含基板、形成於基板上且由參雜雜質之矽晶而形成之閘極電極、連接該閘極電極之閘極配線、形成於閘極電極上之主動層、以及連接主動層之源極電極與汲極電極。
閘極配線可包含參雜與形成閘極電極相同之雜質之矽晶,並與閘極電極位於同一層之矽晶層,且金屬層形成於矽晶層上。
主動層可以藉由加熱而結晶的非晶矽所形成。雜質可為N-型雜質。
平板顯示裝置可更包含位於主動層上,並配置以保護主動層被蝕刻之蝕刻中止層。閘極絕緣層可形成於閘極電極與主動層之間。鈍化層可形成於源極電極與汲極電極上。
像素單元可包含連接源極電極或汲極電極之像素電極、面對像素電極之相反電極、插設於像素電極與相反電極之間的發射運作層,其係配置以根據施加於像素電極及相反電極之電壓而運作。發射運作層可包含有機發射層與液晶層之其中之一。
根據此處揭露之薄膜電晶體及平板顯示裝置,可避免當主動層結晶化時熱流至閘極電極,因此可確保結晶化穩定,從而可降低產品的不良品質。
100‧‧‧薄膜電晶體
200、300‧‧‧像素單元
210、310‧‧‧像素電極
230、330‧‧‧相反電極
220‧‧‧有機發射層
170‧‧‧閘極絕緣層
140‧‧‧蝕刻中止層
160‧‧‧鈍化層
180‧‧‧平坦化層
240‧‧‧像素定義層
120‧‧‧閘極配線
121‧‧‧矽晶層
122‧‧‧金屬層
110‧‧‧閘極電極
101‧‧‧基板
130‧‧‧主動層
151‧‧‧源極電極
152‧‧‧汲極電極
320‧‧‧液晶層
L‧‧‧雷射
下文藉由參考附圖詳述例示性實施例,以更加了解所述及其他特色與優點,其中:第1圖 係以有機發光顯示裝置之一實施例為例之平板顯示裝置之截面圖;第2圖 係以液晶顯示裝置之一實施例為例之平板顯示裝置之截面圖;第3A圖至第3E圖 係描述一實施例中製造如第1圖及第2圖實施例所繪示之平板顯示裝置之薄膜電晶體之製程之截面圖。
下文中,例示性實施例將參閱附圖以詳細說明。相似的參考符號一般而言對應說明書中相似的元件。在敘述中,已知功能及結構的詳細描述將被省略以容易理解。
圖示中,層與區域的厚度為清楚而被誇示。當理解的是當一層被稱為位於另一層或基板“上”時,其可直接位於另一層或基板上,或可存在中介元件。
加熱以結晶化薄膜電晶體之主動層之方法係透過利用已被廣泛使用之雷射,其中主動層係由非晶矽所形成。在結晶化主動層時,主動層與設置於主動層下之閘極電極可能會因熱流而產生問題。由金屬,例如鋁所形成之閘極電極係設置於主動層下。當藉由利用雷射以結晶化主動層時熱施加於主動層,熱會迅速流至由金屬形成之閘極電極,因此主動層無法充分地結晶化。
因此,為了確保穩定的主動層結晶化,需要發展可解決因熱流產生之問題之方法。
第1圖係為以一有機發光顯示裝置之一實施例為例之平板顯示裝置之截面圖。
參閱第1圖,有機發光顯示裝置包含薄膜電晶體100及像素單元200。
像素單元200係由薄膜電晶體100所驅動並藉由發光顯示影像。像素單元200包含像素電極210、面對像素電極210之相反電極230、以及插設於像素電極210與相反電極230之間之發射運作層。在本實施例中,發射運作層係為有機發射層220。像素電極210連接薄膜電晶體100。
預定電壓藉由薄膜電晶體100施加於相反電極230。電壓亦選擇性地透過薄膜電晶體100施加於像素電極210。因此,預定電壓係根據選擇性施加至像素電極210之電壓而形成於像素電極210與相反電極230之間。當預定電壓施加時,插設於像素電極210與相反電極230之間之有機發射層220藉由發光顯示影像。
薄膜電晶體100具有閘極電極110、主動層130、源極電極151及汲極電極150依序堆疊於基板101之構造。
在一些實施例中,閘極電極100係電性連接閘極配線120並透過閘極配線120接收電流。閘極電極110可由參雜雜質之矽晶所形成。閘極配線120可以雙層結構所建構,其中由例如鋁之金屬所形成之金屬層122形成於參雜雜質之矽晶層121上。閘極電極110可由參雜與矽晶層121所參雜之相同雜質之矽晶所形成。閘極電極110不是由一般金屬所形成,使結晶化由非晶矽所形成之主動層130中所產生之熱不會流至閘極電極110。
如果閘極電極110由一般金屬所形成,施加以結晶化主動層130之熱會流至由具有良好熱傳導性之金屬形成之閘極電極110。當閘極電極110由參雜雜質之矽晶所形成時,矽晶具有相對低的熱傳導性,可充分地避免施加於主動層130之熱流入閘極電極110。且因矽晶參雜雜質,該矽晶具有適當的導電性。雜質可為N-型雜質,例如磷(P)。
閘極配線120具有高電子移動性以確保控制速度。在一些實施例中,閘極配線120係以雙層結構所建構,其中金屬層122係形成於矽晶層121上。閘極配線120如同閘極電極110,係不直接設置於主動層130下。因此,雖然閘極配線120係由金屬形成,閘極配線120並不會阻斷主動層130之結晶化。由於電子移動性係非常重要,金屬層122從而形成以確保高電子移動性。
第1圖中之有機發光顯示裝置之實施例亦包含閘極絕緣層170、保護主動層130不被蝕刻之蝕刻中止層140、鈍化層160、平坦化層180、以及像素定義層240。
第2圖係繪示液晶顯示裝置之一實施例。
液晶顯示裝置包含像素單元300,其中液晶層320係形成於像素電極310及相反電極330之間、以及如第1圖所繪示之薄膜電晶體100。
當預定電壓根據藉由薄膜電晶體100選擇性施加的電壓,而形成於像素電極310及相反電極330之間時,液晶層320的液晶配置改變以選擇性地允許背光(圖未示)穿透而顯示影像。
第2圖之液晶顯示裝置之實施例亦包含閘極絕緣層170、保護主動層130不被蝕刻之蝕刻中止層140、鈍化層160、以及平坦化層180。
下文中,將描述形成可用於平板顯示裝置如第1圖中之有機發光顯示裝置或第2圖中之液晶顯示裝置之薄膜電晶體100之製程。
第3A圖至第3E圖係描述一實施例中製造薄膜電晶體100之製程之概要截面圖。
參閱第3A圖,閘極電極110與閘極配線120係形成於基板101上。
在一些實施例中,基板101可由玻璃或塑膠所形成。緩衝層(圖未示)可更形成於基板101上以保持基板101之平滑性,並且避免雜質蝕刻基板101。
閘極電極110可由上述之參雜雜質之矽晶所形成。閘極配線120可以雙層結構所建構,其中金屬層122係形成於矽晶層121上。首先閘極電極110與矽晶層121可藉由沈澱矽晶於基板101上而形成,N-型雜質則參雜於其上,接著金屬層122可形成於閘極配線120之矽晶層121上。閘極電極110相較於金屬具有 相對低之熱傳導性,且可形成包含金屬層122及具有高電子移動性之閘極配線120。
如第3B圖所示,閘極絕緣層170及主動層130係依序堆疊於前述結構上。
閘極絕緣層170可由無機絕緣層材料如矽氮化物或矽氧化物,或有機層材料如聚亞醯胺所形成。
主動層130可由非晶矽所形成。當雷射L照射於第3B圖所示之主動層130上時,相對應區域將被加熱並結晶化。由參雜雜質之矽晶所形成之閘極電極110係設置於雷射L照射於上之主動層130下。因此,用以結晶化主動層130的熱可充分地避免流至閘極電極110。因此,主動層130的結晶化可穩定的進行,且主動層的不良品質如未結晶化可被避免。
如第3C圖所示,主動層130之圖樣係藉由形成蝕刻中止層140於主動層130上並蝕刻該蝕刻中止層140而形成。
如第3D圖所示,形成源極電極151及汲極電極152,且如第3E圖所示,形成鈍化層160及平坦化層180。
蝕刻中止層140、鈍化層160及平坦化層180可各別由有機絕緣層或無機絕緣層所形成。
薄膜電晶體100可透過上述製程所形成。當包含像素電極210、有機發射層220及相反電極330之像素單元200形成於薄膜電晶體100上時,可形成第1圖中有機發光顯示裝置之一實施例。當包含像素電極310、液晶層320、以及相反電極330之像素單元300形成於薄膜電晶體100上時,可形成第2圖中液晶顯示裝置之一實施例。
能夠穩定地進行主動層130之結晶化之薄膜電晶體100係可實現,且可確保包含薄膜電晶體100之平板顯示裝置之穩定品質。
根據上述實施例之薄膜電晶體及包含該薄膜電晶體之平板顯示裝置,當熱施加以結晶化主動層時可避免熱輕易地流至閘極電極,主動層的穩定結晶化可被進行。主動層品質不良的問題,舉例而言,未結晶可被解決。除此之外,由於閘極配線不包含金屬層,可確保優良的電子移動性至閘極電極。
在上述實施例中,一個薄膜電晶體及一個像素單元被繪示於圖式中,但此僅為便於描述,其他實施例可包含複數個薄膜電晶體及複數個像素單元。
本發明參閱本文中之例示性實施例而被特別地表示及描述,其將被本領域之技術人士理解的是,在未脫離本發明之精神與範疇下對其形式及細節所進行之等校修改,均應包含於後附之申請專利範圍中。
100‧‧‧薄膜電晶體
200‧‧‧像素單元
210‧‧‧像素電極
230‧‧‧相反電極
220‧‧‧有機發射層
170‧‧‧閘極絕緣層
140‧‧‧蝕刻中止層
160‧‧‧鈍化層
180‧‧‧平坦化層
240‧‧‧像素定義層
120‧‧‧閘極配線
121‧‧‧矽晶層
122‧‧‧金屬層
110‧‧‧閘極電極
101‧‧‧基板
130‧‧‧主動層
151‧‧‧源極電極
152‧‧‧汲極電極

Claims (14)

  1. 一種薄膜電晶體,其包含:一基板;一閘極電極,其係形成於該基板上,該閘極電極係由參雜雜質之矽晶所形成;一閘極配線,其係連接該閘極電極;一主動層,其係形成於該閘極電極上;以及一源極電極與一汲極電極,其係連接該主動層,其中該閘極配線包含:一矽晶層,其係參雜與形成該閘極電極之該矽晶相同之該雜質,並與該閘極電極位於一相同層上;以及一金屬層,其係形成於該矽晶層上。
  2. 如申請專利範圍第1項所述之薄膜電晶體,其中該主動層係以藉由加熱而結晶的非晶矽所形成。
  3. 如申請專利範圍第1項所述之薄膜電晶體,其中該雜質係為N-型雜質。
  4. 如申請專利範圍第1項所述之薄膜電晶體,更包含一蝕刻中止層,其係位於該主動層上,並配置以保護該主動層不被蝕刻。
  5. 如申請專利範圍第1項所述之薄膜電晶體,其中一閘極絕緣層係形成於該閘極電極與該主動層之間。
  6. 如申請專利範圍第1項所述之薄膜電晶體,其中一鈍化層係形成於該源極電極與該汲極電極上。
  7. 一種平板顯示裝置,其包含一薄膜電晶體及藉由該薄膜電晶體所驅動之一像素單元,其中該薄膜電晶體包含一基板、形成於該基板上且由參雜雜質之矽晶所形成之一閘極電極、連接該閘極電極之一閘極配線、形成於該閘極電極上之一主動層、以及連接該主動層之一源極電極與一汲極電極,其中該閘極配線包含:一矽晶層,其係參雜與形成該閘極電極之相同該雜質,且位於與該閘極電極相同層上;以及一金屬層,其係形成於矽晶層上。
  8. 如申請專利範圍第7項所述之平板顯示裝置,其中該主動層係以藉由加熱而結晶的非晶矽所形成。
  9. 如申請專利範圍第7項所述之平板顯示裝置,其中該雜質係為N-型雜質。
  10. 如申請專利範圍第7項所述之平板顯示裝置,更包含一蝕刻中止層,其係位於該主動層上,並配置以保護該主動層不被蝕刻。
  11. 如申請專利範圍第7項所述之平板顯示裝置,其中一閘極絕緣層係形成於該閘極電極與該主動層之間。
  12. 如申請專利範圍第7項所述之平板顯示裝置,其中一鈍化層係形成於該源極電極與該汲極電極上。
  13. 如申請專利範圍第7項所述之平板顯示裝置,其中該像素單元包含連接該源極電極該汲極電極之一像素電極、面對該像素電極之一相反電極、以及插設於該像素電極與該相反電極之一發射運作層,其係配置以根據施加於該像素電極及該相反電極之 一電壓而運作。
  14. 如申請專利範圍第13項所述之平板顯示裝置,其中該發射運作層包含一有機發射層及一液晶層之至少其一。
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GB0210065D0 (en) * 2002-05-02 2002-06-12 Koninkl Philips Electronics Nv Electronic devices comprising bottom gate tft's and their manufacture
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US7221039B2 (en) * 2004-06-24 2007-05-22 Taiwan Semiconductor Manufacturing Co., Ltd. Thin film transistor (TFT) device structure employing silicon rich silicon oxide passivation layer
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