TWI517431B - Method for forming the light-emitting diode - Google Patents
Method for forming the light-emitting diode Download PDFInfo
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- TWI517431B TWI517431B TW098127687A TW98127687A TWI517431B TW I517431 B TWI517431 B TW I517431B TW 098127687 A TW098127687 A TW 098127687A TW 98127687 A TW98127687 A TW 98127687A TW I517431 B TWI517431 B TW I517431B
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- H01L33/145—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a carrier transport control structure, e.g. highly-doped semiconductor layer or current-blocking structure with a current-blocking structure
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- H01L33/04—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a quantum effect structure or superlattice, e.g. tunnel junction
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- H01L33/04—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a quantum effect structure or superlattice, e.g. tunnel junction
- H01L33/06—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a quantum effect structure or superlattice, e.g. tunnel junction within the light emitting region, e.g. quantum confinement structure or tunnel barrier
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- H01L33/26—Materials of the light emitting region
- H01L33/30—Materials of the light emitting region containing only elements of group III and group V of the periodic system
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Description
本發明係有關於半導體裝置，且特別是有關於一種形成發光二極體裝置的方法。This invention relates to semiconductor devices and, more particularly, to a method of forming a light emitting diode device.
利用電流在p-n接合所產生之電子及電洞輻射性再結合，可產生電磁輻射(例如：光)。在從直接能隙材料(例如GaAs或GaN)製造的正偏壓之p-n接合，該注入空乏區之電子電洞再結合產生電磁輻射之射出。該電磁輻射可以在可見光的範圍內，或是在非可見光的範圍內。使用具有不同能隙之材料亦可產生出具有不同發光顏色之發光二極體。此外，一發光二極體發出具有特定波長範圍之電磁輻射時，係表示可利用一螢光體來吸收該等輻射，並發射出一或多種不同之波長的輻射。因此，舉例來說，一發光二極體發出非可見光時，可利用一螢光體將該非可見光轉換成一可見光。Electromagnetic radiation (eg, light) can be generated by the recombination of electrons and holes generated by the current at the p-n junction. In a positively biased p-n junction fabricated from a direct energy gap material such as GaAs or GaN, the electron holes injected into the depletion region recombine to produce electromagnetic radiation. The electromagnetic radiation can be in the range of visible light or in the range of non-visible light. Light-emitting diodes having different luminescent colors can also be produced using materials having different energy gaps. In addition, when a light emitting diode emits electromagnetic radiation having a specific wavelength range, it means that a phosphor can be used to absorb the radiation and emit one or more different wavelengths of radiation. Therefore, for example, when a light emitting diode emits non-visible light, the non-visible light can be converted into a visible light by using a phosphor.
一般來說，發光二極體結構具有一發光層形成於一下層及一上層間，其中該上層及該下層具有相反型態的導電性質。電極被形成來與該下層及該上層接觸。流經該電極與發光層間的電流係採最少電阻的路徑來行動。在許多的發光二極體組態中，該上電極係直接配置於該發光層之上，而發光層所發出的光則會被該上電極所阻礙而被遮蔽，因此大幅降低該發光二極體之發光效率。In general, the light emitting diode structure has a light emitting layer formed between the lower layer and the upper layer, wherein the upper layer and the lower layer have opposite conductivity properties. An electrode is formed to be in contact with the lower layer and the upper layer. The current flowing between the electrode and the luminescent layer is acted upon by a path of least resistance. In many light-emitting diode configurations, the upper electrode is directly disposed on the light-emitting layer, and the light emitted by the light-emitting layer is blocked by the upper electrode to be shielded, thereby greatly reducing the light-emitting diode. Luminous efficiency.
一用來解決該上電極阻光影響以增加發光效率的方法係被提出，該方法係在形成該上層之前，預先形成一介電層於部份之該發光層上。該上電極係配置於該介電層之正上方，因此當電流流經該上電極及該下層之間時，被迫延著該介電層的四周流動。如此一來，流經該上層及下層間之電流並不會流經該上電極之正下方，因此可限制被該上電極所阻礙的光量，且增加該發光二極體之發光效率。A method for solving the effect of blocking light of the upper electrode to increase luminous efficiency is proposed by previously forming a dielectric layer on a portion of the light-emitting layer before forming the upper layer. The upper electrode is disposed directly above the dielectric layer, so that when a current flows between the upper electrode and the lower layer, it is forced to flow around the dielectric layer. In this way, the current flowing between the upper layer and the lower layer does not flow directly under the upper electrode, so that the amount of light blocked by the upper electrode can be limited, and the luminous efficiency of the light-emitting diode can be increased.
該介電層一般都是以沉積氧化矽於發光層上並進一步圖形化所形成。該沉積及圖形化的步驟會增加標準發光二極體製程額外的製成成本及製程複雜度。此外，由於圖形化的步驟都會包含一蝕刻製程，而該蝕刻製程有可能會損害該發光層之表面及降低其結晶品質。蝕刻製程所造成的損害對所得之發光二極體裝置會產生不利的影響，且降低該發光二極體裝置的良率。The dielectric layer is typically formed by depositing yttrium oxide on the luminescent layer and further patterning. This deposition and patterning step increases the additional manufacturing cost and process complexity of the standard LED process. In addition, since the patterning step includes an etching process, the etching process may damage the surface of the light-emitting layer and lower its crystal quality. The damage caused by the etching process adversely affects the resulting light-emitting diode device and reduces the yield of the light-emitting diode device.
綜上所述，發展出具有較佳發光效率之發光二極體裝置及其製程是十分必要的。In summary, it is necessary to develop a light-emitting diode device having a better luminous efficiency and a process thereof.
本發明之實施例提供具有平坦表面的發光二極體，來降低、解決或避免習知技術所存在的問題，並達到所期望的技術優點。Embodiments of the present invention provide a light emitting diode having a flat surface to reduce, solve or avoid the problems of the prior art and achieve the desired technical advantages.
根據本發明之一目的，係提供一發光二極體裝置。該發光二極體裝置包含一基板，以及一發光二極體結構形成於該基板之上。該發光二極體結構包含一下層、一發光層，及一上層。一電流阻擋層係形成於該上層之內，以致於使得該上層具有平坦的上表面。舉例來說，該電流阻擋層可以利用離子佈植(所使用之離子例如：鎂、碳、或矽離子)的方式進入部份之上層，形成一具有電阻阻抗的區域。此外，在上述離子佈植的步驟後，另一額外的上層可以進一步形成於該上層之上。According to one aspect of the invention, a light emitting diode device is provided. The light emitting diode device comprises a substrate, and a light emitting diode structure is formed on the substrate. The light emitting diode structure comprises a lower layer, a light emitting layer, and an upper layer. A current blocking layer is formed within the upper layer such that the upper layer has a flat upper surface. For example, the current blocking layer can enter a portion of the upper layer by ion implantation (using ions such as magnesium, carbon, or strontium ions) to form a region having a resistive impedance. Further, after the above-described step of ion implantation, another additional upper layer may be further formed on the upper layer.
根據本發明另一目的，係提供一形成發光二極體裝置的方法，該方法包含：提供一基板，以及形成一發光二極體結構於該基板之上，其中該發光二極體結構包含一第一層、一主動層、及一第二層。接著，形成一電流阻擋層於該第二層之內，例如形成一具有電阻阻抗的區域。該具有電阻阻抗的區域之形成方式舉例來說，可為一佈植製程。在進行佈植的步驟後，可以形成另一膜層於該第二層之上。According to another aspect of the present invention, a method of forming a light emitting diode device is provided, the method comprising: providing a substrate, and forming a light emitting diode structure on the substrate, wherein the light emitting diode structure comprises a The first layer, an active layer, and a second layer. Next, a current blocking layer is formed within the second layer, for example, to form a region having a resistive impedance. The formation of the region having the resistance resistance can be, for example, an implantation process. After the step of implanting, another film layer can be formed over the second layer.
根據本發明又一目的，該形成發光二極體裝置的方法亦可包含以下步驟：提供一基板，以及形成一發光二極體結構於該基板之上。該發光二極體結構可包含一或一以上之下層，一或一以上之發光層、以及一或一以上之第一上層；以及佈植離子進入該一或一以上之第一上層中之至少一層內，以形成一具有電阻阻抗的膜層。接著，形成一或一以上之第二上層於該一或一以上之第一上層之上。為讓本發明之上述和其他目的、特徵、和優點能更明顯易懂，下文特舉出較佳實施例，並配合所附圖式，作詳細說明如下：According to still another aspect of the present invention, the method of forming a light emitting diode device may further include the steps of: providing a substrate, and forming a light emitting diode structure on the substrate. The light emitting diode structure may include one or more lower layers, one or more light emitting layers, and one or more first upper layers; and implant ions entering at least one of the one or more first upper layers Within a layer to form a film layer having a resistive impedance. Next, one or more second upper layers are formed over the one or more first upper layers. The above and other objects, features and advantages of the present invention will become more <RTIgt;
本發明接下來將會提供許多不同的實施例以實施本發明中不同的特徵。各特定實施例中的組成及配置將會在以下作描述以簡化本發明。這些為實施例並非用於限定本發明。The invention will be followed by a number of different embodiments to implement different features of the invention. The compositions and configurations in the specific embodiments are described below to simplify the present invention. These are not intended to limit the invention.
本發明係提供一用以形成發光二極體裝置的新穎方法。可以被理解地，本發明係僅繪示出本發明所述之方法的必要步驟，不過其它已被知曉用於此技術領域的步驟或製程亦可被加入於該方法中。在本發明之實施例所述之圖示中，類似的單元係以類似的元件符號來表示。The present invention provides a novel method for forming a light emitting diode device. It will be appreciated that the present invention only depicts the necessary steps of the method described herein, although other steps or processes known to be used in the art may be added to the method. In the illustration of the embodiments of the present invention, like elements are denoted by like reference numerals.
第1-3圖係繪示不同之中介製程步驟，用以形成本發明一實施例所述之具有電流阻擋層的發光二極體裝置100。請參照第1圖，該發光二極體裝置100具有一基板102及一發光二極體結構104形成於該基板102之上。該基板102較佳係為一藍寶石總體基材或一矽基材，可以具有摻雜或非摻雜。值得注意的是，當本發明之實施例其內文描述使用一藍寶石基板，亦可以其他基板來替代。舉例來說，一般使用於發光二極體製造之基板，像是SiC基板，亦可以用來取代本發明所述實施例所述之基板。此外，具有不同面位向之基板亦可被使用，像是(111)、(100)、或(110)等面位向。1-3 illustrate different intervening process steps for forming a light emitting diode device 100 having a current blocking layer in accordance with an embodiment of the present invention. Referring to FIG. 1 , the LED device 100 has a substrate 102 and a light emitting diode structure 104 formed on the substrate 102 . The substrate 102 is preferably a sapphire substrate or a substrate, which may be doped or undoped. It should be noted that when a sapphire substrate is used in the embodiment of the present invention, other substrates may be substituted. For example, a substrate generally used for a light-emitting diode, such as a SiC substrate, can also be used in place of the substrate described in the embodiments of the present invention. In addition, substrates having different face orientations can also be used, such as (111), (100), or (110).
該發光二極體結構104可包含任何適用於特定應用的發光二極體結構。一般來說，該發光二極體結構104包含一下發光二極體層110形成於該基板102之表面上。較佳地，下發光二極體層110係由具有第一型態導電性質摻雜物的III-V族化合物所構成。舉例來說，具有第一型態導電性質摻雜物的III-V族化合物可例如為具有n-型導電性質之n-GaN。該下發光二極體層110(n-GaN)之形成方法，舉例來說，可為磊晶成長製程，像是金屬有機CVD(MOCVD)、分子束磊晶(MBE)、氫化物氣相磊晶(HVPE)、及液相磊晶(LPE)等。其它III-V族化合物亦可被使用，舉例來說，可包含GaN、InN、AlN、InxGa(1-x)N、AlxGa(1-x)N、或AlxInyGa(1-x-y)N等，其中其中、。The light emitting diode structure 104 can comprise any light emitting diode structure suitable for a particular application. Generally, the LED structure 104 includes a lower LED layer 110 formed on the surface of the substrate 102. Preferably, the lower light emitting diode layer 110 is composed of a group III-V compound having a dopant of a first type of conductive property. For example, a Group III-V compound having a first type of conductive property dopant can be, for example, n-GaN having n-type conductivity properties. The method for forming the lower LED layer 110 (n-GaN) may be, for example, an epitaxial growth process such as metal organic CVD (MOCVD), molecular beam epitaxy (MBE), or hydride vapor epitaxy. (HVPE), and liquid phase epitaxy (LPE). Other III-V compounds may also be used, for example, GaN, InN, AlN, InxGa(1-x)N, AlxGa(1-x)N, or AlxInyGa(1-xy)N, etc., wherein among them , .
一發光層112(亦被稱為主動層)係形成於該下發光二極體層110之上。該發光層112可包含一均質接面、一異質接面、一單一量子井(SQW)、或一多重量子井(MQW)結構。在一較佳實施例中，該發光層112包含非摻雜n-型氮化鎵銦(GaxInyN(1-x-y))。在另一實施例中，發光層112可包含其他常用之材料，例如AlxInyGa(1-x-y)N。在又一實施例中，該發光層112可具有多重量子井結構，包含多重量子井層(像是InGaN)及一具交替樣式之阻障層(像是GaN)。同樣地，該發光層112之形成方法可為MOCVD、MBE、HVPE、LPE、或其他可適用的CVD方法。A light emitting layer 112 (also referred to as an active layer) is formed over the lower light emitting diode layer 110. The luminescent layer 112 can comprise a homogeneous junction, a heterojunction, a single quantum well (SQW), or a multiple quantum well (MQW) structure. In a preferred embodiment, the luminescent layer 112 comprises undoped n-type gallium indium nitride (GaxInyN(1-x-y)). In another embodiment, the luminescent layer 112 may comprise other commonly used materials, such as AlxInyGa(1-x-y)N. In yet another embodiment, the luminescent layer 112 can have multiple quantum well structures including multiple quantum well layers (such as InGaN) and an alternating pattern of barrier layers (such as GaN). Similarly, the light-emitting layer 112 can be formed by MOCVD, MBE, HVPE, LPE, or other applicable CVD methods.
一上發光二極體層114係沉積於該發光層112之上。該上發光二極體層114較佳係包含具有第二型態導電性質摻雜的III-N族化合物，像是p-GaN。該第二型態導電性質係係與第一型態導電性質相反。該上發光二極體層114可利用與下發光二極體層110相同之製程所形成。An upper LED layer 114 is deposited over the luminescent layer 112. The upper LED layer 114 preferably comprises a III-N compound doped with a second type of conductive property, such as p-GaN. The second type of electrically conductive property system is opposite to the first type of electrically conductive property. The upper LED layer 114 can be formed by the same process as the lower LED layer 110.
值得注意的是上述之描述係為一般發光二極體結構之概述，用來達到說明的目的。其它膜層，像是分佈式布拉格反射層、全位向反射層、緩衝/成核層、或披覆/接觸層等，可以視需要加入於發光二極體結構中。此外，值得注意的是，本發明所述之單一層、或複合層，其可由相同之材料或不同的材料所構成。It is worth noting that the above description is an overview of the general LED structure for the purpose of illustration. Other film layers, such as a distributed Bragg reflector layer, a full-reflective layer, a buffer/nucleation layer, or a cladding/contact layer, may be added to the light-emitting diode structure as needed. Furthermore, it is worth noting that the single layer or composite layer of the present invention may be composed of the same material or different materials.
舉例來說，該下發光二極體層及該上發光二極體層可分別包含一或一以上之接觸層及一或一以上之披覆層，其可由相同或不同之材料所形成。該發光二極體結構可依材料的型態及使用目的而不同。本發明實施例所述之發光二極體結構可變化為許多型態是可被預期的。For example, the lower LED layer and the upper LED layer may respectively comprise one or more contact layers and one or more cladding layers, which may be formed of the same or different materials. The structure of the light emitting diode may vary depending on the type of the material and the purpose of use. The structure of the light-emitting diode according to the embodiment of the present invention can be changed into many types which are expected.
第2圖係繪示根據本發明一實施例，形成一電流阻擋層202形成於該上發光二極體層114之內。該電流阻擋層202包含形成於該上發光二極體層114內之部份區域114或是形成於形成在該發光二極體結構104之上的導電層/基板之內，該電流阻擋層202係包含一電阻材料。值得注意的是，第2圖所示延著上發光二極體層114底部所形成之該電流阻擋層202僅為一圖示。該電流阻擋層202可以配置於任何位於上發光二極體層114內之位置。舉例來說，該電流阻擋層202可延著該上發光二極體層114上表面配置，或是形成於該上發光二極體層114內的中間位置。FIG. 2 illustrates the formation of a current blocking layer 202 formed within the upper LED layer 114 in accordance with an embodiment of the present invention. The current blocking layer 202 includes a partial region 114 formed in the upper LED layer 114 or formed in a conductive layer/substrate formed on the LED structure 104. The current blocking layer 202 is Contains a resistive material. It should be noted that the current blocking layer 202 formed on the bottom of the upper LED layer 114 shown in FIG. 2 is only an illustration. The current blocking layer 202 can be disposed at any location within the upper LED layer 114. For example, the current blocking layer 202 may be disposed on the upper surface of the upper LED layer 114 or in an intermediate position in the upper LED layer 114.
該電流阻擋層202所包含之電阻材料區域係以佈植雜質的方式形成於該上發光二極體層114內。在一實施例中，該電阻材料區域係利用佈植鎂離子於該上發光二極體層114內來形成。在此，一光阻層204可以利用旋轉塗佈的方式來形成及利用微影蝕刻的方式來圖形化。該光阻層204可用來達到選擇性佈植該上發光二極體層114的目的，以形成電流阻擋層202。The region of the resistive material included in the current blocking layer 202 is formed in the upper LED layer 114 by implanting impurities. In one embodiment, the region of resistive material is formed by implanting magnesium ions into the upper LED layer 114. Here, a photoresist layer 204 can be formed by spin coating and patterned by lithography. The photoresist layer 204 can be used for the purpose of selectively implanting the upper LED layer 114 to form the current blocking layer 202.
在該實施例中，該鎂離子之植佈劑量係介於約1 x 1014至約1 x 1015atoms/cm2及植佈能量係介於約10至約100KeV，並以箭頭208來表示。該電流阻擋層202之垂直位向係為該上發光二極體層114具有最大的佈植摻雜濃度的區域，可以利用調整佈植能量來控制摻雜濃度。其它的製程條件亦可被使用。此外，其它的摻質，例如Si、或C等，亦可用來佈植入該上發光二極體層114中以形成具有電阻阻抗的區域。該電流阻擋層202較佳係具有一寬度介於約50至約500μm間。In this embodiment, the plant-based fabric magnesium ions dosage between about 1 x 10 14 to about 1 x 10 15 atoms / cm 2 and an energy plant-based fabric of between about 10 to about 100 KeV, and is represented by arrow 208 . The vertical direction of the current blocking layer 202 is the region where the upper LED layer 114 has the largest implant doping concentration, and the implantation energy can be adjusted to control the doping concentration. Other process conditions can also be used. In addition, other dopants, such as Si, or C, may be used to implant into the upper LED layer 114 to form regions having resistive impedance. The current blocking layer 202 preferably has a width of about 50. It is between about 500 μm.
第3圖係根據本發明一較佳實施例繪示一上電極302及一下電極304。舉例來說，該上電極302可以使用一自對準“掀舉”製程，其中該上電極302係沉積於該圖形化之光阻層204，接著移除非所需的電極材料及光阻層204。該上電極302係提供一電性連結至該上發光二極體層114，而該下電極304係提供一電性連結至該下發光二極體層110。在一實施例中，該下發光二極體層110係為一n-型半導體，而該下電極304較佳係由一或一以上之金屬或合金所形成之歐姆接觸，例如Ti/Al、或Ti/Au等合金。在此，該上電極302與該p型上發光二極體層114達到歐姆接觸，且上電極302可由一或一以上之金屬或合金所形成，例如Ni/Au等。 FIG. 3 illustrates an upper electrode 302 and a lower electrode 304 in accordance with a preferred embodiment of the present invention. For example, the upper electrode 302 can use a self-aligned "twisting" process in which the upper electrode 302 is deposited on the patterned photoresist layer 204, followed by removal of the undesired electrode material and photoresist layer. 204. The upper electrode 302 is electrically connected to the upper LED layer 114, and the lower electrode 304 is electrically connected to the lower LED layer 110. In one embodiment, the lower LED layer 110 is an n-type semiconductor, and the lower electrode 304 is preferably an ohmic contact formed of one or more metals or alloys, such as Ti/Al, or Alloy such as Ti/Au. Here, the upper electrode 302 is in ohmic contact with the p-type upper light emitting diode layer 114, and the upper electrode 302 may be formed of one or more metals or alloys, such as Ni/Au or the like.
一熟知此技藝之人士可了解將該上電極302形成於該電流阻擋層202之正上方的用意。如果沒有形成該電流阻擋層202，由該上電極302流經該發光層112並流入該下發光二極體層110之電流路徑大體上將會是一直線路徑。因此，該發光層112所發出的光部份被該上電極302所遮蔽，大幅降低該發光二極體裝置的發光效率。當放置該上電極302於一電流阻擋層202之上時，將使得原本由該上電極30直線流入該下發光二極體層110的電流，改為延著該電流阻擋層202四周流動，如第3圖之虛線箭頭所示。因此，當電流行經該上發光二極體層114及該下發光二極體層110之間時，由該發光層112所發出的大體上不會被該上電極302所遮蔽。 A person skilled in the art will appreciate the purpose of forming the upper electrode 302 directly above the current blocking layer 202. If the current blocking layer 202 is not formed, the current path from the upper electrode 302 through the luminescent layer 112 and into the lower luminescent diode layer 110 will generally be a straight path. Therefore, the portion of the light emitted by the luminescent layer 112 is shielded by the upper electrode 302, which greatly reduces the luminous efficiency of the illuminating diode device. When the upper electrode 302 is placed over a current blocking layer 202, the current flowing directly from the upper electrode 30 into the lower LED layer 110 will be caused to flow around the current blocking layer 202, as described in 3 is shown by the dotted arrow. Therefore, when a current flows between the upper LED layer 114 and the lower LED layer 110, the emission from the LED 112 is substantially not obscured by the upper electrode 302.
請參第4及5圖，係為根據本發明另一實施例所示之形成發光二極體裝置400方法。第4圖包含與第1、及2圖所述發光二極體裝置100實質上相同之膜層，且該等膜層係使用與第1、及2圖相似之製造方法及材料。其不同處在於，在第4圖中，係以一第一上發光二極體層402取代該上發光二極體層(第1-3圖所示之膜層114)。第4圖所示之該第一上發光二極體層402之厚度係小於第1-3圖所示之上發光二極體層114的所需最後厚度。 4 and 5 are diagrams showing a method of forming a light-emitting diode device 400 according to another embodiment of the present invention. Fig. 4 includes substantially the same film layers as those of the light-emitting diode devices 100 of Figs. 1 and 2, and the film layers are manufactured using the same manufacturing methods and materials as those of Figs. The difference is that in FIG. 4, the upper light-emitting diode layer 402 is replaced by a first upper light-emitting diode layer 402 (the film layer 114 shown in FIGS. 1-3). The thickness of the first upper light emitting diode layer 402 shown in FIG. 4 is smaller than the desired final thickness of the upper light emitting diode layer 114 shown in FIGS. 1-3.
於第1-3圖所示之實施例，用來形成該電流阻擋層202之佈植製程有可能會傷害到該上發光二極體層114之表面。且形成及移除光阻層204亦有可能傷害到該上發光二極體層114之表面。在某些例子中，該上發光二極體層114之表面傷害將對形成於其上之膜層造成電性接觸的不良影響，像是接下來所形成之該上電極302，降低所得之發光二極體裝置其性能及穩定性。在一實施例中，該表面傷害對於較厚之膜層的影響大於較薄的膜層。在此，形成一如第4圖所示之第一上發光二極體層402。接著，利用佈植方式將該電流阻擋層202形成於該第一上發光二極體層402之內，如圖所示之箭頭208。該電流阻擋層202之形成方式如同第2圖所述。在形成該電流阻擋層202之前或後，可以再進行一活化退火製程。In the embodiment shown in FIGS. 1-3, the implantation process for forming the current blocking layer 202 may damage the surface of the upper LED layer 114. Forming and removing the photoresist layer 204 may also damage the surface of the upper LED layer 114. In some examples, the surface damage of the upper LED layer 114 will adversely affect the electrical contact formed on the film layer formed thereon, such as the subsequent formation of the upper electrode 302, which reduces the resulting illumination. The performance and stability of the polar body device. In one embodiment, the surface damage has a greater impact on the thicker film layer than the thinner film layer. Here, a first upper light emitting diode layer 402 as shown in FIG. 4 is formed. Next, the current blocking layer 202 is formed within the first upper LED layer 402 by implantation, as shown by the arrow 208. The current blocking layer 202 is formed as described in FIG. An activation annealing process may be performed before or after the formation of the current blocking layer 202.
第5圖係繪示本發明一實施例所述之該發光二極體裝置400，其係在形成一第二上發光二極體層502於該第一上發光二極體層402之後所得。該第二上發光二極體層502可與該第一上發光二極體層402具有相同材料且以相類似的製造方法所形成。該第二上發光二極體層502與該第一上發光二極體層402之總厚度係介於約1000至約3000之間，且該第二上發光二極體層502較佳係具有一厚度約300至約2700之間。FIG. 5 illustrates the LED device 400 according to an embodiment of the present invention, which is obtained after forming a second upper LED layer 502 on the first upper LED layer 402. The second upper light emitting diode layer 502 can have the same material as the first upper light emitting diode layer 402 and be formed in a similar manufacturing method. The total thickness of the second upper LED layer 502 and the first upper LED layer 402 is about 1000. To about 3000 The second upper LED layer 502 preferably has a thickness of about 300. To approximately 2700 between.
一熟知此技藝之人士可了解將該第二上發光二極體層502形成於該第一上發光二極體層402之上，可修復該第一上發光二極體層402之表面，因此可提供一較佳之表面(第二上發光二極體層502之上表面)以利後續形成於其上的膜層達到電生接觸。之後，進行後續製程以完成該發光二極體裝置400。該後續製程可包含，舉例來說，如第3圖所繪示之形成上電極302及下電極304。該發光二極體裝置400之操作係與揭露於第3圖之該發光二極體裝置100相類似。A person skilled in the art can understand that the second upper LED layer 502 is formed on the first upper LED layer 402, and the surface of the first upper LED layer 402 can be repaired, thereby providing a The preferred surface (the upper surface of the second upper LED layer 502) facilitates electrical contact with the subsequently formed film layer. Thereafter, a subsequent process is performed to complete the light emitting diode device 400. The subsequent process may include, for example, forming the upper electrode 302 and the lower electrode 304 as shown in FIG. The operation of the light-emitting diode device 400 is similar to that of the light-emitting diode device 100 disclosed in FIG.
雖然本發明已以數個較佳實施例揭露如上，然其並非用以限定本發明，任何所屬技術領域中具有通常知識者，在不脫離本發明之精神和範圍內，當可作任意之更動與潤飾，因此本發明之保護範圍當視後附之申請專利範圍所界定者為準。While the invention has been described above in terms of several preferred embodiments, it is not intended to limit the scope of the present invention, and any one of ordinary skill in the art can make any changes without departing from the spirit and scope of the invention. And the scope of the present invention is defined by the scope of the appended claims.
100‧‧‧發光二極體裝置 100‧‧‧Lighting diode device
102‧‧‧基板 102‧‧‧Substrate
104‧‧‧發光二極體結構 104‧‧‧Lighting diode structure
110‧‧‧下發光二極體層 110‧‧‧Lower LED layer
112‧‧‧發光層 112‧‧‧Lighting layer
114‧‧‧上發光二極體層 114‧‧‧Upper LED layer
202‧‧‧電流阻擋層 202‧‧‧current blocking layer
204‧‧‧光阻層 204‧‧‧Photoresist layer
208‧‧‧離子佈植製程 208‧‧‧Ion implantation process
302‧‧‧上電極 302‧‧‧Upper electrode
304‧‧‧下電極 304‧‧‧ lower electrode
402‧‧‧第一上發光二極體層 402‧‧‧First upper LED layer
502‧‧‧第二上發光二極體層 502‧‧‧Second upper LED layer
第1-3圖係繪示本發明一實施例所述發光二極體裝置之製程步驟；以及第4-5圖係繪示本發明另一實施例所述發光二極體裝置之製程步驟。 1 to 3 are schematic diagrams showing the manufacturing steps of the LED device according to an embodiment of the present invention; and FIGS. 4-5 are diagrams showing the manufacturing steps of the LED device according to another embodiment of the present invention.
100‧‧‧發光二極體裝置 100‧‧‧Lighting diode device
102‧‧‧基板 102‧‧‧Substrate
104‧‧‧發光二極體結構 104‧‧‧Lighting diode structure
110‧‧‧下發光二極體層 110‧‧‧Lower LED layer
112‧‧‧發光層 112‧‧‧Lighting layer
114‧‧‧上發光二極體層 114‧‧‧Upper LED layer
202‧‧‧電流阻擋層 202‧‧‧current blocking layer
302‧‧‧上電極 302‧‧‧Upper electrode
304‧‧‧下電極 304‧‧‧ lower electrode
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| US7049170B2 (en) * | 2003-12-17 | 2006-05-23 | Tru-Si Technologies, Inc. | Integrated circuits and packaging substrates with cavities, and attachment methods including insertion of protruding contact pads into cavities |
| US7060601B2 (en) * | 2003-12-17 | 2006-06-13 | Tru-Si Technologies, Inc. | Packaging substrates for integrated circuits and soldering methods |
| KR100588904B1 (en) * | 2003-12-31 | 2006-06-09 | 동부일렉트로닉스 주식회사 | Method for fabricating copper interconnect |
| JP4467318B2 (en) * | 2004-01-28 | 2010-05-26 | Ｎｅｃエレクトロニクス株式会社 | Semiconductor device, chip alignment method for multi-chip semiconductor device, and method for manufacturing chip for multi-chip semiconductor device |
| US7508001B2 (en) * | 2004-06-21 | 2009-03-24 | Panasonic Corporation | Semiconductor laser device and manufacturing method thereof |
| US7262495B2 (en) * | 2004-10-07 | 2007-08-28 | Hewlett-Packard Development Company, L.P. | 3D interconnect with protruding contacts |
| US7619296B2 (en) * | 2005-02-03 | 2009-11-17 | Nec Electronics Corporation | Circuit board and semiconductor device |
| KR100593937B1 (en) * | 2005-03-30 | 2006-06-30 | 삼성전기주식회사 | Led package using si substrate and fabricating method thereof |
| US7297574B2 (en) * | 2005-06-17 | 2007-11-20 | Infineon Technologies Ag | Multi-chip device and method for producing a multi-chip device |
| GB2432455A (en) * | 2005-11-17 | 2007-05-23 | Sharp Kk | Growth of a semiconductor layer structure |
| KR100721147B1 (en) * | 2005-11-23 | 2007-05-22 | 삼성전기주식회사 | Vertically structured gan type led device |
| KR100867529B1 (en) | 2006-11-14 | 2008-11-10 | 삼성전기주식회사 | Vertical light emitting device |
| US8399273B2 (en) * | 2008-08-18 | 2013-03-19 | Tsmc Solid State Lighting Ltd. | Light-emitting diode with current-spreading region |
| US8507940B2 (en) * | 2010-04-05 | 2013-08-13 | Taiwan Semiconductor Manufacturing Company, Ltd. | Heat dissipation by through silicon plugs |
-
2009
- 2009-08-12 US US12/539,757 patent/US8399273B2/en active Active
- 2009-08-18 TW TW098127687A patent/TWI517431B/en active
- 2009-08-18 CN CN 200910166790 patent/CN101656287B/en active Active
-
2013
- 2013-03-11 US US13/793,198 patent/US8823049B2/en active Active
-
2014
- 2014-08-29 US US14/472,495 patent/US20150053918A1/en not_active Abandoned
Also Published As
| Publication number | Publication date |
|---|---|
| US8823049B2 (en) | 2014-09-02 |
| US20100038674A1 (en) | 2010-02-18 |
| CN101656287A (en) | 2010-02-24 |
| US20130264539A1 (en) | 2013-10-10 |
| TW201010145A (en) | 2010-03-01 |
| US8399273B2 (en) | 2013-03-19 |
| CN101656287B (en) | 2012-08-29 |
| US20150053918A1 (en) | 2015-02-26 |
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