TWI508226B - 在基板的孔穴中鑲嵌具有直通矽晶穿孔的晶粒用以扇入封裝疊加的電互連之半導體裝置和方法 - Google Patents

在基板的孔穴中鑲嵌具有直通矽晶穿孔的晶粒用以扇入封裝疊加的電互連之半導體裝置和方法 Download PDF

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TWI508226B
TWI508226B TW099123256A TW99123256A TWI508226B TW I508226 B TWI508226 B TW I508226B TW 099123256 A TW099123256 A TW 099123256A TW 99123256 A TW99123256 A TW 99123256A TW I508226 B TWI508226 B TW I508226B
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semiconductor
semiconductor die
substrate
die
component
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TW099123256A
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TW201104797A (en
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Reza A Pagaila
Heap Hoe Kuan
Dioscoro A Merilo
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Stats Chippac Ltd
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Description

在基板的孔穴中鑲嵌具有直通矽晶穿孔的晶粒用以扇入封裝疊加的電互連之半導體裝置和方法
本發明大體上關於半導體裝置，且更明確地說，其關於以直通矽晶穿孔鑲嵌半導體組件於基板的孔穴中用以扇入封裝疊加的電互連之半導體裝置和方法。
在現代的電子產品中經常會發現半導體裝置。半導體裝置會有不同數量與密度的電子組件。離散半導體裝置通常含有一種類型的電子組件，舉例來說，發光二極體(Light Emitting Diode，LED)、小訊號電晶體、電阻器、電容器、電感器、以及功率金屬氧化物半導體場效電晶體(Metal Oxide Semiconductor Field Effect Transistor，MOSFET)。整合半導體裝置典型地含有數百個至數百萬個電子組件。整合半導體裝置的範例包含微控制器、微處理器、電荷耦合裝置(Charged-Coupled Device，CCD)、太陽能電池、以及數位微鏡裝置(Digital Micro-mirror Device，DMD)。
半導體裝置會實施廣泛的功能，例如，高速計算、傳送與接收電磁訊號、控制電子裝置、將太陽光轉換成電能、以及產生電視顯示器的視覺投影。在娛樂領域、通訊領域、電力轉換領域、網路領域、電腦領域以及消費性產品領域中皆會發現半導體裝置。在軍事應用、航空、自動車、工業控制器、以及辦公室設備中同樣會發現半導體裝置。
半導體裝置利用半導體材料的電氣特性。半導體材料的原子結構使得可藉由施加電場或基礎電流或是經由摻雜處理來操縱其導電性。摻雜會將雜質引入至該半導體材料之中，以便操縱及控制該半導體裝置的傳導性。
半導體裝置含有主動式電氣結構與被動式電氣結構。主動式結構(其包含雙極電晶體與場效電晶體)控制電流的流動。藉由改變摻雜程度以及施加電場或基礎電流，該電晶體會提高或限制電流的流動。被動式結構(其包含電阻器、電容器、以及電感器)創造用以實施各式各樣電功能所需要的電壓和電流之間的關係。該等被動式結構與主動式結構會被電連接以形成讓該半導體裝置實施高速計算及其它實用功能的電路。
半導體裝置通常會使用兩種複雜的製程來製造，也就是，前端製造以及後端製造，每一者皆可能涉及數百道步驟。前端製造涉及在一半導體晶圓的表面上形成複數個晶粒。每一個晶粒通常相同並且含有藉由電連接主動式組件和被動式組件而形成的電路。後端製造涉及從已完成的晶圓中單體化裁切個別的晶粒並且封裝該晶粒以提供結構性支撐及環境隔離。
半導體製造的其中一個目標便係製造較小的半導體裝置。較小的裝置典型地會消耗較少電力，具有較高效能並且能夠更有效地生產。此外，較小的半導體裝置還具有較小的覆蓋面積，這係為較小的末端產品所需要的。藉由改善前端製程可以達成較小的晶粒尺寸，從而導致具有較小以及較高密度之主動式組件和被動式組件的晶粒。後端製程可以藉由改善電互連及封裝材料而導致具有較小覆蓋面積的半導體裝置封裝。
在許多應用中，期望能相互堆疊複數個半導體晶粒以形成一堆疊的半導體封裝。不過，堆疊半導體晶粒卻同時會增加該半導體封裝的整體尺寸與厚度。舉例來說，在包含三或更多個堆疊晶粒的封裝中，該封裝會需要用到數塊基板以幫助在每一個半導體晶粒之間形成電互連線。在習知的封裝中，舉例來說，在形成扇入封裝疊加(Fan-in Package-on-Package，Fi-PoP)封裝時經常會需要用到三塊基板，以便在頂端晶粒、中間晶粒、以及底部晶粒之間形成必要的連接線。即使只用到一塊基板，被鑲嵌在該基板對邊上的晶粒仍會增加封裝厚度並且延長傳導路徑，其會損降電氣效能。
本發明需要在扇入封裝疊加配置中電互連堆疊半導體晶粒。據此，於其中一實施例中，本發明係一種製造半導體裝置的方法，其包括下面步驟：提供一具有第一表面與第二表面的基板；形成一貫穿該基板之該等第一表面與第二表面的孔穴；形成一貫穿一第一半導體晶粒的穿孔(via)；利用傳導材料填充該穿孔，用以形成一傳導穿孔；將該第一半導體晶粒鑲嵌在該孔穴之中；將一囊封劑沉積於該基板及該第一半導體晶粒的第一表面上方；從該第一半導體晶粒的第一表面處移除該囊封劑的一部分以暴露該傳導穿孔；以及將一第二半導體晶粒鑲嵌於該第一半導體晶粒的該第一表面。該第二半導體晶粒會被電連接至該傳導穿孔。該方法進一步包含下面步驟：將一第三半導體晶粒鑲嵌在該第一半導體晶粒之第一表面對面的該第一半導體晶粒之第二表面的上方。
於另一實施例中，本發明係一種製造半導體裝置的方法，其包括下面步驟：提供一具有第一表面與第二表面的基板；形成一貫穿該基板之該等第一表面與第二表面的孔穴；以及將一第一半導體組件鑲嵌在該孔穴之中。該第一半導體組件具有一傳導直通矽晶穿孔(TSV)。該方法還進一步包含下面步驟：將一囊封劑沉積於該基板及該第一半導體組件的第一表面上方；從該第一半導體組件的第一表面處移除該囊封劑的一部分以暴露該傳導直通矽晶穿孔；以及將一第二半導體組件鑲嵌於該第一半導體組件的該第一表面。該第二半導體組件會被電連接至該傳導直通矽晶穿孔。
於另一實施例中，本發明係一種製造半導體裝置的方法，其包括下面步驟：提供一具有第一表面與第二表面的基板；形成一貫穿該基板之該等第一表面與第二表面的孔穴；以及將一第一半導體組件鑲嵌在該孔穴的上方。該第一半導體組件具有一傳導直通矽晶穿孔。該方法還進一步包含下面步驟：將一第二半導體組件鑲嵌於該第一半導體組件的一第一表面的上方；將一囊封劑沉積於該基板及第二半導體組件的上方；以及將一第三半導體組件鑲嵌在該第一半導體組件之第一表面對面的該第一半導體組件之第二表面的上方。
於另一實施例中，本發明係一種半導體裝置，其包括一基板，其具有一被形成貫穿該基板之第一表面與第二表面的孔穴。一第一半導體組件會被鑲嵌在該孔穴之中。該第一半導體組件具有一傳導直通矽晶穿孔。一第二半導體組件被鑲嵌於該第一半導體組件的一第一表面的上方。一囊封劑會被沉積於該基板及第二半導體組件的上方。一第三半導體組件會被鑲嵌在該第一半導體組件之第一表面對面的該第一半導體組件之第二表面的上方。
下面的說明書中會參考圖式於一或多個實施例中來說明本發明，於該等圖式中，相同的符號代表相同或相似的元件。雖然本文會以達成本發明目的的最佳模式來說明本發明；不過，熟習本技術的人士便會明白，本發明希望涵蓋受到下面揭示內容及圖式支持的隨附申請專利範圍及它們的等效物所定義的本發明的精神與範疇內可能併入的替代、修正以及等效物。
半導體裝置通常會使用兩種複雜的製程來製造：前端製造和後端製造。前端製造涉及在一半導體晶圓的表面上形成複數個晶粒。該晶圓上的每一個晶粒皆含有主動式電子組件和被動式電子組件，它們會被電連接而形成功能性電路。主動式電子組件(例如電晶體與二極體)能夠控制電流的流動。被動式電子組件(例如電容器、電感器、電阻器、以及變壓器)會創造用以實施電路功能所需要的電壓和電流之間的關係。
被動式組件和主動式組件會藉由一連串的製程步驟被形成在該半導體晶圓的表面上方，該等製程步驟包含：摻雜、沉積、光微影術、蝕刻、以及平坦化。摻雜會藉由離子植入或是熱擴散將雜質引入至半傳導材料之中。摻雜製程會修改主動式裝置中半傳導材料的導電性，將該半傳導材料轉換成絕緣體、導體，或是響應於電場或基礎電流來動態改變半傳導材料傳導性。含有摻雜的不同類型和程度的範圍，參雜安排為必要的，以在施加一電場或基礎電流時讓該電晶體提高或限制電流的流動。
主動式組件和被動式組件係由具有不同電氣特性的多層材料構成。該等層能夠藉由各式各樣的沉積技術來形成，其某種程度上取決於要被沉積的材料的類型。舉例來說，薄膜沉積可能包含：化學氣相沉積(Chemical Vapor Deposition，CVD)製程、物理氣相沉積(Physical Vapor Deposition，PVD)製程、電解質電鍍製程、以及無電極電鍍製程。每一層通常都會被圖樣化，以便形成主動式組件、被動式組件、或是組件之間的電連接線的一部分。
該等層能夠利用光微影術來圖樣化，其涉及在要被圖樣化的層的上方沉積光敏材料，舉例來說，光阻。圖樣會利用光從一光罩處被轉印至該光阻。該光阻圖樣中受到光作用的部分會利用溶劑移除，從而露出下方層之中要被圖樣化的部分。該光阻中的剩餘部分會被移除，從而留下一已圖樣化層。或者，某些類型的材料會利用無電極電鍍以及電解質電鍍之類的技術，藉由將該材料直接沉積至先前沉積及/或蝕刻製程所形成的區域或空隙(void)之中而被圖樣化。
在一既有圖樣的上方沉積一薄膜材料可能會擴大下方圖樣並且產生一不均勻平坦的表面。生產較小且更密集封裝的主動式組件和被動式組件需要用到均勻平坦的表面。平坦化作用可用來從晶圓的表面處移除材料，並且產生均勻平坦的表面。平坦化作用涉及利用一研磨墊來研磨晶圓的表面。在研磨期間加入研磨的材料以及腐蝕性的化學藥劑到晶圓的表面。結合研磨料的機械作用及化學藥劑的磨蝕作用來移除任何不規律的表面形狀，從而產生均勻平坦的表面。
後端製造係指將已完成的晶圓切割或單體化裁切成個別晶粒，並且接著封裝該晶粒，以達結構性支撐及環境隔離的效果。為單體化裁切晶粒，晶圓會沿著該晶圓中被稱為切割道(saw street)或切割線(scribe)的非功能性區域被刻痕並且折斷。該晶圓會利用雷射切割工具或鋸片來進行單體化裁切。經過單體化裁切之後，個別晶粒便會被鑲嵌至包含接針或接觸觸墊的封裝基板，以便和其它系統組件進行互連。被形成在該半導體晶粒上方的接觸觸墊接著會被連接至該封裝裡面的接觸觸墊。該等電連接線可利用焊料凸塊、短柱凸塊、導電膏、或是焊線來製成。一囊封劑或是其它模造材料會被沉積在該封裝的上方，以提供物理性支撐和電隔離。接著，該已完成的封裝便會被***一電氣系統之中並且讓其它系統組件可取用該半導體裝置的功能。
圖1說明一電子裝置50，其具有一晶片載體基板或是印刷電路板(PCB)52，其表面上鑲嵌複數個半導體封裝。電子裝置50可能係某一類型的半導體封裝或是多種類型的半導體封裝，端視應用而定。為達解釋目的，圖1中顯示不同類型的半導體封裝。
電子裝置50可能係一獨立系統，其會使用該等半導體封裝來實施一或多項電功能。或者，電子裝置50亦可能係一較大型系統中的一子組件。舉例來說，電子裝置50可能係一圖形卡、一網路介面卡、或是能夠被***在一電腦之中的其它訊號處理卡。該半導體封裝可能包含：微處理器、記憶體、特定應用積體電路(Application Specific Integrated Circuits，ASIC)、邏輯電路、類比電路、射頻電路、離散式裝置、或是其它半導體晶粒或電子組件。
在圖1中，印刷電路板52提供一通用基板，用以結構性支撐及電互連被鑲嵌在該印刷電路板之上的半導體封裝。利用蒸發製程、電解質電鍍製程、無電極電鍍製程、網印製程、或是其它合宜的金屬沉積製程形成導體訊號線路54於印刷電路板52的一表面上方或是多層裡面。訊號線路54在該等半導體封裝、被鑲嵌的組件、以及其它外部系統組件中的每一者之間提供電通訊。線路54還會提供連接至每一個該等半導體封裝的電力連接線及接地連接線。
於某些實施例中，一半導體裝置會有兩個封裝層。第一層封裝係一種以機械方式及電氣方式將該半導體晶粒附接至一中間載體的技術。第二層封裝則涉及以機械方式及電氣方式將該中間載體附接至該印刷電路板。於其它實施例中，一半導體裝置可能僅有該第一層封裝，其中，該晶粒會以機械方式及電氣方式直接被鑲嵌至該印刷電路板。
為達解釋目的，顯示在印刷電路板52上之顯示數種類型的第一層封裝，其包含焊線封裝56以及覆晶58。除此之外，還顯示被鑲嵌在印刷電路板52上的數種類型之第二層封裝，其包含：球柵陣列(Ball Grid Array，BGA)60；凸塊晶片載體(Bump Chip Carrier，BCC)62；雙直列封裝(Dual In-line Package，DIP)64；平台格柵陣列(Land Grid Array，LGA)66；多晶片模組(Multi-Chip Module，MCM)68；方形扁平無導線封裝(Quad Flat Non-leaded package，QFN)70；以及方形扁平封裝72。端視系統需求而定，任何半導體封裝之組合、任何結合第一及第二層封裝形式之組合和其他電子組件皆能夠被連接至印刷電路板52。於某些實施例中，電子裝置50包含單一附接半導體封裝；而其它實施例則要求多個互連封裝。藉由在單一基板上方組合一或多個半導體封裝，製造商便能夠將事先製造的組件併入電子裝置和系統之中。因為該等半導體封裝包含精密的功能，所以，電子裝置能夠使用較便宜的組件及有效率的製程來製造。所產生的裝置比較不可能失效而且製造價格較低廉，從而讓消費者的成本會較低。
圖2a至2c所示的係示範性半導體封裝。圖2a所示的係被鑲嵌在印刷電路板52之上的DIP 64的進一步細節。半導體晶粒74包含一含有類比電路或數位電路的主動區，該等類比電路或數位電路會被執行為形成在該晶粒裡面的主動式裝置、被動式裝置、傳導層、以及介電層，並且會根據該晶粒的電氣設計來進行電互連。舉例來說，該電路可能包含被形成在半導體晶粒74之主動區裡面的一或多個電晶體、二極體、電感器、電容器、電阻器、以及其它電路元件。接觸觸墊76係一或多層傳導材料(例如鋁(Al)、銅(Cu)、錫(Sn)、鎳(Ni)、金(Au)、或是銀(Ag))製成，並且會被電連接至形成在半導體晶粒74裡面的電路元件。在DIP64的組裝期間，半導體晶粒74會利用一金-矽共熔合金層或是膠黏材料(例如熱環氧樹脂)被黏著至一中間載體78。封裝主體包含一絕緣封裝材料，例如聚合物或是陶瓷。導體導線80以及焊線82會在半導體晶粒74與印刷電路板52之間提供電互連。囊封劑84會被沉積在該封裝的上方，防止濕氣和粒子進入該封裝並污染晶粒74或焊線82以達環境保護的目的。
圖2b所示的係被鑲嵌在印刷電路板52之上的BCC 62的進一步細節。半導體晶粒88會利用底層填充材料或環氧樹脂膠黏材料92被黏著在載體90的上方。焊線94會在接觸觸墊96與98之間提供第一層封裝互連。模造化合物或囊封劑100會被沉積在半導體晶粒88和焊線94的上方，用以為該裝置提供物理性支撐以及電隔離效果。接觸觸墊102會利用合宜的金屬沉積製程(例如電解質電鍍或無電極電鍍)被形成在印刷電路板52的表面上方以防止氧化。接觸觸墊102會被電連接至印刷電路板52中的一或多條導體訊號線路54。凸塊104會被形成在BCC 62的接觸觸墊98和印刷電路板52的接觸觸墊102之間。
在圖2c中，半導體晶粒58會利用覆晶樣式的第一層封裝以面朝下的方式被鑲嵌至中間載體106。半導體晶粒58的主動區108含有類比電路或數位電路，該等類比電路或數位電路會被執行為根據該晶粒的電氣設計所形成的主動式裝置、被動式裝置、傳導層、以及介電層。舉例來說，該電路可能包含在主動區108裡面的一或多個電晶體、二極體、電感器、電容器、電阻器、以及其它電路元件。半導體晶粒58會經由凸塊110以電氣方式及機械方式連接至載體106。
BGA 60會利用凸塊112的BGA樣式第二層封裝以電氣方式及機械方式被連接至印刷電路板52。半導體晶粒58會經由凸塊110、訊號線114、以及凸塊112被電連接至印刷電路板52中的導體訊號線路54。一模造化合物或囊封劑116會被沉積在半導體晶粒58和載體106的上方，以為該裝置提供物理性支撐以及電隔離效果。該覆晶半導體裝置從半導體晶粒58上的主動式裝置至印刷電路板52上的傳導軌提供一條短的電傳導路徑，以便縮短訊號傳導距離、降低電容、並且改善整體電路效能。於另一實施例中，該半導體晶粒58會利用覆晶樣式的第一層封裝以機械方式及電氣方式直接連接至印刷電路板52，而沒有中間載體106。
圖3a至3h所示的係和圖1及2a至2c有關之利用在一基板的孔穴中鑲嵌具有直通矽晶穿孔的半導體晶粒來形成扇入封裝疊加的製程。圖3a所示的係一半導體晶圓120，其含有基礎基板材料122，例如，矽、鍺、砷化鎵、磷化銦、或是碳化矽，用以達成結構性支撐。一絕緣層或鈍化層124會被形成在基板材料122的第一表面上方。同樣地，一絕緣層或鈍化層126會被形成在基板材料122的第二表面上方，其在基板材料122的第一表面的對面。該等絕緣層124與126含有由下面所製成的一或多層：二氧化矽(SiO2)、氮化矽(Si3N4)、氮氧化矽(SiON)、五氧化二鉭(Ta2O5)、三氧化二鋁(Al2O3)、或是具有相似絕緣特性及結構特性的其它材料。該等絕緣層124與126係利用下面方法所形成：PVD、CVD、印刷、旋塗、噴塗、燒結、或是熱氧化。如圖所示，絕緣層124與126的一部分會被移除。
在圖3b中，會利用PVD、CVD、濺鍍、電解質電鍍、無電極電鍍製程、或是其它合宜的金屬沉積製程形成導電層128於絕緣層124的已移除部分之中並且形成導電層130於絕緣層126的已移除部分之中。傳導層128與130可能係由下面所製成的一或多層：Al、Cu、Sn、Ni、Au、Ag、或是其它合宜的導電材料。傳導層128與130中的部分可能為共接或被電隔離，端視該半導體裝置的設計及功能而定。
在圖3c中，一孔穴或開口136利用雷射切割工具或鋸片被形成，以貫穿絕緣層124與126以及基板材料122。孔穴136可能為矩形、圓形、或是其它合宜的形狀因數。
在圖3d中，半導體晶粒或組件138會被設置在孔穴136中並且利用背膠140固定。半導體晶粒138包含一含有類比電路或數位電路的主動表面142，該等類比電路或數位電路會被執行為形成在該晶粒裡面的主動式裝置、被動式裝置、傳導層、以及介電層，並且會根據該晶粒的電氣設計與功能來進行電互連。舉例來說，該電路可能包含被形成在主動表面142裡面的一或多個電晶體、二極體、以及其它電路元件，用以執行基頻類比電路或數位電路，例如，數位訊號處理器(DSP)、ASIC、記憶體、或是其它訊號處理電路。半導體晶粒138可能還含有用於射頻訊號處理的整合被動元件(IPD)，例如，電感器、電容器、以及電阻器。一典型的射頻系統在一或多個半導體封裝中需要用到多個整合被動元件，用以實施必要的電功能。具有直通有機穿孔(Through Organic Via，TOV)的半導體晶粒能夠被設置在孔穴136中。於另一實施例中，半導體晶粒或組件138係一被設置在孔穴136中之具有多個直通矽晶穿孔的中介片。
複數個穿孔係利用雷射鑽鑿或蝕刻製程(例如深反應離子蝕刻(Deep Reactive Ion Etching，DRIE))被形成貫穿半導體晶粒或中介片138。該等穿孔會利用PVD、CVD、電解質電鍍、無電極電鍍製程、或是其它合宜的金屬沉積製程被Al、Cu、Sn、Ni、Au、Ag、鈦(Ti)、W、多晶矽、或是其它合宜的導電材料填充，以便形成傳導直通矽晶穿孔(Through Silicon Via，TSV)144。直通矽晶穿孔144會在將該晶粒鑲嵌於孔穴136中之前被形成在半導體晶粒138中。直通矽晶穿孔144會根據晶粒的設計以在主動表面142和基板120上之非必要的重新分配層(ReDistribution Layer，RDL)145來進行電互連。
在圖3e中，焊線146會被形成在傳導層128與直通矽晶穿孔144之間。一囊封劑或模造化合物148會利用焊膏印刷(paste printing)塗敷機、壓縮模造(compressive molding)塗敷機、轉印模造(transfer molding)塗敷機、液體囊封劑模造塗敷機、真空層疊塗敷機、或是其它合宜的塗敷機被沉積在半導體晶粒138與絕緣層124的上方。囊封劑148可為聚合物復合材料，例如，具有填充劑的環氧樹脂、具有填充劑的環氧丙烯酸酯、或是具有適當填充劑的聚合物。囊封劑148係非導體並且為半導體裝置提供環境保護，避免受到外部元素與污染物破壞。一部分的囊封劑148會被蝕刻製程移除，以暴露主動表面142與直通矽晶穿孔144。背膠140會在圖3f中被移除。
在圖3g中，該裝置會被倒轉，而半導體晶粒或組件150則會利用凸塊152被鑲嵌至直通矽晶穿孔144，在主動表面142的對面。半導體晶粒150包含一含有類比電路或數位電路的主動表面154，該等類比電路或數位電路會被執行為形成在該晶粒裡面的主動式裝置、被動式裝置、傳導層、以及介電層，並且會根據該晶粒的電氣設計與功能來進行電互連。舉例來說，該電路可能包含被形成在主動表面154裡面的一或多個電晶體、二極體、以及其它電路元件，用以執行基頻類比電路或數位電路，例如，數位訊號處理器、ASIC、記憶體、或是其它訊號處理電路。半導體晶粒150可能還含有用於射頻訊號處理的整合被動元件，例如，電感器、電容器、以及電阻器。一典型的射頻系統在一或多個半導體封裝中需要用到多個整合被動元件，用以實施必要的電功能。一底層填充材料156(例如環氧樹脂)會被沉積在半導體晶粒150的下方。於另一實施例中，半導體組件150可能係被鑲嵌至直通矽晶穿孔144的離散半導體裝置。
一導電凸塊材料會利用蒸發製程、電解質電鍍製程、無電極電鍍製程、丸滴製程(ball drop)、或是網印製程被沉積在傳導層130的上方。該凸塊材料可能係Al、Sn、Ni、Au、Ag、Pb、Bi、Cu、焊料、以及它們的組合，其會有一非必要的助熔溶劑。舉例來說，該凸塊材料可能是Sn/Pb共熔合金、高鉛焊料、或是無鉛焊料。該凸塊材料會利用合宜的附著或焊接製程被焊接至傳導層130。於其中一實施例中，該凸塊材料會藉由將該凸塊材料加熱至其熔點以上而被回焊，以形成球狀的丸體或凸塊158。於某些應用中，凸塊158會被二次回焊，以便改善和傳導層130的電接觸效果。該等凸塊也能夠被壓縮焊接至傳導層130。凸塊158代表能夠被形成在傳導層130上方的其中一種類型的互連結構。該互連結構亦能夠使用焊線、短柱凸塊、微凸塊、或是其它電互連線。
在圖3h中，該裝置會再次被倒轉，而在覆晶配置中具有朝下方之接觸觸墊162的半導體晶粒或組件160則會利用凸塊164被鑲嵌至直通矽晶穿孔144。半導體晶粒160會被鑲嵌在囊封劑148的已移除部分中，以便縮減裝置厚度。半導體晶粒160包含一含有類比電路或數位電路的主動表面166，該等類比電路或數位電路會被執行為形成在該晶粒裡面的主動式裝置、被動式裝置、傳導層、以及介電層，並且根據該晶粒的電氣設計與功能來進行電互連。舉例來說，該電路可能包含被形成在主動表面166裡面的一或多個電晶體、二極體、以及其它電路元件，用以執行基頻類比電路或數位電路，例如，數位訊號處理器、ASIC、記憶體、或是其它訊號處理電路。半導體晶粒160可能還含有用於射頻訊號處理的整合被動元件，例如，電感器、電容器、以及電阻器。一典型的射頻系統在一或多個半導體封裝中需要用到多個整合被動元件，用以實施必要的電功能。於另一實施例中，半導體組件160可能係被鑲嵌至直通矽晶穿孔144的離散半導體裝置。
圖4顯示具有半導體晶粒、整合被動元件或中介片之扇入封裝疊加，其以直通矽晶穿孔或直通有機穿孔置於基板120之孔穴136中。該直通矽晶穿孔或直通有機穿孔電互連半導體組件150與160。藉由以直通矽晶穿孔或直通有機穿孔將半導體晶粒、整合被動元件、或中介片放置在孔穴136中，能夠降低扇入封裝疊加168的高度。此外，將半導體晶粒160鑲嵌在囊封劑148的已移除部分中亦縮減扇入封裝疊加168的厚度。經由被設置在孔穴136中的半導體晶粒、整合被動元件、或中介片的直通矽晶穿孔或直通有機穿孔進行直接連接，半導體組件150與160之間的訊號傳導距離會縮短。
圖5所示的係包含在圖3a至3f中所述之特點的扇入封裝疊加結構170。此外，層疊片或導線架中介片172會利用凸塊176被電連接至直通矽晶穿孔144。焊線146會經由中介片172被電連接至直通矽晶穿孔144。在覆晶配置中具有朝下方之接觸觸墊的半導體晶粒或組件178會利用凸塊182被鑲嵌至中介片172。半導體晶粒178包含一含有類比電路或數位電路的主動表面184，該等類比電路或數位電路會被執行為形成在該晶粒裡面的主動式裝置、被動式裝置、傳導層、以及介電層，並且會根據該晶粒的電氣設計與功能來進行電互連。舉例來說，該電路可能包含被形成在主動表面184裡面的一或多個電晶體、二極體、以及其它電路元件，用以執行基頻類比電路或數位電路，例如，數位訊號處理器、ASIC、記憶體、或是其它訊號處理電路。半導體晶粒178可能還含有用於射頻訊號處理的整合被動元件，例如，電感器、電容器、以及電阻器。一典型的射頻系統在一或多個半導體封裝中需要用到多個整合被動元件，用以實施必要的電功能。於另一實施例中，半導體組件178可能係被鑲嵌至中介片172的離散半導體裝置。圖3g至3h中所述的其餘特點皆會被加入至扇入封裝疊加結構170中。
圖6所示的係包含在圖3a至3f中所述之特點的扇入封裝疊加結構190。此外，埋置凸塊192被電連接至直通矽晶穿孔144與焊線46。一囊封劑或模造化合物193利用焊膏印刷塗敷機、壓縮模造塗敷機、轉印模造塗敷機、液體囊封劑模造塗敷機、真空層疊塗敷機、或是其它合宜的塗敷機被沉積在半導體晶粒138與絕緣層124的上方。或者，亦可形成多根埋置導體柱或模造穿孔取代形成埋置凸塊，以達更細間距互連的目的。囊封劑193可能係聚合物復合材料，例如，具有填充劑的環氧樹脂、具有填充劑的環氧丙烯酸酯、或是具有適當填充劑的聚合物。囊封劑193係非導體並且為半導體裝置提供環境保護，避免受到外部元素與污染物破壞。
在覆晶配置中具有朝下方之接觸觸墊的半導體晶粒或組件194利用凸塊196被鑲嵌至埋置凸塊192。半導體晶粒194包含一含有類比電路或數位電路的主動表面198，該等類比電路或數位電路會被執行為形成在該晶粒裡面的主動式裝置、被動式裝置、傳導層、以及介電層，並且根據該晶粒的電氣設計與功能來進行電互連。舉例來說，該電路可能包含被形成在主動表面198裡面的一或多個電晶體、二極體、以及其它電路元件，用以執行基頻類比電路或數位電路，例如，數位訊號處理器、ASIC、記憶體、或是其它訊號處理電路。半導體晶粒194可能還含有用於射頻訊號處理的整合被動元件，例如，電感器、電容器、以及電阻器。一典型的射頻系統在一或多個半導體封裝中需要用到多個整合被動元件，用以實施必要的電功能。於另一實施例中，半導體組件194可能係被鑲嵌至埋置凸塊192的離散半導體裝置。圖3g至3h中所述的其餘特點皆會被加入至扇入封裝疊加結構190中。凸塊192會讓半導體組件194被鑲嵌在囊封劑193的上方並且被電連接至直通矽晶穿孔144，其並不需要用到專屬的模具包封(mold chase)製程或特別的囊封製程以露出半導體晶粒138。
圖7所示的係包含和圖3a至3f相似特點的扇入封裝疊加結構200。此外，屏障材料或膜內繞線(wire-in-film，WIF)囊封材料202會被沉積在半導體晶粒138的上方，其不需要用到專屬的模具包封製程或特別的囊封製程以露出晶粒。圖3g至3h中所述的其餘特點皆會被加入至扇入封裝疊加結構200中。
圖8所示的係包含在圖3a至3f中所述之特點的扇入封裝疊加結構210。此外，半導體晶粒或組件212會利用凸塊218被鑲嵌在半導體晶粒138的上方並且被電連接至直通矽晶穿孔144與傳導層128。半導體晶粒212包含一含有類比電路或數位電路的主動表面214，該等類比電路或數位電路會被執行為被形成在該晶粒裡面的主動式裝置、被動式裝置、傳導層、以及介電層，並且會根據該晶粒的電氣設計與功能來進行電互連。舉例來說，該電路可能包含被形成在主動表面214裡面的一或多個電晶體、二極體、以及其它電路元件，用以執行基頻類比電路或數位電路，例如，數位訊號處理器、ASIC、記憶體、或是其它訊號處理電路。半導體晶粒212可能還含有用於射頻訊號處理的整合被動元件，例如，電感器、電容器、以及電阻器。一典型的射頻系統在一或多個半導體封裝中需要用到多個整合被動元件，用以實施必要的電功能。於另一實施例中，半導體晶粒或組件212係一被鑲嵌在半導體晶粒138上方具有多個直通矽晶穿孔的中介片。
複數個穿孔會利用雷射鑽鑿或蝕刻製程(例如DRIE)被形成貫穿半導體晶粒或中介片212。該等穿孔會利用PVD、CVD、電解質電鍍、無電極電鍍製程、或是其它合宜的金屬沉積製程以Al、Cu、Sn、Ni、Au、Ag、Ti、W、多晶矽、或是其它合宜的導電材料填充，以便形成傳導直通矽晶穿孔216。直通矽晶穿孔216會在將該半導體晶粒212鑲嵌於孔穴136上方之前被形成在半導體晶粒212中。直通矽晶穿孔216會根據晶粒的設計以非必要的RDL 219在主動表面214上進行電互連。
焊線220會被形成在傳導層128與直通矽晶穿孔216之間。一囊封劑或模造化合物222會利用焊膏印刷塗敷機、壓縮模造塗敷機、轉印模造塗敷機、液體囊封劑模造塗敷機、真空層疊塗敷機、或是其它合宜的塗敷機被沉積在半導體晶粒212與絕緣層124的上方。囊封劑222可能係聚合物復合材料，例如，具有填充劑的環氧樹脂、具有填充劑的環氧丙烯酸酯、或是具有適當填充劑的聚合物。囊封劑222係非導體並且會為半導體裝置提供環境保護，避免受到外部元素與污染物破壞。一部分的囊封劑222會被蝕刻製程移除，以便露出主動表面214與直通矽晶穿孔216。
半導體晶粒或組件224會利用凸塊226被鑲嵌至直通矽晶穿孔144，在主動表面142的對面。半導體晶粒224包含一含有類比電路或數位電路的主動表面228，該等類比電路或數位電路會被執行為形成在該晶粒裡面的主動式裝置、被動式裝置、傳導層、以及介電層，並且會根據該晶粒的電氣設計與功能來進行電互連。舉例來說，該電路可能包含被形成在主動表面228裡面的一或多個電晶體、二極體、以及其它電路元件，用以執行基頻類比電路或數位電路，例如，數位訊號處理器、ASIC、記憶體、或是其它訊號處理電路。半導體晶粒224可能還含有用於射頻訊號處理的整合被動元件，例如，電感器、電容器、以及電阻器。一典型的射頻系統在一或多個半導體封裝中需要用到多個整合被動元件，用以實施必要的電功能。一底層填充材料230(例如環氧樹脂)會被沉積在半導體晶粒224的下方。於另一實施例中，半導體組件224可能係被鑲嵌至直通矽晶穿孔144的離散半導體裝置。
一導電凸塊材料利用蒸發製程、電解質電鍍製程、無電極電鍍製程、丸滴製程、或是網印製程被沉積在傳導層130的上方。該凸塊材料可能係Al、Sn、Ni、Au、Ag、Pb、Bi、Cu、焊料、以及它們的組合，其會有一非必要的助熔溶劑。舉例來說，該凸塊材料可能是Sn/Pb共熔合金、高鉛焊料、或是無鉛焊料。該凸塊材料會利用合宜的附著或焊接製程被焊接至傳導層130。於一實施例中，該凸塊材料會藉由將該凸塊材料加熱至其熔點以上而被回焊，用以形成球狀的丸體或凸塊232。於某些應用中，凸塊232會被二次回焊，以便改善和傳導層130的電接觸效果。該等凸塊也能夠被壓縮焊接至傳導層130。凸塊232代表能夠被形成在傳導層130上方的其中一種類型的互連結構。該互連結構亦能夠使用焊線、短柱凸塊、微凸塊、或是其它電互連線。
在覆晶配置中具有朝下方之接觸觸墊的半導體晶粒或組件234會利用凸塊236被鑲嵌至直通矽晶穿孔216。半導體晶粒234包含一含有類比電路或數位電路的主動表面238，該等類比電路或數位電路會被執行為被形成在該晶粒裡面的主動式裝置、被動式裝置、傳導層、以及介電層，並且會根據該晶粒的電氣設計與功能來進行電互連。舉例來說，該電路可能包含被形成在主動表面238裡面的一或多個電晶體、二極體、以及其它電路元件，用以執行基頻類比電路或數位電路，例如，數位訊號處理器、ASIC、記憶體、或是其它訊號處理電路。半導體晶粒234可能還含有用於射頻訊號處理的整合被動元件，例如，電感器、電容器、以及電阻器。一典型的射頻系統在一或多個半導體封裝中需要用到多個整合被動元件，用以實施必要的電功能。於另一實施例中，半導體組件160可能係被鑲嵌至直通矽晶穿孔216的離散半導體裝置。
圖9所示的係包含圖3a至3f中所述之特點的扇入封裝疊加結構240。此外，半導體晶粒或組件242會部分被設置在孔穴136中且部分被設置在孔穴136的外面。半導體晶粒242進一步包含於孔穴136外面伸出於基板120上方的凹口或凹窩243。半導體晶粒242包含一含有類比電路或數位電路的主動表面244，該等類比電路或數位電路會被執行為形成在該晶粒裡面的主動式裝置、被動式裝置、傳導層、以及介電層，並且會根據該晶粒的電氣設計與功能來進行電互連。舉例來說，該電路可能包含被形成在主動表面244裡面的一或多個電晶體、二極體、以及其它電路元件，用以執行基頻類比電路或數位電路，例如，數位訊號處理器、ASIC、記憶體、或是其它訊號處理電路。半導體晶粒242可能還含有用於射頻訊號處理的整合被動元件，例如，電感器、電容器、以及電阻器。一典型的射頻系統在一或多個半導體封裝中需要用到多個整合被動元件，用以實施必要的電功能。於另一實施例中，半導體晶粒或組件242係具有多個直通矽晶穿孔的中介片，部分被設置在孔穴136中且部分被設置在孔穴136外面。
複數個穿孔會利用雷射鑽鑿或蝕刻製程(例如DRIE)被形成貫穿半導體晶粒或中介片242。該等穿孔會利用PVD、CVD、電解質電鍍、無電極電鍍製程、或是其它合宜的金屬沉積製程以Al、Cu、Sn、Ni、Au、Ag、Ti、W、多晶矽、或是其它合宜的導電材料填充，以便形成傳導直通矽晶穿孔246。直通矽晶穿孔246會在將該半導體晶粒242鑲嵌於孔穴136中之前被形成在半導體晶粒242中。直通矽晶穿孔246會根據晶粒的設計以非必要的RDL 245在主動表面244與基板120上進行電互連會有。凹口243中的直通矽晶穿孔246會利用凸塊248電連接至傳導層128。
焊線250會形成在傳導層128與直通矽晶穿孔246之間。一囊封劑或模造化合物252會利用焊膏印刷塗敷機、壓縮模造塗敷機、轉印模造塗敷機、液體囊封劑模造塗敷機、真空層疊塗敷機、或是其它合宜的塗敷機被沉積在半導體晶粒242與絕緣層124的上方。囊封劑252可能係聚合物復合材料，例如，具有填充劑的環氧樹脂、具有填充劑的環氧丙烯酸酯、或是具有適當填充劑的聚合物。囊封劑252係非導體並且會為半導體裝置提供環境保護，避免受到外部元素與污染物破壞。一部分的囊封劑252會被蝕刻製程移除，以便露出主動表面244與直通矽晶穿孔246。
半導體晶粒或組件254會利用凸塊256被鑲嵌至直通矽晶穿孔246，在主動表面244的對面。半導體晶粒254包含一含有類比電路或數位電路的主動表面258，該等類比電路或數位電路會被執行為形成在該晶粒裡面的主動式裝置、被動式裝置、傳導層、以及介電層，並且會根據該晶粒的電氣設計與功能來進行電互連。舉例來說，該電路可能包含被形成在主動表面258裡面的一或多個電晶體、二極體、以及其它電路元件，用以執行基頻類比電路或數位電路，例如，數位訊號處理器、ASIC、記憶體、或是其它訊號處理電路。半導體晶粒254可能還含有用於射頻訊號處理的整合被動元件，例如，電感器、電容器、以及電阻器。一典型的射頻系統在一或多個半導體封裝中需要用到多個整合被動元件，用以實施必要的電功能。一底層填充材料260(例如環氧樹脂)會被沉積在半導體晶粒254的下方。於另一實施例中，半導體組件254可能係被鑲嵌至直通矽晶穿孔246的離散半導體裝置。
一導電凸塊材料會利用蒸發製程、電解質電鍍製程、無電極電鍍製程、丸滴製程、或是網印製程被沉積在傳導層130的上方。該凸塊材料可能係Al、Sn、Ni、Au、Ag、Pb、Bi、Cu、焊料、以及它們的組合，其會有一非必要的助熔溶劑。舉例來說，該凸塊材料可能是Sn/Pb共熔合金、高鉛焊料、或是無鉛焊料。該凸塊材料會利用合宜的附著或焊接製程被焊接至傳導層130。於一實施例中，該凸塊材料會藉由將該凸塊材料加熱至其熔點以上而被回焊，用以形成球狀的丸體或凸塊262。於某些應用中，凸塊262會被二次回焊，以便改善和傳導層130的電接觸效果。該等凸塊也能夠被壓縮焊接至傳導層130。凸塊262代表能夠被形成在傳導層130上方的其中一種類型的互連結構。該互連結構亦能夠使用焊線、短柱凸塊、微凸塊、或是其它電互連線。
在覆晶配置中具有朝下方之接觸觸墊的半導體晶粒或組件264會利用凸塊266被鑲嵌至直通矽晶穿孔246。半導體晶粒264包含一含有類比電路或數位電路的主動表面268，該等類比電路或數位電路會被執行為形成在該晶粒裡面的主動式裝置、被動式裝置、傳導層、以及介電層，並且會根據該晶粒的電氣設計與功能來進行電互連。舉例來說，該電路可能包含被形成在主動表面268裡面的一或多個電晶體、二極體、以及其它電路元件，用以執行基頻類比電路或數位電路，例如，數位訊號處理器、ASIC、記憶體、或是其它訊號處理電路。半導體晶粒264可能還含有用於射頻訊號處理的整合被動元件，例如，電感器、電容器、以及電阻器。一典型的射頻系統在一或多個半導體封裝中需要用到多個整合被動元件，用以實施必要的電功能。於另一實施例中，半導體組件264可能係被鑲嵌至直通矽晶穿孔246的離散半導體裝置。
圖10所示的係包含圖3a至3c中所述之特點的扇入封裝疊加結構270以及被鑲嵌在孔穴136上方的半導體晶粒或組件274。半導體晶粒274包含一含有類比電路或數位電路的主動表面278，該等類比電路或數位電路會被執行為被形成在該晶粒裡面的主動式裝置、被動式裝置、傳導層、以及介電層，並且會根據該晶粒的電氣設計與功能來進行電互連。舉例來說，該電路可能包含被形成在主動表面278裡面的一或多個電晶體、二極體、以及其它電路元件，用以執行基頻類比電路或數位電路，例如，數位訊號處理器、ASIC、記憶體、或是其它訊號處理電路。半導體晶粒274可能還含有用於射頻訊號處理的整合被動元件，例如，電感器、電容器、以及電阻器。一典型的射頻系統在一或多個半導體封裝中需要用到多個整合被動元件，用以實施必要的電功能。於另一實施例中，半導體晶粒或組件274係被鑲嵌在孔穴136上方具有多個直通矽晶穿孔的中介片。
複數個穿孔會利用雷射鑽鑿或蝕刻製程(例如DRIE)被形成貫穿半導體晶粒或中介片274。該等穿孔會利用PVD、CVD、電解質電鍍、無電極電鍍製程、或是其它合宜的金屬沉積製程以Al、Cu、Sn、Ni、Au、Ag、Ti、W、多晶矽、或是其它合宜的導電材料填充，以便形成傳導直通矽晶穿孔280。直通矽晶穿孔280會在鑲嵌該半導體晶粒274之前被形成在該晶粒中。直通矽晶穿孔280會根據晶粒的設計以非必要的RDL 281在主動表面278上進行電互連。
焊線282會被形成在傳導層128與主動表面278之間。一囊封劑或模造化合物284會利用焊膏印刷塗敷機、壓縮模造塗敷機、轉印模造塗敷機、液體囊封劑模造塗敷機、真空層疊塗敷機、或是其它合宜的塗敷機被沉積在半導體晶粒274與絕緣層124的上方。囊封劑284可能係聚合物復合材料，例如，具有填充劑的環氧樹脂、具有填充劑的環氧丙烯酸酯、或是具有適當填充劑的聚合物。囊封劑284係非導體並且為半導體裝置提供環境保護，避免受到外部元素與污染物破壞。一部分的囊封劑284會被蝕刻製程移除，以便露出主動表面278與直通矽晶穿孔280。
半導體晶粒或組件286會利用凸塊288被鑲嵌至直通矽晶穿孔280，在主動表面278的對面。半導體晶粒286包含一含有類比電路或數位電路的主動表面290，該等類比電路或數位電路會被執行為形成在該晶粒裡面的主動式裝置、被動式裝置、傳導層、以及介電層，並且會根據該晶粒的電氣設計與功能來進行電互連。舉例來說，該電路可能包含被形成在主動表面290裡面的一或多個電晶體、二極體、以及其它電路元件，用以執行基頻類比電路或數位電路，例如，數位訊號處理器、ASIC、記憶體、或是其它訊號處理電路。半導體晶粒286可能還含有用於射頻訊號處理的整合被動元件，例如，電感器、電容器、以及電阻器。一典型的射頻系統在一或多個半導體封裝中需要用到多個整合被動元件，用以實施必要的電功能。一底層填充材料292(例如環氧樹脂)會被沉積在半導體晶粒286的下方。於另一實施例中，半導體組件286可能係被鑲嵌至直通矽晶穿孔280的離散半導體裝置。
一導電凸塊材料會利用蒸發製程、電解質電鍍製程、無電極電鍍製程、丸滴製程、或是網印製程被沉積在傳導層130的上方。該凸塊材料可能係Al、Sn、Ni、Au、Ag、Pb、Bi、Cu、焊料、以及它們的組合，其會有一非必要的助熔溶劑。舉例來說，該凸塊材料可能是Sn/Pb共熔合金、高鉛焊料、或是無鉛焊料。該凸塊材料會利用合宜的附著或焊接製程被焊接至傳導層130。於一實施例中，該凸塊材料會藉由將該凸塊材料加熱至其熔點以上而被回焊，用以形成球狀的丸體或凸塊294。於某些應用中，凸塊294會被二次回焊，以便改善和傳導層130的電接觸效果。該等凸塊也能夠被壓縮焊接至傳導層130。凸塊294代表能夠被形成在傳導層130上方的其中一種類型的互連結構。該互連結構亦能夠使用焊線、短柱凸塊、微凸塊、或是其它電互連線。
在覆晶配置中具有朝下方之接觸觸墊的半導體晶粒或組件296會利用凸塊298被鑲嵌至直通矽晶穿孔280。半導體晶粒296包含一含有類比電路或數位電路的主動表面300，該等類比電路或數位電路會被執行為形成在該晶粒裡面的主動式裝置、被動式裝置、傳導層、以及介電層，並且會根據該晶粒的電氣設計與功能來進行電互連。舉例來說，該電路可能包含被形成在主動表面300裡面的一或多個電晶體、二極體、以及其它電路元件，用以執行基頻類比電路或數位電路，例如，數位訊號處理器、ASIC、記憶體、或是其它訊號處理電路。半導體晶粒296可能還含有用於射頻訊號處理的整合被動元件，例如，電感器、電容器、以及電阻器。一典型的射頻系統在一或多個半導體封裝中需要用到多個整合被動元件，用以實施必要的電功能。於另一實施例中，半導體組件296可能係被鑲嵌至直通矽晶穿孔280的離散半導體裝置。
圖11所示的係被鑲嵌至印刷電路板312之扇入封裝疊加結構310，其包含圖3a至3g中所述之特點。一散熱片314會被擺放在半導體晶粒150之背表面與印刷電路板312之間。散熱片314可能係Al、Cu、或是具有高導熱係數的另一材料，以便為半導體晶粒150提供熱消散作用。
雖然本文已經詳細解釋過本發明的一或多個實施例；不過，熟練的技術人士便會瞭解，可以對該些實施例進行修改與改變，其並不會脫離隨後申請專利範圍中所提出的本發明的範疇。
50．．．電子裝置
52．．．印刷電路板(PCB)
54．．．線路
56．．．焊線封裝
58．．．覆晶
60．．．球柵陣列(BGA)
62．．．凸塊晶片載體(BCC)
64．．．雙直列封裝(DIP)
66．．．平台格柵陣列(LGA)
68．．．多晶片模組(MCM)
70．．．方形扁平無導線封裝(QFN)
72．．．方形扁平封裝
74．．．半導體晶粒
76．．．接觸觸墊
78．．．中間載體
80．．．導體導線
82．．．焊線
84．．．囊封劑
88．．．半導體晶粒
90．．．載體
92．．．底層填充材料或環氧樹脂膠黏材料
94．．．焊線
96．．．接觸觸墊
98．．．接觸觸墊
100．．．模造化合物或囊封劑
102．．．接觸觸墊
104．．．凸塊
106．．．載體
108．．．主動區
110．．．凸塊
112．．．凸塊
114．．．訊號線
116．．．模造化合物或囊封劑
120．．．半導體晶圓
122．．．基板材料
124．．．絕緣層或鈍化層
126．．．絕緣層或鈍化層
128．．．傳導層
130．．．傳導層
136．．．孔穴或閉口
138．．．半導體晶粒或組件
140．．．背膠
142．．．主動表面
144．．．直通矽晶穿孔
145．．．重新分配層
146．．．焊線
148．．．囊封劑或模造化合物
150．．．半導體晶粒或組件
152．．．凸塊
154．．．主動表面
156．．．底層填充材料
158．．．凸塊
160．．．半導體晶粒或組件
162．．．接觸觸墊
164．．．凸塊
166．．．主動表面
168．．．扇入封裝疊加
170．．．扇入封裝疊加結構
172．．．中介片
176．．．凸塊
178．．．半導體晶粒或組件
182．．．凸塊
184．．．主動表面
190．．．扇入封裝疊加結構
192．．．凸塊
193．．．囊封劑或模造化合物
194．．．半導體晶粒或組件
196．．．凸塊
198．．．主動表面
200．．．扇入封裝疊加結構
202．．．囊封材料
210．．．扇入封裝疊加結構
212．．．半導體晶粒或組件
214．．．主動表面
216．．．直通矽晶穿孔
218．．．凸塊
219．．．重新分配層
220．．．焊線
222．．．囊封劑
224．．．半導體晶粒
226．．．凸塊
228．．．主動表面
230．．．底層填充材料
232．．．凸塊
234．．．半導體晶粒或組件
236．．．凸塊
238．．．主動表面
240．．．扇入封裝疊加結構
242．．．半導體晶粒或組件
243．．．凹口或凹窩
244．．．主動表面
245．．．重新分配層
246．．．直通矽晶穿孔
248．．．凸塊
250．．．焊線
252．．．囊封劑或模造化合物
254．．．半導體晶粒或組件
256．．．凸塊
258．．．主動表面
260．．．底層填充材料
262．．．球狀丸體或凸塊
264．．．半導體晶粒或組件
266．．．凸塊
268．．．主動表面
270．．．扇入封裝疊加結構
274．．．半導體晶粒或組件
278．．．主動表面
280．．．直通矽晶穿孔
281．．．重新分配層
282．．．焊線
284．．．囊封劑或模造化合物
286．．．半導體晶粒或組件
288．．．凸塊
290．．．主動表面
292．．．底層填充材料
294．．．球狀丸體或凸塊
296．．．半導體晶粒或組件
298．．．凸塊
300．．．主動表面
310．．．扇入封裝疊加結構
312．．．印刷電路板
314．．．散熱片
圖1說明一印刷電路板，在其表面上鑲嵌著不同類型的封裝；
圖2a至2c說明被鑲嵌至該印刷電路板的代表性半導體封裝的進一步細節；
圖3a至3h說明利用在一基板的孔穴中鑲嵌具有直通矽晶穿孔的半導體晶粒來形成扇入封裝疊加；
圖4說明經由該基板孔穴中的直通矽晶穿孔晶粒互連的堆疊晶粒；
圖5說明利用被設置在該基板之孔穴中的一直通矽晶穿孔中介片互連的堆疊晶粒；
圖6說明利用該基板之孔穴中的埋置凸塊及直通矽晶穿孔互連的堆疊晶粒；
圖7說明利用被膜內繞線覆蓋的直通矽晶穿孔及焊線互連的堆疊晶粒；
圖8說明利用被鑲嵌在該基板孔穴上方的直通矽晶穿孔晶粒互連的堆疊晶粒；
圖9說明利用延伸在該基板孔穴外面的直通矽晶穿孔晶粒互連的堆疊晶粒；
圖10說明利用被設置在該基板孔穴外面的直通矽晶穿孔晶粒互連的堆疊晶粒；以及
圖11說明利用具有堆疊晶粒和散熱片的扇入封裝疊加。
122．．．基板材料
124．．．絕緣層或鈍化層
126．．．絕緣層或鈍化層
128．．．傳導層
130．．．傳導層
138．．．半導體晶粒或組件
142．．．主動表面
144．．．直通矽晶穿孔
146．．．焊線
148．．．囊封劑或模造化合物
150．．．半導體晶粒或組件
152．．．凸塊
154．．．主動表面
156．．．底層填充材料
158．．．凸塊
160．．．半導體晶粒或組件
162．．．接觸觸墊
164．．．凸塊
166．．．主動表面
168．．．扇入封裝疊加

Claims (15)

  1. 一種製造半導體裝置的方法，其包括：提供一基板；形成一貫穿該基板的第一孔穴；形成一貫穿一第一半導體晶粒的穿孔；利用傳導材料填充該穿孔，用以形成一傳導穿孔；將該第一半導體晶粒鑲嵌在該第一孔穴之中；將一囊封劑沉積於該基板及該第一半導體晶粒的第一表面上方；移除該囊封劑的一部分以產生一第二孔穴於該囊封劑中並且露出該第一半導體晶粒的第一表面；將一第二半導體晶粒鑲嵌於該第一半導體晶粒的該第一表面，且該第二半導體晶粒的一主動表面被設置在該第二孔穴之中以減少該半導體裝置的高度，該第二半導體晶粒會被電連接至該傳導穿孔；以及將一第三半導體晶粒鑲嵌在該第一半導體晶粒之第一表面對面的該第一半導體晶粒之第二表面的上方，使得該第三半導體晶粒貫穿在該第一半導體晶粒中的該傳導穿孔而電性地連接至該第二半導體晶粒。
  2. 如申請專利範圍第1項的方法，其進一步包含：在該基板上形成一第一傳導層；以及在該第一傳導層與傳導穿孔之間形成一焊線。
  3. 如申請專利範圍第1項的方法，其進一步包含將一中介片設置在該第一半導體晶粒與第二半導體晶粒之間。
  4. 如申請專利範圍第1項的方法，其進一步包含將一具有多個傳導穿孔的第四半導體晶粒設置在該第一半導體晶粒與第二半導體晶粒之間。
  5. 如申請專利範圍第1項的方法，其中，該第一半導體晶粒會延伸在該第一孔穴的上方。
  6. 一種製造半導體裝置的方法，其包括：提供一基板；形成一貫穿該基板之第一孔穴；提供一第一半導體組件；形成一傳導直通矽晶穿孔(TSV)貫穿該第一半導體組件；將該第一半導體組件鑲嵌在該第一孔穴的上方；將一囊封劑沉積於該基板及該第一半導體組件之一第一表面的上方；移除在該第一半導體組件上方之該囊封劑的一部分以在該囊封劑中產生一第二孔穴；以及將一第二半導體組件鑲嵌於該第一半導體組件的該第一表面的上方，且該第二半導體組件的一部分被設置在該第二孔穴之中。
  7. 如申請專利範圍第6項的方法，其進一步包含將在該第一半導體組件與第二半導體組件之間形成多個凸塊。
  8. 如申請專利範圍第6項的方法，其進一步包含將一中介片設置在該第一半導體組件與第二半導體組件之間。
  9. 如申請專利範圍第6項的方法，其進一步包含將一具 有傳導直通矽晶穿孔的第四半導體組件設置在該第一半導體組件與第二半導體組件之間。
  10. 如申請專利範圍第6項的方法，其中，該第一半導體組件係一半導體晶粒、整合被動元件、或是中介片。
  11. 如申請專利範圍第6項的方法，其進一步包含：在該基板上形成一第一傳導層；在該第一傳導層與傳導直通矽晶穿孔之間形成一焊線；以及將膜內繞線材料沉積在該焊線上。
  12. 一種半導體裝置，其包括：一第一基板，其包含一被形成在該第一基板中之孔穴；一第二基板，其包含一被形成貫穿該第二基板之傳導穿孔，該第二基板係被設置於該第一基板的該孔穴的上方；一囊封劑，其被沉積於該第一基板及第二基板的上方；以及一第一半導體晶粒，其被設置在電連接至該傳導穿孔的該第二基板之一第一表面的上方。
  13. 如申請專利範圍第12項的半導體裝置，其進一步包含被形成在該第二基板上方的該囊封劑中的一凹口，其中該第一半導體晶粒係被設置為至少部分地在該第二基板之該第一表面上方的該凹口之中。
  14. 如申請專利範圍第12項的半導體裝置，其進一步包含被設置在相對於該第二基板的該第一表面之該第二基板的一第二表面上方的一第二半導體晶粒，並且該第二半導 體晶粒透過在該第二基板中的該傳導穿孔而被電連接至該第一半導體晶粒。
  15. 如申請專利範圍第12項的半導體裝置，其進一步包含：一傳導層，其被形成於該第一基板上；以及一焊線，其被形成於該傳導層和該傳導穿孔之間。
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