TWI501360B - Tape for heat dissipating member, chip on film type semiconductor package including heat dissipating member, and electronic apparatus including the same - Google Patents
Tape for heat dissipating member, chip on film type semiconductor package including heat dissipating member, and electronic apparatus including the same Download PDFInfo
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- TWI501360B TWI501360B TW098112534A TW98112534A TWI501360B TW I501360 B TWI501360 B TW I501360B TW 098112534 A TW098112534 A TW 098112534A TW 98112534 A TW98112534 A TW 98112534A TW I501360 B TWI501360 B TW I501360B
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
- H01L2224/161—Disposition
- H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/321—Disposition
- H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/32225—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73201—Location after the connecting process on the same surface
- H01L2224/73203—Bump and layer connectors
- H01L2224/73204—Bump and layer connectors the bump connector being embedded into the layer connector
Description
本申請案主張在韓國專利局所申請的韓國專利申請號為10-2008-0095518(申請日為2008年9月29日)、韓國專利申請號為10-2008-0035821(申請日為2008年4月17日)以及韓國專利申請號為10-2008-0088469(申請日為2008年9月8日)的優先權，對於認可編入文獻參照之指定國家，藉由參照而將下述專利申請案內容編入至本申請案中，作為本申請案的一部分。The Korean Patent Application No. 10-2008-0095518 (filed on September 29, 2008) and the Korean Patent Application No. 10-2008-0035821 (Application Date: 2008) Priority of the patent application No. 10-2008-0088469 (the application date is September 8, 2008), and the following patent application contents by reference to the designated country that is approved for reference in the literature. It is incorporated in this application as part of this application.
本發明是有關於一種半導體封裝(semiconductor package)，且特別是有關於一種薄膜上晶片(chip on film,COF)型半導體封裝，在此薄膜上晶片型半導體封裝中，半導體元件是附著在可撓性薄膜(flexible film)上。此外，本發明還有關於一種散熱構件用膠帶，能夠傳送散熱構件。再者，本發明還有關於一種包含薄膜上晶片型半導體封裝的電子裝置。The present invention relates to a semiconductor package, and more particularly to a chip on film (COF) type semiconductor package in which a semiconductor element is attached to a flexible semiconductor chip package. On a flexible film. Further, the present invention relates to a tape for a heat dissipating member capable of conveying a heat dissipating member. Furthermore, the present invention is also directed to an electronic device including a wafer-on-chip semiconductor package.
為了進一步擴大液晶顯示器(liquid crystal display,LCD)市場，需要降低價格、增大顯示螢幕且提高效能，且需要在小區域內設置更多的畫素(pixels)。結果是，液晶顯示器裝置中的用來控制每個畫素的驅動晶片的引線間距(lead pitch)變細，且目前已研究出與此相關的各種封裝方法。液晶顯示器領域通常採用的封裝方法的範例包括捲帶載體封裝法(tape carrier package,TCP)、晶粒-玻璃接合法(chip on glass,COG)、薄膜上晶片法(chip on film,COF)等。捲帶載體封裝法於1980年代末首次引進，用以大規模生產高解析度監視器(high resolution monitor)，自那時起一直是液晶顯示器領域最受青睞的方法。然而，從1990年代末開始，由於細引線間距所導致之成本降低且產量提高，使得薄膜上晶片法的市場份額增大。In order to further expand the liquid crystal display (LCD) market, it is necessary to lower the price, increase the display screen and improve the performance, and it is necessary to set more pixels in a small area. As a result, the lead pitch of the driving wafer for controlling each pixel in the liquid crystal display device is thinned, and various packaging methods related thereto have been studied so far. Examples of packaging methods commonly used in the field of liquid crystal displays include tape carrier package (TCP), chip on glass (COG), chip on film (COF), etc. . The tape carrier packaging method was first introduced in the late 1980s to mass produce high resolution monitors and has been the most popular method in the field of liquid crystal displays since then. However, since the late 1990s, the market share of the wafer method on the film has increased due to the cost reduction and increased yield due to the fine lead pitch.
隨著通訊裝置的小型化趨勢，薄膜上晶片法成為一種新開發的封裝法，以應對在液晶顯示器裝置中使用驅動積體電路(integrated circuits,ICs)的趨勢。根據薄膜上晶片法，當電視機與監視器的驅動頻率從60Hz增大到120Hz時，驅動積體電路的驅動負載隨之增大，以實施一種高解析度顯示裝置。如此一來，積體電路所產生的熱量就成為一個嚴重的問題。為了解決熱量產生問題，日本專利第4,014,591號中揭露了一種在絕緣基板的後表面(rear surface)上形成散熱板(heat dissipating panel)來驅散由形成在此絕緣基板之頂面上的半導體元件所產生之熱量的方法，以此作為熱量產生問題的解決辦法。With the trend toward miniaturization of communication devices, the wafer-on-wafer method has become a newly developed packaging method to cope with the trend of using integrated circuits (ICs) in liquid crystal display devices. According to the wafer method on the film, when the driving frequency of the television and the monitor is increased from 60 Hz to 120 Hz, the driving load for driving the integrated circuit is increased to implement a high-resolution display device. As a result, the heat generated by the integrated circuit becomes a serious problem. In order to solve the problem of heat generation, a heat dissipating panel is formed on a rear surface of an insulating substrate to dissipate a semiconductor component formed on a top surface of the insulating substrate in Japanese Patent No. 4,014,591. The method of generating heat as a solution to the problem of heat generation.
舉個薄膜上晶片型半導體封裝應用的例子，在諸如液晶顯示器面板之類的電子裝置中，用黏合劑來將薄膜上晶片型半導體封裝黏在基板的邊緣表面上，此薄膜上晶片型半導體封裝可向基板的側面彎曲、且被此電子裝置的框架(chassis)壓著並固定住。As an example of a wafer-on-a-chip semiconductor package application, in an electronic device such as a liquid crystal display panel, an adhesive is used to adhere a thin film-on-chip semiconductor package to an edge surface of a substrate. It can be bent toward the side of the substrate and pressed and fixed by the chassis of the electronic device.
然而，在這種薄膜上晶片型半導體封裝是用電子裝置的框架來壓著並固定的先前技術中，當電子裝置被長時間使用時，框架會受到來自各個方向的外力，包括向上的、向下的、向左的、向右的等。於是，在框架與散熱板相互接觸的位置，散熱板常常與絕緣基板分離。半導體元件所產生的熱量是經絕緣基板、散熱板以及框架這一散熱途徑來驅散，因此散熱板與絕緣基板的分離會導致此散熱途徑中斷而造成散熱效率降低一半。另外，薄膜上晶片型半導體封裝也可能從電子裝置上分離。However, in the prior art in which the wafer type semiconductor package is pressed and fixed by the frame of the electronic device, when the electronic device is used for a long time, the frame is subjected to external forces from various directions, including upward and upward directions. Lower, left, right, etc. Thus, the heat sink is often separated from the insulating substrate at a position where the frame and the heat sink are in contact with each other. The heat generated by the semiconductor component is dissipated through the heat dissipation path of the insulating substrate, the heat dissipation plate, and the frame. Therefore, the separation of the heat dissipation plate and the insulating substrate causes the heat dissipation path to be interrupted, thereby reducing the heat dissipation efficiency by half. In addition, the wafer-type semiconductor package on the thin film may also be separated from the electronic device.
本發明提供一種具有改良散熱效率的薄膜上晶片型半導體封裝。The present invention provides a thin film-on-chip type semiconductor package having improved heat dissipation efficiency.
本發明也提供一種呈現改良散熱效率、能穩定地固定在電子裝置上、並長時間使用的薄膜上晶片型半導體封裝。The present invention also provides a thin film-on-chip type semiconductor package which exhibits improved heat dissipation efficiency, can be stably fixed on an electronic device, and is used for a long period of time.
本發明還提供一種散熱元件膠帶，用來製造依照本發明的一種薄膜上晶片型半導體封裝。The present invention also provides a heat dissipating component tape for fabricating a thin film on-chip semiconductor package in accordance with the present invention.
本發明還提供一種電子裝置，依照本發明的一種薄膜上晶片型半導體封裝應用在此電子裝置上。The present invention also provides an electronic device to which an on-film type semiconductor package according to the present invention is applied.
本發明還提供一種具有改良散熱效率的膠帶封裝以及包含此膠帶封裝的一種顯示裝置。The present invention also provides a tape package having improved heat dissipation efficiency and a display device including the tape package.
依照本發明的一觀點，提供一種薄膜上晶片型半導體封裝，其包括：可撓性的絕緣基板；半導體元件，配置在此絕緣基板的頂面上；以及散熱元件，配置在絕緣基板的後表面上；其中，於絕緣基板的後表面與散熱元件之間形成有一空間。According to an aspect of the present invention, a thin film-on-chip semiconductor package includes: a flexible insulating substrate; a semiconductor element disposed on a top surface of the insulating substrate; and a heat dissipating component disposed on a rear surface of the insulating substrate And a space is formed between the rear surface of the insulating substrate and the heat dissipating component.
依照本發明的另一觀點，提供一種薄膜上晶片型半導體元件，其包括：可撓性的絕緣基板；半導體元件，配置在此絕緣基板的頂面上；散熱元件，配置在此絕緣基板的後表面上；黏性元件，將絕緣基板的後表面與散熱元件附著在一起；以及壓力吸收帶(pressure absorbing zone)，能夠緩解外界施加的壓力。According to another aspect of the present invention, a thin film-on-wafer type semiconductor device includes: a flexible insulating substrate; a semiconductor element disposed on a top surface of the insulating substrate; and a heat dissipating component disposed behind the insulating substrate On the surface; a viscous element that attaches the rear surface of the insulating substrate to the heat dissipating component; and a pressure absorbing zone that relieves externally applied pressure.
此壓力吸收帶可以是中空體(empty space)。可選擇的是，此壓力吸收帶可包括能夠比黏性元件更有效地緩解外界所施加的壓力的材料。This pressure absorbing band can be an empty space. Alternatively, the pressure absorbing band may comprise a material that is more effective in relieving the pressure applied by the outside than the viscous element.
壓力吸收帶可形成在對應於散熱元件之一的一個或多個位置。The pressure absorbing band may be formed at one or more locations corresponding to one of the heat dissipating elements.
此壓力吸收帶可被絕緣基板、散熱元件以及黏性元件所密封。可選擇的是，此壓力吸收帶也可不密封，所以此壓力吸收帶連接至外界。The pressure absorbing tape can be sealed by an insulating substrate, a heat dissipating member, and a viscous member. Alternatively, the pressure absorbing belt may not be sealed, so the pressure absorbing belt is connected to the outside.
壓力吸收帶可以是絕緣基板的後表面與散熱元件之間的黏性元件被局部移除而形成的空間。在此情形下，可移除的有：與絕緣基板的後表面相接觸的黏性元件的頂面的一部分、與散熱元件相接觸的黏性元件的後表面的一部分、或黏性元件的中心部分。The pressure absorbing tape may be a space formed by the partial removal of the viscous element between the rear surface of the insulating substrate and the heat dissipating member. In this case, removable: a portion of the top surface of the viscous element in contact with the rear surface of the insulating substrate, a portion of the rear surface of the viscous element in contact with the heat dissipating member, or the center of the viscous element section.
可選擇的是，壓力吸收帶也可以是絕緣基板的後表面與散熱元件之間的黏性元件實體上從絕緣基板的後表面上分離(而不是局部移除黏性元件)而形成的空間、或黏性元件與散熱元件之間形成的空間。Alternatively, the pressure absorbing tape may also be a space formed by physically separating the viscous element between the rear surface of the insulating substrate and the heat dissipating component from the rear surface of the insulating substrate (rather than partially removing the viscous component), Or a space formed between the viscous element and the heat dissipating component.
可選擇的是，壓力吸收帶也可以是與黏性元件相接觸的散熱元件被局部移除(而不是黏性元件的一部分被移除)而形成的空間，或散熱元件與黏性元件兩者都被局部移除而形成的空間。Alternatively, the pressure absorbing belt may also be a space formed by the heat dissipating member in contact with the viscous element being partially removed (instead of a part of the viscous element being removed), or both the heat dissipating component and the viscous component. Space that is partially removed.
黏性元件與散熱元件的水平形狀可相同。黏性元件與散熱元件的水平形狀可以是具有倒角或圓角的矩形。黏合元件與散熱元件的水平形狀可變化多端，即，圓形及/或多邊形。黏合元件與散熱元件的水平形狀可不相同。The horizontal shape of the viscous element and the heat dissipating component can be the same. The horizontal shape of the viscous element and the heat dissipating element may be a rectangle having chamfered or rounded corners. The horizontal shape of the bonding element and the heat dissipating component can be varied, that is, circular and/or polygonal. The horizontal shape of the bonding element and the heat dissipating component may be different.
壓力吸收帶的高度可介於50nm與300nm之間。The height of the pressure absorbing band can be between 50 nm and 300 nm.
依照本發明的另一觀點，提供一種散熱元件膠帶，此散熱元件膠帶包括：承載帶(carrier tape)；散熱元件，附著在承載帶上；以及黏性元件，用來將承載帶與散熱元件附著在一起，其中承載帶之頂面與散熱元件之間形成壓力吸收帶。According to another aspect of the present invention, a heat dissipating component tape is provided, the heat dissipating component tape comprising: a carrier tape; a heat dissipating component attached to the carrier tape; and a adhesive component for attaching the carrier tape to the heat dissipating component Together, a pressure absorbing band is formed between the top surface of the carrier tape and the heat dissipating component.
依照本發明的另一觀點，提供一種電子裝置，此電子裝置包括：基板；薄膜上晶片型半導體封裝，附著在基板的表面上；以及框架，用來壓著並固定住附著在基板上的薄膜上晶片型半導體封裝。此薄膜上晶片型半導體封裝包括：可撓性的絕緣基板；半導體元件，配置在此絕緣基板的頂面上；散熱元件，配置在此絕緣基板的後表面上；以及黏性元件，將絕緣基板的後表面與散熱元件附著在一起，其中絕緣基板的後表面與散熱元件之間形成壓力吸收帶，能夠緩解外界施加的壓力。According to another aspect of the present invention, an electronic device includes: a substrate; a wafer-on-wafer semiconductor package attached to a surface of the substrate; and a frame for pressing and fixing the film attached to the substrate Upper wafer type semiconductor package. The thin film-on-chip semiconductor package includes: a flexible insulating substrate; a semiconductor element disposed on a top surface of the insulating substrate; a heat dissipating component disposed on a rear surface of the insulating substrate; and a viscous component, the insulating substrate The rear surface is attached to the heat dissipating member, and a pressure absorbing band is formed between the rear surface of the insulating substrate and the heat dissipating member, which can relieve the pressure applied from the outside.
框架可與散熱元件相接觸，且壓力吸收帶可形成在框架與散熱元件相互接觸的位置。The frame may be in contact with the heat dissipating member, and the pressure absorbing belt may be formed at a position where the frame and the heat dissipating member are in contact with each other.
依照本發明的另一觀點，提供一種膠帶封裝，此膠帶封裝包括：基膜(base film)；電路圖案，配置在基膜的第一表面上；以及保護膜，配置在基膜與電路圖案上，使得電路圖案的一部分暴露出來。半導體晶片(semiconductor chip)附著在電路圖案的暴露部分上。黏著層配置在基膜的第二表面上，與半導體晶片相對應，其中第二表面是位於半導體晶片所在的第一表面的對面。According to another aspect of the present invention, a tape package is provided, the tape package comprising: a base film; a circuit pattern disposed on the first surface of the base film; and a protective film disposed on the base film and the circuit pattern , exposing a portion of the circuit pattern. A semiconductor chip is attached to the exposed portion of the circuit pattern. The adhesive layer is disposed on the second surface of the base film corresponding to the semiconductor wafer, wherein the second surface is opposite the first surface on which the semiconductor wafer is located.
黏著層可包括遇熱會變硬的材料、在室溫下會變硬的材料或遇紫外線(ultraviolet rays)會變硬的材料，且黏著層可透過兩步硬化過程來變硬。黏著層在第一硬化步驟中可達到20%至40%的硬化，在第二硬化步驟中可達到90%至100%的硬化。硬化步驟之後，黏著層的體積相對於硬化操作之前的體積可發生0.1%範圍內的變化，且黏著層可具有0.5W/mK至10W/mK的導熱性(heat conductivity)。此外，黏著層可具有0℃至200℃的玻璃轉變溫度(glass transition temperature)(Tg)，且可具有5ppm/℃至30ppm/℃的熱膨脹係數(coefficient of thermal expansion,CTE)。The adhesive layer may include a material that hardens when heated, a material that hardens at room temperature, or a material that hardens with ultraviolet rays, and the adhesive layer can be hardened by a two-step hardening process. The adhesive layer can achieve 20% to 40% hardening in the first hardening step and 90% to 100% hardening in the second hardening step. After the hardening step, the volume of the adhesive layer may vary within a range of 0.1% with respect to the volume before the hardening operation, and the adhesive layer may have a heat conductivity of 0.5 W/mK to 10 W/mK. Further, the adhesive layer may have a glass transition temperature (Tg) of from 0 ° C to 200 ° C and may have a coefficient of thermal expansion (CTE) of from 5 ppm / ° C to 30 ppm / ° C.
黏著層上可更配置一薄膜元件。此薄膜元件可包含相對於基膜而言具有異質性(heterogeneity)的材料，使得此薄膜元件容易從基膜上分離。半導體晶片與基膜之間的空間可用底膠材料(underfill material)來填充，使得凸塊(bumps)與電路圖案的暴露部分被覆蓋著。A thin film component can be further disposed on the adhesive layer. The film member may comprise a material having heterogeneity relative to the base film such that the film member is easily separated from the base film. The space between the semiconductor wafer and the base film may be filled with an underfill material such that the bumps and the exposed portions of the circuit pattern are covered.
凸塊可配置在半導體晶片的與基膜之第一表面相對的表面上，與電路圖案的暴露部分相對應。利用膠帶自動接合(tape automated bonding,TAB)技術，電路圖案的暴露部分與半導體晶片的凸塊可附著在一起。The bumps may be disposed on a surface of the semiconductor wafer opposite the first surface of the base film, corresponding to the exposed portion of the circuit pattern. With tape automated bonding (TAB) technology, the exposed portions of the circuit pattern can be attached to the bumps of the semiconductor wafer.
依照本發明的另一觀點，提供一種顯示裝置，此顯示裝置包括顯示面板、膠帶封裝以及框架，其中顯示面板中配置著顯示元件。膠帶封裝提供電訊號，用來驅動顯示裝置中的顯示元件。此膠帶封裝包括基膜。電路圖案配置在基膜的第一表面上。電路圖案與基膜上形成保護膜，以暴露出電路圖案的一部分。半導體晶片附著在基膜的第一表面上，且與電路圖案的暴露部分相接觸。黏著層配置在基膜的第二表面上，與半導體晶片相對應，其中第二表面是位於第一表面的對面。此黏著層附著在框架的側面上，且將膠帶封裝固定在框架上。According to another aspect of the present invention, a display device including a display panel, a tape package, and a frame, wherein a display element is disposed in the display panel, is provided. The tape package provides electrical signals for driving display elements in the display device. This tape package includes a base film. The circuit pattern is disposed on the first surface of the base film. A protective film is formed on the circuit pattern and the base film to expose a portion of the circuit pattern. The semiconductor wafer is attached to the first surface of the base film and is in contact with the exposed portion of the circuit pattern. The adhesive layer is disposed on the second surface of the base film corresponding to the semiconductor wafer, wherein the second surface is opposite the first surface. This adhesive layer is attached to the side of the frame and the tape package is secured to the frame.
黏著層附著在基膜之第二表面上之後，可達到20%至40%的硬化，而當黏著層附著在框架之側面上時，可達到90%至100%的硬化。After the adhesive layer is attached to the second surface of the base film, hardening can be achieved by 20% to 40%, and when the adhesive layer is attached to the side of the frame, 90% to 100% hardening can be achieved.
為讓本發明之上述特徵和優點能更明顯易懂，下文特舉實施例，並配合所附圖式作詳細說明如下。The above described features and advantages of the present invention will be more apparent from the following description.
下面將參照所附圖式來詳細描述本發明，本發明的實施例繪示於這些圖式中。然而，本發明可體現為許多種不同的形態，而不應侷限於本說明書所列舉的實施例。確切地說，提供這些實施例是為了使揭露的內容更透徹更完整，且將本發明的原理充分傳遞給本領域中具有通常技藝者。在圖式中，為了清楚起見，膜層與區域的厚度被放大。圖式中的相同元件符號代表相同的元件，故而其詳細描述將省略。The invention will be described in detail below with reference to the drawings, in which embodiments of the invention are illustrated. However, the invention may be embodied in a multitude of different forms and should not be limited to the examples set forth in the specification. Rather, these embodiments are provided so that this disclosure will be thorough and complete, and the principles of the invention will be <RTIgt; In the drawings, the thickness of the film layer and the region are exaggerated for the sake of clarity. The same component symbols in the drawings represent the same components, and thus detailed description thereof will be omitted.
圖1A是依照本發明之一實施例的一種具有散熱元件17的薄膜上晶片型半導體元件(例如，一種薄膜上晶片型半導體封裝)的橫剖面圖。圖1B是圖1A所示之薄膜上晶片型半導體元件的仰視圖。1A is a cross-sectional view of a thin film-on-wafer semiconductor device (eg, a thin film-on-chip semiconductor package) having a heat dissipating component 17 in accordance with an embodiment of the present invention. Fig. 1B is a bottom view of the wafer-type semiconductor device on the thin film shown in Fig. 1A.
請參照圖1A與圖1B，薄膜上晶片型半導體封裝包括：絕緣基板13，此絕緣基板13是以可撓性薄膜的形態存在著；以及半導體元件11，此半導體元件11具有半導體積體電路，且半導體元件11配置在絕緣基板13。絕緣基板13是用諸如聚醯亞胺(polyimide)與聚酯(polyester)之類的可撓性薄膜來形成的。絕緣基板13上形成具有固定圖案的多條導電引線14，且這些引線14例如是用銅來形成的。引線14上形成了表面絕緣層15，且此表面絕緣層15例如是用阻焊層(solder resist layer,SR layer)來形成的。從上方看時，這些引線14是以彼此分離的方式配置在絕緣基板13，且引線14的內端設置成集中在一起。表面絕緣層15局部地暴露出引線14之內端且覆蓋著引線14。Referring to FIGS. 1A and 1B, the wafer-on-film semiconductor package includes: an insulating substrate 13 which is in the form of a flexible film; and a semiconductor element 11 having a semiconductor integrated circuit. Further, the semiconductor element 11 is disposed on the insulating substrate 13. The insulating substrate 13 is formed using a flexible film such as polyimide and polyester. A plurality of conductive leads 14 having a fixed pattern are formed on the insulating substrate 13, and these leads 14 are formed, for example, of copper. A surface insulating layer 15 is formed on the lead 14, and the surface insulating layer 15 is formed, for example, by a solder resist layer (SR layer). When viewed from above, the lead wires 14 are disposed on the insulating substrate 13 in a manner of being separated from each other, and the inner ends of the lead wires 14 are disposed to be gathered together. The surface insulating layer 15 partially exposes the inner end of the lead 14 and covers the lead 14.
半導體元件11是配置在引線14之頂面的暴露部分上、且凸塊12介於兩者之間。在半導體元件11的周圍形成密封膠16，將半導體元件11穩定地固定在絕緣基板13。The semiconductor element 11 is disposed on the exposed portion of the top surface of the lead 14 with the bump 12 interposed therebetween. The sealant 16 is formed around the semiconductor element 11, and the semiconductor element 11 is stably fixed to the insulating substrate 13.
半導體元件11可以是諸如接面電晶體或場效應電晶體之類的電晶體，諸如整流器二極體、發光二極體或光二極體之類的二極體，或諸如記憶體元件或積體電路之類的主動元件。另外，半導體元件11也可以是諸如電容器、電阻器或線圈之類的被動元件。The semiconductor element 11 may be a transistor such as a junction transistor or a field effect transistor, a diode such as a rectifier diode, a light emitting diode or a photodiode, or such as a memory element or an integrated body. Active components such as circuits. In addition, the semiconductor element 11 may also be a passive element such as a capacitor, a resistor or a coil.
凸塊12與引線14可利用諸如金-錫(Au-Sn)或金-金(Au-Au)之類的合金接面而電性連接起來。密封膠16例如可用塑模樹脂來形成。The bumps 12 and the leads 14 can be electrically connected by an alloy joint such as gold-tin (Au-Sn) or gold-gold (Au-Au). The sealant 16 can be formed, for example, with a mold resin.
同時，利用黏性元件18來將散熱元件17附著在絕緣基板13的後表面上。此散熱元件17是一種能夠傳遞半導體元件11之操作所產生的熱量的元件，且將此熱量向下經由密封膠16、引線14等而有效地將熱量向外驅散。此散熱元件17可用導熱性大於絕緣基板13之導熱性的各種材料來形成，例如，諸如鋁之類的金屬。同樣地，例如可利用丙烯族(acryl-family)的黏性元件18來將散熱元件17附著在絕緣基板13。At the same time, the heat dissipating member 17 is attached to the rear surface of the insulating substrate 13 by the adhesive member 18. The heat dissipating member 17 is an element capable of transferring heat generated by the operation of the semiconductor element 11, and this heat is effectively dissipated outward through the sealant 16, the lead 14, and the like. This heat dissipating member 17 can be formed of various materials having thermal conductivity greater than that of the insulating substrate 13, for example, a metal such as aluminum. Similarly, the heat dissipating member 17 can be attached to the insulating substrate 13 by, for example, an acryl-family adhesive member 18.
可撓性薄膜形態的絕緣基板13的後表面與散熱元件17的頂面之間形成有壓力吸收帶19(pressure absorbing zone)，能夠吸收外界施加的壓力。此壓力吸收帶19是藉由移除黏性元件18的一部分而形成的空間，且此空間既可以充滿空氣，也可以填充能夠緩解外界所施加壓力的壓力吸收材料。在本實施例中，壓力吸收帶19是被絕緣基板13、散熱元件17以及黏性元件18所密封的空間。為了更有效地散熱與吸收壓力，例如，壓力吸收帶19的高度可介於約50nm與約300nm之間。若壓力吸收帶19的高度小於或等於50nm，則壓力吸收效率會降低。同樣地，若壓力吸收帶19的高度等於或大於300nm，則散熱效率會降低。A pressure absorbing zone 19 is formed between the rear surface of the insulating substrate 13 in the form of a flexible film and the top surface of the heat dissipating member 17, and is capable of absorbing externally applied pressure. This pressure absorbing belt 19 is a space formed by removing a part of the viscous member 18, and this space can be filled with air or a pressure absorbing material capable of alleviating the pressure applied from the outside. In the present embodiment, the pressure absorbing belt 19 is a space sealed by the insulating substrate 13, the heat dissipating member 17, and the viscous member 18. For more efficient heat dissipation and absorption pressure, for example, the height of the pressure absorbing band 19 can be between about 50 nm and about 300 nm. If the height of the pressure absorbing belt 19 is less than or equal to 50 nm, the pressure absorbing efficiency is lowered. Similarly, if the height of the pressure absorbing belt 19 is equal to or greater than 300 nm, the heat dissipation efficiency is lowered.
圖1C是依照本發明之另一實施例的一種薄膜上晶片型半導體封裝的仰視圖。圖1C所示之薄膜上晶片型半導體封裝中的散熱元件17包括一突出物17a(protrusion)，其延伸至絕緣基板13的後表面的邊緣，除此之外，圖1C所示之薄膜上晶片型半導體封裝與圖1B所示之薄膜上晶片型半導體封裝是相同的。此突出物17a可連接至外界散熱元件(未繪示)，藉此來提高散熱效率。1C is a bottom plan view of a thin film on-chip semiconductor package in accordance with another embodiment of the present invention. The heat dissipating member 17 in the wafer-on-chip semiconductor package shown in FIG. 1C includes a protrusion 17a extending to the edge of the rear surface of the insulating substrate 13, and the thin film on-chip shown in FIG. 1C. The type semiconductor package is the same as the on-film type semiconductor package shown in FIG. 1B. The protrusion 17a can be connected to an external heat dissipating component (not shown), thereby improving heat dissipation efficiency.
圖2A是依照本發明之另一實施例的一種包含散熱元件17的薄膜上晶片型半導體封裝的橫剖面圖。圖2B是圖2A所示之薄膜上晶片型半導體封裝的仰視圖。在圖2A與圖2B中，相同的元件用相同的元件符號來表示，這裡將省略其詳細描述。2A is a cross-sectional view of a thin film-on-chip semiconductor package including a heat dissipating component 17 in accordance with another embodiment of the present invention. Figure 2B is a bottom plan view of the on-film wafer type semiconductor package shown in Figure 2A. In FIGS. 2A and 2B, the same elements are denoted by the same reference numerals, and detailed description thereof will be omitted herein.
請參照圖2A與圖2B，絕緣基板13的後表面與黏性元件18的頂面之間存在一空間，此空間構成能夠吸收外界所施加的壓力之壓力吸收帶19。在本實施例中，黏性元件18具有固定厚度，而未被移除一部分。Referring to FIGS. 2A and 2B, a space exists between the rear surface of the insulating substrate 13 and the top surface of the viscous member 18, and this space constitutes a pressure absorbing band 19 capable of absorbing the pressure applied from the outside. In the present embodiment, the viscous member 18 has a fixed thickness without being removed a portion.
詳細地說，本實施例中的壓力吸收帶19可以是黏性元件18實體上從絕緣基板13的後表面分離而形成的空間。為了更有效地散熱與吸收壓力，例如，壓力吸收帶19的高度可介於50nm與300nm之間。In detail, the pressure absorbing belt 19 in the present embodiment may be a space in which the viscous member 18 is physically separated from the rear surface of the insulating substrate 13. In order to dissipate heat more efficiently and absorb pressure, for example, the height of the pressure absorbing belt 19 may be between 50 nm and 300 nm.
圖3是依照本發明之另一實施例的一種具有散熱元件17的薄膜上晶片型半導體封裝的橫剖面圖。與圖1A、圖1B所示之元件相同的元件是用相同的元件符號來表示，這裡將省略其詳細描述。3 is a cross-sectional view of a thin film on-wafer semiconductor package having a heat dissipating component 17 in accordance with another embodiment of the present invention. The same elements as those shown in FIGS. 1A and 1B are denoted by the same reference numerals, and a detailed description thereof will be omitted herein.
請參照圖3，與絕緣基板13的後表面相接觸的黏性元件18之頂面被局部移除，因此絕緣基板13的後表面與黏性元件18之間存在一空間。此空間構成能夠吸收外界所施加的壓力之壓力吸收帶19。Referring to FIG. 3, the top surface of the viscous member 18 in contact with the rear surface of the insulating substrate 13 is partially removed, so that there is a space between the rear surface of the insulating substrate 13 and the viscous member 18. This space constitutes a pressure absorbing belt 19 capable of absorbing the pressure applied from the outside.
圖4是依照本發明之另一實施例的一種具有散熱元件17的薄膜上晶片型半導體封裝的橫剖面圖。請參照圖4，與散熱元件17之頂面相接觸的黏性元件18的後表面被局部移除，因此黏性元件18的後表面與散熱元件17之間存在一空間。此空間構成能夠吸收外界所施加的壓力之壓力吸收帶19。4 is a cross-sectional view of a thin film on-wafer semiconductor package having a heat dissipating component 17 in accordance with another embodiment of the present invention. Referring to FIG. 4, the rear surface of the adhesive member 18 in contact with the top surface of the heat dissipating member 17 is partially removed, so that there is a space between the rear surface of the adhesive member 18 and the heat dissipating member 17. This space constitutes a pressure absorbing belt 19 capable of absorbing the pressure applied from the outside.
圖5是依照本發明之另一實施例的一種具有散熱元件17的薄膜上晶片型半導體封裝的橫剖面圖。黏性元件18的中心存在一空間，此空間構成能夠吸收外界所施加的壓力之壓力吸收帶19。5 is a cross-sectional view of a thin film on-wafer semiconductor package having a heat dissipating component 17 in accordance with another embodiment of the present invention. There is a space in the center of the viscous element 18, which constitutes a pressure absorbing band 19 capable of absorbing the pressure applied from the outside.
圖6是依照本發明之另一實施例的一種具有散熱元件17的薄膜上晶片型半導體封裝的橫剖面圖。不是黏性元件18被局部移除，而是與黏性元件18相接觸的散熱元件17的頂面被局部移除。因此，黏性元件18的後表面與散熱元件17之間存在一空間，此空間構成能夠吸收外界所施加的壓力之壓力吸收帶19。雖未繪示，相互接觸的黏性元件18之表面與散熱元件17之表面可都被局部移除，以形成構成壓力吸收帶的空間。6 is a cross-sectional view of a thin film on-wafer semiconductor package having a heat dissipating component 17 in accordance with another embodiment of the present invention. Instead of the viscous element 18 being partially removed, the top surface of the heat dissipating element 17 in contact with the viscous element 18 is partially removed. Therefore, there is a space between the rear surface of the adhesive member 18 and the heat dissipating member 17, which constitutes the pressure absorbing belt 19 capable of absorbing the pressure applied from the outside. Although not shown, the surfaces of the adhesive members 18 that are in contact with each other and the surface of the heat dissipating member 17 may be partially removed to form a space constituting the pressure absorbing tape.
圖7A至圖9B是適用於本發明之實施例的各種形狀的黏性元件18的立體圖。7A-9B are perspective views of viscous elements 18 of various shapes suitable for use in embodiments of the present invention.
圖7A至圖7F繪示為黏性元件18被局部移除並且穿透的範例，這些範例是對應於圖1A的實施例。7A-7F illustrate examples in which the viscous element 18 is partially removed and penetrated, these examples being corresponding to the embodiment of FIG. 1A.
請參照圖7A，黏性元件18的中心被局部移除並且穿透，因此所形成的空間構成壓力吸收帶19。若採用依照本實施例的黏性元件18，則形成被絕緣基板13、散熱元件17以及黏性元件18所密封的壓力吸收帶。雖然黏性元件18的一部分被移除所形成的空間的形狀是矩形，但本發明並不侷限於此，此空間可具有各種形狀，諸如圓形、橢圓形、多邊形。Referring to Figure 7A, the center of the viscous element 18 is partially removed and penetrated, so that the space formed constitutes the pressure absorbing band 19. When the viscous member 18 according to the present embodiment is employed, a pressure absorbing tape sealed by the insulating substrate 13, the heat dissipating member 17, and the viscous member 18 is formed. Although the shape of the space formed by removing a portion of the adhesive member 18 is a rectangle, the present invention is not limited thereto, and the space may have various shapes such as a circle, an ellipse, and a polygon.
請參照圖7B，黏性元件18中形成多個穿透的壓力吸收帶19。穿透的壓力吸收帶19的數量可變化多端，其位置既可規則排列也可不規則排列。Referring to Figure 7B, a plurality of penetrating pressure absorbing bands 19 are formed in the viscous element 18. The number of penetrating pressure absorbing bands 19 can vary widely, and their positions can be arranged either regularly or irregularly.
請參照圖7C，黏性元件18中形成多個條紋形(stripe)的閉合式(closed)穿透壓力吸收帶19。Referring to FIG. 7C, a plurality of stripe-penetrating pressure absorbing bands 19 are formed in the viscous element 18.
請參照圖7D，與圖7A相比，圖7D繪示為單一非閉合式(unclosed)壓力吸收帶19對應於單一黏性元件18的實施例。Referring to FIG. 7D, in contrast to FIG. 7A, FIG. 7D illustrates an embodiment in which a single unclosed pressure absorbing band 19 corresponds to a single viscous element 18.
請參照圖7E，圖7C所示之具條紋形的壓力吸收帶19經延伸以使得黏性元件18分離成多個部分，從而形成多個穿透式壓力吸收帶19。若採用圖7D與圖7E所示之實施例，則壓力吸收帶19是非密封的，所以壓力吸收帶19連接至外界。Referring to FIG. 7E, the stripe-shaped pressure absorbing belt 19 shown in FIG. 7C is extended to separate the viscous member 18 into a plurality of portions, thereby forming a plurality of penetrating pressure absorbing bands 19. If the embodiment shown in Figs. 7D and 7E is employed, the pressure absorbing belt 19 is unsealed, so that the pressure absorbing belt 19 is connected to the outside.
請參照圖7F，圖7A中的黏性元件18的角是直角，在此情形下，顯著的應力會施加在這些角上，從而造成黏性元件18可能被分離。因此，這些角可形成圓角來減小黏性元件18發生分離的機率。此外，這些角也可形成倒角來緩解施加在角上的應力。Referring to Figure 7F, the corners of the viscous elements 18 of Figure 7A are at right angles, in which case significant stresses may be applied to the corners, causing the viscous elements 18 to be separated. Therefore, these corners can be rounded to reduce the probability of separation of the viscous element 18. In addition, these corners can also form chamfers to alleviate the stress applied to the corners.
圖8A至圖8C繪示為黏性元件18被局部移除但未穿透的範例，且這些範例是對應於圖3的實施例。雖然黏性元件18未穿透，但壓力吸收帶19的形狀可如圖7A至圖7F一樣變化多端。8A-8C illustrate an example in which the viscous element 18 is partially removed but not penetrated, and these examples correspond to the embodiment of FIG. Although the viscous member 18 is not penetrated, the shape of the pressure absorbing belt 19 can be varied as shown in Figs. 7A to 7F.
圖9A與圖9B繪示為黏性元件18未被局部移除但包括壓力吸收帶19的範例，此壓力吸收帶19是位於預定位置處的凸面(convex)或凹面(concave)，這些範例是對應於圖2A的實施例。在圖9A中，單個黏性元件18對應地形成單個壓力吸收帶19。在圖9B中，單個黏性元件18對應地形成多個壓力吸收帶19。9A and 9B illustrate an example in which the viscous element 18 is not partially removed but includes a pressure absorbing band 19 which is a convex or concave location at a predetermined position, these examples being Corresponds to the embodiment of Figure 2A. In Figure 9A, a single viscous element 18 correspondingly forms a single pressure absorbing band 19. In FIG. 9B, a single viscous element 18 correspondingly forms a plurality of pressure absorbing bands 19.
圖10是將一種薄膜上晶片型半導體封裝應用於諸如液晶顯示器面板之類的電子裝置的實施例的示意圖。10 is a schematic diagram of an embodiment of applying a thin film-on-chip semiconductor package to an electronic device such as a liquid crystal display panel.
請參照圖10，例如，用黏合劑22將圖2A所示之薄膜上晶片型半導體封裝的一端附著到電子裝置的基板20的頂面邊緣上，且用框架21來固定住。Referring to FIG. 10, for example, one end of the thin film-on-wafer semiconductor package shown in FIG. 2A is attached to the top edge of the substrate 20 of the electronic device by the adhesive 22, and is fixed by the frame 21.
請參照圖10，薄膜上晶片型半導體封裝經附著以使得表面絕緣層15的一部分與電子裝置的基板20相接觸，框架21與散熱元件17相接觸、且壓著並固定住此散熱元件17。此時，壓力吸收帶19位於接觸框架21的散熱元件17附近。因此，即使框架21從各個方向(諸如向上、向下、向左、向右等)施加力或震動在基板20上，壓力吸收帶19都能夠緩解這些力或震動，從而可避免散熱元件17從絕緣基板13上分離。Referring to FIG. 10, the wafer-type semiconductor package on the thin film is attached such that a portion of the surface insulating layer 15 is in contact with the substrate 20 of the electronic device, and the frame 21 is in contact with the heat dissipating member 17, and the heat dissipating member 17 is pressed and fixed. At this time, the pressure absorbing belt 19 is located in the vicinity of the heat dissipating member 17 of the contact frame 21. Therefore, even if the frame 21 applies force or vibration to the substrate 20 from various directions (such as upward, downward, leftward, rightward, etc.), the pressure absorbing belt 19 can alleviate these forces or vibrations, thereby preventing the heat dissipating member 17 from being The insulating substrate 13 is separated.
圖11A是依照本發明的一種用來傳送散熱元件17的散熱元件膠帶的圖式，圖11B是水平剖開圖11A所示之散熱元件膠帶而取得的橫剖面圖。Figure 11A is a view of a heat dissipating member tape for transporting the heat dissipating member 17, in accordance with the present invention, and Figure 11B is a cross-sectional view taken along the horizontal direction of the heat dissipating member tape shown in Figure 11A.
請參照圖11A與圖11B，散熱元件17被附著在承載帶25上，黏性元件18介於兩者之間，其中承載帶25是諸如聚醯亞胺之類的可繞膠帶。散熱元件17上可更形成諸如聚醯亞胺之類的保護膠帶26。黏性元件18可以是上述的本發明之各個實施例之一。Referring to Figures 11A and 11B, the heat dissipating member 17 is attached to the carrier tape 25 with the adhesive member 18 interposed therebetween, wherein the carrier tape 25 is a wrapable tape such as polyimide. A protective tape 26 such as polyimide may be further formed on the heat dissipating member 17. The viscous element 18 can be one of the various embodiments of the invention described above.
在製造依照本發明之實施例的薄膜上晶片型半導體封裝時，承載帶25是最後被移除的元件。保護膠帶26可最後移除，也可不用移除。In fabricating a thin film on-wafer type semiconductor package in accordance with an embodiment of the present invention, the carrier tape 25 is the last removed component. The protective tape 26 may or may not be removed.
簡要描述一種製造圖1A所示之薄膜上晶片型半導體封裝的方法。藉由***凸塊12與密封膠16來將晶片型半導體元件11附著在絕緣基板上，此絕緣基板上已預先形成具有預定圖案的引線14與表面絕緣層15。接著，從圖11A所示之散熱元件膠帶上移除承載帶25，且附著上散熱元件17，使得暴露的黏性元件18附著在絕緣基板13的後表面上。如此一來，依照本發明的一種半導體封裝就形成了。A method of fabricating a thin film on-wafer semiconductor package shown in FIG. 1A is briefly described. The wafer-type semiconductor element 11 is attached to the insulating substrate by inserting the bump 12 and the sealant 16, on which the lead 14 and the surface insulating layer 15 having a predetermined pattern have been previously formed. Next, the carrier tape 25 is removed from the heat dissipating member tape shown in FIG. 11A, and the heat dissipating member 17 is attached so that the exposed adhesive member 18 is attached to the rear surface of the insulating substrate 13. As such, a semiconductor package in accordance with the present invention is formed.
圖12是依照本發明之另一實施例的一種膠帶封裝200的橫剖面圖。請參照圖12，此膠帶封裝200可以是薄膜上晶片型封裝。此膠帶封裝200包括：膠帶基板210與半導體晶片250。膠帶基板210可以是可撓性印刷電路板(flexible printed circuit board,FBC)。Figure 12 is a cross-sectional view of a tape package 200 in accordance with another embodiment of the present invention. Referring to FIG. 12, the tape package 200 may be a wafer-on-film package. This tape package 200 includes a tape substrate 210 and a semiconductor wafer 250. The tape substrate 210 may be a flexible printed circuit board (FBC).
膠帶基板210包括：基膜220、配置在基膜220之第一表面上的電路圖案230以及用來保護此電路圖案230的保護膜240。基膜220可以是諸如聚醯亞胺或聚酯之類的絕緣膜。電路圖案230可包括銅圖案。此外，電路圖案230可包括鍍了錫、金或鎳(nickel)的銅圖案。保護膜240可包括阻焊層。保護膜240可按照使電路圖案230的一部分暴露出來的方式來配置在基膜220與電路圖案230上。The tape substrate 210 includes a base film 220, a circuit pattern 230 disposed on the first surface of the base film 220, and a protective film 240 for protecting the circuit pattern 230. The base film 220 may be an insulating film such as polyimide or polyester. The circuit pattern 230 may include a copper pattern. Further, the circuit pattern 230 may include a copper pattern plated with tin, gold or nickel. The protective film 240 may include a solder resist layer. The protective film 240 may be disposed on the base film 220 and the circuit pattern 230 in such a manner as to expose a portion of the circuit pattern 230.
半導體晶片250包括凸塊260，其配置在半導體晶片250的表面上。半導體晶片250是附著在膠帶基板210上。半導體晶片250的凸塊260與膠帶基板210的電路圖案230的暴露部分相接觸。可採用膠帶自動接合技術來將電路圖案230與半導體晶片250的凸塊260附著在一起。半導體晶片250與基膜220之間的空間裡填充著底膠材料270，因此凸塊260與電路圖案230的暴露部分被覆蓋著。The semiconductor wafer 250 includes bumps 260 that are disposed on a surface of the semiconductor wafer 250. The semiconductor wafer 250 is attached to the tape substrate 210. The bump 260 of the semiconductor wafer 250 is in contact with the exposed portion of the circuit pattern 230 of the tape substrate 210. The tape pattern 230 can be attached to the bumps 260 of the semiconductor wafer 250 using tape automated bonding techniques. The space between the semiconductor wafer 250 and the base film 220 is filled with a primer material 270, so that the exposed portions of the bumps 260 and the circuit patterns 230 are covered.
此外，膠帶封裝200更包括黏著層280(adhesive layer)，其配置在基膜220的第二表面上，而此第二表面是位於半導體晶片250所在表面的對面。黏著層280可驅散從半導體晶片250上輻射的熱量。In addition, the tape package 200 further includes an adhesive layer 280 disposed on the second surface of the base film 220 opposite to the surface on which the semiconductor wafer 250 is located. Adhesive layer 280 can dissipate heat radiated from semiconductor wafer 250.
黏著層280可包括散熱樹脂。構成黏著層280的樹脂可包括環氧樹脂(epoxy)、丙烯樹脂(acryl)、矽(silicon)樹脂等，且相對於黏著層280的重量分率為20%至80%。要提高散熱效率，樹脂可包含導熱柱(heat conductive pillars)。導熱柱的範例包括氧化鋁(alumina)(Al2 O3 )、氮化硼(boron nitride)(BN)、氮化鋁(aluminum nitride)(AlN)或金剛石(diamond)。The adhesive layer 280 may include a heat dissipation resin. The resin constituting the adhesive layer 280 may include epoxy, acryl, silicon resin, or the like, and has a weight fraction of 20% to 80% with respect to the adhesive layer 280. To improve heat dissipation efficiency, the resin may contain heat conductive pillars. Examples of thermally conductive columns include alumina (Al 2 O 3 ), boron nitride (BN), aluminum nitride (AlN), or diamond.
黏著層280可包括硬化材料。黏著層280可包括遇熱會變硬的樹脂、在室溫下會變硬的樹脂或遇紫外線會變硬的樹脂。黏著層280可採用兩步硬化過程來形成。在第一步驟中，硬化材料被施加到基膜220的第二表面上，且此硬化材料可達到20%至40%的硬化。在第二步驟中，膠帶封裝200的黏著層280在模組化(modularization)過程中被附著在顯示裝置的框架上，且硬化材料可達到90%至100%的硬化。在第二熱硬化步驟之後，黏著層280的體積相對於硬化操作之前的體積可發生0.1%範圍內的變化，且黏著層280可具有0.5W/mK至10W/mK的導熱率。此外，黏著層280可具有0℃至200℃的玻璃轉變溫度(Tg)，且可具有5ppm/℃至30ppm/℃的熱膨脹係數(CTE)。Adhesive layer 280 can include a hardened material. The adhesive layer 280 may include a resin that hardens when heated, a resin that hardens at room temperature, or a resin that hardens when exposed to ultraviolet rays. Adhesive layer 280 can be formed using a two-step hardening process. In the first step, a hardening material is applied to the second surface of the base film 220, and the hardened material can achieve a hardening of 20% to 40%. In the second step, the adhesive layer 280 of the tape package 200 is attached to the frame of the display device during modularization, and the hardened material can achieve 90% to 100% hardening. After the second thermosetting step, the volume of the adhesive layer 280 may vary within a range of 0.1% with respect to the volume before the hardening operation, and the adhesive layer 280 may have a thermal conductivity of 0.5 W/mK to 10 W/mK. Further, the adhesive layer 280 may have a glass transition temperature (Tg) of 0 ° C to 200 ° C and may have a coefficient of thermal expansion (CTE) of 5 ppm / ° C to 30 ppm / ° C.
膠帶封裝200可更包括薄膜元件290，其配置在基膜220的第二表面上。此薄膜元件290可配置在黏著層280的頂面上。薄膜元件290可包含相對於基膜220而言具有異質性的材料，使得當膠帶基板210以卷對卷(reel-to-reel)的方式進行操作時，薄膜元件290容易從黏著層280與基膜220上分離。The tape package 200 may further include a film member 290 disposed on the second surface of the base film 220. The film member 290 can be disposed on the top surface of the adhesive layer 280. The film member 290 may comprise a material having a heterogeneity with respect to the base film 220 such that when the tape substrate 210 is operated in a reel-to-reel manner, the film member 290 is easily removed from the adhesive layer 280 The membrane 220 is separated.
圖13是局部繪示膠帶封裝200被附著在顯示裝置100的框架之側面上的橫剖面圖。請參照圖13，膠帶封裝200的黏著層280附著在框架110的側面上，從而將膠帶封裝200固定在框架110上。從半導體晶片250輻射的熱量在垂直於半導體晶片250之頂面的方向上透過黏著層280而排出。FIG. 13 is a cross-sectional view partially showing the tape package 200 attached to the side of the frame of the display device 100. Referring to FIG. 13, the adhesive layer 280 of the tape package 200 is attached to the side of the frame 110, thereby fixing the tape package 200 to the frame 110. The heat radiated from the semiconductor wafer 250 is discharged through the adhesive layer 280 in a direction perpendicular to the top surface of the semiconductor wafer 250.
在圖13所示之顯示裝置100中，元件符號121代表顯示器面板，且元件符號125代表印刷電路板。顯示器面板100可包括下基板122與上基板123。下基板122與上基板123之間可配置一液晶(未繪示)。In the display device 100 shown in FIG. 13, the component symbol 121 represents a display panel, and the component symbol 125 represents a printed circuit board. The display panel 100 may include a lower substrate 122 and an upper substrate 123. A liquid crystal (not shown) may be disposed between the lower substrate 122 and the upper substrate 123.
雖然本發明已以實施例揭露如上，然其並非用以限定本發明，任何所屬技術領域中具有通常知識者，在不脫離本發明之精神和範圍內，當可作些許之更動與潤飾，故本發明之保護範圍當視後附之申請專利範圍所界定者為準。Although the present invention has been disclosed in the above embodiments, it is not intended to limit the invention, and any one of ordinary skill in the art can make some modifications and refinements without departing from the spirit and scope of the invention. The scope of the invention is defined by the scope of the appended claims.
11．．．半導體元件11. . . Semiconductor component
12、260．．．凸塊12, 260. . . Bump
13、20、122、123．．．基板13, 20, 122, 123. . . Substrate
14．．．導電引線14. . . Conductive lead
15．．．表面絕緣層15. . . Surface insulation
16．．．密封膠16. . . Sealant
17．．．散熱元件17. . . Heat sink
17a．．．突出17a. . . protruding
18．．．黏性元件18. . . Adhesive component
19．．．壓力吸收帶19. . . Pressure absorption zone
21、110．．．框架21, 110. . . frame
22．．．黏合劑twenty two. . . Adhesive
25．．．承載帶25. . . Carrier tape
26．．．保護膠帶26. . . Protective tape
100．．．顯示裝置100. . . Display device
121．．．顯示器面板121. . . Display panel
125．．．印刷電路板125. . . A printed circuit board
200．．．膠帶封裝200. . . Tape packaging
210．．．膠帶基板210. . . Tape substrate
220．．．基膜220. . . Base film
230．．．電路圖案230. . . Circuit pattern
240．．．保護膜240. . . Protective film
250．．．半導體晶片250. . . Semiconductor wafer
270．．．未足量材料270. . . Insufficient material
280．．．黏著層280. . . Adhesive layer
290．．．薄膜元件290. . . Thin film component
圖1A是依照本發明之一實施例的一種具有散熱元件的薄膜上晶片型半導體元件的橫剖面圖。1A is a cross-sectional view of a thin film-on-wafer semiconductor device having a heat dissipating component in accordance with an embodiment of the present invention.
圖1B是圖1A所示之薄膜上晶片型半導體元件的仰視圖。Fig. 1B is a bottom view of the wafer-type semiconductor device on the thin film shown in Fig. 1A.
圖1C是依照本發明之另一實施例的一種薄膜上晶片型半導體封裝的仰視圖。1C is a bottom plan view of a thin film on-chip semiconductor package in accordance with another embodiment of the present invention.
圖2A是依照本發明之另一實施例的一種包含散熱元件的薄膜上晶片型半導體封裝的橫剖面圖。2A is a cross-sectional view of a thin film on-wafer semiconductor package including a heat dissipating component in accordance with another embodiment of the present invention.
圖2B是圖2A所示之薄膜上晶片型半導體封裝的仰視圖。Figure 2B is a bottom plan view of the on-film wafer type semiconductor package shown in Figure 2A.
圖3是依照本發明之另一實施例的一種具有散熱元件的薄膜上晶片型半導體封裝的橫剖面圖。3 is a cross-sectional view of a thin film on-wafer semiconductor package having a heat dissipating component in accordance with another embodiment of the present invention.
圖4是依照本發明之另一實施例的一種具有散熱元件的薄膜上晶片型半導體封裝的橫剖面圖。4 is a cross-sectional view of a thin film on-wafer semiconductor package having a heat dissipating component in accordance with another embodiment of the present invention.
圖5是依照本發明之另一實施例的一種具有散熱元件的薄膜上晶片型半導體封裝的橫剖面圖。5 is a cross-sectional view of a thin film on-wafer semiconductor package having a heat dissipating component in accordance with another embodiment of the present invention.
圖6是依照本發明之另一實施例的一種具有散熱元件的薄膜上晶片型半導體封裝的橫剖面圖。6 is a cross-sectional view of a thin film on-wafer semiconductor package having a heat dissipating component in accordance with another embodiment of the present invention.
圖7A至圖9B是適用於本發明之實施例的各種形狀的黏性元件的立體圖。7A to 9B are perspective views of viscous elements of various shapes suitable for use in embodiments of the present invention.
圖10是將一種薄膜上晶片型半導體封裝應用於電子裝置的實施例的示意圖。Figure 10 is a schematic illustration of an embodiment of a thin film on-wafer semiconductor package applied to an electronic device.
圖11A是依照本發明的一種散熱元件膠帶的圖式。Figure 11A is a diagram of a heat dissipating component tape in accordance with the present invention.
圖11B是水平剖開圖11A所示之散熱元件膠帶而取得的橫剖面圖。Fig. 11B is a cross-sectional view taken along the horizontal direction of the heat dissipating member tape shown in Fig. 11A.
圖12是依照本發明之另一實施例的一種膠帶封裝的橫剖面圖。Figure 12 is a cross-sectional view of a tape package in accordance with another embodiment of the present invention.
圖13是局部繪示膠帶封裝被附著在顯示裝置的框架之側面上的橫剖面圖。Figure 13 is a cross-sectional view partially showing the tape package attached to the side of the frame of the display device.
11．．．半導體元件11. . . Semiconductor component
12．．．凸塊12. . . Bump
13．．．絕緣基板13. . . Insulating substrate
14．．．導電引線14. . . Conductive lead
15．．．表面絕緣層15. . . Surface insulation
16．．．密封膠16. . . Sealant
17．．．散熱元件17. . . Heat sink
18．．．黏性元件18. . . Adhesive component
19．．．壓力吸收帶19. . . Pressure absorption zone
Claims (8)
Applications Claiming Priority (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| KR20080035821 | 2008-04-17 | ||
| KR1020080088469A KR20100029629A (en) | 2008-09-08 | 2008-09-08 | Tape package having adhesive layer for heat sink and display device with the same |
| KR20080095518A KR101493869B1 (en) | 2008-04-17 | 2008-09-29 | Tape for heat dissipating member, COF type semiconductor package having heat dissipating member and electronic apparatus thereof |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| TW200945517A TW200945517A (en) | 2009-11-01 |
| TWI501360B true TWI501360B (en) | 2015-09-21 |
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Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| TW098112534A TWI501360B (en) | 2008-04-17 | 2009-04-15 | Tape for heat dissipating member, chip on film type semiconductor package including heat dissipating member, and electronic apparatus including the same |
Country Status (3)
| Country | Link |
|---|---|
| JP (1) | JP5207477B2 (en) |
| CN (1) | CN101692443B (en) |
| TW (1) | TWI501360B (en) |
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| TWI424388B (en) * | 2010-04-30 | 2014-01-21 | Au Optronics Corp | Flexible display and fabricating method thereof |
| CN102201390B (en) * | 2011-05-09 | 2012-11-07 | 厦门英诺尔电子科技股份有限公司 | Chip on film (COF) packaging substrate for high-pixel camera module and manufacturing method thereof |
| CN105990276A (en) * | 2015-03-06 | 2016-10-05 | 奕力科技股份有限公司 | Flexible substrate semiconductor packaging device with heat radiating structure |
| KR102532627B1 (en) * | 2016-06-10 | 2023-05-15 | 삼성디스플레이 주식회사 | Cof package and display device comprising the same |
| TWI596729B (en) * | 2016-12-15 | 2017-08-21 | 南茂科技股份有限公司 | Chip package structure |
| CN109300879B (en) * | 2018-09-18 | 2020-12-29 | 惠科股份有限公司 | Drive chip packaging structure, separation method and separation equipment thereof |
| CN108933111B (en) * | 2018-09-28 | 2020-03-31 | 上海天马有机发光显示技术有限公司 | Crystal coated film heat radiation structure and display device |
| CN111755434A (en) * | 2019-03-27 | 2020-10-09 | 力晶积成电子制造股份有限公司 | Semiconductor package |
| TWI710288B (en) * | 2020-01-22 | 2020-11-11 | 頎邦科技股份有限公司 | Method and device for adhering heat sinks to a circuit board tape |
| KR102514310B1 (en) * | 2020-09-17 | 2023-03-28 | 스테코 주식회사 | Cof package |
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| KR100785950B1 (en) * | 2006-11-09 | 2007-12-14 | 스테코 주식회사 | Cof package and method for manufacturing the same |
| CN101156241A (en) * | 2005-04-06 | 2008-04-02 | 株式会社丰田自动织机 | Heat sink device |
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| JPH10242333A (en) * | 1997-03-01 | 1998-09-11 | Nitto Denko Corp | Semiconductor device and its manufacture |
| KR19990044862A (en) * | 1997-11-14 | 1999-06-25 | 포만 제프리 엘 | Heat transfer enhancer attachment method and device |
| JP3491576B2 (en) * | 1999-10-20 | 2004-01-26 | 松下電器産業株式会社 | Semiconductor device and mounting structure of semiconductor device |
| JP2005049662A (en) * | 2003-07-30 | 2005-02-24 | Hitachi Displays Ltd | Liquid crystal display |
| US8575746B2 (en) * | 2006-07-20 | 2013-11-05 | Samsung Electronics Co., Ltd. | Chip on flexible printed circuit type semiconductor package |
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| CN101156241A (en) * | 2005-04-06 | 2008-04-02 | 株式会社丰田自动织机 | Heat sink device |
| KR100785950B1 (en) * | 2006-11-09 | 2007-12-14 | 스테코 주식회사 | Cof package and method for manufacturing the same |
Also Published As
| Publication number | Publication date |
|---|---|
| CN101692443A (en) | 2010-04-07 |
| JP2009260359A (en) | 2009-11-05 |
| JP5207477B2 (en) | 2013-06-12 |
| TW200945517A (en) | 2009-11-01 |
| CN101692443B (en) | 2013-03-27 |
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