TWI490502B - Probe card - Google Patents

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TWI490502B
TWI490502B TW100143236A TW100143236A TWI490502B TW I490502 B TWI490502 B TW I490502B TW 100143236 A TW100143236 A TW 100143236A TW 100143236 A TW100143236 A TW 100143236A TW I490502 B TWI490502 B TW I490502B
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probe
height
wafer
vertical
circuit board
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TW100143236A
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Chinese (zh)
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TW201321758A (en
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An Hong Liu
Yi Chang Lee
Hsiang Ming Huang
Shi Fen Huang
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Chipmos Technologies Inc
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Priority to TW100143236A priority Critical patent/TWI490502B/en
Priority to CN201210092909.5A priority patent/CN103134961B/en
Publication of TW201321758A publication Critical patent/TW201321758A/en
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Publication of TWI490502B publication Critical patent/TWI490502B/en

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Description

探針卡Probe card

本發明係關於一種探針卡；特別是關於一種可選擇性地調整探針長度，以針對一晶片堆疊結構進行電性測試之探針卡。The present invention relates to a probe card; and more particularly to a probe card that can selectively adjust the length of the probe for electrical testing of a wafer stack structure.

隨著半導體製程技術的進步，半導體晶片除了被要求需具有足夠的運算效能，以應付現今消費者對3C產品的多工需求外，於此同時，半導體晶片也被要求需具有微小化的體積，來滿足安裝於攜帶式電子產品的便利性。然而，在每次將半導體晶片微小化的過程中，往往也意味著需要進一步對半導體製程所產出的成品有更加嚴格的要求，才可確保後續半導體晶片成品的正常運作。有鑑於此，業界於是發展出利用探針卡來檢測半導體晶片的方法，以詳細並確實地檢測半導體晶片是否可正確地進行電性訊號的導通傳遞。With advances in semiconductor process technology, semiconductor wafers are required to have sufficient computing power to cope with the multiplex requirements of today's consumers for 3C products. At the same time, semiconductor wafers are also required to have a miniaturized volume. To meet the convenience of being installed in portable electronic products. However, each time the semiconductor wafer is miniaturized, it often means that further strict requirements on the finished product produced by the semiconductor process are required to ensure the normal operation of the subsequent semiconductor wafer finished product. In view of this, the industry has developed a method of detecting a semiconductor wafer using a probe card to specifically and surely detect whether the semiconductor wafer can correctly conduct conduction of electrical signals.

因應半導體裝置尺寸微小化的需求，垂直堆疊晶片技術逐漸成為必然趨勢，以使單位面積內可容納更多的半導體晶片，並且為了提升晶片間之電性傳輸速率，更發展出以直通矽晶穿孔電極(Through-Silicon-Via，TSV)進行電性傳輸的晶片，而針對直接以TSV進行電性連接的半導體晶片堆疊結構，其電性訊號之檢測更是重要。In view of the demand for miniaturization of semiconductor devices, vertical stacked wafer technology has become an inevitable trend to accommodate more semiconductor wafers per unit area, and to improve the electrical transmission rate between wafers, and to develop through-pass perforation The electrode (Through-Silicon-Via, TSV) is used for the electrical transmission of the wafer, and the detection of the electrical signal is more important for the semiconductor wafer stack structure which is electrically connected directly to the TSV.

於先前技術中，探針卡主要係由電路板及具有複數探針的探針頭/探針座所組成，且複數探針之針尖係位於一共平面。適以，當欲進行半導體晶片的電性測試時，探針卡上的複數探針便可分別 與半導體晶片上的複數銲墊或凸塊直接接觸，並藉由電性訊號的輸入及接收，來進行半導體晶片的電性檢測作業。In the prior art, the probe card is mainly composed of a circuit board and a probe head/probe holder having a plurality of probes, and the tip of the plurality of probes is located in a common plane. Suitably, when it is desired to perform electrical testing of a semiconductor wafer, the plurality of probes on the probe card can be respectively The semiconductor wafer is electrically inspected by direct contact with a plurality of pads or bumps on the semiconductor wafer and by input and reception of electrical signals.

然而，如第1圖所示，習知探針卡100係具有一電路板110及一探針頭120，且探針頭120因為僅具有單一共平面度的探針122的緣故，故當半導體晶片堆疊設置於基板410上的一晶片堆疊區412，而形成晶片堆疊結構400後，習知的探針卡100將難以與晶片420上的直通矽晶穿孔電極422或凸塊430及基板410上的測試端點414同時接觸，以進行電性訊號的檢測作業。並且，即便習知探針卡100具有相異共平面度的探針122，以同時接觸晶片420之直通矽晶穿孔電極422及基板410上的測試端點414，然而因探針122之長度係為固定，並無法在每堆疊一層晶片420後即進行一次的電性檢測作業，同時，針對不同數量之晶片的堆疊結構400也無法以同一探針卡100進行電性檢測，故檢測人員需更換相應於晶片堆疊結構的晶片層數的探針卡，才得以進行相關的電性檢測作業。換言之，此舉不但將增加添購不同探針卡的成本，同時，當不停地更換相異的探針卡進行電性測試時，也會嚴重拖累到檢測晶片堆疊結構的時程。However, as shown in FIG. 1, the conventional probe card 100 has a circuit board 110 and a probe head 120, and the probe head 120 is a semiconductor because it has only a single coplanar probe 122. The wafer stack is disposed on a wafer stacking region 412 on the substrate 410. After the wafer stack structure 400 is formed, the conventional probe card 100 will be difficult to connect with the through-silicon via electrodes 422 or the bumps 430 and the substrate 410 on the wafer 420. The test endpoints 414 are simultaneously in contact for electrical signal detection. Moreover, even though the probe card 100 has a probe 122 having a different coplanarity to simultaneously contact the through-silicon via electrode 422 of the wafer 420 and the test terminal 414 on the substrate 410, the length of the probe 122 is In order to be fixed, it is not possible to perform an electrical detection operation once after each layer of the wafer 420 is stacked. At the same time, the stack structure 400 for different numbers of wafers cannot be electrically detected by the same probe card 100, so the inspector needs to be replaced. The probe card corresponding to the number of wafer layers of the wafer stack structure is capable of performing related electrical detection operations. In other words, this will not only increase the cost of purchasing different probe cards, but also seriously delay the time course of detecting the stack structure of the wafer when the different probe cards are continuously replaced for electrical testing.

有鑑於此，如何提供一種能夠依據所檢測之晶片堆疊結構的高度不同進行變化，以相應完成電性訊號檢測的探針卡，同時節省額外購買探針卡的支出費用，乃為目前業界引領期盼所欲解決之問題。In view of this, how to provide a probe card that can be changed according to the height of the detected wafer stack structure to complete the electrical signal detection, and save the expense of purchasing the probe card, is the current industry leading period. I hope that the problem I want to solve.

本發明之一目的在於提供一種可依測試需求調整探針高度的探 針卡，以相應於待測的晶片堆疊結構，進行電性訊號的檢測。An object of the present invention is to provide a probe for adjusting the height of a probe according to test requirements. The pin card performs electrical signal detection corresponding to the wafer stack structure to be tested.

本發明之又一目的在於提供一種可依測試需求調整探針高度的探針卡，以節省購買其他探針卡之額外支出，同時縮短進行電性檢測的時間。It is still another object of the present invention to provide a probe card that can adjust the height of the probe according to the test requirements, thereby saving the additional expense of purchasing other probe cards while shortening the time for performing electrical detection.

為達上述目的，本發明之探針卡包含一電路板、一探針頭、一第一探針組及一第二探針組。其中，探針頭係組裝於電路板上並與之電性連接，第一探針組及第二探針組係皆設置於探針頭上，且分別具有複數第一垂直探針及複數第二垂直探針。該等第一垂直探針位於探針頭之一內部區域，用以探觸晶片堆疊結構之至少一晶片的複數直通矽晶穿孔電極，該等第二垂直探針位於探針頭之一外部區域，用以探觸晶片堆疊結構之一基板的複數測試端點。此外，該等第一垂直探針具有一第一長度，該等第二垂直探針具有一第二長度，且第二長度係大於第一長度。To achieve the above object, the probe card of the present invention comprises a circuit board, a probe head, a first probe set and a second probe set. The probe head is assembled on the circuit board and electrically connected thereto, and the first probe set and the second probe set are all disposed on the probe head, and respectively have a plurality of first vertical probes and a plurality of second Vertical probe. The first vertical probes are located in an inner region of the probe head for sensing a plurality of through-cell twinned via electrodes of at least one of the wafer stack structures, the second vertical probes being located in an outer region of the probe head a plurality of test endpoints for sensing a substrate of one of the wafer stack structures. Moreover, the first vertical probes have a first length, the second vertical probes have a second length, and the second length is greater than the first length.

為讓本發明之上述目的、技術特徵、和優點能更明顯易懂，下文係以較佳實施例、配合所附圖式進行詳細說明。The above described objects, technical features, and advantages of the present invention will be more apparent from the following description.

為使探針卡所具有之複數探針，可相應於新一代半導體製程中，其晶片堆疊結構的高度進行變化，本發明遂針對現有探針卡所具有之探針頭及探針組進行改良，以滿足實際檢測應用上的需求。In order to make the probe card have a plurality of probes, the height of the wafer stack structure can be changed corresponding to the next-generation semiconductor process, and the present invention is improved for the probe head and the probe set of the existing probe card. To meet the needs of actual inspection applications.

以下將分別針對本發明之探針卡所具有之各實施態樣，進行詳細說明。Hereinafter, each embodiment of the probe card of the present invention will be described in detail.

第2A、2B及2C圖係為本發明探針卡之第一實施例。如圖所示，欲進行電性測試之一晶片堆疊結構400包含一基板410及至少一晶片420。其中，基板410具有一晶片堆疊區412，以及位於晶片堆疊區412外之複數測試端點414。此外，至少一晶片420係可包含複數晶片420，如第2A、2B及2C圖中，晶片堆疊結構400分別包含兩個、四個及八個晶片420，晶片420具有複數直通矽晶穿孔電極422(Through-Silicon-Via，TSV)，且複數晶片420係垂直疊設於晶片堆疊區412內，並以直通矽晶穿孔電極422相互電性連接，以於晶片堆疊結構400中進行電性訊號之傳遞。於其他實施例中，晶片420上可形成有複數凸塊430，分別對應電性連接直通矽晶穿孔電極422，以作為晶片420對外電性互連之用。2A, 2B and 2C are the first embodiment of the probe card of the present invention. As shown, one of the wafer stack structures 400 to be electrically tested includes a substrate 410 and at least one wafer 420. The substrate 410 has a wafer stacking region 412 and a plurality of test terminals 414 located outside the wafer stacking region 412. In addition, at least one wafer 420 can include a plurality of wafers 420. As in FIGS. 2A, 2B, and 2C, the wafer stack structure 400 includes two, four, and eight wafers 420, respectively, and the wafer 420 has a plurality of through-silicon via electrodes 422. (Through-Silicon-Via, TSV), and the plurality of wafers 420 are vertically stacked in the wafer stacking region 412, and electrically connected to each other through the through-silicon via electrodes 422 to perform electrical signals in the wafer stack structure 400. transfer. In other embodiments, a plurality of bumps 430 may be formed on the wafer 420, respectively corresponding to the electrical connection through the via via electrodes 422 for external electrical interconnection of the wafer 420.

如圖所示，於第一實施例中，本發明之一探針卡200係具有一電路板210、一探針頭220、一第一探針組230及一第二探針組240。其中，探針頭220係組裝於電路板210上，並與電路板210電性連接，同時，第一探針組230及第二探針組240分別具有複數第一垂直探針232及複數第二垂直探針242。As shown, in the first embodiment, a probe card 200 of the present invention has a circuit board 210, a probe head 220, a first probe set 230, and a second probe set 240. The probe head 220 is assembled on the circuit board 210 and electrically connected to the circuit board 210. Meanwhile, the first probe set 230 and the second probe set 240 respectively have a plurality of first vertical probes 232 and a plurality of Two vertical probes 242.

於本實施例中，複數第一垂直探針232係具有一第一長度L11，且複數第一垂直探針232係設置於探針頭220之一內部區域222，用以接觸晶片420之複數直通矽晶穿孔電極422或凸塊430。相似地，複數第二垂直探針242係具有一第二長度L12，且複數第二垂直探針242係設置於探針頭220之一外部區域224，用以接觸設置於基板410上之複數測試端點414。並且，前述複數第二垂直探針242所具有之第二長度L12係大於複數第一垂直探針232所具 有之第一長度L11。In this embodiment, the plurality of first vertical probes 232 have a first length L11, and the plurality of first vertical probes 232 are disposed in an inner region 222 of the probe head 220 for contacting the plurality of straight passes of the wafer 420. The crystal is perforated with an electrode 422 or a bump 430. Similarly, the plurality of second vertical probes 242 have a second length L12, and the plurality of second vertical probes 242 are disposed on an outer region 224 of the probe head 220 for contacting the plurality of tests disposed on the substrate 410. Endpoint 414. Moreover, the second length L12 of the plurality of second vertical probes 242 is greater than the plurality of first vertical probes 232. There is a first length L11.

適以，如第2A、2B及2C圖所示之第一實施例中，由於複數第一垂直探針232係為固定，使其第一長度L11維持不變，而複數第二垂直探針242係可隨晶片堆疊結構400之晶片420的數量增加而調整，使其第二長度L12逐漸增長，故無論晶片堆疊結構400之高度如何變化，本實施例之探針卡200皆可相應於該高度變化而進行電性測試之作業。Accordingly, in the first embodiment shown in FIGS. 2A, 2B, and 2C, since the plurality of first vertical probes 232 are fixed, the first length L11 is maintained, and the plurality of second vertical probes 242 are maintained. The second length L12 is gradually increased as the number of the wafers 420 of the wafer stack structure 400 is increased, so that the probe card 200 of the embodiment can correspond to the height regardless of the height of the wafer stack structure 400. Change and conduct electrical testing.

第3A、3B及3C圖係為本發明之探針卡之第二實施例。其中，第3A、3B及3C圖中，晶片堆疊結構400分別包含兩個、四個及八個晶片420。如圖所示，一探針卡300具有一電路板310、一探針頭320、一第一探針組330及一第二探針組340。其中，探針頭320係組裝於電路板310上，並與電路板310電性連接。此外，探針頭320係包含一主板322及一側板324，且側板324係位於主板322之外側。3A, 3B and 3C are second embodiments of the probe card of the present invention. In the 3A, 3B, and 3C diagrams, the wafer stack structure 400 includes two, four, and eight wafers 420, respectively. As shown, a probe card 300 has a circuit board 310, a probe head 320, a first probe set 330, and a second probe set 340. The probe head 320 is assembled on the circuit board 310 and electrically connected to the circuit board 310. In addition, the probe head 320 includes a main board 322 and a side board 324, and the side board 324 is located on the outer side of the main board 322.

詳細而言，第一探針組330及第二探針組340分別具有複數第一垂直探針332及複數第二垂直探針342，且複數第一垂直探針332及複數第二垂直探針342係分別設置於主板322及側板324上。其中，複數第一垂直探針332係用以探觸晶片420之複數直通矽晶穿孔電極422或凸塊430，同時，複數第二垂直探針342係用以探觸設置於基板410之複數測試端點414。In detail, the first probe set 330 and the second probe set 340 respectively have a plurality of first vertical probes 332 and a plurality of second vertical probes 342, and the plurality of first vertical probes 332 and the plurality of second vertical probes The 342 is disposed on the main board 322 and the side board 324, respectively. The plurality of first vertical probes 332 are used to probe the plurality of through-silicon via electrodes 422 or bumps 430 of the wafer 420, and the plurality of second vertical probes 342 are used to probe the plurality of tests disposed on the substrate 410. Endpoint 414.

如圖所示，複數第一垂直探針332及複數第二垂直探針342係分別具有一第一長度L21及一第二長度L22，且第一長度L21與第二長度L22相近。此外，主板322相對於電路板310具有一第 一高度H21，側板324相對於電路板310具有一第二高度H22，且第二高度H22係大於第一高度H21。主板322之第一高度H21係為固定，而側板324之第二高度H22係為可調整，使第二高度H22可隨晶片堆疊結構400之晶片420的數量增加而增大。As shown, the plurality of first vertical probes 332 and the plurality of second vertical probes 342 have a first length L21 and a second length L22, respectively, and the first length L21 is similar to the second length L22. In addition, the main board 322 has a first portion relative to the circuit board 310. A height H21, the side plate 324 has a second height H22 with respect to the circuit board 310, and the second height H22 is greater than the first height H21. The first height H21 of the main board 322 is fixed, and the second height H22 of the side board 324 is adjustable such that the second height H22 can be increased as the number of wafers 420 of the wafer stack structure 400 increases.

因此，在如第3A、3B及3C圖所示之第二實施例中，為達到前述主板322之第一高度H21係為固定，且側板324之第二高度H22係為可調整之目的，探針頭320係運用可替換之側板324，以相應調整第二高度H22。Therefore, in the second embodiment as shown in FIGS. 3A, 3B and 3C, in order to achieve the first height H21 of the main board 322 is fixed, and the second height H22 of the side plate 324 is adjustable, The needle 320 utilizes a replaceable side panel 324 to adjust the second height H22 accordingly.

此外，前述之可替換之側板324亦可以複數組裝塊350取代，而形成如第4A、4B及4C圖所示之第三實施例。其中，第4A、4B及4C圖中，晶片堆疊結構400分別包含兩個、四個及八個晶片420。In addition, the aforementioned replaceable side panels 324 may also be replaced by a plurality of assembly blocks 350 to form a third embodiment as shown in Figures 4A, 4B and 4C. 4A, 4B, and 4C, the wafer stack structure 400 includes two, four, and eight wafers 420, respectively.

詳細而言，於第4A、4B及4C圖所示之第三實施例中，探針卡300之側板324係由複數組裝塊350所構成，其適可相互組裝結合，以相應於晶片堆疊結構400之晶片420的數量，調整第二高度H22。並且，複數組裝塊350亦各自具有複數電性導通端點(圖未示出)，用以供組裝塊350相互電性連接，以及電性連接電路板310。In detail, in the third embodiment shown in FIGS. 4A, 4B and 4C, the side plates 324 of the probe card 300 are composed of a plurality of assembly blocks 350 which are adapted to be assembled to each other to correspond to the wafer stack structure. The number of wafers 420 of 400 is adjusted to a second height H22. Moreover, the plurality of assembly blocks 350 also each have a plurality of electrical conduction terminals (not shown) for electrically connecting the assembly blocks 350 to each other and electrically connecting the circuit board 310.

相異於前述之第二實施例及第三實施例，於第5A、5B及5C圖所示之第四實施例及第6A、6B及6C圖所示之第五實施例中，探針卡300之探針頭320所具有之側板324的第二高度H22係為固定，而主板322的第一高度H21係為可調整，使第一高度H21可隨晶片堆疊結構400之晶片420的數量增加而縮小。Different from the foregoing second embodiment and the third embodiment, in the fifth embodiment shown in FIGS. 5A, 5B and 5C and the fifth embodiment shown in FIGS. 6A, 6B and 6C, the probe card The second height H22 of the side plate 324 of the probe head 320 of 300 is fixed, and the first height H21 of the main plate 322 is adjustable such that the first height H21 can be increased with the number of the wafer 420 of the wafer stack structure 400. And shrinking.

詳細而言，於第5A、5B及5C圖所示之第四實施例中，探針卡300更包含一微調裝置360，且微調裝置360適可貫穿電路板310，並分別具有位於電路板310之二相對側的一第一端362及一第二端364。其中，第一端362係與主板322連接，以在側板324之第二高度H22為固定的情況下，相應於晶片堆疊結構400之晶片420的數量，將主板322選擇性地移動至不同之第一高度H21，以使第一垂直探針332之針尖適可接觸晶片堆疊結構400最上層之晶片420的複數直通矽晶穿孔電極422或凸塊430，於此同時，第二端364適可藉由可旋轉移動的一固定件366拴固於電路板310，用以調整第一高度H21。如第5A、5B及5C圖所示，晶片堆疊結構400之晶片420的數量分別為兩個、四個及八個，而第一高度H21則隨晶片420數量增加而縮小。In detail, in the fourth embodiment shown in FIGS. 5A, 5B, and 5C, the probe card 300 further includes a fine adjustment device 360, and the fine adjustment device 360 is adapted to penetrate the circuit board 310 and has a circuit board 310 respectively. A first end 362 and a second end 364 on opposite sides of the second side. The first end 362 is connected to the main board 322 to selectively move the main board 322 to a different number corresponding to the number of the wafers 420 of the wafer stack structure 400 when the second height H22 of the side board 324 is fixed. a height H21, such that the tip of the first vertical probe 332 is adapted to contact the plurality of through-silicon via electrodes 422 or bumps 430 of the wafer 420 of the uppermost layer of the wafer stack structure 400, while the second terminal 364 is suitable. The fixing member 366 is rotatably mounted on the circuit board 310 for adjusting the first height H21. As shown in FIGS. 5A, 5B, and 5C, the number of wafers 420 of the wafer stack structure 400 is two, four, and eight, respectively, and the first height H21 is reduced as the number of wafers 420 increases.

相似地，於第6A、6B及6C圖所示之第五實施例中，探針卡300更包含一微調裝置370，且微調裝置370適可貫穿側板324，並分別具有位於側板324之二相對側的一第一端372及一第二端374。其中，第一端372係與主板322連接，而第二端374則藉由一固定件376可移動地栓固於側板324，因此，在側板324之第二高度H22為固定的情況下，相應於晶片堆疊結構400之晶片420的數量，使微調裝置370於側板324上移動，適可將主板322選擇性地移動至不同之第一高度H21，以使第一垂直探針332之針尖適接觸晶片堆疊結構400最上層之晶片420的複數直通矽晶穿孔電極422或凸塊430。如第6A、6B及6C圖所示，晶片堆疊結構400之晶片420的數量分別為兩個、四個及八個，而第一高度H21則隨晶片420數量增加而縮小。Similarly, in the fifth embodiment shown in FIGS. 6A, 6B and 6C, the probe card 300 further includes a fine adjustment device 370, and the fine adjustment device 370 is adapted to penetrate the side plate 324 and has two opposite sides of the side plate 324, respectively. A first end 372 and a second end 374 of the side. The first end 372 is connected to the main plate 322, and the second end 374 is movably fastened to the side plate 324 by a fixing member 376. Therefore, when the second height H22 of the side plate 324 is fixed, correspondingly The number of the wafers 420 of the wafer stack structure 400 is such that the fine adjustment device 370 is moved on the side plate 324 to selectively move the main board 322 to a different first height H21 to make the tip of the first vertical probe 332 contact. The plurality of wafers 420 of the uppermost layer of the wafer stack structure 400 pass through the through-hole via electrodes 422 or bumps 430. As shown in FIGS. 6A, 6B, and 6C, the number of wafers 420 of the wafer stack structure 400 is two, four, and eight, respectively, and the first height H21 is reduced as the number of wafers 420 increases.

於前述之第四實施例及第五實施例中，探針卡300的電路板310與探針頭320之主板322係藉由複數導線390電性連接，且複數導線390所具有之長度係可相對應於第一高度H21而調整。同時，複數導線390之種類係可選自下列群組：同軸電線(coaxial wires)、伸縮頂針(pogo pin)及彈簧電線(springs)，以達到導線長度可相對應於第一高度H21而進行調整之目的。In the foregoing fourth embodiment and the fifth embodiment, the circuit board 310 of the probe card 300 and the main board 322 of the probe head 320 are electrically connected by a plurality of wires 390, and the plurality of wires 390 have a length. The phase is adjusted corresponding to the first height H21. Meanwhile, the type of the plurality of wires 390 may be selected from the group consisting of coaxial wires, pogo pins, and springs, so that the wire length can be adjusted corresponding to the first height H21. The purpose.

綜上所述，本發明所揭示之探針卡適可區分為以下三類態樣，以相應於晶片堆疊結構400進行導電性的檢測：In summary, the probe card disclosed in the present invention can be divided into the following three types of aspects to perform conductivity detection corresponding to the wafer stack structure 400:

一、如第2A、2B及2C圖之第一實施例所示，固定複數第一垂直探針232之第一長度L11，並調整複數第二垂直探針242之第二長度L12，使當晶片堆疊結構400之晶片420的數量增加時，仍可讓探針卡200的第一探針組230及第二探針組240分別與晶片堆疊結構400的最上層晶片420之複數直通矽晶穿孔電極422或凸塊430及基板410之複數測試端點414接觸，以進行晶片堆疊結構400的電性訊號之檢測。1. As shown in the first embodiment of FIGS. 2A, 2B and 2C, the first length L11 of the plurality of first vertical probes 232 is fixed, and the second length L12 of the plurality of second vertical probes 242 is adjusted to make the wafer When the number of wafers 420 of the stacked structure 400 is increased, the first probe set 230 and the second probe set 240 of the probe card 200 and the plurality of through-silicone via electrodes of the uppermost wafer 420 of the wafer stack structure 400, respectively, are still allowed. The 422 or bump 430 and the plurality of test terminals 414 of the substrate 410 are in contact for detecting the electrical signal of the wafer stack structure 400.

二、如第3A、3B及3C圖之第二實施例及第4A、4B及4C圖之第三實施例所示，在不變更第一垂直探針332、第二垂直探針342以及探針頭320之主板322的情況下，亦即，當第一垂直探針332之第一長度L21、第二垂直探針342之第二長度L22及探針頭320之主板322的第一高度H21皆為固定時，調整探針頭320之側板324的第二高度H22，使當晶片堆疊結構400之晶片420的數量增加時，仍可讓探針卡300的第一探針組330及第二探針組340分別與晶片堆疊結構400的最上層晶片420之複數直通矽晶穿 孔電極422或凸塊430及基板410之複數測試端點414接觸，以進行晶片堆疊結構400的電性訊號之檢測。2. As shown in the second embodiment of FIGS. 3A, 3B, and 3C and the third embodiment of FIGS. 4A, 4B, and 4C, the first vertical probe 332, the second vertical probe 342, and the probe are not changed. In the case of the main board 322 of the head 320, that is, when the first length L21 of the first vertical probe 332, the second length L22 of the second vertical probe 342, and the first height H21 of the main board 322 of the probe head 320 are both When fixed, the second height H22 of the side plate 324 of the probe head 320 is adjusted to allow the first probe set 330 and the second probe of the probe card 300 to be increased when the number of wafers 420 of the wafer stack structure 400 is increased. The needle set 340 is respectively crossed with the topmost wafer 420 of the wafer stack structure 400. The hole electrode 422 or the bump 430 and the plurality of test terminals 414 of the substrate 410 are in contact for detecting the electrical signal of the wafer stack structure 400.

三、如第5A、5B及5C圖之第四實施例及第6A、6B及6C圖之第五實施例所示，在不變更第一垂直探針332、第二垂直探針342以及探針頭320之側板324的情況下，亦即，當第一垂直探針332之第一長度L21、第二垂直探針342之第二長度L22及探針頭320之側板324的第二高度H22皆為固定時，分別利用微調裝置360及微調裝置370調整探針頭320之主板322的第一高度H21，使當晶片堆疊結構400之晶片420的數量增加時，仍可讓探針卡300的第一探針組330及第二探針組340分別與晶片堆疊結構400的最上層晶片420之複數直通矽晶穿孔電極422或凸塊430及基板410之複數測試端點414接觸，以進行晶片堆疊結構400的電性訊號之檢測。3. As shown in the fifth embodiment of FIGS. 5A, 5B, and 5C and the fifth embodiment of FIGS. 6A, 6B, and 6C, the first vertical probe 332, the second vertical probe 342, and the probe are not changed. In the case of the side plate 324 of the head 320, that is, when the first length L21 of the first vertical probe 332, the second length L22 of the second vertical probe 342, and the second height H22 of the side plate 324 of the probe head 320 are both When fixed, the first height H21 of the main body 322 of the probe head 320 is adjusted by the fine adjustment device 360 and the fine adjustment device 370, respectively, so that when the number of the wafers 420 of the wafer stack structure 400 is increased, the probe card 300 can still be made. A probe set 330 and a second probe set 340 are respectively in contact with a plurality of through-silicon via electrodes 422 or bumps 430 of the uppermost wafer 420 of the wafer stack structure 400 and a plurality of test terminals 414 of the substrate 410 for wafer stacking. Detection of electrical signals of structure 400.

換言之，由於本發明之探針卡可直接藉由調整探針長度或探針頭之主板及側板間的相對高度，來針對具有顯著高度差的晶片堆疊結構進行電性訊號的檢測作業，故在實務應用上，即便每堆疊一次晶片便需進行一次的電性檢測作業，本發明之探針卡也可迅速地相應於晶片堆疊結構之高度進行調整，從而進行電性檢測流程，以縮短晶片堆疊結構的電性測試時間，加速半導體製程的生產速度，並節省購買相異平面度的探針卡的費用。In other words, since the probe card of the present invention can directly perform the detection of electrical signals for the wafer stack structure having a significant height difference by adjusting the length of the probe or the relative height between the main board and the side plates of the probe head, In practice, even if an electrical inspection operation is required once for each wafer is stacked, the probe card of the present invention can be quickly adjusted according to the height of the wafer stack structure, thereby performing an electrical detection process to shorten the wafer stacking. The electrical test time of the structure accelerates the production speed of the semiconductor process and saves the cost of purchasing probe cards of different flatness.

上述之實施例僅用來例舉本發明之實施態樣，以及闡釋本發明之技術特徵，並非用來限制本發明之保護範疇。任何熟悉此技術者可輕易完成之改變或均等性之安排均屬於本發明所主張之範 圍，本發明之權利保護範圍應以申請專利範圍為準。The embodiments described above are only intended to illustrate the embodiments of the present invention, and to explain the technical features of the present invention, and are not intended to limit the scope of protection of the present invention. Any change or equivalence arrangement that can be easily accomplished by those skilled in the art is within the scope of the present invention. The scope of protection of the present invention should be based on the scope of the patent application.

100‧‧‧探針卡100‧‧‧ probe card

110‧‧‧電路板110‧‧‧Circuit board

120‧‧‧探針頭120‧‧‧Probe head

122‧‧‧探針122‧‧‧Probe

200‧‧‧探針卡200‧‧‧ probe card

210‧‧‧電路板210‧‧‧ boards

220‧‧‧探針頭220‧‧‧ probe head

222‧‧‧內部區域222‧‧‧Internal area

224‧‧‧外部區域224‧‧‧External area

230‧‧‧第一探針組230‧‧‧First probe set

232‧‧‧第一垂直探針232‧‧‧First vertical probe

240‧‧‧第二探針組240‧‧‧Second probe set

242‧‧‧第二垂直探針242‧‧‧Second vertical probe

300‧‧‧探針卡300‧‧‧ probe card

310‧‧‧電路板310‧‧‧Circuit board

320‧‧‧探針頭320‧‧‧Probe head

322‧‧‧主板322‧‧‧ motherboard

324‧‧‧側板324‧‧‧ side panels

330‧‧‧第一探針組330‧‧‧First probe set

332‧‧‧第一垂直探針332‧‧‧First vertical probe

340‧‧‧第二探針組340‧‧‧Second probe set

342‧‧‧第二垂直探針342‧‧‧Second vertical probe

350‧‧‧組裝塊350‧‧‧Assembly block

360‧‧‧微調裝置360‧‧‧ fine-tuning device

362‧‧‧第一端362‧‧‧ first end

364‧‧‧第二端364‧‧‧second end

366‧‧‧固定件366‧‧‧Fixed parts

370‧‧‧微調裝置370‧‧‧ fine-tuning device

372‧‧‧第一端372‧‧‧ first end

374‧‧‧第二端374‧‧‧second end

376‧‧‧固定件376‧‧‧Fixed parts

390‧‧‧導線390‧‧‧Wire

400‧‧‧晶片堆疊結構400‧‧‧ wafer stack structure

410‧‧‧基板410‧‧‧Substrate

412‧‧‧晶片堆疊區412‧‧‧ wafer stacking area

414‧‧‧測試端點414‧‧‧Test endpoint

420‧‧‧晶片420‧‧‧ wafer

422‧‧‧直通矽晶穿孔電極422‧‧‧through through-silicone perforated electrode

430‧‧‧凸塊430‧‧‧Bumps

L11‧‧‧第一長度L11‧‧‧ first length

L12‧‧‧第二長度L12‧‧‧second length

L21‧‧‧第一長度L21‧‧‧ first length

L22‧‧‧第二長度L22‧‧‧second length

H21‧‧‧第一高度H21‧‧‧First height

H22‧‧‧第二高度H22‧‧‧second height

第1圖係為先前技術之探針卡示意圖；第2A、2B及2C圖係為本發明探針卡之第一實施例示意圖；第3A、3B及3C圖係為本發明探針卡之第二實施例示意圖；第4A、4B及4C圖係為本發明探針卡之第三實施例示意圖；第5A、5B及5C圖係為本發明探針卡之第四實施例示意圖；以及第6A、6B及6C圖係為本發明探針卡之第五實施例示意圖。1 is a schematic view of a probe card of the prior art; 2A, 2B, and 2C are schematic views of a first embodiment of the probe card of the present invention; and 3A, 3B, and 3C are the first of the probe cards of the present invention. 2A, 4B, and 4C are schematic views of a third embodiment of the probe card of the present invention; FIGS. 5A, 5B, and 5C are schematic views of a fourth embodiment of the probe card of the present invention; and 6A The 6B and 6C drawings are schematic views of the fifth embodiment of the probe card of the present invention.

200‧‧‧探針卡200‧‧‧ probe card

210‧‧‧電路板210‧‧‧ boards

220‧‧‧探針頭220‧‧‧ probe head

222‧‧‧內部區域222‧‧‧Internal area

224‧‧‧外部區域224‧‧‧External area

230‧‧‧第一探針組230‧‧‧First probe set

232‧‧‧第一垂直探針232‧‧‧First vertical probe

240‧‧‧第二探針組240‧‧‧Second probe set

242‧‧‧第二垂直探針242‧‧‧Second vertical probe

400‧‧‧晶片堆疊結構400‧‧‧ wafer stack structure

410‧‧‧基板410‧‧‧Substrate

412‧‧‧晶片堆疊區412‧‧‧ wafer stacking area

414‧‧‧測試端點414‧‧‧Test endpoint

420‧‧‧晶片420‧‧‧ wafer

422‧‧‧直通矽晶穿孔電極422‧‧‧through through-silicone perforated electrode

430‧‧‧凸塊430‧‧‧Bumps

L11‧‧‧第一長度L11‧‧‧ first length

L12‧‧‧第二長度L12‧‧‧second length

Claims (12)

一種探針卡，係用於對一晶片堆疊結構進行電性測試，該晶片堆疊結構包含一基板，以及至少一晶片，其中該基板具有一晶片堆疊區，以及位於該晶片堆疊區外之複數測試端點，該至少一晶片設置於該晶片堆疊區內且具有複數直通矽晶穿孔電極(Through-Silicon-Via，TSV)，該探針卡包含：一電路板；一探針頭，組裝於該電路板上並與該電路板電性連接；以及一第一探針組及一第二探針組，分別具有複數第一垂直探針及複數第二垂直探針，該等垂直探針係分別設置於該探針頭上，該等第一垂直探針位於該探針頭之一內部區域，用以探觸該至少一晶片之該等直通矽晶穿孔電極，該等第二垂直探針位於該探針頭之一外部區域，用以探觸該基板之該等測試端點；其中，該電路板、該探針頭、該等第一垂直探針及該等第二垂直探針係依序沿一垂直方向配置，該等第一垂直探針沿該垂直方向具有一第一長度，該等第二垂直探針沿該垂直方向具有一第二長度，且該第二長度係大於該第一長度。 A probe card for electrically testing a wafer stack structure, the wafer stack structure comprising a substrate, and at least one wafer, wherein the substrate has a wafer stacking region, and a plurality of tests outside the wafer stacking region An end point, the at least one wafer is disposed in the wafer stacking region and has a plurality of Through-Silicon-Via (TSV), the probe card comprises: a circuit board; a probe head assembled in the The circuit board is electrically connected to the circuit board; and a first probe set and a second probe set respectively have a plurality of first vertical probes and a plurality of second vertical probes, and the vertical probes are respectively Provided on the probe head, the first vertical probe is located in an inner region of the probe head for sensing the through-silicon via electrodes of the at least one wafer, wherein the second vertical probes are located An outer region of the probe head for detecting the test endpoints of the substrate; wherein the circuit board, the probe head, the first vertical probes, and the second vertical probes are sequentially Configured along a vertical direction, the same The vertical probe in a vertical direction having a first length, such that the second vertical probe along a vertical direction having a second length, the second length and the first length is greater than the system. 如請求項1所述之探針卡，其中該第一長度係為固定，且該第二長度係隨該晶片堆疊結構之晶片數量增加而增長。 The probe card of claim 1, wherein the first length is fixed and the second length increases as the number of wafers of the wafer stack structure increases. 一種探針卡，係用於對一晶片堆疊結構進行電性測試，該晶片堆疊結構包含一基板，以及至少一晶片，其中該基板具有一晶片堆疊區，以及位於該晶片堆疊區外之複數測試端點， 該至少一晶片設置於該晶片堆疊區內且具有複數直通矽晶穿孔電極，該探針卡包含：一電路板；一探針頭，組裝於該電路板上並與該電路板電性連接，該探針頭包含一主板及一側板，該側板係位於該主板之外側；以及一第一探針組及一第二探針組，分別具有複數第一垂直探針及複數第二垂直探針，且係分別設置於該主板及該側板，該等第一垂直探針係用以探觸該至少一晶片之該等直通矽晶穿孔電極，該等第二垂直探針係用以探觸該基板之該等測試端點；其中，該電路板、該探針頭、該等第一垂直探針及該等第二垂直探針係依序沿一垂直方向配置，該等第一垂直探針沿該垂直方向具有一第一長度，該等第二垂直探針沿該垂直方向具有一第二長度，且該第一長度與該第二長度相近，該主板相對於該電路板具有一第一高度，該側板相對於該電路板具有一第二高度，且該第二高度大於該第一高度。 A probe card for electrically testing a wafer stack structure, the wafer stack structure comprising a substrate, and at least one wafer, wherein the substrate has a wafer stacking region, and a plurality of tests outside the wafer stacking region End point, The at least one wafer is disposed in the wafer stacking region and has a plurality of through-silicon via electrodes. The probe card comprises: a circuit board; a probe head is assembled on the circuit board and electrically connected to the circuit board. The probe head comprises a main board and a side board, the side board is located on the outer side of the main board; and a first probe set and a second probe set respectively have a plurality of first vertical probes and a plurality of second vertical probes And the first vertical probe is configured to detect the through-twisted perforated electrodes of the at least one chip, and the second vertical probes are used to detect the The test end points of the substrate; wherein the circuit board, the probe head, the first vertical probes, and the second vertical probes are sequentially arranged along a vertical direction, the first vertical probes Having a first length along the vertical direction, the second vertical probe has a second length along the vertical direction, and the first length is similar to the second length, and the motherboard has a first dimension relative to the circuit board Height, the side panel has one with respect to the circuit board Two height and the second height is greater than the first height. 如請求項3所述之探針卡，其中該主板之該第一高度係為固定，而該側板之該第二高度係為可調整，且該第二高度係隨該晶片堆疊結構之晶片數量增加而增大。 The probe card of claim 3, wherein the first height of the main board is fixed, and the second height of the side panel is adjustable, and the second height is related to the number of wafers of the wafer stack structure Increase and increase. 如請求項4所述之探針卡，其中該探針頭係運用可替換之該側板，以調整該第二高度。 The probe card of claim 4, wherein the probe head utilizes the replaceable side panel to adjust the second height. 如請求項4所述之探針卡，其中該側板係由複數組裝塊所構成，該等組裝塊可相互組裝結合，以調整該第二高度。 The probe card of claim 4, wherein the side panel is composed of a plurality of assembly blocks that can be assembled and coupled to each other to adjust the second height. 如請求項6所述之探針卡，其中該等組裝塊各具有複數電性導通端點，用以供該等組裝塊相互電性連接以及電性連接該電路板。 The probe card of claim 6, wherein the assembly blocks each have a plurality of electrical conduction terminals for electrically connecting the assembly blocks to each other and to the circuit board. 如請求項3所述之探針卡，其中該側板之該第二高度係為固定，而該主板之該第一高度係為可調整，且該第一高度係隨該晶片堆疊結構之晶片數量增加而縮小。 The probe card of claim 3, wherein the second height of the side panel is fixed, and the first height of the main board is adjustable, and the first height is related to the number of wafers of the wafer stack structure Increase and shrink. 如請求項8所述之探針卡，更包含一微調裝置，該微調裝置係貫穿該電路板，並分別具有位於該電路板之二相對側的一第一端及一第二端，該第一端與該主板連接，以將該主板移動至不同之該第一高度，而該第二端藉由一固定件可旋轉地栓固於該電路板，用以調整該第一高度。 The probe card of claim 8, further comprising a fine adjustment device extending through the circuit board and having a first end and a second end on opposite sides of the circuit board, respectively One end is connected to the main board to move the main board to different first heights, and the second end is rotatably bolted to the circuit board by a fixing member for adjusting the first height. 如請求項8所述之探針卡，更包含一微調裝置，該微調裝置係貫穿該側板，並分別具有位於該側板之二相對側的一第一端及一第二端，該第一端與該主板連接，而該第二端藉由一固定件可移動地栓固於該側板，當該微調裝置於該側板上移動時，適可相應調整該第一高度。 The probe card of claim 8, further comprising a fine adjustment device extending through the side panel and having a first end and a second end on opposite sides of the side panel, the first end The first end is connected to the main board, and the second end is movably fastened to the side panel by a fixing member. When the fine adjustment device moves on the side panel, the first height can be adjusted accordingly. 如請求項8所述之探針卡，更具有複數導線，該等導線係電性連接該電路板與該探針頭之該主板，且該等導線之長度係可對應該第一高度而調整。 The probe card of claim 8, further comprising a plurality of wires electrically connected to the circuit board and the main board of the probe head, and the lengths of the wires are adjusted corresponding to the first height . 如請求項11所述之探針卡，其中該等導線之種類係可選自下列群組：同軸電線(coaxial wires)、伸縮頂針(pogo pin)及彈簧電線(springs)。 The probe card of claim 11, wherein the types of the wires are selected from the group consisting of coaxial wires, pogo pins, and springs.
TW100143236A 2011-11-25 2011-11-25 Probe card TWI490502B (en)

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