TWI459486B - Manufacturing method of conductive column for ceramic package substrate - Google Patents
Manufacturing method of conductive column for ceramic package substrate Download PDFInfo
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本發明係有關一種導電柱製造方法，特別是指一種可應用於陶瓷封裝基板，具有良好散熱效率，且製程較為簡便之製造方法。The invention relates to a method for manufacturing a conductive column, in particular to a manufacturing method which can be applied to a ceramic package substrate, has good heat dissipation efficiency, and has a relatively simple process.
一直以來，都有將發光二極體安裝於印刷電路板(PCB)之照明等之開發。尤其，近年以來，有輸出大，亮度高之照明等之需要；隨著高功率發光二極體需求逐漸增加，造成散熱基板所要承載之熱量大幅提升，使得散熱基板從舊有印刷電路板提升為金屬核心印刷電路板(MCPCB)，然而，在更高功率發光二極體的大量使用下，因為金屬核心印刷電路板基板的介電層與基板熱膨脹係數不匹配而導致板爆及斷路，而且其存在不抗高AC電壓的問題，近期乃逐漸改採用陶瓷做為散熱材料。Developments such as lighting for mounting a light-emitting diode on a printed circuit board (PCB) have been made. In particular, in recent years, there is a need for large output, high brightness illumination, etc.; as the demand for high-power light-emitting diodes is gradually increased, the heat to be carried by the heat-dissipating substrate is greatly increased, so that the heat-dissipating substrate is upgraded from the old printed circuit board to Metal core printed circuit board (MCPCB), however, in the large-scale use of higher power light-emitting diodes, because the dielectric layer of the metal core printed circuit board substrate does not match the thermal expansion coefficient of the substrate, causing board explosion and open circuit, and There is a problem of not resisting high AC voltage, and recently it has gradually changed to use ceramic as a heat sink material.
當利用一般線路化製程施作於陶瓷基板時，於陶瓷基板的表面佈滿了許多大小口徑不同的貫穿孔，尤其是應用發光二極體之陶瓷基板，其具有高深寬比之貫穿孔(貫穿孔之深度或長度與寬度或直徑的比例)，這些貫穿孔在進行濺鍍時，常常無法使得陶瓷基板的表面能夠完全的導通，而且在電鍍的過程中則常會因為所形成的氣孔或是氣泡，而終致影響線路的形成。When a general circuitization process is applied to a ceramic substrate, the surface of the ceramic substrate is filled with a plurality of through holes having different diameters and sizes, in particular, a ceramic substrate using a light-emitting diode, which has a high aspect ratio through hole (through The depth or length of the hole is proportional to the width or diameter. These through holes often fail to make the surface of the ceramic substrate fully conductive during sputtering, and often cause voids or bubbles during the plating process. And ultimately affect the formation of the line.
如台灣專利公告號第540279號，專利名稱「在陶瓷基板製作小孔徑鍍銅貫穿孔的方法」，其主要係於一基板上先進行 鑿孔、穿孔電連接等先前處理步驟後，於基板表面以濺鍍方式依序形成鈦層及銅層，爾後再行實施一電鍍化學銅的過程，並於貼上乾膜後而進行曝光、顯影等步驟，隨後於線路圖案上鍍銅以形成銅線路，完成後即剝離乾膜，再依序於銅線路上鍍鎳及鍍金，即完成金屬化製程。For example, Taiwan Patent Publication No. 540279, the patent name "Method for making a small-aperture copper-plated through-hole in a ceramic substrate" is mainly performed on a substrate. After the previous processing steps such as perforation and perforation electrical connection, the titanium layer and the copper layer are sequentially formed on the surface of the substrate by sputtering, and then a process of electroplating chemical copper is performed, and after exposure to the dry film, exposure is performed. The steps of development and the like are followed by copper plating on the line pattern to form a copper line, and after completion, the dry film is peeled off, and nickel plating and gold plating are sequentially performed on the copper line to complete the metallization process.
該種習有製程雖可使線路細直、且兼具理想導熱效果等優點，而小口徑貫穿孔之無法導通的問題，亦可藉由電鍍化學銅的步驟而予以完全的使之導通；惟，其製程較為繁雜，需要「濺鍍」、「無電鍍化學銅」以及「電鍍鍍銅」等三道鍍膜步驟才能完成。Although the conventional process can make the circuit straight and has the same ideal heat conduction effect, the problem that the small-diameter through hole can not be turned on can be completely turned on by the step of electroplating chemical copper; The process is complicated and requires three coating steps such as "sputtering", "electroless copper plating" and "electroplating copper plating".
有鑑於此，本發明即在提供一種可應用於陶瓷封裝基板，具有良好散熱效率，且製程較為簡便之製造方法，為其主要目的者。In view of the above, the present invention provides a manufacturing method which can be applied to a ceramic package substrate, has a good heat dissipation efficiency, and has a relatively simple process, and is a main object thereof.
為達上揭目的，本發明係適用於一陶瓷封裝基板製程，其中該陶瓷封裝基板設有至少一穿孔，利用金屬粉末射出填滿於該穿孔內，再進行燒結成型而形成導電柱，該導電柱可構成該陶瓷封裝基板不同平面線路之電性連接，可供發光晶片封裝使用。In order to achieve the above, the present invention is applicable to a ceramic package substrate process, wherein the ceramic package substrate is provided with at least one through hole, which is filled with metal powder to fill the through hole, and then sintered to form a conductive pillar. The pillars can form electrical connections of different planar lines of the ceramic package substrate, and can be used for the light emitting chip package.
依據上述主要結構特徵，本發明至少包含下列步驟：提供一陶瓷封裝基板，該陶瓷封裝基板形成有至少一穿孔；射出步驟，利用金屬粉末射出填滿於上述之穿孔內；以及燒結步驟，利用高溫進行燒結，使該上述金屬粉末固化成型，而形成位於該穿孔內之導電柱。According to the above main structural features, the present invention comprises at least the steps of: providing a ceramic package substrate, the ceramic package substrate being formed with at least one perforation; an ejecting step of filling the perforation with the metal powder; and a sintering step using the high temperature Sintering is performed to cure the metal powder to form a conductive pillar located in the perforation.
依據上述主要結構特徵，所述燒結步驟後可進一步包含有線路成型步驟，於該陶瓷封裝基板表面形成有線路層，該線路層可與該導電柱形成電性連接。According to the above main structural features, the sintering step may further include a line forming step, and a circuit layer is formed on the surface of the ceramic package substrate, and the circuit layer may be electrically connected to the conductive pillar.
依據上述主要結構特徵，所述線路成型步驟中可於該陶瓷封裝基板表面形成第一金屬層，並將至少一乾膜光阻覆蓋於該第一導電層上，並利用黃光微影將該乾膜光阻圖案化，再於未有乾膜光阻覆蓋之第一導電層上形成第二導電層，並將覆蓋於該第一導電層上之乾膜光阻去除，最後將未有第二導電層覆蓋之第一導電層進行蝕刻移除，而形成線路層；或者，該線路成型步驟中可於該陶瓷封裝基板表面形成第一金屬層，利用圖案化製程使該第一金屬層形成線路層；亦或者，該線路成型步驟中可於該陶瓷封裝基板表面形成第一金屬層以及第二金屬層，利用圖案化製程使該第一金屬層以及第二金屬層形成線路層。According to the above main structural features, in the circuit forming step, a first metal layer may be formed on the surface of the ceramic package substrate, and at least one dry film photoresist is coated on the first conductive layer, and the dry film is lighted by the yellow light lithography. Resisting the patterning, forming a second conductive layer on the first conductive layer not covered by the dry film photoresist, and removing the dry film photoresist covering the first conductive layer, and finally having no second conductive layer The first conductive layer is formed by etching, and the first metal layer is formed on the surface of the ceramic package substrate, and the first metal layer is formed into a circuit layer by a patterning process; Alternatively, in the circuit forming step, the first metal layer and the second metal layer may be formed on the surface of the ceramic package substrate, and the first metal layer and the second metal layer are formed into a circuit layer by a patterning process.
依據上述主要結構特徵，於該線路成型步驟後進一步包含有鍍反射膜步驟，於該線路層表面鍍有反射膜。According to the above main structural features, after the line forming step, a step of plating a reflective film is further included, and a surface of the circuit layer is plated with a reflective film.
依據上述主要結構特徵，於該線路成型步驟後進一步包含有設置絕緣層步驟，於該陶瓷封裝基板表面形成有絕緣層。According to the above main structural features, after the circuit forming step, the step of providing an insulating layer is further included, and an insulating layer is formed on the surface of the ceramic package substrate.
依據上述主要結構特徵，於設置絕緣層步驟之後進一步包含有表面改質步驟，其在線路層上鍍上鋁、銀、金、鎳金或鎳鈀金之金屬層。According to the above main structural features, after the step of disposing the insulating layer, a surface modification step is further included, wherein the circuit layer is plated with a metal layer of aluminum, silver, gold, nickel gold or nickel palladium.
依據上述主要結構特徵，所述之第一導電層與該陶瓷封裝基板之間可進一步設有一層中介層，而該中介層可以為鈦、鉻、鎳、銅，或上述組合之合金。According to the above main structural features, an interposer may be further disposed between the first conductive layer and the ceramic package substrate, and the interposer may be titanium, chromium, nickel, copper, or an alloy of the above combination.
依據上述主要結構特徵，所述形成第一導電層或第二導 電層可利用物理氣相沈積、化學氣相沈積、化學沈積等之無電鍍製程，例如濺鍍、蒸鍍、電弧蒸氣沈積、離子束濺鍍、雷射熔散沈積、電漿促進之化學氣相沈積。Forming the first conductive layer or the second guide according to the above main structural features The electrical layer can utilize electroless deposition processes such as physical vapor deposition, chemical vapor deposition, chemical deposition, etc., such as sputtering, evaporation, arc vapor deposition, ion beam sputtering, laser melting deposition, plasma-promoted chemical gas. Phase deposition.
依據上述主要結構特徵，所述燒結溫度可以為200~1200℃。According to the above main structural features, the sintering temperature may be 200 to 1200 °C.
具體而言，本發明之製造方法可以產生下列功效：Specifically, the manufacturing method of the present invention can produce the following effects:
1.解決一般用濺鍍方式鍍膜時，若需鍍成預定厚度於穿孔內時，其製程時間較長之問題，藉由本發明中金屬粉末直接射出之方式可降低製程時間。1. Solving the problem that when the plating is generally performed by sputtering, if the plating time is required to be plated into the perforation, the process time is long, and the process time can be reduced by directly injecting the metal powder in the invention.
2.本發明可應用於小孔徑，提升雷射穿孔效率2. The invention can be applied to small apertures to improve the efficiency of laser perforation
3.本發明可應用於大孔徑可直接使用已形成穿孔之陶瓷基板。3. The present invention can be applied to a large-aperture ceramic substrate in which a perforation has been formed.
4.不需使用無電鍍化學鍍膜的製程。4. No need to use electroless electroless plating process.
5.降低線路層金屬化的厚度。5. Reduce the thickness of the metallization of the circuit layer.
本發明之特點，可參閱本案圖式及實施例之詳細說明而獲得清楚地瞭解。The features of the present invention can be clearly understood by referring to the drawings and the detailed description of the embodiments.
如第一圖本發明製造方法之流程示意圖所示，本發明至少包含下列步驟：提供陶瓷封裝基板步驟101，該陶瓷封裝基板形成有至少一之穿孔21，請同時參閱第二圖(A)所示，而該穿孔21之深寬比以2/1~5/1為佳；該穿孔可於陶瓷基板於製造時已成型，或者可利用雷射鑽孔使該陶瓷封裝基板形成穿孔。As shown in the first schematic diagram of the manufacturing method of the present invention, the present invention at least includes the following steps: providing a ceramic package substrate step 101, the ceramic package substrate is formed with at least one through hole 21, please refer to the second figure (A) Preferably, the aspect ratio of the through hole 21 is preferably 2/1 to 5/1; the through hole may be formed at the time of manufacture of the ceramic substrate, or the ceramic package substrate may be perforated by laser drilling.
射出步驟102，利用金屬粉末51射出填滿於上述之穿孔 21內，請同時參閱第二圖(B)所示；以及燒結步驟103，利用高溫(其燒結溫度可以為200~1200℃)進行燒結，使該上述金屬粉末固化成型，而形成位於該穿孔21內之導電柱52，請同時參閱第二圖(C)所示。In the injection step 102, the metal powder 51 is used to eject and fill the perforation described above. 21, please refer to the second figure (B); and the sintering step 103, using high temperature (the sintering temperature may be 200 ~ 1200 ° C) for sintering, the metal powder is solidified and formed to form the perforation 21 For the conductive column 52 inside, please refer to the second figure (C).
藉由簡單射出方式，即可於該將金屬粉末填充於穿孔內，再藉由燒結使該金屬粉末固化成型，而成型導電柱，不僅製程大為簡化，更可適用於小口徑穿孔之導通，進而提供產品的穩定度。By simply injecting the metal powder into the perforation, and then solidifying the metal powder by sintering, the conductive pillar is formed, which not only greatly simplifies the process, but also is suitable for the conduction of small-diameter perforations. In turn, the stability of the product is provided.
而該燒結步驟後可進一步包含有線路成型步驟104，該線路成型步驟中可於該陶瓷封裝基板20表面形成第一金屬層31，請同時參閱第二圖(D)所示，並將至少一乾膜光阻41覆蓋於該第一導電層31上，並利用黃光微影將該乾膜光阻41圖案化，請同時參閱第二圖(E)所示，再於未有乾膜光阻覆蓋之第一導電層31上形成第二導電層33，請同時參閱第二圖(F)所示，並將覆蓋於該第一導電層31上之乾膜光阻去除，最後將未有第二導電層33覆蓋之第一導電層31進行蝕刻移除，請同時參閱第二圖(G)所示，而形成線路層34，該線路層34可與該導電柱52形成電性連接。The sintering step may further include a line forming step 104, in which the first metal layer 31 may be formed on the surface of the ceramic package substrate 20, please refer to the second figure (D) at the same time, and at least one dry The film photoresist 41 covers the first conductive layer 31, and the dry film photoresist 41 is patterned by using yellow light lithography. Please refer to FIG. 2(E) at the same time, and then without dry film photoresist. The second conductive layer 33 is formed on the first conductive layer 31. Please refer to the second figure (F) at the same time, and remove the dry film photoresist covering the first conductive layer 31, and finally there is no second conductive. The first conductive layer 31 covered by the layer 33 is etched and removed. Please refer to the second figure (G) to form a circuit layer 34. The circuit layer 34 can be electrically connected to the conductive pillar 52.
其中，形成第一導電層31或第二導電層33可利用物理氣相沈積、化學氣相沈積、化學沈積等之無電鍍製程，例如濺鍍、蒸鍍、電弧蒸氣沈積、離子束濺鍍、雷射熔散沈積、電漿促進之化學氣相沈積，而該第一導電層31可以為銅、鈦/銅合金、鉻/銅合金、鎳/銅合金，或上述組合之合金，並且可加上一層中介層32於第一導電層31與陶瓷封裝基板20之間，該中介層可以為鈦、鉻、鎳、銅，或上述組合之合 金，尤其是當該第一導電層31材質為銅時，可以增加該第一導電層31與陶瓷封裝基板20間之附著性。Wherein, the first conductive layer 31 or the second conductive layer 33 can be formed by an electroless deposition process such as physical vapor deposition, chemical vapor deposition, chemical deposition, etc., such as sputtering, evaporation, arc vapor deposition, ion beam sputtering, Laser-dissolved deposition, plasma-promoted chemical vapor deposition, and the first conductive layer 31 may be copper, titanium/copper alloy, chromium/copper alloy, nickel/copper alloy, or alloy of the above combination, and may be added The upper interposer 32 is between the first conductive layer 31 and the ceramic package substrate 20. The interposer may be titanium, chromium, nickel, copper, or a combination thereof. Gold, especially when the first conductive layer 31 is made of copper, can increase the adhesion between the first conductive layer 31 and the ceramic package substrate 20.
再者，於該線路成型步驟後進一步包含有鍍反射膜步驟，於該線路層表面鍍有反射膜，以增加光學反射效果，該鍍反射膜步驟可於蝕刻之後進行；亦可於形成第二導電層與去除乾膜光阻之間進行。Furthermore, after the circuit forming step, a step of plating a reflective film is further included, and a surface of the circuit layer is coated with a reflective film to increase an optical reflection effect, and the step of plating the reflective film may be performed after etching; or forming a second The conductive layer is performed between removing the dry film photoresist.
另外，上述實施例中，亦可於該線路成型步驟之蝕刻後進一步包含有設置絕緣層步驟，於該陶瓷封裝基板表面形成有絕緣層，可防止焊錫及導體間的短路或外來的機械傷害、濕氣等的危害，以保持良好的線路導通、絕緣性；並於設置絕緣層步驟之後進一步包含有表面改質步驟，其在線路層上鍍上鋁、銀、金、鎳金或鎳鈀金之金屬層，以提高表面焊錫強度及打線強度，進而增加產品的穩定性。In addition, in the above embodiment, the step of providing an insulating layer may be further included after the etching of the line forming step, and an insulating layer is formed on the surface of the ceramic package substrate to prevent short circuit between the solder and the conductor or external mechanical damage. The hazard of moisture, etc., to maintain good line conduction and insulation; and further comprising a surface modification step after the step of providing the insulating layer, which is plated with aluminum, silver, gold, nickel gold or nickel palladium on the circuit layer. The metal layer is used to improve the surface solder strength and wire strength, thereby increasing the stability of the product.
再者，該線路成型步驟中可於該陶瓷封裝基板表面形成第一金屬層，利用圖案化製程(例如黃光微影蝕刻製程)使該第一金屬層形成線路層，可降低線路層金屬化的厚度；亦或者，該線路成型步驟中可於該陶瓷封裝基板表面形成第一金屬層以及第二金屬層，利用圖案化製程使該第一金屬層以及第二金屬層形成線路層。Furthermore, in the circuit forming step, a first metal layer may be formed on the surface of the ceramic package substrate, and the first metal layer is formed into a circuit layer by a patterning process (for example, a yellow photolithography process), thereby reducing the thickness of the circuit layer metallization. Or in the circuit forming step, the first metal layer and the second metal layer may be formed on the surface of the ceramic package substrate, and the first metal layer and the second metal layer are formed into a circuit layer by a patterning process.
綜上所述，本發明提供一陶瓷封裝基板較佳可行之導電柱製造方法，爰依法提呈發明專利之申請；本發明之技術內容及技術特點巳揭示如上，然而熟悉本項技術之人士仍可能基於本發明之揭示而作各種不背離本案發明精神之替換及修飾。因此，本發明之保護範圍應不限於實施例所揭示者，而應包括各種不背離本發明之替換及修飾，並為以下之申請專 利範圍所涵蓋。In summary, the present invention provides a method for manufacturing a conductive pillar which is preferably a ceramic package substrate, and an application for an invention patent according to the law; the technical content and technical features of the present invention are disclosed above, but those skilled in the art still Various substitutions and modifications may be made without departing from the spirit and scope of the invention. Therefore, the scope of the present invention should not be limited by the embodiment, but should include various alternatives and modifications without departing from the invention, and Covered by the scope of interest.
101‧‧‧提供陶瓷封裝基板步驟101‧‧‧Provide the steps of ceramic package substrate
102‧‧‧射出步驟102‧‧‧ injection steps
103‧‧‧燒結步驟103‧‧‧Sintering step
104‧‧‧線路成型步驟104‧‧‧Line forming steps
20‧‧‧陶瓷封裝基板20‧‧‧Ceramic package substrate
21‧‧‧穿孔21‧‧‧Perforation
31‧‧‧第一導電層31‧‧‧First conductive layer
32‧‧‧中介層32‧‧‧Intermediary
33‧‧‧第二導電層33‧‧‧Second conductive layer
34‧‧‧線路層34‧‧‧Line layer
41‧‧‧乾膜光阻41‧‧‧Dry film photoresist
51‧‧‧金屬粉末51‧‧‧Metal powder
52‧‧‧導電柱52‧‧‧conductive column
第一圖係為本發明中製造方法之流程示意圖。The first figure is a schematic flow chart of the manufacturing method in the present invention.
第二圖(A)~(G)係為本發明中製造方法之結構示意圖。The second figures (A) to (G) are schematic structural views of the manufacturing method in the present invention.
101‧‧‧提供陶瓷封裝基板步驟101‧‧‧Provide the steps of ceramic package substrate
102‧‧‧射出步驟102‧‧‧ injection steps
103‧‧‧燒結步驟103‧‧‧Sintering step
104‧‧‧線路成型步驟104‧‧‧Line forming steps
Claims (12)
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| Application Number | Priority Date | Filing Date | Title |
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| TW101122251A TWI459486B (en) | 2012-06-21 | 2012-06-21 | Manufacturing method of conductive column for ceramic package substrate |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| TW101122251A TWI459486B (en) | 2012-06-21 | 2012-06-21 | Manufacturing method of conductive column for ceramic package substrate |
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| TW201401393A TW201401393A (en) | 2014-01-01 |
| TWI459486B true TWI459486B (en) | 2014-11-01 |
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| TW101122251A TWI459486B (en) | 2012-06-21 | 2012-06-21 | Manufacturing method of conductive column for ceramic package substrate |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| TWI667157B (en) * | 2015-01-26 | 2019-08-01 | 立碁電子工業股份有限公司 | Light emitting diode headlamp for vehicle |
Families Citing this family (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| TWI620253B (en) * | 2016-04-26 | 2018-04-01 | Method for building conductive substrate |
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| TW540279B (en) * | 2002-08-21 | 2003-07-01 | Tong Hsing Electronic Ind Ltd | Method for producing copper-plated through hole with a small diameter on ceramic substrate |
| JP2004175599A (en) * | 2002-11-26 | 2004-06-24 | Sumitomo Electric Ind Ltd | Process for manufacturing ceramic sintered compact having metallized layer |
| US20060000542A1 (en) * | 2004-06-30 | 2006-01-05 | Yongki Min | Metal oxide ceramic thin film on base metal electrode |
| US20060009036A1 (en) * | 2004-07-12 | 2006-01-12 | Bacher Rudolph J | High thermal cycle conductor system |
| CN201246695Y (en) * | 2008-05-04 | 2009-05-27 | 潮州市三江电子有限公司 | Ceramic heat radiation substrate for chip LED encapsulation |
| US20100065189A1 (en) * | 2008-09-12 | 2010-03-18 | Ngk Insulators, Ltd. | Method for manufacturing a three-dimensional forming portion |
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| TW540279B (en) * | 2002-08-21 | 2003-07-01 | Tong Hsing Electronic Ind Ltd | Method for producing copper-plated through hole with a small diameter on ceramic substrate |
| JP2004175599A (en) * | 2002-11-26 | 2004-06-24 | Sumitomo Electric Ind Ltd | Process for manufacturing ceramic sintered compact having metallized layer |
| US20060000542A1 (en) * | 2004-06-30 | 2006-01-05 | Yongki Min | Metal oxide ceramic thin film on base metal electrode |
| US20060009036A1 (en) * | 2004-07-12 | 2006-01-12 | Bacher Rudolph J | High thermal cycle conductor system |
| CN201246695Y (en) * | 2008-05-04 | 2009-05-27 | 潮州市三江电子有限公司 | Ceramic heat radiation substrate for chip LED encapsulation |
| US20100065189A1 (en) * | 2008-09-12 | 2010-03-18 | Ngk Insulators, Ltd. | Method for manufacturing a three-dimensional forming portion |
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| TW201401393A (en) | 2014-01-01 |
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