TWI450407B - 具有一環繞磊晶生長p或n層之奈米線結構光電二極體 - Google Patents
具有一環繞磊晶生長p或n層之奈米線結構光電二極體 Download PDFInfo
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- TWI450407B TWI450407B TW099142978A TW99142978A TWI450407B TW I450407 B TWI450407 B TW I450407B TW 099142978 A TW099142978 A TW 099142978A TW 99142978 A TW99142978 A TW 99142978A TW I450407 B TWI450407 B TW I450407B
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- nanowire
- layer
- photodiode device
- substrate
- photodiode
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Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L31/02—Details
- H01L31/0232—Optical elements or arrangements associated with the device
- H01L31/02325—Optical elements or arrangements associated with the device the optical elements not being integrated nor being directly associated with the device
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
- H01L27/144—Devices controlled by radiation
- H01L27/146—Imager structures
- H01L27/14601—Structural or functional details thereof
- H01L27/14603—Special geometry or disposition of pixel-elements, address-lines or gate-electrodes
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Description
本申請案一般而言係關於半導體製造,且特定而言,係關於具有一環繞磊晶生長P或N層之奈米線結構光電二極體之製作。
本申請案係關於
提出申請、代理人檔案號碼為095035-0381955、標題為「NANOWIRE CORE-SHELL LIGHT PIPES」之美國申請案號
,該申請案以全文引用之方式併入本文中。
互補金屬氧化物半導體(CMOS)影像感測器正因其便於整合、低成本及降低之電力消耗而越來越廣泛地用於市場中。
一影像感測器可經製作以具有呈一(笛卡爾(Cartesian))正方形柵格之大量(通常多於1百萬)相同感測器元件(像素)。該等像素可係經調適以將電磁輻射轉換成電信號之光電二極體或其他光敏元件。然而,隨著像素大小減小,成像器之敏感度降低且像素間的串擾增加。
如今,藉由蝕刻及沈積結晶矽之頂部上之若干矽、金屬及氮化物之氧化物層之一製程來在平面技術上建立主要類型之光電二極體(PD)。在一基板上之複數個層以一基本上水平定向給出一裝置時建構PN-接面。光偵測發生於此等層之一子集中。
光導管已引入至固態影像裝置中以侷限照射於其上之電磁輻射並將該電磁輻射傳輸至光敏元件。
奈米級技術及用以產生奈米線之能力之開發已開創以在平面技術中係不可能之方式設計結構及組合材料之可能性。舉例而言,在Samuelson等人之美國公開案第20040075464號中,揭示基於奈米線結構之複數個裝置。
一實施例係關於包括一基板、一奈米線及環繞該奈米線之一經摻雜磊晶層之一裝置,其中該奈米線係組態為用以傳輸高達一選擇性波長之波長之一通道及用以偵測傳輸穿過該奈米線之高達該選擇性波長之該等波長之一主動元件兩者。
舉例而言,該磊晶層環繞所有該奈米線之一部分。
該裝置可進一步包括環繞該經摻雜磊晶層之一含金屬之層。
舉例而言,該含金屬之層經組態以將光侷限於該含金屬之層內且用作一電子組件。
舉例而言,該含金屬之層經組態以將光侷限於該含金屬之層內且不用作一電子組件。
該裝置可進一步包括環繞該經摻雜磊晶層之一電介質層。
該裝置可進一步包括該奈米線與該經摻雜磊晶層之間的一電介質層。
舉例而言,該基板具有一前側及一背側,該奈米線安置於該背側上且一影像感測電路安置於該前側上。
舉例而言,該基板具有一前側及一背側,其中該奈米線及一影像感測電路兩者皆係安置於該前側上。
舉例而言,該奈米線係不透明的。
舉例而言,該裝置不包含一色彩濾光器或紅外光(IR)濾光器。
舉例而言,該奈米線包括一半導體。
該裝置可進一步包括該奈米線上方之一透鏡結構或一光學耦合器,其中該透鏡結構或該光學耦合器係操作地耦合至該奈米線。
舉例而言,該裝置可進一步包括安置於該基板上之一抗反射層。
舉例而言,該裝置係一影像感測器。
舉例而言,該選擇性波長係該奈米線之直徑之一函數。
舉例而言,該奈米線係組態為一PN或PIN接面。
舉例而言,該經摻雜磊晶層包括一p摻雜層。
舉例而言,該經摻雜磊晶層包括一n摻雜層。
舉例而言,該奈米線係經摻雜或未經摻雜的。
又一實施例係關於包括一基板、一奈米線及環繞該奈米線之一個或多個光閘極之一裝置,其中該奈米線係組態為用以傳輸高達一選擇性波長之波長之一通道及用以偵測傳輸穿過該奈米線之高達該選擇性波長之該等波長之一主動元件兩者,且其中該一個或多個光閘極包括一磊晶層。
該裝置可進一步包括該奈米線與該一個或多個光閘極之間的一電介質層。
舉例而言,該基板具有一前側及一背側,該奈米線安置於該背側上且一影像感測電路安置於該前側上。
舉例而言,該基板具有一前側及一背側,其中該奈米線及一影像感測電路兩者皆係安置於該前側上。
舉例而言,該裝置不包含一色彩濾光器或紅外光濾光器。
舉例而言,該裝置可進一步包括安置於該基板上之一抗反射層。
舉例而言,該選擇性波長係該奈米線之直徑之一函數。
該裝置可進一步包括安置於該基板中或該基板上之光電二極體。
舉例而言,該一個或多個光閘極包括組態為一開關之一第一光閘極及經組態以控制該奈米線中之一電位之一第二光閘極。
舉例而言,其中該磊晶層包括一磊晶金屬層或金屬氧化物層。
根據以下詳細說明及附圖與隨附申請專利範圍,本發明之一個或多項實施例之其他特徵將似乎顯而易見。
現將參考其中對應參考符號指示對應部件之所附示意圖僅以實例之方式揭示本發明之實施例。
在以下詳細說明中,參考形成其一部分之附圖。在圖式中,除非上下文另有規定,否則相同符號通常識別相同組件。在詳細說明、圖式及申請專利範圍中所闡述之圖解說明性實施例並非意在限制本發明。在不背離本文所呈現標的物之精神或範疇之情況下可利用其他實施例且可做出其他改變。
以下之表中概括圖中所圖解說明之元件之符號。下文更詳細地闡述該等元件。
在以下詳細說明中,參考形成本文之一部分之附圖。在圖式中,除非上下文另有規定,否則相同符號通常識別相同組件。在詳細說明、圖式及申請專利範圍中所闡述之圖解說明性實施例並非意在限制本發明。在不背離本文所呈現標的物之精神或範疇之情況下可利用其他實施例且可做出其他改變。
術語奈米線係指具有約為數奈米(舉例而言,100奈米或更少)之一厚度或直徑及一不受約束之長度之一結構。奈米線可包含金屬(例如,Ni、Pt、Au)、半導電(例如,Si、InP、GaN等)及絕緣(例如,SiO2
,TiO2
)材料。分子奈米線係由重複分子單元(有機或無機)組成。奈米線可展現1000或更大之縱橫比(長度與寬度比)。因此,其等可稱為1維材料。奈米線可具有在塊狀或3-D材料中看不到之諸多引起關注之性質。此乃因奈米線中之電子可橫向地受量子侷限且因此佔用可不同於在塊狀材料中所發現之傳統連續能級或能帶之能級。因此,奈米線可具有電及光學傳導之離散值。奈米線之實例包含無機分子奈米線(Mo6
S9-x
Ix
、Li2
Mo6
Se6
),其可具有0.9奈米之一直徑,且其長度可係數百微米。其他重要實例係基於半導體(諸如,InP、Si、GaN等)、電介質(例如,SiO2
、TiO2
)或金屬(例如,Ni、Pt)。
術語激子係指電子-電洞對。
一主動元件係具有電控制電子及/或電洞流動(電控制電或光,或反之亦然)之能力之任一類型之電路組件。不能夠憑藉另一電信號控制電流之組件稱作被動元件。電阻器、電容器、電感器、變壓器及甚至二極體皆被視為被動元件。在本文中所揭示之實施例中,主動元件包含(但不限於)一主動波導、電晶體、矽控整流器(SCR)、發光二極體及光電二極體。
一波導係經設計以沿由其實體邊界判定之一方向侷限及引導選擇性波長之電磁輻射之一系統或材料。較佳地,該選擇性波長係該波導之直徑之一函數。一主動波導係具有電控制電子及/或電洞流動(電控制電或光,或反之亦然)之能力之一波導。舉例而言,該主動波導之此能力係可將該主動波導視為係「主動」且屬於一主動元件類之一個原因。
一光學導管係用以侷限及傳輸照射於該光學導管上之一電磁輻射之一元件。該光學導管可包含一核心及一包覆層。該核心可係一奈米線。該光學導管可經組態以經由該奈米線及該包覆層以一選擇性波長分離入射於該光學導管上之一電磁輻射束之波長,其中該奈米線係組態為用以傳輸高達該選擇性波長之該等波長之一通道及用以偵測傳輸穿過該核心之高達該選擇性波長之該等波長之一主動元件兩者。一核心與一包覆層通常係該光學導管之互補組件且經組態以經由該核心及包覆層以一選擇性波長分離入射於該光學導管上之一電磁輻射束之波長。
一光閘極係用於一光電子裝置中之一閘極。通常,該光閘極包括一金屬氧化物半導體(MOS)結構。該光閘極可含有一磊晶金屬層或金屬氧化物層。該光閘極在光電二極體之整合時間期間累積光產生之電荷且在整合結束時控制電荷之轉移。一光電二極體可包括一pn接面。一光閘極可係放置於任一類型半導體材料上。一垂直光閘極係一新結構。通常,光閘極係放置於一平面光電二極體裝置上。然而,在一奈米線裝置中,該光閘極可係沿一垂直方向形成。亦即,豎立地覆蓋該奈米線之橫向表面。該光閘極可包含一磊晶金屬氧化物薄膜微結構,舉例而言,由鹼土金屬氧化物SrTiO3
(STO)(因其高塊體電介質常數)製成。
一轉移閘極係用於一像素中之一開關電晶體之一閘極。該轉移閘極之作用係將電荷自一裝置之一個側轉移至另一側。在某些實施例中,該轉移閘極用以將電荷自光電二極體轉移至感測節點(或浮動擴散部)。一重設閘極係用於重設一裝置之一閘極。在某些實施例中,該裝置係由一n+區形成之感測節點。重設意指恢復至藉由某一電壓設定之原始電壓位準。在某些實施例中,重設汲極(RD)之電壓係用作一重設位準之電壓。
一浮動電容器係相對於基板浮動之一電容器。通常,一電容器由兩個電極及其等之間的一絕緣體組成。通常,該兩個電極皆連接至其他裝置或信號線。在一像素中,通常該等電極中之一者可不連接至一結構,如同水中之一浮動冰方塊。此不連接、隔離之區域相對於基板形成浮動電容器。換言之,該隔離之區域包括浮動之一個電極。該基板包括通常連接至接地之另一電極。電極之間的一空乏區包括該絕緣體。
一全域連接係其中將諸多分支節點電連接至一單個線以使得一個信號線可同時控制多個分支裝置之一連接。一源極隨耦器放大器係一共同汲極電晶體放大器。亦即,其源極節點隨耦與閘極節點相同之相位之一電晶體放大器。電晶體之閘極端子充當輸入端,源極係輸出端且汲極係兩者(輸入及輸出)所共用。一淺層係實體地位於靠近基板之表面處之一經摻雜層。舉例而言,可藉由在使用離子植入時使用極低能量來故意地極淺形成一p+層。通常,一淺層之接面深度係0.01微米~0.2微米。相比之下,一深層可係深至幾微米至數十微米。
一純質半導體(亦稱作一未經摻雜之半導體或i型半導體)係一純半導體而不存在任何顯著摻雜劑物質。因此,電荷載子之數目係由材料本身之性質(而非雜質之量)來判定。在純質半導體中,受激電子之數目與電洞之數目係相等:n=p。純質半導體之導電性可歸因於晶體缺陷或熱激發。在一純質半導體中,導電帶中之電子之數目等於價帶中之電洞之數目。
淺渠溝隔離(STI)(亦稱為「箱式隔離技術(Box Isolation Technique)」)係防止毗鄰半導體裝置組件之間的電流洩漏之一積體電路特徵。STI通常用於250奈米及更小之CMOS製程技術節點上。較舊之CMOS技術及非MOS技術通常使用基於局部矽氧化(LOCOS)之隔離。通常係在半導體裝置製作製程期間早期、在形成電晶體之前形成STI。STI製程之步驟包含在矽中蝕刻渠溝之一圖案、沈積一種或多種電介質材料(諸如,二氧化矽)以填充該等渠溝及使用諸如化學機械平坦化之一技術來移除過量電介質。
磊晶係指在一單晶基板上沈積一單晶膜之方法。所沈積膜表示為磊晶膜或磊晶層。術語磊晶來自希臘詞根epi(意指「在...上面」)及taxis(意指「以排序方式」)。磊晶可解釋成「配置於...上」。
可自氣態或液態前體生長磊晶膜。由於基板充當一晶種晶體,因此所沈積膜呈現與該基板之晶格結構及定向相同之一晶格結構及定向。此不同於甚至在單晶體基板上沈積多晶或非晶系膜之其他薄膜沈積方法。若一膜係沈積於相同組合物之一基板上,則該製程稱作同質磊晶;否則其稱作異質磊晶。
同質磊晶係憑藉僅一種材料執行之一種類之磊晶。在同質磊晶中,一結晶膜係生長於相同材料之一基板或膜上。此技術適用於生長比基板更純淨之膜及製作具有不同摻雜位準之層。
異質磊晶係憑藉彼此不同之材料執行之一種類之磊晶。在異質磊晶中,一結晶膜生長於另一材料之一結晶基板或膜上。此技術通常適用於生長不可獲得單晶體之材料之結晶膜及製作不同材料之整合式結晶層。實例包含藍寶石上之氮化鎵(GaN)或砷化鎵(GaAs)上之磷化鎵銦(AlGaInP)。
異質順構換質磊晶(Heterotopotaxy)係類似於異質磊晶之一製程,惟薄膜生長不限於二維生長之事實除外。此處,基板將僅在結構上類似於薄膜材料。
磊晶可用於CMOS及化合物半導體(諸如,砷化鎵)之基於矽之製造製程中。較佳地,在製造磊晶膜或層期間,應存在控制沈積物之電阻率及厚度之量及均勻性、使表面及室氛圍清潔及純淨、防止通常更高摻雜基板晶圓之摻雜劑擴散至新層、防止生長製程不完善且在製造及處置期間保護該等表面。
在沈積期間,可藉由將雜質添加至源氣體(諸如,胂、膦或乙硼烷)來摻雜一磊晶層。氣相中之雜質之濃度判定其在所沈積膜中之濃度。如同在CVD中,雜質改變沈積速率。另外,執行CVD之高溫度可允許摻雜劑自晶圓之其他層擴散至生長層中(「向外擴散」)。此外,源氣體中之摻雜劑(藉由表面之蒸鍍或濕式蝕刻所釋放)可擴散至磊晶層中(「自動摻雜」)。下伏層之摻雜劑分佈亦可改變,然而並不顯著。
根據本文中實施例之影像感測器包括一基板及自該基板伸出之一豎立奈米線。該豎立奈米線可係在該基板之前側或背側上。本文中實施例之一基板通常具有電子組件及奈米線光電二極體。在前側奈米線結構中,該豎立奈米線係在基板之電子組件位於其中(同時在背側奈米線結構中)之同一側上,該豎立奈米線位於基板之與其中使電子組件位於基板中或基板上之側相反之側上。
該影像感測器可進一步包括磊晶地形成於奈米線周圍之一體積元件。該體積元件可在需要或不需要摻雜奈米線本身之情況下為(通常)在奈米線內或接近於奈米線處形成一主動區提供一高摻雜度。
該奈米線技術提供在習用塊體層技術中係不可能之材料及材料組合之挑選之可能性。根據本文中實施例之設計允許在奈米線內包含異質結構以及不同摻雜之區域,從而促進電及/或光學性質之最佳化。
該核心亦可藉由吸收經侷限光且產生電子電洞對(激子)來充當一光電二極體。可藉由使用以下各項中之至少一者來偵測如此產生之激子:(1)包括一基板、一奈米線及環繞該奈米線之一經摻雜磊晶層之一裝置,其中該奈米線係組態為用以傳輸高達一選擇性波長之波長之一通道及用以偵測傳輸穿過該奈米線之高達該選擇性波長之該等波長之一主動元件兩者。該奈米線及該經摻雜磊晶層形成誘致一電位梯度之一PN或PIN接面。可藉由生長一奈米線、在需要時對該奈米線進行摻雜、環繞該奈米線磊晶生長一經摻雜磊晶層及在需要時環繞經摻雜磊晶層形成一電介質層來形成該PN或PIN接面。(2)包括一奈米線及環繞該奈米線之一垂直光閘極之一裝置,其中該奈米線係組態為用以傳輸高達一選擇性波長之波長之一通道及用以偵測傳輸穿過該奈米線之高達該選擇性波長之該等波長之一主動元件兩者,且其中該垂直光閘極包括一磊晶金屬層或金屬氧化物層。
實施例之光敏元件通常包括一光電二極體,但不僅限於一光電二極體。通常,在使用一適當摻雜劑之同時,將該光電二極體摻雜至自約1×1016
至約1×1018
個摻雜劑原子/立方公分之一濃度。
該影像感測器可具有不同之堆疊層。該等堆疊層可包括含電介質材料之層及含金屬之層。該等電介質材料包含(如)但不限於具有自約4至約20(在真空中量測)之一電介質常數之矽之氧化物、氮化物及氧氮化物。亦包含且亦不限於具有自約20至至少約100之一電介質常數之通常較高電介質常數閘極電介質材料。此等較高電介質常數電介質材料可包含(但不限於)氧化鉿、矽酸鉿、氧化鈦、鈦酸鋇鍶(BST)及鋯鈦酸鉛(PZT)。
含電介質材料之層可係使用適於其等組合物材料之方法來形成。方法之非限制性實例包含熱氧化或電漿氧化或者熱氮化或電漿氮化法、化學氣相沈積法(包含原子層化學氣相沈積法)及物理氣相沈積法。
該等含金屬之層可用作電極。非限制性實例包含某些金屬、金屬合金、金屬矽化物及金屬氮化物,以及經摻雜之多晶矽材料(亦即,具有自約1×1018
至約1×1022
個摻雜劑原子/立方公分之一摻雜劑濃度)及多晶矽化物(亦即,經摻雜之多晶矽/金屬矽化物堆疊)材料。可使用數種方法中之任一者來沈積含金屬之層。非限制性實例包含化學氣相沈積法(亦包含原子層化學氣相沈積法)及物理氣相沈積法。含金屬之層可包括一經摻雜之多晶矽材料(具有通常在範圍1000埃至1500埃內之一厚度)。
電介質及金屬化堆疊層包括一系列電介質鈍化層。同樣嵌入於該堆疊層內的係互連金屬化層。用於互連金屬化層對之組件包含(但不限於)接觸凸柱、互連層、互連凸柱。
可用於互連金屬化層內之個別金屬化互連凸柱及金屬化互連層可包括半導體製作技術中習用之數種金屬化材料中之任一者。非限制性實例包含某些金屬、金屬合金、金屬氮化物及金屬矽化物。如下文中更詳細地論述,最常見的係鋁金屬化材料及銅金屬化材料,該兩者中之任一者通常包含一障壁金屬化材料。金屬化材料之類型可依據在一半導體結構中之大小及位置而不同。較小及下部敷設金屬化特徵通常包括含銅導體材料。較大及上部敷設金屬化特徵通常包括含鋁導體材料。
該系列電介質鈍化層亦可包括半導體製作技術中習用之數種電介質材料中之任一者。包含具有自4至約20之一電介質常數之通常較高電介質常數電介質材料。包含於此群組內之非限制性實例係矽之氧化物、氮化物及氧氮化物。舉例而言,該系列電介質層亦可包括具有自約2至約4之一電介質常數之通常較低電介質常數電介質材料。包含於但不限於此群組內的係諸如矽水凝膠等水凝膠、如同矽Al或碳氣凝膠之氣凝膠、倍半矽氧烷旋塗玻璃電介質材料、氟化玻璃材料、有機聚合物材料及諸如經摻雜之二氧化矽(例如,摻雜有碳、氟)及多孔二氧化矽等其他低電介質常數材料。
該電介質及金屬化堆疊層可包括互連金屬化層及離散金屬化層,其包括銅金屬化材料及鋁金屬化材料中之至少一者。該電介質及金屬化堆疊層亦包括電介質鈍化層,該等電介質鈍化層亦包括上文所揭示之通常較低電介質常數電介質材料中之至少一者。該電介質及金屬化堆疊層可具有自約1微米至約4微米之一總厚度。該電介質及金屬化堆疊層可在一堆疊內包括自約2至約4之離散水平電介質及金屬化組件層。
可使用半導體製作技術中習用且適於形成該系列電介質鈍化層之材料之方法及材料來圖案化該堆疊層之該等層以形成經圖案化電介質及金屬化堆疊層。可不在包含完全位於其中之一金屬化特徵之一位置處圖案化該電介質及金屬化堆疊層。可使用濕式化學蝕刻法、乾式電漿蝕刻法或其綜合方法來圖案化該電介質及金屬化堆疊層。若需要尺寸極小,則乾式電漿蝕刻法以及電子束蝕刻就其等在形成該系列經圖案化電介質及金屬化堆疊層時提供增強之側壁輪廓控制而言通常係較佳。
一平坦化層可包括數種透光平坦化材料中之任一者。非限制性實例包含旋塗玻璃平坦化材料及有機聚合物平坦化材料。該平坦化層可在該光學導管上面延伸以使得該平坦化層將具有足以至少平坦化該光學導管之開口之一厚度,因此提供一平面表面以用於製作該CMOS影像感測器內之額外結構。該平坦化層可經圖案化以形成經圖案化之平坦化層。
較佳地,該影像感測器應不含有色彩濾光器或紅外光(IR)濾光器。視情況,可存在位於經圖案化之平坦化層上之一系列色彩濾光器層。該系列色彩濾光器層(若存在)通常將包含原色紅色、綠色及藍色或者互補色彩黃色、青色及洋紅色。該系列色彩濾光器層通常將包括一系列經染色或經著色之經圖案化光阻劑層,該等光阻劑層經本質上成像以形成該系列色彩濾光器層。另一選擇係,該系列色彩濾光器層可包括經染色或經著色之有機聚合物材料,該等材料以其他方式透光但在使用一適當遮罩層時其等經非本質上成像。亦可使用替代色彩濾光器材料。該濾光器亦可係用於一黑色及白色或IR感測器之濾光器,其中該濾光器主要截止可見光並使IR通過。
間隔件層可係由實體地(而非光學地)將該等堆疊層與該光學導管之靠近該影像感測器之入射電磁輻射束接收端之頂部上之一微透鏡分離之任一材料製成之一個或多個層。該微透鏡之功能或更一般術語係一耦合器,亦即,將該入射電磁輻射束耦合至該光學導管中。若在此實施例中挑選一微透鏡作為耦合器,則其距該光學導管之距離將比至光敏元件之距離短得多,因此對微透鏡之曲率之約束係較不嚴格的,藉此使其可與現有製作技術一起實施。該間隔件層可係由一電介質間隔件材料或電介質間隔件材料之一壓層形成,但亦已知由導體材料形成之間隔件層。矽之氧化物、氮化物及氧氮化物通常用作電介質間隔件材料。不排除其他元素之氧化物、氮化物及氧氮化物。可使用與上文所述之方法類似、等效或相同之方法來沈積該電介質間隔件材料。可使用給間隔件層提供特性內指形狀之一毯覆層沈積及回蝕方法來形成該間隔件層。
微透鏡可包括此項技術中已知之數種透光透鏡材料中之任一者。非限制性實例包含透光無機材料、透光有機材料及透光複合材料。最常見的係透光有機材料。通常,該等透鏡層可經形成而易於圖案化且回流具有低於該系列色彩濾光器層(若存在)或該經圖案化之平坦化層之一玻璃轉變溫度之一有機聚合物材料。
可以不同方式改良奈米線之波導性質。該奈米線可具有一第一有效折射率nw
,且環繞該奈米線之至少一部分之一包覆層可具有一第二有效折射率nc
,且藉由確保該第一折射率大於該第二折射率nw
>nc
,可向該奈米線提供良好的波導性質。可藉由引入一光學主動包覆層來進一步改良波導性質。
舉例而言,該奈米線中之高折射率材料可係具有約2.0之一折射率之氮化矽。舉例而言,較低折射率包覆層材料可係具有約1.5之一折射率之一玻璃,舉例而言,選自表I之一材料。
在表I中,PESiN係指電漿增強之SiN且PESiO係指電漿增強之SiO。
籍由嵌套奈米線結構光電二極體,一影像感測器陣列可經組態以獲得具有在每一影像感測器之每一光學導管之奈米線及包覆層中以一截止波長分離之電磁輻射之波長之互補色彩。該等互補色彩通常係當以適合比例混合時產生一中性色彩(灰色、白色或黑色)之兩種色彩。此組態亦使得能夠捕獲照射於微透鏡上之大多數電磁輻射入射束且將其導引至位於光學導管之下部端處之光敏元件(亦即,光電二極體)。具有不同色彩互補分離之兩個毗鄰或大致毗鄰影像感測器可提供用以根據本文中所述之實施例重新建構一全色場景之完整資訊。本文中所揭示實施例之此技術可進一步取代用於影像感測之基於顏料之色彩重新建構,其遭受不能有效地擯棄(經由吸收)針對每一像素之未選色彩。
含有本文中所揭示實施例之一影像感測器之一裝置之每一實體像素將具有表示互補色彩之兩個輸出,例如,指定為輸出類型1之青色(或紅色)及指定為輸出類型2之黃色(或藍色)。此等輸出將配置如下:
每一實體像素將具有藉由組合其兩個互補輸出所獲得之全照度資訊。因此,同一影像感測器可用作一全解析度黑色及白色感測器或全色感測器。
在本文中所揭示之影像感測器之實施例中,相對於習用拜耳圖案之4個像素,可藉由適當地組合兩個水平或垂直毗鄰像素來獲得該入射電磁輻射束之波長之全光譜(例如,入射光之全色資訊)。
端視最小電晶體大小,含有本文中所揭示實施例之一影像感測器之每一像素在間距上可係小至1微米或更小且還具有充分敏感度。此可開創用於諸如生物系統等極小結構之接觸成像之方式。
在以下說明之上下文中將進一步詳細地闡述包含一影像感測器以及用於製作該影像感測器之方法之複數項實施例之實施例。在以上所述之圖式之上下文內進一步理解該說明。該等圖式係出於圖解說明性目的且因此不必按比例繪製。
一複合像素之一實施例包括兩個像素之一系統,每一像素具有一不同直徑之一核心以使得核心具有直徑d1
及d2
以引導不同波長(λB
及λR
)之光。兩個核心亦可充當光電二極體以捕獲波長λB
及λR
之光。兩個影像感測器之包覆層用於傳輸波長λw-B
及λw-R
之光。由環繞該等核心之周邊光敏元件來偵測傳輸穿過該包覆層之波長λw-B
及λw-R
之光。注意,(w)係指白色光之波長。來自複合像素中之4個光電二極體(兩個位於核心中且兩個位於環繞核心之基板中或基板上)之信號用以建構色彩。
該等實施例包含一奈米結構光電二極體(PD),根據該等實施例,奈米結構光電二極體(PD)包括一基板及自該基板伸出之一豎立奈米線。在該結構內可存在給出用以偵測光之一主動區之一pn-接面。該奈米線、該奈米線之一部分或與該奈米線連接之一結構形成一波導,該波導引導及偵測照射於裝置上之光之至少一部分。另外,該波導兼作使得能夠判定照射光之色彩範圍之光譜濾光器。
根據該等實施例之一奈米結構PD由一豎立奈米線構成。出於本申請案之目的,應將一豎立奈米線理解為以某一角度自該基板伸出之一奈米線,舉例而言,該豎立奈米線(較佳)藉由作為氣-液-固(VLS)生長之奈米線而自該基板生長。與該基板之角度通常將係該基板及該奈米線中之材料、該基板之表面及生長條件之一結果。藉由控制此等參數,可產生僅指向一個方向(舉例而言,垂直)或指向有限組之方向之奈米線。舉例而言,由來自週期表之行III、V及IV之元素構成閃鋅礦及金剛石半導體之奈米線及基板,此等奈米線可沿[111]方向生長且然後沿正交於任一{111}基板表面之方向生長。作為該表面之法線與該奈米線之軸向方向之間的角度所給出之其他方向包含70,53°{111}、54,73°{100}以及35,27°{110}及90°{110}。因此,該等奈米線界定一個或有限組之方向。
根據該等實施例,該奈米線或由該奈米線形成之結構之一部分可用作一波導,其沿由該豎立奈米線所給出之一方向引導且侷限照射於該奈米結構PD上之光之至少一部分。該波導奈米結構PD結構可包含一高折射率奈米線與具有小於該核心之折射率之折射率之一個或多個環繞包覆層。該結構可係圓形對稱或接近於圓形對稱。眾所周知呈圓形對稱結構之光波導用於光纖應用且可對經稀土摻雜光纖裝置之區域做出諸多平行結構。然而,一個差異係光纖放大器經光學抽吸以增強導引穿過其之光,而所述之奈米結構PD可視為一高效光至電轉換器。一個眾所周知之優點特徵係所謂的數值孔徑NA。NA判定由波導所捕獲之光之角度。NA及所捕獲光之角度係最佳化一新PD結構中之一重要參數。
對於在IR中及高於IR操作之一PD,使用GaAs可係較好,但對於在可見光區中操作之一PD,矽將係較佳。舉例而言,為形成電路,Si及經摻雜之Si材料係較佳的。類似地,對於在可見光範圍中工作之一PD,將更喜歡使用Si。
在一項實施例中,當與具有介於自1.4至2.3之範圍內之折射率之玻璃類型之包覆層材料(諸如,SiO2
或Si3
N4
)組合時,III-V半導體奈米線材料之折射率之典型值係在自2.5至5.5之範圍內。一較大捕獲角度意指以較大角度照射之光可耦合至波導中以達成較佳捕獲效率。
光捕獲之最佳化中之一個考慮因素係提供一耦合器至該奈米線結構中以最佳化至該結構中之光捕獲。一般而言,使NA最高將係較佳,其中發生光收集。此將最大化捕獲且導引至PD中之光。
根據該等實施例之一奈米結構PD可包括一基板及以一經界定角度θ自該基板磊晶地生長之一奈米線。該奈米線之一部分或全部可經配置以充當沿由該奈米線之延長方向所給出之一方向引導照射光之至少一部分之一波導部分,且將稱為一波導。在一項可能實施方案中,藉由在線正生長時沿其長度改變使對其之摻雜來形成二極體功能性所必需之一pn-接面。可在該奈米線上提供兩個觸點,舉例而言,一觸點在頂部上或在圓周外部表面上呈一捲繞組態,且另一觸點可提供於該基板中。該基板及該豎立結構之部分可由一覆蓋層覆蓋,舉例而言,該覆蓋層作為如所圖解說明之一薄膜或作為填充環繞奈米結構PD之空間之材料。
該奈米線可具有約為50奈米至500奈米之一直徑。該奈米線之長度可約為1微米至10微米。該pn-接面產生配置於該奈米線中之一主動區。該奈米線中之照射光子被轉換為電子電洞對且在一項實施方案中隨後由該PN接面沿該奈米線之長度產生之電場分離。奈米結構PD之不同部件之材料經挑選以使得該奈米線將相對於環繞材料具有良好波導性質,亦即,該奈米線中之材料之折射率較佳應大於該等環繞材料之折射率。
另外,該奈米線可具備一個或多個層。一第一層可經引入以改良該奈米線之表面性質(亦即,減少電荷洩漏)。進一步之層(舉例而言,一光學層)可經具體引入以便以類似於在光纖區域中良好創建之方式改良該奈米線之波導性質。該光學層通常具有在該奈米線之折射率與該環繞包覆層區材料之折射率之間的一折射率。另一選擇係,中間層具有一遞級折射率,經展示其在某些情形下改良光傳輸。若利用一光學層,則該奈米線之折射率nw
應針對該奈米線及該等層兩者界定一有效折射率。
生長具有經良好界定直徑之奈米線之能力可用以相對於由該奈米結構PD侷限及轉換之光之波長最佳化該奈米線或至少該波導之波導性質。該奈米線之直徑可經挑選以便具有對所期望光之波長之一有利對應。較佳地,該奈米線之尺寸係使得沿該奈米線提供一均勻光學腔(針對所產生光之具體波長最佳化)。該奈米線通常係充分寬以捕獲所期望之光。一經驗規則將係直徑必須大於λ/2nw
,其中λ係所期望光之波長且nw
係該奈米線之折射率。作為一實例,約60奈米之一直徑可適於僅侷限藍色光,且80奈米之直徑可適於僅將藍色及綠色光兩者侷限於矽奈米線中。
在紅外光及接近紅外光中,高於100奈米之一直徑將係充分的。該奈米線之直徑之一接近最佳上限由生長約束給出且可約為500奈米。該奈米線之長度通常且較佳約為1至10微米,從而為光轉換區提供足夠體積。
在一項實施例中,一反射層可提供於該基板上且在該線下方延伸。該反射層之目的係反射由該線導引但尚未在奈米結構PD中被吸收且轉換為載子之光。舉例而言,該反射層較佳係以包括重複矽酸鹽層之一多層結構之形式提供或提供為一金屬膜。若該奈米線之直徑充分地小於光之波長,則經引導光模式之一大分率將在該波導外部延伸,從而達成藉由環繞窄奈米線波導之一反射層之高效反射。
用以在該奈米線之下部端中得到一反射之一替代方法可係在該奈米線下面將一反射層配置於該基板中。又一替代方案可係在該波導內引入反射構件。此反射構件可係在奈米線之生長製程期間提供之一多層結構,該多層結構包括(舉例而言)SiNx
/SiOx
(電介質)之重複層。
為形成光偵測所必需之pn-接面,較佳對該奈米結構之至少部分進行摻雜。此可係藉由在生長奈米線期間改變摻雜劑或一旦生長奈米線即對其使用一徑向淺植入方法而完成。
考量其中藉由一物質局部地增強奈米線生長之系統(如氣-液-固(VLS)生長之奈米線),藉由更改生長條件在徑向生長與軸向生長之間改變之能力達成可重複該程序(奈米線生長、遮罩形成及後續選擇性生長)以形成更高級之奈米線/3D序列。對於其中未藉由個別生長條件來區分奈米線生長與選擇性生長之系統,首先沿長度生長奈米線且藉由不同選擇性生長步驟生長不同類型之3D區可係較佳。
端視奈米結構PD之既定使用、適合產生製程之可用性、材料之成本等,寬範圍之材料可用於該結構之不同部分。另外,基於奈米線之技術允許否則將不可能組合之材料之無缺陷組合。III-V半導體因其等促進高速度及低功率電子器件之性質而受到特別關注。用於基板之適合材料包含(但不限於):Si、GaAs、GaP、GaP:Zn、GaAs、InAs、InP、GaN、Al2
O3
、SiC、Ge、GaSb、ZnO、InSb、SOI(絕緣體上覆矽)、CdS、ZnSe、CdTe。用於奈米線110之適合材料包含(但不限於):Si、GaAs(p)、InAs、Ge、ZnO、InN、GaInN、GaN、AlGaInN、BN、InP、InAsP、GaInP、InGaP:Si、InGaP:Zn、GaInAs、AlInP、GaAlInP、GaAlInAsP、GaInSb、InSb。用於例如GaP、Te、Se、S等之可能供體摻雜劑及用於相同材料之受體摻雜劑係Zn、Fe、Mg、Be、Cd等。應注意,奈米線技術使得可使用諸如SiN、GaN、InN及AlN等氮化物,其促進偵測波長區中不可由習用技術容易地接近之光之PD之製作。受到商業特別關注之其他組合包含(但不限於)GaAs、GaInP、GaAlInP、GaP系統。典型摻雜位準介於自1018
至1020
/立方公分之範圍內。但一熟習此項技術者通曉此等及其他材料且認識到其他材料及材料組合係可能。
低電阻率觸點材料之適當性取決於欲沈積上之材料,但可使用金屬、金屬合金以及非金屬化合物(如同Al、Al-Si、TiSi2
、TiN、W、MoSi2
、PtSi、CoSi2
、WSi2
、In、AuGa、AuSb、AuGe、PdGe、Ti/Pt/Au、Ti/Al/Ti/Au、Pd/Au、ITO(InSnO;氧化銦錫)等等)以及例如金屬及ITO之組合。
基板可係裝置之一整合部分,此乃因基板亦含有偵測尚未侷限於奈米線之光所必需之光電二極體。另外,基板亦含有用以控制PD之偏壓、放大及讀出之標準CMOS電路以及認為必需且有用之任一其他CMOS電路。基板包含其中有主動裝置之基板。用於基板之適合材料包含矽材料及含矽材料。通常,該等實施例之每一感測器元件包含一奈米結構PD結構,其包括一奈米線、包圍該奈米線之至少一部分之一包覆層、一耦合器及兩個觸點。
在矽上製作奈米結構PD在奈米線沿正交於基板之(111)方向均勻地對準且基本上無奈米線沿亦自基板延伸出之三個傾斜(111)方向生長之程度內係可能。矽基板上呈預界定陣列結構之III-V奈米線之良好對準之生長對於光學裝置以及大多數其他應用之成功大規模製作係較佳。
建立於矽奈米線上之PD裝置因其偵測對於其他材料組合係不可能之選定波長之光之能力而受到高度商業關注。另外,該等PD裝置允許設計一複合光電二極體,其允許偵測大多數照射於一影像感測器上之光。
實例
圖1展示其中用一磊晶n+層塗佈p摻雜奈米線以形成一p-n接面之一雙光電二極體結構之一剖視圖。在一替代實施例(圖中未展示)中,該奈米線可係n摻雜的且該塗層可係一磊晶p+層以形成一p-n接面。
在圖1中,存在一像素中之兩個光電二極體、一奈米線(NW)二極體及一基板二極體。該奈米線係以p型形成(其不必係p-)且一n+層覆蓋奈米線表面以形成一p-n接面。在基板中,一n-二極體經輕摻雜以使得一n-區可藉由一低偏壓電壓而容易地空乏。光電荷係同時地但於分開電位井中整合於該等光電二極體中之兩者中,此乃因該等光電二極體由一p+層分離以避免該兩個光電二極體之間的相互作用。存在由重設開關及緩衝器放大器組成之兩個分開讀出電路。奈米線光電二極體之重設開關展示為一電路符號且基板二極體之重設開關展示連接至圖1含垂直奈米線之結構。
圖2及圖3展示之實施例展示含有一基板光電二極體之一經完全處理晶圓之背側上之奈米線。在諸如圖2或圖3中所示之實施例之一實施例中,奈米線光電二極體感測器可具備一個或多個垂直光閘極,其包括諸如磊晶生長之半導體、金屬氧化物或金屬層等磊晶生長之層。
垂直光閘極允許能夠在不使用一複雜離子植入製程之情況下容易地修改及控制半導體中之電位分佈。習用光閘極像素遭受極不良量子效率及不良藍色回應。習用光閘極通常係由吸收接近於藍色光之短波長之多晶矽製成,因此減少到達光電二極體之藍色光。此外,習用光閘極像素係放置於光電二極體之頂部上。相比之下,垂直光閘極(VPG)結構不阻擋光路徑。此乃因垂直光閘極(VPG)不橫向地橫跨光電二極體以控制半導體中之電位分佈。
另外,隨著影像感測器之像素大小按比例減小,該影像感測器之孔徑大小變得與波長相當。對於一習用平面類型光電二極體,此導致一不良量子效率(QE)。然而,一垂直光閘極(VPG)結構與一奈米線感測器之組合允許具有良好量子效率之一超小像素。
在諸如圖2中所示之實施例之一項實施例中,一奈米線像素可具有一雙垂直光閘極結構。此實施例可包含兩個光電二極體、一奈米線光電二極體及一基板光電二極體。此實施例亦包含兩個垂直光閘極(VP閘極1、VP閘極2)、一轉移閘極(TX)及一重設閘極(RG)。較佳地,光電二極體中之兩者係輕摻雜。此乃因一輕摻雜區可係在一低偏壓電壓下而容易空乏。如所圖解說明,光電二極體中之兩者係(n-)。然而,另一選擇係,奈米線像素可經組態以使得兩個光電二極體皆係(p-)。
該基板光電二極體之表面區可因製作期間所造成之製程誘致損壞及與奈米線相關聯之晶格應力而易具有缺陷。此等缺陷充當暗電流之一源。為抑制n-光電二極體之表面處之暗電流,在該基板之n-光電二極體之頂部上製作一p+區。
較佳地,將該基板連接至接地,亦即,零電壓。在此實施例中,該重設閘極較佳係經摻雜n+且係受正偏壓。當轉移閘極TX及重設閘極係接通時,基板中之n-區變為受正偏壓。此導致n-區因p基板與n-區之間的反向偏壓條件而變成空乏的。當轉移閘極TX及重設閘極RG係關斷時,n-區保持其正偏壓,從而相對於p-基板(p-sub)區形成一浮動電容器。
第一垂直光閘極VP閘極1可經組態以控制奈米線中之電位以使得可在奈米線光電二極體與基板光電二極體之間形成一電位差。以此方式,奈米線中之電子可在讀出期間快速地漂移至基板之n-區。
第二光閘極VP閘極-2可係一接通/關斷開關。此開關可經組態以分離產生於奈米線中之信號電荷與整合於基板光電二極體中之信號電荷。光電荷係同時地但於分開電位井中整合於奈米線光電二極體與基板光電二極體兩者中,此乃因第二光閘極VP閘極-2之關斷狀態在該奈米線光電二極體與該基板光電二極體之間形成一電位障壁。以此方式,奈米線光電二極體及基板光電二極體不混合在一起。
本實施例之奈米線光感測器使用兩步驟製程以在奈米線光電二極體與基板光電二極體之間分開地讀出信號。在第一步驟中,讀出該基板光電二極體中之信號電荷。然後,使該基板中之n-區空乏。在第二步驟中,可首先接通第二光閘極VP閘極2。然後,讀出該奈米線中之信號電荷。
在一「快照」操作中,較佳同時接通或關斷所有第二光閘極VP閘極2。對於轉移閘極TX,同樣可較佳同時接通或關斷所有轉移閘極TX。為達成此,所有第二光閘極VP閘極2皆係與一全域連接相連接。此外,所有轉移閘極TX皆係與一第二全域連接相連接。
通常,應出於實際原因而(通常)避免重設閘極RG之全域操作。在像素陣列中,逐列全域地重設該陣列係一常見實踐。亦即,通常不係同時重設整個像素陣列。若不使用快照操作,則個別像素操作係可能。在此情形下,不必具有全域連接。
為製成圖2之背側照明影像感測器,藉由移除含有光電二極體陣列之區域上方之矽來使晶圓薄化。舉例而言,可使圖2之一經摻雜p-基板(p-sub)薄化至3微米與50微米之間(更佳地,6微米與20微米之間)的一厚度。該基板光電二極體現可得到來自背側(而非來自其中所有金屬線所在之側(如習用影像感測器中))之其所有光。
奈米線可係形成於圖2中所示之經摻雜p-基板之背側處。在前側處,可存在一緩衝器放大器及其上具有一p+層之一n-二極體,如圖2中所示。在基板之兩側處具有p+之目的係抑制暗電流。可將一隱埋p-層放置於n+擴散部層下面以阻擋來自背側之傳入電荷流且使電荷朝向n-層轉向。較佳地,該隱埋p-層之摻雜高於該經摻雜p-基板之摻雜,但不高至該p+層之摻雜。前側光電二極體不係用於光吸收,而用於收集來自其中發生光吸收之背側p-基板之電荷。該奈米線可具有環繞該奈米線之氧化物層(包覆層)及兩個垂直光閘極,一垂直光閘極用於開關且另一垂直光閘極用於控制該奈米線中之電位。
通常,在圖2之實施例中,將採取兩步驟製程以自該等光電二極體中之每一者分開地讀出信號電荷。第一步驟將係自p-基板二極體讀出電荷。緊鄰此後,藉由接通VP閘極-1,將讀出來自奈米線之電荷。
較佳地,圖2之實施例應具有在中心具有一孔之一淺p+層,以使得該p+層可不阻擋來自背側奈米線之載子。此外,較佳地,在前側處應存在位於該淺p+層下面之N-井或低摻雜之n-層。該低摻雜之N-井可係容易空乏的。若p+層與n+層相遇在一起,則可在如同一齊納(Zener)二極體之低電壓下存在一故障。
圖3展示一背側照明影像感測器之另一實施例。在此實施例中,替代針對奈米線具有一垂直光閘極,可將p+層塗佈於該奈米線之表面處以幫助在奈米線中形成一內建電場以使得電子可容易地沿向上方向漂移。該背側照明影像感測器之特徵類似於圖2之影像感測器之彼等特徵。
在本文中之實施例中,矽奈米線(NW)可係生長於矽層上。該製程可適用於在電介質層上生長矽奈米線(SiNW),或適用於生長於適當基板(包含具有或不具有一薄鉬層之Si基板)上之III-V化合物。
可如下製成本文中所揭示實施例之矽奈米線。提供一基板,其包括具有二氧化矽表面之矽。可憑藉一表面處理修改該表面以促進金奈米顆粒之吸收。在此經修改表面上,可藉由沈積金層、隨後移除非係金奈米顆粒之所期望位置之區上方之金層來形成金奈米顆粒。該金奈米顆粒可經表面處理以提供立體穩定(steric stabilization)。換言之,經拴繫之立體穩定之金奈米顆粒可用作用於進一步合成奈米線之晶種,其中該等金奈米顆粒被吸收至經修改矽基板。二苯基矽烷(DPS)之降解用以形成矽原子。該等矽原子附著至金奈米顆粒,且在金奈米顆粒飽和有矽原子之後矽奈米線自金奈米顆粒晶種結晶。注意,留在背側表面上之金顆粒之厚度及直徑判定奈米線之直徑。
舉例而言,可藉由電漿增強型氣-液-固生長來生長矽奈米線。在某些實施例中,使用氣-液-固(VLS)生長方法來生長矽奈米線(SiNW)。在此方法中,一金屬熔滴催化含Si之源氣體分解。來自該氣體之矽原子溶解成形成一共晶液體之熔滴。該共晶液體用作Si儲槽。隨著更多矽原子進入至溶液中,該共晶液體變成矽過飽和,從而最終造成Si原子之沈澱。通常,Si自該滴之底部沈澱出,從而在金屬催化劑滴在頂部上之情況下導致矽奈米線之由底向上生長。
在某些實施例中,將金用作用於生長矽奈米線之金屬催化劑。然而,可使用其他金屬,包含但不限於Al、GA、In、Pt、Pd、Cu、Ni、Ag及其組合。可使用諸如濺鍍、化學氣相沈積(CVD)、電漿增強型化學氣相沈積(PECVD)、蒸鍍等習用CMOS技術來將固態金沈積及圖案化於矽晶圓上。舉例而言,可憑藉光學微影、電子束微影或任一其他適合技術來執行圖案化。然後,可加熱該矽晶圓,從而致使金在該矽晶圓上形成熔滴。矽及金形成具有363℃之一熔化溫度之19% Au之一共晶。亦即,Si-Au共晶體之一液滴在363℃(適合於處理矽裝置之一適中溫度)下形成。
在某些實施例中,基板具有一(111)定向。然而,亦可使用其他定向,包含但不限於(100)。用於奈米線產生之一常見矽源氣體係SiH4
。然而,可使用其他氣體,包含但不限於SiCl4
。在某些實施例中,舉例而言,可在80毫托至400毫托之壓力及450℃至600℃之範圍內之溫度下用SiH4
來進行奈米線生長。在某些實施例中,溫度係在470℃至540℃之一範圍內。通常,SiH4
之較低分壓力導致產生垂直奈米線(NW)之一較高百分比。舉例而言,在80毫托分壓力及470℃下,矽奈米線之高達60%沿垂直<111>方向生長。在某些實施例中,可生長基本上圓環形之奈米線。在其他實施例中,奈米線係六邊形。
在一項實施例中,奈米線生長係在一熱壁低壓CVD反應器中進行。在憑藉丙酮及異丙醇清潔Si基板之後,可將樣品浸入一緩衝HF溶液中以移除任何自然氧化物。可藉由熱蒸鍍來將接連之薄Ga及Au金屬層(標稱厚1奈米至4奈米)沈積於基板上。通常,Ga層係在Au層之前沈積。在一實施例中,在將CVD室抽空降至約10-7
托之後,可在真空中將該等基板加熱高達600℃以形成金屬熔滴。舉例而言,可使用100 sccm之SiH4
流(He混合物中之2%)在自500℃至700℃之一溫度範圍內在3毫巴之一總壓力下生長矽奈米線。
憑藉Au-Ga催化劑生長之矽奈米線之大小及長度係相對同質的,其中大多數該等線沿四個<111>方向定向。為進行比較,憑藉一純Au催化劑生長之矽奈米線成核且生長有更隨機散佈之奈米線之長度及直徑。此外,憑藉Au-Ga催化劑生長之奈米線往往具有沿軸向方向之一錐形。生長達一長時間之奈米線之尖端直徑係與生長達一短時間之彼等奈米線之尖端直徑相同且由催化劑直徑判定。然而,奈米線之佔用面積往往在生長過程期間增加。此指示奈米線漸細主要係由矽之側壁沈積(徑向生長)所造成。奈米線可經生長而在底部(基底)處具有1500奈米之一直徑,而尖端之直徑可在15微米之一長度上小於70奈米。此外,奈米線直徑係生長溫度之一函數。較高生長溫度導致具有較小直徑之奈米線。舉例而言,憑藉Ga/Au催化劑在600℃下生長之奈米線之平均直徑係約60奈米,但對於500℃下之生長而言,平均直徑減小降至約30奈米。另外,直徑之變化往往隨降低沈積溫度而變窄。
使用VLS製程,可生長垂直奈米線。亦即,基本上垂直於基板表面之奈米線。通常,並非所有奈米線皆將係完全地垂直。亦即,奈米線可以除90度之外的一角度傾斜於該表面。通常觀測傾斜之奈米線包含(但不限於)三個70.5°-斜向<111>磊晶生長方向及旋轉60°之三個額外70.5°-斜向方向。
除生長垂直奈米線之外,該VLS製程亦可用以生長經摻雜之奈米線。實際上,藉由改變源氣體之組合物,可產生生長線之一摻雜分佈。舉例而言,奈米線可係藉由將乙硼烷(B2
H2
)或三甲基硼烷(TMB)添加至源氣體而製成為p型。亦可使用將受體原子添加至矽奈米線之其他氣體。奈米線可係藉由將PH3
或AsH3
添加至源氣體而製成為n型。亦可使用將供體原子施加至矽奈米線之其他氣體。可產生之摻雜分佈包含(但不限於)n-p-n、p-n-p及p-i-n。
另外,可使用其他方法或VLS方法之變化形式來生長奈米線。其他方法或變化形式包含(但不限於)(1) CVD、(2)反應性氛圍、(3)蒸鍍、(4)分子束磊晶(MBE)、(5)雷射燒蝕及(6)溶液方法。在CVD製程中,提供一揮發性氣態矽前體。實例性矽前體氣體包含SiH4
及SiCl4
。CVD可用於磊晶生長。此外,可藉由將揮發性摻雜前體添加至矽前體來達成摻雜。在反應性氛圍中退火包括在與基板反應之一氣體中加熱基板。舉例而言,若在包含氫之一氛圍中將矽退火,則該氫與矽基板局部地反應,從而形成SiH4
。然後,SiH4
可與催化劑金屬滴反應,藉此起始奈米線生長。此生長製程可用於非CMOS製程。
在蒸鍍方法中,在導致產生SiO氣體之條件下加熱SiO2
源。當SiO氣體吸收於金屬催化劑熔滴上時,其形成Si及SiO2
。亦可在不具有一金屬催化劑滴之情況下執行此方法,不存在一金屬催化劑,觀測到SiO2
催化矽奈米線生長。在MBE方法中,加熱一高純度矽源直至Si原子蒸鍍。朝向該基板引導一氣態Si束。該氣態矽原子吸收至金屬熔滴上且溶解成金屬熔滴,藉此起始奈米線之生長。
在雷射燒蝕方法中,一雷射束瞄準包含矽及催化劑原子兩者之源。經燒蝕之原子藉由與惰性氣體分子衝突而冷卻及凝結以形成具有與原始目標相同組合物之熔滴。亦即,具有矽及催化劑原子兩者之熔滴。亦可憑藉基本上由純矽組成之目標來執行該雷射燒蝕方法。基於溶液之技術通常使用有機液體。具體而言,該等有機液體通常包括富含有矽源及催化劑顆粒之高壓超臨界有機液體。在高於金屬-矽共晶之一反應溫度下,該矽前體分解,從而形成具有該金屬之一合金。在超飽和之後,矽沈澱出,從而生長奈米線。
以上奈米線生長技術皆係由底向上技術。然而,亦可憑藉由頂向下技術來製作奈米線。由頂向下技術通常涉及圖案化及蝕刻一適合基板,舉例而言,矽。可經由微影(舉例而言,電子束微影、奈米球微影及奈米印刷微影)來達成圖案化。可執行乾式或濕式蝕刻。乾式蝕刻技術包含(但不限於)反應性離子蝕刻。可憑藉標準蝕刻或經由金屬輔助之蝕刻製程來執行濕式蝕刻。在金屬輔助之蝕刻製程中,濕式化學蝕刻Si,其中藉由存在作為一鹽添加至蝕刻溶液之一貴金屬來催化該Si溶解反應。
後續步驟可係關於形成覆蓋奈米線之n或p摻雜之一磊晶層(在圖1之裝置之情形下)或形成奈米線周圍之電介質層中之一者或多者(在圖2及圖3之裝置之情形下)。
可使用氣相磊晶(VPE)、化學氣相沈積之一修改形式來生長圖1中之覆蓋奈米線之磊晶n或p摻雜層。亦可使用分子束磊晶、液相磊晶(MBE及LPE)及固相磊晶(SPE)。在此等製程中之每一者中,可在磊晶層生長製程期間將一摻雜劑添加至磊晶生長之層中。
在氣相生長製程中,可在約1200℃下自存於氫氣中之四氯化矽沈積矽:
此反應係可逆的,且生長速率強烈地取決於兩種源氣體之比例。超過2微米/分鐘之生長速率產生多晶矽,且當存在過多氯化氫副產物時出現負生長速率(蝕刻)。(舉例而言,可故意地添加氯化氫以蝕刻晶圓)。一額外蝕刻反應與沈積反應相對抗:
矽VPE亦可使用矽烷、二氯矽烷及三氯矽烷源氣體。舉例而言,矽烷反應在650℃下以此方式出現:
SiH4
→Si+2H2
此反應不會無意地蝕刻該晶圓,且在低於自四氯化矽之沈積之溫度下發生。然而,除非嚴格地控制否則其通常將形成多晶膜,且其可允許洩漏至反應器中之氧化物質用諸如二氧化矽等不需要之化合物污染該磊晶層。
液相磊晶(LPE)係一種用以在固態基板上自熔化物生長半導體晶體層之方法。此通常在恰好低於所沈積半導體之熔點之溫度下發生。半導體係在接近於溶解與沈積之間的平衡之條件下溶解於另一材料之熔化物中,基板上之半導體晶體之沈積係慢且均勻的。單晶膜之典型沈積速率介於自0.1微米/分鐘至1微米/分鐘之範圍內。平衡條件可取決於溫度及熔化物中之所溶解半導體之濃度。自液相生長該層可係由熔化物之一強制冷卻而控制。可強烈地減少雜質引入。可藉由添加摻雜劑來達成摻雜。
LPE方法可用於生長磊晶層。可產生極薄、均勻且高品質之層。液相磊晶方法之一典型實例係在砷化鎵(GaAs)基板上生長三元及四元III-V化合物。作為一溶劑,在此情形下較通常使用鎵。另一頻繁使用之基板係磷化銦(InP)。然而,針對特殊應用,亦可應用如同玻璃或陶瓷等其他基板。為促進成核,且為避免所生長層中之張力,基板及所生長層之熱膨脹係數應係類似的。
可藉由首先在一結晶基板上沈積非晶系材料之一膜來執行固相磊晶(SPE)。然後,可加熱該基板以使該膜結晶。單晶體基板充當晶體生長之一模板。用以使在離子植入期間非晶化之矽層重新結晶之退火步驟亦可認為係一類型之SPE。在此製程期間生長晶體-非晶系層界面處之雜質分凝及重新散佈可用以在金屬及矽中併入有低溶解度摻雜劑。
在分子束磊晶(MBE)中,可加熱一源材料以產生一蒸鍍之顆粒束。此等顆粒行進穿過一極高真空(10-8
帕;實際上自由空間)到達其中其等凝結之基板。MBE具有低於其他形式之磊晶之輸送量。
可藉由化學氣相沈積(CVD)、原子層沈積(ALD)、氧化或氮化(可在奈米線周圍進行)來製成圖2或圖3中之在奈米線周圍之保形電介質塗層。然後,可藉由電漿增強型化學氣相沈積、旋塗或濺鍍、視情況憑藉一初始原子層沈積來在該保形電介質塗層上形成經摻雜玻璃電介質層。可藉由化學機械平坦化或其他蝕刻方法來回蝕所沈積之經摻雜玻璃電介質層。
可藉由熟習此項技術者習知之用於使用能夠形成一磊晶層之任一金屬製成磊晶結構之方法來製成圖2及圖3之垂直光閘極中之磊晶金屬層或金屬氧化物層。舉例而言,在其上沈積磊晶層之一基板之情形下之Sr、Ba、Mg、Ca及其組合具有一面心立方體結構(諸如,Si)。在通常至少750℃之一溫度下同時在其中壓力通常係小於1×10-8
托之一真空下,可藉由包含分子束磊晶(MBE)、化學氣相沈積(CVD)及電子束蒸鍍之各種習知沈積方法中之任一者來沈積金屬以形成具有一個或多個單分子層之一厚度之一磊晶金屬層或金屬氧化物層。然後,在1×10-8
至1×10-6
托之範圍內之一分壓力下在25℃至200℃之範圍內之一溫度下,可藉由將該磊晶金屬層或金屬氧化物層基本上曝露至氧氣來氧化該層以形成一磊晶氧化膜結構。該方法可進一步包括在其中壓力小於1×10-8
托(較佳小於5×10-9
托)之一真空下之同時使該磊晶氧化膜結構之表面退火以使該磊晶氧化膜結構進一步穩定之步驟。此退火可係在任一後續結晶金屬氧化物沈積之前或同時執行。可藉由提供磊晶氧化膜結構且然後使用包含MBE、CVD及電子束蒸鍍之各種習知方法中之任一者在該磊晶氧化膜結構上沈積至少一個金屬氧化物層來製成該結晶金屬氧化物結構。該至少一個金屬氧化物層可包括,但不限於SrO、SrTiO3
、BaO、BaTiO3
、SrTiO3
及其組合。此外,在其中將一個以上金屬氧化物層沈積於該磊晶氧化膜結構上之情形下,每一層可包括一不同金屬氧化物(例如,其上具有一所沈積BaO層、後續接著一所沈積BaTiO3
層之氧化膜結構)。
然後,可如下製成用以將電磁輻射(諸如,光)以通道方式導引至奈米線波導中之一漏斗及該漏斗上之一透鏡:藉由CVD、濺鍍沈積或旋塗來沈積一玻璃/氧化物/電介質層;將一光阻劑施加於所沈積之玻璃/氧化物/電介質層上;移除深腔內之奈米線上方所集中之一開口外部之光阻劑;及藉由半各向同性蝕刻來在該玻璃/氧化物/電介質層中形成一耦合器。
後續步驟可係關於藉由在奈米線之環繞一個或多個電介質層之垂直壁上沈積一金屬(諸如,銅)來在該一個或多個電介質層周圍形成一金屬層或金屬氧化物層。
本申請案中所提及之所有參考物皆以全文引用之方式併入本文中。
上述詳細說明已藉由使用圖式、流程圖及/或實例陳述了裝置及/或製程之各種實施例。就此等圖式、流程圖及/或實例含有一個或多個功能及/或操作而言,熟習此項技術者應理解,屬於此等圖式、流程圖或實例之每一功能及/或操作皆可藉由寬範圍之硬體、軟體、韌體或實質上其任一組合個別地及/或集體地實施。
在一項實施例中,本文中所述標的物之數個部分可藉由一控制系統(諸如,應用特定積體電路(ASIC)、場可程式化閘陣列(FPGA)、數位信號處理器(DSP)或其他整合格式)來實施。然而,熟習此項技術者應認識到,本文中所揭示實施例之某些態樣可作為運行於一個或多個電腦上之具有電腦可執行指令之一個或多個電腦程式(例如,作為運行於一個或多個電腦系統上之一個或多個程式)、作為運行於一個或多個處理器上之一個或多個程式(例如,作為運行於一個或多個微處理器上之一個或多個程式)、作為韌體或作為實質上其任一組合全部或部分地等效實施於積體電路中,且根據本發明,設計電路及/或撰寫用於軟體及/或韌體之程式碼將恰好在熟習此項技術者之技術範疇內。另外,熟習此項技術者應瞭解,本文中所述標的物之機制能夠被散佈為呈各種形式之一程式產品,且不管用以實際上實施該散佈之特定類型之電腦可讀媒體如何,本文中所述標的物之一圖解說明性實施例皆適用。
熟習此項技術者應認識到,以本文中陳述之方式闡述裝置及/或製程,且此後使用工程實踐來將此等所述裝置及/或製程整合至資料處理系統中在此項技術內係常見的。亦即,本文中所述裝置及/或製程中之至少一部分可經由一合理量之實驗整合至一資料處理系統中。
本文中所述標的物有時圖解說明含有於不同其他組件內或與不同其他組件連接之不同組件。應理解,此等所繪示架構僅係例示性的,且事實上可實施達成相同功能性之諸多其他架構。在一概念性意義上,用以達成相同功能性之組件之任一配置係有效地「相關聯的」以使得達成所期望之功能性。藉此,本文中經組合以達成一特定功能性之任何兩個組件可視為彼此「相關聯」以使得達成所期望之功能性,與架構或中間組件無關。
相對於本文中之任何複數及/或單數術語之使用,熟習此項技術者可在適於上下文及/或應用時自複數至單數及/或自單數至複數地解釋。為清晰起見,可明確地陳述各種單數/複數排列。
所有參考物(包含但不限於專利、專利申請案及非專利文獻)藉此皆以全文引用之方式併入本文中。
雖然本文中已揭示了各種態樣及實施例,但熟習此項技術者應明瞭其他態樣及實施例。本文中所揭示之各種態樣及實施例皆係出於圖解說明之目的且並非意欲加以限制,其中真實範疇及精神皆係由以下申請專利範圍指示。
VPG 1(VP閘極1)...第一垂直光閘極
VPG 2(VP閘極1)...第二垂直光閘極
TX閘極...轉移閘極
RG...重設閘極
RD...重設汲極
Sub...基板
Out...輸出
NW(nw)...奈米線
PG...光閘極
I(i)...電流
n+、n-...具有過量供體之半導電材料,n+係重摻雜,n-係輕摻雜
p+、p-...具有過量受體之半導電材料,p+係重摻雜,p-係輕摻雜
圖1展示其中用一磊晶n+層塗佈奈米線以形成一p-n接面之一雙光電二極體結構之一剖視圖。
圖2展示具有一背側奈米線及雙垂直光閘極之一像素結構之一剖視圖。
圖3展示具有一背側奈米線及一垂直閘極之一像素結構之一剖視圖。
(無元件符號說明)
Claims (34)
- 一種光電二極體裝置,其包括一基板、一奈米線、環繞該奈米線之一經摻雜層以及置於該基板上之一反射層,其中該奈米線係經組態作為用以傳輸具有波長至多達一選擇性波長之光之一通道以及用以偵測經傳輸穿過該奈米線之具有波長至多達該選擇性波長之光之一主動元件;其中該反射層係經組態以反射由該奈米線傳輸之光。
- 如請求項1之光電二極體裝置,其中該經摻雜層環繞該奈米線之一部分或全部。
- 如請求項1之光電二極體裝置,其進一步包括環繞該經摻雜層之一含金屬之層。
- 如請求項3之光電二極體裝置,其中該含金屬之層經組態以將光侷限於該含金屬之層內且用作一電子組件。
- 如請求項3之光電二極體裝置,其中該含金屬之層經組態以將光侷限於該含金屬之層內且不用作一電子組件。
- 如請求項1之光電二極體裝置,其進一步包括環繞該經摻雜層之一電介質層(dielectric layer)。
- 如請求項1之光電二極體裝置,其中該經摻雜層係在該奈米線上之一磊晶層。
- 如請求項1之光電二極體裝置,其中該基板具有一前側及一背側,該奈米線安置於該背側上且一影像感測電路安置於該前側上。
- 如請求項1之光電二極體裝置,其中該基板具有一前側 及一背側,其中該奈米線及一影像感測電路兩者皆係安置於該前側上。
- 如請求項1之光電二極體裝置,其中該奈米線係不透明的。
- 如請求項1之光電二極體裝置,其中該裝置不包含一色彩濾光器或紅外光(IR)濾光器。
- 如請求項1之光電二極體裝置,其中該奈米線包括一半導體。
- 如請求項1之光電二極體裝置,其進一步包括位於該奈米線上方之一透鏡結構或一光學耦合器,其中該透鏡結構或該光學耦合器係操作地耦合至該奈米線。
- 如請求項1之光電二極體裝置,其進一步包括安置於該基板上之一抗反射層。
- 如請求項1之光電二極體裝置,其中該裝置係一影像感測器。
- 如請求項1之光電二極體裝置,其中該選擇性波長係該奈米線之直徑之一函數。
- 如請求項1之光電二極體裝置,其中該奈米線包含一PN或PIN接面。
- 如請求項1之光電二極體裝置,其中該經摻雜層係經p摻雜。
- 如請求項1之光電二極體裝置,其中該經摻雜層係經n摻雜。
- 如請求項1之光電二極體裝置,其中該奈米線係經摻雜 的或未經摻雜的。
- 如請求項1之光電二極體裝置,其進一步包含環繞該奈米線之一個或多個光閘極(photogate)。
- 如請求項21之光電二極體裝置,其進一步包括介於該奈米線與該一個或多個光閘極之間的一電介質層。
- 如請求項21之光電二極體裝置,其中該基板具有一前側及一背側,該奈米線安置於該背側上且一影像感測電路安置於該前側上。
- 如請求項21之光電二極體裝置,其中該基板具有一前側及一背側,其中該奈米線及一影像感測電路兩者皆係安置於該前側上。
- 如請求項21之光電二極體裝置,其中該裝置不包含一色彩濾光器或紅外光濾光器。
- 如請求項21之光電二極體裝置,其進一步包括安置於該基板上之一抗反射層。
- 如請求項21之光電二極體裝置,其中該裝置係一影像感測器。
- 如請求項21之光電二極體裝置,其中該選擇性波長係該奈米線之直徑之一函數。
- 如請求項21之光電二極體裝置,其進一步包括安置於該基板中或該基板上之光電二極體。
- 如請求項21之光電二極體裝置,其中該一個或多個光閘極包括經組態為一開關之一第一光閘極及經組態以控制該奈米線中之一電位之一第二光閘極。
- 如請求項21之光電二極體裝置,其中該一個或多個光閘極包括一磊晶金屬層或金屬氧化物層。
- 如請求項1之光電二極體裝置,其中該奈米線係自該基板伸出(protrude)之一豎立(upstanding)奈米線。
- 如請求項1之光電二極體裝置,其中該反射層包含一多層結構,該多層結構包含多個重複的矽酸鹽層。
- 如請求項1之光電二極體裝置,其中該反射層包含一金屬膜。
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US8519379B2 (en) | 2013-08-27 |
US8710488B2 (en) | 2014-04-29 |
TW201131795A (en) | 2011-09-16 |
US20130341749A1 (en) | 2013-12-26 |
TWI482299B (zh) | 2015-04-21 |
TW201434170A (zh) | 2014-09-01 |
US20110133160A1 (en) | 2011-06-09 |
WO2011072030A1 (en) | 2011-06-16 |
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