TWI434414B - 具改良閘極特性之增強模式氮化鎵電晶體 - Google Patents

具改良閘極特性之增強模式氮化鎵電晶體 Download PDF

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TWI434414B
TWI434414B TW99110729A TW99110729A TWI434414B TW I434414 B TWI434414 B TW I434414B TW 99110729 A TW99110729 A TW 99110729A TW 99110729 A TW99110729 A TW 99110729A TW I434414 B TWI434414 B TW I434414B
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gate
thickness
gallium nitride
pgan
transistor
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TW99110729A
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TW201101485A (en
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Alexander Lidow
Robert Beach
Alana Nakata
Jianjun Cao
guang yuan Zhao
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Efficient Power Conversion Corp
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/778—Field effect transistors with two-dimensional charge carrier gas channel, e.g. HEMT ; with two-dimensional charge-carrier layer formed at a heterojunction interface
    • H01L29/7786—Field effect transistors with two-dimensional charge carrier gas channel, e.g. HEMT ; with two-dimensional charge-carrier layer formed at a heterojunction interface with direct single heterostructure, i.e. with wide bandgap layer formed on top of active layer, e.g. direct single heterostructure MIS-like HEMT
    • H01L29/7787—Field effect transistors with two-dimensional charge carrier gas channel, e.g. HEMT ; with two-dimensional charge-carrier layer formed at a heterojunction interface with direct single heterostructure, i.e. with wide bandgap layer formed on top of active layer, e.g. direct single heterostructure MIS-like HEMT with wide bandgap charge-carrier supplying layer, e.g. direct single heterostructure MODFET
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • H01L29/10—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions with semiconductor regions connected to an electrode not carrying current to be rectified, amplified or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
    • H01L29/1066—Gate region of field-effect devices with PN junction gate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/12—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
    • H01L29/20—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, only AIIIBV compounds
    • H01L29/2003—Nitride compounds

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Ceramic Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Junction Field-Effect Transistors (AREA)
  • Insulated Gate Type Field-Effect Transistor (AREA)
  • Manufacturing & Machinery (AREA)

Description

具改良閘極特性之增強模式氮化鎵電晶體
本發明係有關具改良閘極特性之增強模式氮化鎵電晶體。
 發明背景
增強模式氮化鎵(GaN)電晶體是一新近之發展。在一氮化鎵電晶體中，一P-型氮化鎵(pGaN)閘極被成長在鋁鎵氮化合物(AlGaN)/氮化鎵結構頂部上以產生正性臨界電壓。但是，習知的pGaN閘極結構不具有最佳化的厚度，如果該pGaN結構是太厚的話則其可能導致介電質失效，或如果該pGaN閘極結構是太薄的話則可能導致電流之超傳導。
第1圖展示習知氮化鎵電晶體1之橫截面圖。氮化鎵電晶體1具有被配置在一未摻雜氮化鎵層6之頂部上的鋁鎵氮層5，而在那些層之間具有一層二維電子氣體(2DEG)異質接合9。在鋁鎵氮層5之頂部上是源極2、汲極3以及閘極4。閘極4具有在閘極金屬4和鋁鎵氮層5之間的pGaN結構7。介電質8覆蓋被曝露的鋁鎵氮層以及閘極4和pGaN結構7之側壁。該pGaN結構7具有厚度t。閘極介電質7藉由在閘極4和鋁鎵氮層5之間的側壁被決定。2DEG異質接合9利用閘極4被調變。
第2圖展示第1圖之習知氮化鎵電晶體1的電路圖。第2圖展示之介電質8是平行於閘極二極體。應了解，此處使用之參考號碼是指示於第1和2圖。
第3圖展示對於具有不同厚度t的pGaN結構之閘極轉導(輸入電壓對輸出電流)如何變化之圖式。由於pGaN厚度t增加，轉導減少且閘極二極體正向壓降增加。尤其是，第3圖展示具有300之厚度t的pGaN結構之閘極比具有600厚度t之pGaN結構之閘極具有較高的轉導，而具有600厚度t之pGaN結構的閘極又比具有1000厚度t之pGaN結構的閘極具有較高的轉導。較高的閘極電壓是完全地增強具有較厚的pGaN結構之裝置之所需。如果閘極介電質在裝置完全地被增強之前失去效用，則該裝置之最大性能不能被達成。
習知的增強模式氮化鎵電晶體皆具有至少1000厚度t之pGaN結構的閘極。例如，X. Hu，等人之“具有選擇性生成pn接合閘極之增強模式鋁鎵氮/氮化鎵異質接合場效應電晶體(HFET)”，電子通訊，第8期，第36章，第753-54頁(2000年4月13日)中教導1000之pGaN結構。此外，美國專利申請公開序號第2006/0273347號案，教導具有厚度1000之pGaN結構。但是，下面將說明，大於或等於1000之pGaN厚度t可能導致介電質之失效。
第5圖展示用於具有1000厚度t之pGaN結構的閘極I-V特性。第5圖之資料展示當8V-12V被施加至閘極時，具有1000厚度t之pGaN結構的閘極失去效用。因此，1000厚度t對於pGaN結構是太厚，因為閘極作用如同於介電質。介電質失效是激變的並且可能發生在2DEG異質接合完全被增強之前或可能由於在快速切換期間閘極過衝而發生(將在下面被展示)。
第6圖展示對於具有1000厚度t之pGaN結構的閘極I-V特性。如在第3圖中所見地，具有1000厚度t之pGaN結構的閘極在6伏特時沒完全地被導通，其增加介電質失效之風險。
第7圖展示與一閘極相關的過衝。如圖形中所見，在展示的高切換速率下，電壓之變動可能是激烈的。如果閘極之臨界電壓是接近於介電質承受電壓，則由於可能超出承受電壓位準的閘極過衝，介電質將很可能破裂。具有更較小於承受電壓之厚度t的pGaN結構之閘極是較不可能不利地受到閘極過衝所影響，因為被施加以致動閘極之電壓將不是太接近於承受電壓，亦即，閘極過衝是很不可能達到或超出承受電壓。
由上述明顯地可知，1000對於增強模式氮化鎵電晶體中之pGaN閘極結構是太厚。因此，將需要提供具有充分地薄之pGaN閘極的增強模式氮化鎵電晶體以避免介電質失效之風險。
 發明概要
本發明是針對具有足夠薄的pGaN閘極結構以避免介電質失效之一增強模式氮化鎵電晶體。在一實施例中，對於5V閘極電壓應用中，這厚度是在400至900範圍中。在一較佳實施例中，該厚度是600。此厚度是厚的足以避免電流之超傳導。
圖式簡單說明
第1圖是一增強模式氮化鎵電晶體之橫截面圖。
第2圖是增強模式氮化鎵電晶體之電路圖。
第3圖是展示對於變化厚度之閘極的轉導如何變化之圖形。
第4圖是展示對於具有變化厚度之閘極裝置的閘極P-N接合I-V特性之圖形。
第5圖展示具有1000厚度t之pGaN結構的閘極之閘極P-N接合I-V特性。
第6圖是展示比較具有600厚度t之結構與具有1000厚度t之pGaN結構的閘極P-N接合I-V特性之圖形，展示在6伏特未被導通(因此允許電流流通)之具有1000閘極的裝置，其增加介電質失效風險。
第7圖是展示相關於先前技術閘極之過衝的圖形。
 較佳實施例之詳細說明
本發明是針對具有厚度在400至900範圍中之pGaN閘極的一增強模式氮化鎵電晶體。此範圍是薄的足以避免介電質失效。如將在下面說明，此範圍同時也是厚的足以避免關於太薄的pGaN閘極之問題。在一較佳實施例中，pGaN閘極厚度是600。
pGaN閘極結構是鎂摻雜的且被致動成p-型傳導性。在一實施例中，pGaN閘極結構是一種半絕緣氮化鎵，其是摻雜鎂且以氫補償。
如於第4圖之展示，具有厚度600之pGaN結構的閘極是充分地厚以傳導一可量測之電流量。第4圖同時也展示具有300Å厚度t之pGaN結構的閘極在任何數量之正的或負的電壓被施加時傳導不可量測的電流量。因此，300Å之厚度對於一pGaN結構是太薄。
如於第6圖之展示，具有厚度600Å之pGaN結構的閘極在介電質失效發生之前被導通，因此避免介電質失效。對於具有厚度600Å之pGaN結構的閘極，介電質失效同時也是較不可能的，因為該閘極以更較低於介電質承受電壓的電壓被導通，亦即，閘極過衝是較不可能促使閘極電壓接近該承受電壓。
上述之閘極厚度以及量測係有關於以額定的閘極電壓5V操作之裝置。顯然地，在較低之額定閘極電壓，pGaN結構之厚度將相對地被降低。因此，增強模式GaN電晶體具有一具一係數Ax(400Å至900Å)之厚度的閘極結構，其中該係數A對應於額定閘極電壓/5V之比率值。
上面之說明以及圖形僅是考慮作為展示達成此處說明之本發明特點和優點的特定實施例。對於特定處理條件是可以有修改以及替代性。因此，本發明不受限制於先前的說明以及圖形。
1．．．氮化鎵電晶體
2．．．源極
3．．．汲極
4．．．閘極
5．．．鋁鎵氮層
6．．．未摻雜氮化鎵層
7．．．P-型氮化鎵結構
8．．．介電質
9．．．二維電子氣體異質接合
第1圖是一增強模式氮化鎵電晶體之橫截面圖。
第2圖是增強模式氮化鎵電晶體之電路圖。
第3圖是展示對於變化厚度之閘極的轉導如何變化之圖形。
第4圖是展示對於具有變化厚度之閘極裝置的閘極P-N接合I-V特性之圖形。
第5圖展示具有1000厚度t之pGaN結構的閘極之閘極P-N接合I-V特性。
第6圖是展示比較具有600厚度t之結構與具有1000厚度t之pGaN結構的閘極P-N接合I-V特性之圖形，展示在6伏特未被導通(因此允許電流流通)之具有1000閘極的裝置，其增加介電質失效風險。
第7圖是展示相關於先前技術閘極之過衝的圖形。

Claims (2)

  1. 一種增強模式氮化鎵(GaN)電晶體，具有一5伏特或較小之額定閘極電壓，其包含：一具有一厚度t之p型GaN閘極結構，其中：對5伏特之額定閘極電壓而言，該厚度t係400Å至900Å；以及對小於5伏特之額定閘極電壓而言，該厚度t係(400Å至900Å)乘以一比率值，該比率值係該額定閘極電壓除以5伏特。
  2. 如申請專利範圍第1項所述之增強模式GaN電晶體，其中該電晶體之額定閘極電壓為5V，及該p型GaN閘極結構之厚度為600Å。
TW99110729A 2009-04-08 2010-04-07 具改良閘極特性之增強模式氮化鎵電晶體 TWI434414B (zh)

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US8969918B2 (en) 2015-03-03
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