TWI407536B - 半導體元件之散熱座的製作方法 - Google Patents
半導體元件之散熱座的製作方法 Download PDFInfo
- Publication number
- TWI407536B TWI407536B TW099143290A TW99143290A TWI407536B TW I407536 B TWI407536 B TW I407536B TW 099143290 A TW099143290 A TW 099143290A TW 99143290 A TW99143290 A TW 99143290A TW I407536 B TWI407536 B TW I407536B
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- Prior art keywords
- metal
- conductive layer
- semiconductor wafer
- bump
- bonding
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- 239000004065 semiconductor Substances 0.000 title claims abstract description 126
- 238000000034 method Methods 0.000 title claims abstract description 47
- 238000004519 manufacturing process Methods 0.000 title description 11
- 230000017525 heat dissipation Effects 0.000 title description 10
- 229910052751 metal Inorganic materials 0.000 claims abstract description 121
- 239000002184 metal Substances 0.000 claims abstract description 121
- 239000000758 substrate Substances 0.000 claims abstract description 48
- 239000000463 material Substances 0.000 claims abstract description 13
- BASFCYQUMIYNBI-UHFFFAOYSA-N platinum Chemical compound [Pt] BASFCYQUMIYNBI-UHFFFAOYSA-N 0.000 claims abstract description 9
- 229910052782 aluminium Inorganic materials 0.000 claims abstract description 6
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 claims abstract description 6
- BQCADISMDOOEFD-UHFFFAOYSA-N Silver Chemical compound [Ag] BQCADISMDOOEFD-UHFFFAOYSA-N 0.000 claims abstract description 4
- 229910052697 platinum Inorganic materials 0.000 claims abstract description 4
- 229910052709 silver Inorganic materials 0.000 claims abstract description 4
- 239000004332 silver Substances 0.000 claims abstract description 4
- 239000010410 layer Substances 0.000 claims description 91
- 238000007772 electroless plating Methods 0.000 claims description 7
- 238000009713 electroplating Methods 0.000 claims description 6
- 239000011241 protective layer Substances 0.000 claims description 6
- 239000010931 gold Substances 0.000 claims description 4
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 claims description 3
- 229910052737 gold Inorganic materials 0.000 claims description 3
- AMGQUBHHOARCQH-UHFFFAOYSA-N indium;oxotin Chemical compound [In].[Sn]=O AMGQUBHHOARCQH-UHFFFAOYSA-N 0.000 claims description 3
- BDVZHDCXCXJPSO-UHFFFAOYSA-N indium(3+) oxygen(2-) titanium(4+) Chemical compound [O-2].[Ti+4].[In+3] BDVZHDCXCXJPSO-UHFFFAOYSA-N 0.000 abstract 1
- 235000012431 wafers Nutrition 0.000 description 54
- 230000005693 optoelectronics Effects 0.000 description 7
- 238000000151 deposition Methods 0.000 description 6
- 239000007769 metal material Substances 0.000 description 6
- 239000002585 base Substances 0.000 description 5
- 239000000084 colloidal system Substances 0.000 description 5
- 230000008602 contraction Effects 0.000 description 4
- 238000005336 cracking Methods 0.000 description 4
- 230000008021 deposition Effects 0.000 description 4
- 238000003825 pressing Methods 0.000 description 4
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 2
- XEEYBQQBJWHFJM-UHFFFAOYSA-N Iron Chemical compound [Fe] XEEYBQQBJWHFJM-UHFFFAOYSA-N 0.000 description 2
- PXHVJJICTQNCMI-UHFFFAOYSA-N Nickel Chemical compound [Ni] PXHVJJICTQNCMI-UHFFFAOYSA-N 0.000 description 2
- 239000010949 copper Substances 0.000 description 2
- 229910052755 nonmetal Inorganic materials 0.000 description 2
- 238000007747 plating Methods 0.000 description 2
- 229910000679 solder Inorganic materials 0.000 description 2
- 229910000881 Cu alloy Inorganic materials 0.000 description 1
- 229910000640 Fe alloy Inorganic materials 0.000 description 1
- 229910000990 Ni alloy Inorganic materials 0.000 description 1
- 239000002253 acid Substances 0.000 description 1
- 239000003513 alkali Substances 0.000 description 1
- 229910045601 alloy Inorganic materials 0.000 description 1
- 239000000956 alloy Substances 0.000 description 1
- 239000002131 composite material Substances 0.000 description 1
- 229910052802 copper Inorganic materials 0.000 description 1
- 230000006866 deterioration Effects 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 238000001704 evaporation Methods 0.000 description 1
- 230000008020 evaporation Effects 0.000 description 1
- 230000004907 flux Effects 0.000 description 1
- 239000003292 glue Substances 0.000 description 1
- 238000010438 heat treatment Methods 0.000 description 1
- 238000005286 illumination Methods 0.000 description 1
- 150000002739 metals Chemical class 0.000 description 1
- 229910052759 nickel Inorganic materials 0.000 description 1
- 230000003647 oxidation Effects 0.000 description 1
- 238000007254 oxidation reaction Methods 0.000 description 1
- 238000007650 screen-printing Methods 0.000 description 1
- 239000002356 single layer Substances 0.000 description 1
- 238000005245 sintering Methods 0.000 description 1
- 238000004544 sputter deposition Methods 0.000 description 1
- 238000002834 transmittance Methods 0.000 description 1
- WFKWXMTUELFFGS-UHFFFAOYSA-N tungsten Chemical compound [W] WFKWXMTUELFFGS-UHFFFAOYSA-N 0.000 description 1
- 229910052721 tungsten Inorganic materials 0.000 description 1
- 239000010937 tungsten Substances 0.000 description 1
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Description
本發明是有關於一種半導體元件之製作方法,且特別是有關於一種半導體元件之散熱座的製作方法。
半導體元件,例如電晶體、積體電路、以及發光二極體(LED)與雷射二極體(LD)等半導體光電元件,之封裝,除了覆晶式(Flip Chip)晶片的封裝係使用金屬凸塊來與封裝基板接合外,均需使用膠體或錫膏來進行接合。
然而,不管是採用膠體或錫膏、或者是覆晶式封裝,在晶片固定的過程中均需要加熱至150℃以上。如此的高溫,容易對半導體元件之電性造成損害。
此外,半導體光電元件應用在大型或小型背光模組(Backlight Module)或照明模組時,需提供足夠的光輸出通量,才能提供足夠的亮度與照度。因此,這些半導體光電元件通常需要在高輸入功率條件下操作。然而,高輸入功率會導致這些半導體光電元件的溫度急遽上升,而導致半導體光電元件的操作效率下降,甚至導致半導體光電元件因高溫而燒毀。
目前,為了解決半導體發光模組之散熱效能不佳的問題,大多選用外掛風扇或增加散熱板面積等方式。然而,這些解決方式也衍生了許多問題。例如,在外掛風扇的方式中,風扇運轉時所產生之震動會造成光源閃爍,且風扇的運轉也會產生額外之功率消耗。而在增加散熱板面積的方式中,較大型之半導體發光模組會因此而大幅增加散熱材料的成本。另外,雖然可採用鋁或銅等高導熱係數之金屬來製作散熱座,以達快速傳導熱的效果。但是,由於半導體發光元件與散熱座之間大都利用膠體來加以接合,而膠體之導熱係數遠低於純金屬,因此元件運轉時所產生的熱大多將累積在接合界面上,而導致散熱座之散熱效能不佳。
此外,另有一種技術係先將半導體元件的正面壓入膠帶中,再於半導體元件之背面鍍上金屬反射薄膜與金屬散熱基座。然而,發明人發現進行大面積膠帶與大面積之半導體元件的黏貼時,黏貼之界面容易產生氣泡。如此一來,將導致鍍覆在膠帶上的金屬反射薄膜與金屬散熱基座不均勻。此外,在金屬的電鍍過程中,膠帶極易熱脹冷縮,如此膠帶上之金屬反射薄膜將非常容易龜裂,進而導致良率大幅下降。
因此,本發明之一態樣就是在提供一種半導體元件之散熱座的製作方法,其可利用金屬凸塊接合半導體晶片與暫時基板上之導電層,因而無需透過膠體,即可在半導體元件之底部直接製作出散熱座。因此,半導體元件係直接與散熱座緊密接觸,於是散熱座之散熱能力可獲得有效發揮,進而可大幅提升半導體元件之散熱效率。
本發明之另一態樣是在提供一種半導體元件之散熱座的製作方法,其可不需藉助膠帶,即可在半導體元件之底部完成散熱座的製作。因此,可避免習知技術中因膠帶的熱脹冷縮而導致反射層裂損的問題,進而可有效提升產品良率。
本發明之又一態樣是在提供一種半導體元件之散熱座的製作方法,其可避免習知技術中因膠帶與半導體元件之間的黏貼不易而導致金屬反射薄膜與金屬散熱基座之厚度不均勻的問題。因此,運用本發明之方法,不僅散熱座之製程簡單易於實施,更可提高散熱座之品質。
本發明之再一態樣是在提供一種半導體元件之散熱座的製作方法,可使散熱座直接接合在半導體元件之底部。因此,半導體元件運轉時所產生之熱可經由散熱座迅速導出,快速降低半導體元件之溫度,進而可提高半導體元件之操作品質、有效延長半導體元件之壽命。
根據本發明之上述目的,提出一種半導體元件之散熱座的製作方法,包含下列步驟。形成一導電層覆蓋在一暫時基板之一表面上。利用至少一金屬凸塊將至少一半導體晶片接合於導電層,其中前述之至少一金屬凸塊介於至少一半導體晶片與導電層之間。形成一金屬基板於導電層上,其中金屬基板填滿前述之至少一半導體晶片與導電層之間之間隙。移除前述之暫時基板。
依據本發明之一實施例,上述之至少一半導體晶片為一半導體光電元件,且於形成金屬基板之步驟與移除暫時基板之步驟之間,上述之方法更包含:形成一反射層於金屬基板上;以及形成一透明保護層於反射層上。依據本發明之另一實施例,上述形成反射層之步驟包含利用電鍍方法或無電電鍍(Electroless Plating)方法。
依據本發明之又一實施例,上述之導電層包含金屬層或透明導電層,其中此金屬層之材料可例如包含金(Au)、鋁(Al)、銀(Ag)與鉑(Pt),透明導電層之材料可例如包含氧化銦錫(ITO)。
依據本發明之再一實施例,上述之至少一半導體晶片之底部設有金屬黏著層。
依據本發明之再一實施例,上述利用至少一金屬凸塊將至少一半導體晶片接合於導電層之步驟可例如包含利用超音波熱壓接合方式。
依據本發明之再一實施例,上述形成金屬基板之步驟可例如包含利用電鍍方法或無電電鍍方法。
運用本發明之方法,無需透過膠體或膠帶,即可製作出直接接合在半導體元件之底部的散熱座,因此散熱座之散熱能力可獲得有效發揮,可大幅提升半導體元件之散熱效率,進而可提高半導體元件之操作品質、有效延長半導體元件之壽命。
此外,本發明可避免習知技術中因膠帶的熱脹冷縮而導致反射層裂損,亦可避免因膠帶與半導體元件之間的黏貼不易所導致之金屬反射薄膜與金屬散熱基座的厚度不均勻。因此,散熱座之製程簡單易於實施,並可有效提高散熱座之品質與產品良率。
請參照第1圖至第8圖,其係繪示依照本發明一實施方式的一種半導體元件之散熱座的製作方法的剖面流程圖。在本實施方式中,可先提供暫時基板100。暫時基板100具有承載功能之載板。在一些實施例中,暫時基板100可為平面基板或具有任意立體構造之模具。暫時基板100之材料可為金屬、非金屬、或金屬與非金屬所構成之複合材料。暫時基板100之材質較佳具有耐酸鹼之特性。
接著,如第1圖所示,利用例如沉積方式形成導電層104覆蓋在暫時基板100之表面102上。沉積導電層104之方式可例如為電鍍、濺鍍、蒸鍍、無電電鍍、網版印刷、溶膠凝膠法(so-gel)或燒結等方式。在一實施例中,導電層104可為金屬層,而此金屬層之材料可例如包含金、鋁、銀與鉑。在另一實施例中,導電層104可為透明導電層,且此透明導電層之材料可例如包含氧化銦錫。
接著,可利用金屬凸塊來接合半導體晶片與暫時基板100上之導電層104,而使金屬凸塊接合在半導體晶片與導電層104之間。金屬凸塊可具有任意形狀,例如第2圖所示之金屬凸塊106、108、110、112、114與116。此外,金屬凸塊需具有電流傳導能力。
在一實施例中,如第2圖所示,可提供多個金屬凸塊106、108、110、112、114與116,並利用例如熱壓接合方式,先將這些金屬凸塊106、108、110、112、114與116設置且固定在導電層104上。其中,此熱壓接合方式可例如為超音波熱壓接合方式。在另一例子中,亦可利用超音波,且同時施加壓力的方式,來接合金屬凸塊與導電層。金屬凸塊可為單一結構,如第2圖所示之金屬凸塊106、112與114。金屬凸塊亦可由多個結構結合而成,如第2圖所示之金屬凸塊108、110與116。其中,金屬凸塊108係由二凸塊108a與108b堆疊而成,金屬凸塊110係由二凸塊110a與110b堆疊而成,而金屬凸塊112則係由三凸塊112a、112b與112c堆疊而成。
接下來,如第3圖所示,利用例如熱壓接合方式,再將半導體晶片118與130分別接合在金屬凸塊106、108和110,以及金屬凸塊112、114與116上。其中,此熱壓接合方式可例如為超音波熱壓接合方式。在另一例子中,可利用超音波,且同時施加壓力的方式來接合半導體晶片與金屬凸塊。在本實施例中,每個半導體晶片118與130均透過三個金屬凸塊來與導電層104接合。然,在其他實施例中,每個半導體晶片可僅透過單一個金屬凸塊、或者透過二個以上之金屬凸塊,來與導電層104接合。
在另一實施方式中,可先利用例如熱壓接合方式,將金屬凸塊106、108和110、以及金屬凸塊112、114和116分別與半導體晶片118和130接合;接著,再利用例如熱壓接合方式,將與半導體晶片118和130接合之金屬凸塊106、108和110、以及金屬凸塊112、114和116接合至導電層104上。其中,此實施方式中所採用之熱壓接合方式可例如為超音波熱壓接合方式。在另一例子中,可利用超音波,且同時施加壓力的方式來接合半導體晶片與導電層。
在又一實施方式中,可利用由至少二凸塊所疊設而成之金屬凸塊,來進行半導體晶片與導電層104的接合。舉例而言,若採用如第2圖所示金屬凸塊110來接合半導體晶片與導電層104時,可先利用例如熱壓接合方式,將金屬凸塊110之凸塊110a和110b分別與導電層104和半導體晶片接合;接著,再利用例如熱壓接合方式,將分別與導電層104和半導體晶片接合之凸塊110a和110b堆疊接合在一起。其中,此實施方式中所採用之熱壓接合方式同樣可例如為超音波熱壓接合方式。在另一例子中,可利用超音波,且同時施加壓力的方式來接合半導體晶片與導電層。
在本發明中,可僅在導電層104上設置一半導體晶片,但亦可同時在導電層104上設置多個半導體晶片,例如半導體晶片118與130。在本實施方式中,所設置之半導體晶片可為半導體元件,例如電晶體與積體電路,或為半導體光電元件,例如發光二極體、雷射二極體與太陽能電池。在一實施例中,半導體晶片118與130可為裸晶、經一次封裝、經二次封裝、或經多層次封裝後的模組。
在一實施例中,第3圖所示,此半導體晶片118與130可為發光二極體。半導體晶片118包含基板120、位於基板120上之發光磊晶結構122、以及位於發光磊晶結構122上之第一電極126與第二電極128。其中,第一電極126與第二電極128具有不同之電性。例如,第一電極126與第二電極128之其中一者為n型,另一者則為p型。半導體晶片118之底部更可選擇性地設有金屬黏著層124,其中此金屬黏著層124具有導電特性。金屬黏著層124較佳可與半導體晶片118之底部和金屬凸塊,例如金屬凸塊106、108與110,具有良好附著力,以利半導體晶片118與金屬凸塊106、108與110之接合。
類似地,半導體晶片130包含基板132、位於基板132上之發光磊晶結構134、位於發光磊晶結構134上之第二電極138、以及位於基板132下方之第一電極136。同樣地,第一電極136與第二電極138具有不同之電性。例如,第一電極136與第二電極138之其中一者為n型,另一者則為p型。在半導體晶片130中,第一電極136可作為半導體晶片130之金屬黏著層。因此,第一電極136較佳可與半導體晶片130之底部和金屬凸塊,例如金屬凸塊112、114與116,具有良好附著力。
如第3圖所示,半導體晶片之二電極可位於半導體晶片之同一側,例如半導體晶片118之第一電極126與第二電極128;或者,亦可位於半導體晶片之相對側,例如半導體晶片130之第一電極136與第二電極138。
接著,如第4圖所示,可利用例如沉積方式,形成金屬基板140覆蓋導電層104上,並填滿半導體晶片118和130與導電層104之間的間隙。金屬基板140可包覆住半導體晶片118和130靠近其底部之側壁的一小部分。形成金屬基板140所採用的沉積方式可例如為電鍍方法或無電電鍍方法。在一實施例中,金屬基板140可由單一金屬材料層所構成。在另一實施例中,金屬基板140可由多層金屬材料層所構成。金屬基板140之材質較佳係採用散熱性佳之金屬,例如銅、鐵/鎳合金、鎳、鋁、鎢、或這些金屬的合金。
在一實施方式中,如第5圖所示,當半導體晶片118和130為半導體光電元件時,可選擇性地利用例如沉積方式,形成反射層142覆蓋在金屬基板140上,以利反射半導體晶片118和130朝其底部發射的光。形成反射層142所採用的沉積方式可例如為電鍍方法或無電電鍍方法。反射層142較佳係對金屬基板140具有良好的附著力。在一實施例中,反射層142可由一或多種金屬材料所組成。在另一實施例中,反射層142可由一或多種非金屬材料所組成。在又一實施例中,反射層142可由一或多種金屬材料與一或多種非金屬材料所共同組成。
在此實施方式中,如第6圖所示,當反射層142形成後,可利用例如沉積方式,形成透明保護層144覆蓋在反射層142上,以保護反射層142,避免反射層142之材料氧化與劣化。透明保護層144較佳係具有高穿透率,以使光線可順利穿透。
之後,如第7圖所示,可利用例如研磨或雷射剝除方式,移除暫時基板100,而暴露出導電層104。接下來,若同時在導電層104上設置多個半導體晶片時,例如半導體晶片118與130時,即可利用切割方式,分離這些半導體晶片118與130。如此,已完成半導體元件118與130之金屬基板140,即散熱座的製作,如第8圖所示。
由上述之實施方式可知,本發明之一優點就是因為可利用金屬凸塊接合半導體晶片與暫時基板上之導電層,因而無需透過膠體,即可在半導體元件之底部直接製作出散熱座。因此,半導體元件係直接與散熱座緊密接觸,於是散熱座之散熱能力可獲得有效發揮,進而可大幅提升半導體元件之散熱效率。
由上述之實施方式可知,本發明之另一優點就是因為可不需藉助膠帶,即可在半導體元件之底部完成散熱座的製作。因此,可避免習知技術中因膠帶的熱脹冷縮而導致反射層裂損的問題,進而可有效提升產品良率。
由上述之實施方式可知,本發明之又一優點就是因為可避免習知技術中因膠帶與半導體元件之間的黏貼不易而導致金屬反射薄膜與金屬散熱基座之厚度不均勻的問題。因此,運用本發明之方法,不僅散熱座之製程簡單易於實施,更可提高散熱座之品質。
由上述之實施方式可知,本發明之再一優點就是因為可使散熱座直接接合在半導體元件之底部。因此,半導體元件運轉時所產生之熱可經由散熱座迅速導出,快速降低半導體元件之溫度,進而可提高半導體元件之操作品質、有效延長半導體元件之壽命。
雖然本發明已以實施例揭露如上,然其並非用以限定本發明,任何在此技術領域中具有通常知識者,在不脫離本發明之精神和範圍內,當可作各種之更動與潤飾,因此本發明之保護範圍當視後附之申請專利範圍所界定者為準。
100...暫時基板
102...表面
104...導電層
106...金屬凸塊
108...金屬凸塊
108a...凸塊
108b...凸塊
110...金屬凸塊
110a...凸塊
110b...凸塊
112...金屬凸塊
114...金屬凸塊
116...金屬凸塊
116a...凸塊
116b...凸塊
116c...凸塊
118...半導體晶片
120...基板
122...發光磊晶結構
124...金屬黏著層
126...第一電極
128...第二電極
130...半導體晶片
132...基板
134...發光磊晶結構
136...第一電極
138...第二電極
140...金屬基板
142...反射層
144...透明保護層
為讓本發明之上述和其他目的、特徵、優點與實施例能更明顯易懂,所附圖式之說明如下:
第1圖至第8圖係繪示依照本發明一實施方式的一種半導體元件之散熱座的製作方法的剖面流程圖。
104...導電層
106...金屬凸塊
108...金屬凸塊
110...金屬凸塊
112...金屬凸塊
114...金屬凸塊
116...金屬凸塊
118...半導體晶片
130...半導體晶片
140...金屬基板
142...反射層
144...透明保護層
Claims (12)
- 一種半導體元件之散熱座的製作方法,包含:形成一導電層覆蓋在一暫時基板之一表面上;利用至少一金屬凸塊將至少一半導體晶片接合於該導電層,其中該至少一金屬凸塊介於該至少一半導體晶片與該導電層之間;形成一金屬基板於該導電層上,其中該金屬基板填滿該至少一半導體晶片與該導電層之間之一間隙;以及移除該暫時基板。
- 如請求項1所述之方法,其中該至少一半導體晶片為一半導體光電元件,且於形成該金屬基板之步驟與移除該暫時基板之步驟之間,該方法更包含:形成一反射層於該金屬基板上;以及形成一透明保護層於該反射層上。
- 如請求項2所述之方法,其中形成該反射層之步驟包含利用一電鍍方法或一無電電鍍方法。
- 如請求項1所述之方法,其中該導電層包含一金屬層或一透明導電層,該金屬層之材料包含金、鋁、銀與鉑,該透明導電層之材料包含氧化銦錫。
- 如請求項1所述之方法,其中該至少一半導體晶片之底部設有一金屬黏著層。
- 如請求項1所述之方法,其中利用該至少一金屬凸塊將該至少一半導體晶片接合於該導電層之步驟包含利用一超音波熱壓接合方式。
- 如請求項1所述之方法,其中利用該至少一金屬凸塊將該至少一半導體晶片接合於該導電層之步驟包含利用一超音波且同時施加壓力之一接合方式。
- 如請求項1所述之方法,其中利用該至少一金屬凸塊將該至少一半導體晶片接合於該導電層之步驟包含利用一熱壓接合方式。
- 如請求項1所述之方法,其中利用該至少一金屬凸塊將該至少一半導體晶片接合於該導電層之步驟包含:將該至少一金屬凸塊與該至少一半導體晶片接合;以及於該至少一金屬凸塊與該至少一半導體晶片接合後,將該至少一金屬凸塊接合在該導電層上。
- 如請求項1所述之方法,其中利用該至少一金屬凸塊將該至少一半導體晶片接合於該導電層之步驟包含:將該至少一金屬凸塊接合在該導電層上;以及於將該至少一金屬凸塊接合在該導電層上後,將該至少一半導體晶片接合在該至少一金屬凸塊上。
- 如請求項1所述之方法,其中該至少一金屬凸塊包含一第一凸塊與一第二凸塊,且利用該至少一金屬凸塊將該至少一半導體晶片接合於該導電層之步驟包含:將該第一凸塊與該第二凸塊分別接合在該至少一半導體晶片與該導電層上;以及於將該第一凸塊與該第二凸塊分別接合在該至少一半導體晶片與該導電層上後,將該第一凸塊接合在該第二凸塊上。
- 如請求項1所述之方法,其中形成該金屬基板之步驟包含利用一電鍍方法或一無電電鍍方法。
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TW099143290A TWI407536B (zh) | 2010-12-10 | 2010-12-10 | 半導體元件之散熱座的製作方法 |
CN2011100373291A CN102569100A (zh) | 2010-12-10 | 2011-01-27 | 半导体组件的散热座的制作方法 |
DE102011011718A DE102011011718B3 (de) | 2010-12-10 | 2011-02-18 | Herstellung einer Wärmeableitungsmasse einer Halbleitervorrichtung |
US13/031,736 US8232119B2 (en) | 2010-12-10 | 2011-02-22 | Method for manufacturing heat dissipation bulk of semiconductor device |
KR1020110024378A KR101148028B1 (ko) | 2010-12-10 | 2011-03-18 | 반도체 장치의 방열 벌크 제조 방법 |
JP2011075535A JP5134108B2 (ja) | 2010-12-10 | 2011-03-30 | 半導体素子の放熱体の製造方法 |
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JP (1) | JP5134108B2 (zh) |
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CN (1) | CN102569100A (zh) |
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US10242863B2 (en) | 2016-10-03 | 2019-03-26 | WET Technology Co., Ltd. | Substrate processing apparatus |
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DE102013112886A1 (de) * | 2013-11-21 | 2015-05-21 | Osram Opto Semiconductors Gmbh | Verfahren zur Herstellung von optoelektronischen Halbleiterbauelementen und optoelektronisches Halbleiterbauelement |
DE102015002176A1 (de) * | 2015-02-24 | 2016-08-25 | Jenoptik Laser Gmbh | Verfahren zum Herstellen eines Diodenlasers und Diodenlaser |
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KR100646569B1 (ko) | 2005-12-15 | 2006-11-15 | 엘지전자 주식회사 | 발광 소자 패키지 및 그의 제조 방법 |
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US10242863B2 (en) | 2016-10-03 | 2019-03-26 | WET Technology Co., Ltd. | Substrate processing apparatus |
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US8232119B2 (en) | 2012-07-31 |
KR101148028B1 (ko) | 2012-05-25 |
DE102011011718B3 (de) | 2012-02-02 |
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US20120149138A1 (en) | 2012-06-14 |
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JP5134108B2 (ja) | 2013-01-30 |
JP2012129485A (ja) | 2012-07-05 |
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