TWI384925B - 內埋式線路基板之結構及其製造方法 - Google Patents

內埋式線路基板之結構及其製造方法 Download PDF

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TWI384925B
TWI384925B TW098108656A TW98108656A TWI384925B TW I384925 B TWI384925 B TW I384925B TW 098108656 A TW098108656 A TW 098108656A TW 98108656 A TW98108656 A TW 98108656A TW I384925 B TWI384925 B TW I384925B
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resin
substrate
layer
layers
manufacturing
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TW201036509A (en
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Shin Luh Tarng
Teck-Chong Lee
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Advanced Semiconductor Eng
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Priority to US12/647,831 priority patent/US20100239857A1/en
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Priority to US13/734,621 priority patent/US20130122216A1/en
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    • B32B17/02Layered products essentially comprising sheet glass, or glass, slag, or like fibres in the form of fibres or filaments
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    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/02Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding
    • H05K3/04Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding the conductive material being removed mechanically, e.g. by punching
    • H05K3/045Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding the conductive material being removed mechanically, e.g. by punching by making a conductive layer having a relief pattern, followed by abrading of the raised portions
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Description

內埋式線路基板之結構及其製造方法
本發明是有關於一種內埋式線路基板之結構及其製造方法,且特別是有關於一種具有厚樹脂基板的內埋式線路基板之結構及其製造方法。
積體電路(IC)構裝技術是電子產業中重要的一環,電子構裝主要的功用在於保護、支撐、線路配置與製造出散熱途徑,並提供零件一個模組化與規格標準。在1990年代主要是利用球柵陣列(Ball Grid Array,BGA)的封裝方式進行電子構裝,其優點為散熱性佳與電性好、接腳數可以大量增加,可有效縮小封裝體面積。
然而,隨著全球個人電腦、消費性電子產品及通訊產品不斷要求輕薄短小更要具備高效能的趨勢下,晶片所要求的電氣特性不但要愈好,整體體積要愈小,但I/O埠的數目卻是往上提高。隨著I/O數量增加、積體化線路間距縮小,要想在BGA基板上高效率地佈置走線變得困難,例如在點18制程(線寬0.18μm)或是高速(如800MHz以上)的IC設計上,有大幅增加I/O密度的趨勢。而覆晶(Flip Chip)技術正是可以解決此問題的構裝方式之一,其具有高I/O和優良電性,成為現今載板發展的主流趨勢之一。在2006年後覆晶載板已是各載板廠爭相投資的產品專案,且各下游產品對覆晶載板的採用率已達一定水準。再者,除覆晶技術的需求外,下游產品系統整合化的要求將日趨明顯,因此多晶片模組(Multi-chip Module,MCM)製程對MCM載板的需求亦將大幅提高,可望與覆晶載板一同成為市場的成長潛力產品。
而快速增加的微電子系統需求(特別是關於系統大小和晶片整合增益部分)也更加速了晶片級尺寸封裝(Chip Scale Packaging,CSP)技術的採用。就像是表面黏裝技術(surface-mount packaging technology,簡稱SMT)在過去逐漸戰勝通孔插裝技術(through-hole technology)一樣,CSP技術目前也將逐漸取代SMT的技術。
隨著晶片級尺寸封裝(CSP)技術的成熟,追求性能與成本的系統型半導體封裝方式-系統封裝(System in Package,SiP)也成為封裝技術的主流,主要是因為產品的尺寸越來越小、功能越趨繁多,必須應用SiP技術以滿足市場的需求。系統封裝SiP包括了將晶片(chip)或是被動元件(Passive Components)或是其他模組進行構裝。系統封裝也包括了不同技術如PiP(Package in Package)、PoP(Package on Package)、平面型的多晶片模組封裝、或是為節省面積將不同功能晶片堆疊(Stack)起來的3D堆疊封裝,這些都屬於系統封裝(SiP)技術的發展範疇,該用何種型態封裝也視應用需求而有所差異。因此SiP的定義十分廣泛。在系統封裝(SiP)技術中,所使用的接合技術也有很多種,例如是打線連接(Wire bonding)、覆晶式(Flip Chip)接合和使用多種接合技術(Hybrid-type)等等。
以系統封裝(System in Package)裸晶為例,它可將不同數位或類比功能的裸晶,以凸塊(bump)或打線(wire bond)方式連結於晶片載板上,該載板中已有部分內埋被動元件或線路設計,此具有電性功能的載板,稱為整合性基板(Integrated Substrate)或功能性基板(Functional Substrate)。請參照第1圖,其繪示一種傳統內埋式線路之整合性基板之示意圖。如第1圖所示的傳統基板是在一中心層(core)11的上下表面各形成第一導電層12和第二導電層13,導電層的材料例如是金屬銅,再圖案化導電層以形成整合性基板所需之線路圖形。中心層11的材料例如是玻璃纖維和樹脂所組成,製作時係使玻璃纖維浸泡於樹脂液中,因此所形成的中心層11是有如經緯線交錯的玻璃纖維與樹脂含浸混和而成。而圖案化導電層後可在第一導電層12上例如形成通孔(Via)121和122,在第二導電層13上例如形成通孔131、132和溝槽(trench)133。然而,此種態樣的整合性基板其導電圖案是突出於中心層11外,使整個基板的上下表面呈現凹凸不平狀,再者整體(包括中心層11和第一、二導電層12和13)的厚度較厚,在此種結構下要再使基板薄化的可能性很小,因此不利於應用在小型尺寸產品上。隨著應用產品的尺寸和外型輕薄化的需求越來越高,此種具有一定厚度的傳統基板結構實無法符合市場產品的需求。
本發明係有關於一種內埋式線路基板之結構及其製造方法,其以一厚樹脂基板進行基板製造,以形成具平坦表面之基板結構,且整體厚度降低,符合市場產品高功能且輕薄化之需求。
根據本發明,係提出一種內埋式線路基板之製造方法,包括:提供一基板;在基板處形成一通孔(through hole)與複數個溝槽(trench),且通孔貫穿基板,該些溝槽則形成於基板之上表面和下表面處;和對基板進行一次電鍍(one-plating step),使通孔和該些溝槽同時鍍滿一導電材料。
根據本發明,係提出一種厚樹脂基板(Thick Resin Core,TRC),包括一中心層(central core)、一第一樹脂層和一第二樹脂層。中心層具有至少一玻璃纖維樹脂層,且玻璃纖維樹脂層之厚度約為10μm~50μm。第一、二樹脂層分別形成於中心層之上下表面,且厚度分別約為10μm~50μm。
根據本發明,係提出一種兩層式內埋線路之基板結構,包括一中心層、一第一樹脂層、一第二樹脂層、和一導電材料。中心層包括一玻璃纖維樹脂層。第一、二樹脂層分別形成於中心層之上下表面,且第一、第二樹脂層處具有複數個溝槽。導電材料係填充於該些溝槽中,且位於該些溝槽之導電材料係分別與第一、第二樹脂層之表面齊平。
根據本發明,係提出一種內埋式線路基板之結構,包括一具第一導電材料之基板結構、第一、二銲料層和一第二導電材料。其中,基板結構包括一中心層、和形成於中心層上下表面之一第一樹脂層和一第二樹脂層,且第一、第二樹脂層處具有複數個溝槽。第一導電材料填充於該些溝槽中,且位於溝槽之第一導電材料係分別與第一、第二樹脂層之表面齊平。第一、第二銲料層分別形成於第一、第二樹脂層上,且分別具有複數個孔洞以暴露出第一導電材料之部分表面。至於第二導電材料則形成於第一、第二銲料層之該些孔洞處。
為讓本發明之上述內容能更明顯易懂,下文特舉一較佳實施例,並配合所附圖式,作詳細說明如下:
本發明係提出一種內埋式線路基板之結構及其製造方法,主要是在一種厚樹脂基板的表面上直接進行圖案化步驟,如形成通孔(through hole)和溝槽(trench),並且利用一次電鍍(one-plating step)方式,使通孔和溝槽同時鍍滿一導電材料,之後進行後續處理使通孔和溝槽內的導電材料和基板表面齊平,再經過銲料層和適當表面處理加工後,完成本發明內埋式線路基板之製造。依據本發明所提出之內埋式線路基板,不但整體厚度可降低,且基板表面平整(不會有凸起的線路圖案),因此十分適合小尺寸應用產品的需求。
以下係根據本發明提出一實施例,以詳細說明本發明之內埋式線路基板之製造方法。然而實施例中所提出之方法僅為舉例說明之用,並非作為限縮本發明保護範圍之用。再者,實施例之圖示僅繪示本發明技術之相關元件,省略不必要之元件,以清楚顯示本發明之技術特點。
請參照第2A~2G圖,其繪示本發明一實施例之內埋式線路基板之製造方法。首先,提供一厚樹脂基板(Thick Resin Core,TRC)20,如第2A圖所示。厚樹脂基板20包括一中心層(central core)201、一第一樹脂層203和一第二樹脂層205。中心層201至少包括一層玻璃纖維樹脂層,其厚度約為10μm~50μm。實際的玻璃纖維樹脂層數可視應用所需作調整,例如2層或3層的玻璃纖維樹脂層作為中心層201。第一樹脂層203和第二樹脂層205係分別形成於中心層201的上表面和下表面,且第一、第二樹脂層203、205之厚度分別約為10μm~50μm。當中心層201只有單一玻璃纖維樹脂層且具有最薄厚度約10μm,第一、第二樹脂層203、205也分別為最薄厚度約10μm時,厚樹脂基板之總厚度僅有約30μm。當中心層201具有三層玻璃纖維樹脂層且每層具有厚度約50μm,第一、第二樹脂層203、205也分別具有厚度約50μm時,厚樹脂基板之總厚度有約250μm。因此,厚樹脂基板之總厚度範圍約為30μm~250μm。
厚樹脂基板20的製法例如是將玻璃纖維浸泡於樹脂液,使玻璃纖維與樹脂混合而成中心層201,並在中心層201外側形成具一厚度之第一、第二樹脂層203、205。而中心層201的玻璃纖維樹脂層,和第一、第二樹脂層203、205所包括之樹脂材料例如是二氟化銨樹脂(Ammonium Bifluoride,ABF)、雙馬來酰亞胺樹脂(Bismaleimide,BT)、玻璃布基有環氧樹脂(FR4、FR5)、聚亞醯胺樹脂(polyimide,PI)、液晶聚合樹脂(LCP)、或環氧樹脂(Epoxy)等。但本發明對此並不多作限制。
接著,在如第2A圖所示之厚樹脂基板20處形成通孔(through hole)與溝槽(trench),其中,通孔係貫穿基板20,而溝槽則形成於基板20之上表面21a和下表面21b處。
在此實施例中則是先形成通孔22貫穿基板20,如第2B圖所示;之後清除形成通孔22時所產生的玻璃纖維和樹脂削屑。再於第一樹脂層203和第二樹脂層205處分別形成多個溝槽23a~23d和25a~25c,如第2C圖所示;之後並清除形成溝槽23a~23d、25a~25c時所產生的樹脂削屑。如先製作溝槽23a~23d、25a~25c再製作通孔22可能會使鑽挖通孔22產生的削屑(玻璃纖維和樹脂)掉至溝槽23a~23d、25a~25c內,而影響後續製程與產品電性。然而,本發明並不特別限制實際製作時形成通孔22與溝槽23a~23d、25a~25c的順序。
在此實施例中,可利用機械鑽孔(mechanical drill)方式或雷射鑽孔(laser drill)方式,以打穿基板20而形成如第2B圖所示之通孔22。若選擇雷射鑽孔方式,則可選擇具有較高能量的一長波長雷射光以在基板20處形成通孔22,例如使用二氧化碳雷射(CO2 Laser)。另外,可較佳地選用具有較低能量的一短波長雷射光如紫外光雷射或準分子雷射(UV or Excimer Laser)在第一樹脂層203和第二樹脂層205處切割出如第2C圖所示之溝槽23a~23d、25a~25c。本發明實施例選用雷射鑽孔和切割方式形成通孔22和溝槽23a~23d、25a~25c,不需要使用傳統的黃光製程,而是使用具高精度定位系統的雷射進行加工,因此不但製程具有自對準(self-aligned)之步驟,製成之產品亦具有自對準之優點。
接著,如第2D圖所示,對基板20進行一次電鍍(one-plating step),例如將基板20浸置於一電鍍槽中,使通孔22和溝槽23a~23d、25a~25c都同時鍍滿一導電材料26。導電材料26例如是金屬銅。不同於傳統對於填鍍孔洞/溝槽須先使用無電鍍(electroless deposition)方式形成底銅,再使用電解電鍍方式繼續將該空間鍍滿,本發明實施例所使用的一次電鍍可快速地將通孔22和溝槽23a~23d、25a~25c同時鍍滿,不但步驟簡單也可縮短整體流程時間(quicker cycle time),使製造成本降低。
之後,如第2E圖所示,去除基板20之上表面21a和下表面21b處多餘的導電材料26,使鍍填於通孔22和溝槽23a~23d、25a~25c的導電材料26表面與基板20之上表面21a和下表面21b齊平。在此實施例中,可利用蝕刻(etching)方式或機械研磨(mechanical grinding)方式使表面薄化,以去除基板20上多餘的導電材料26。也可應用電化學減薄(electrolytic thinning)、微量蝕刻(flash etching)、或表面燒蝕(surface ablation)/電漿清洗(plasma cleaning)等其它方式達到去除多餘的導電材料和平坦化之目的。本發明對此並不多作限制。
接著,在基板20之上表面21a和下表面21b分別形成一第一銲料層206和一第二銲料層207,且第一銲料層206、第二銲料層207分別露出通孔22和溝槽處的導電材料26之部分表面。如第2F圖所示,第一銲料層206形成後係暴露出填充於溝槽23b處之導電材料26的部分表面;第二銲料層207形成後係暴露出填充於溝槽25a~25c處之導電材料26的部分表面。其中,第一銲料層206和第二銲料層207之厚度例如分別為約10μm~20μm。
在此實施例中,於形成第一銲料層206、第二銲料層207後,在通孔22和溝槽23b、25a~25c處的導電材料26所露出之部分表面係進行一表面處理,例如進行一無電鍍金屬製程(Bus-less metal finish),以相應地形成金屬層208a~208c或是金屬保護層,如第2G圖所示,以完成內埋式線路基板之製作。金屬層208a~208c或是金屬保護層的材料例如是使用對環境較無害的無鉛銲料。其中,無鉛銲料包括金屬塗層和有機塗層。金屬塗層例如化鎳金(Electroless Nickel/Immersion Gold,ENIG)、浸鍍銀(Immersion Silver,ImAg)、浸鍍錫(Immersion Tin,ImSn)或選擇性鍍錫(Selective Tin-Plating)等;有機塗層(金屬保護層)例如有機可銲性保護劑(Organic Solderability Preservative,OSP)。但本發明並不以此為限,選擇表面處理材料時需視實際應用狀況而定。
如上述本發明實施例所揭露之內埋式線路基板之製造方法,係在厚樹脂基板20的樹脂上(第一樹脂層203和第二樹脂層205)直接定義出溝槽和形成通孔,且基板的線路圖案(如第2E圖所示之導電材料26),只要去除多餘的導電材料和平坦化步驟後即可顯露出來,並完全與樹脂表面齊平。因此,與傳統的內埋式線路基板結構(如第1圖)相較,本發明所製得之基板沒有凸起的線路圖案,而是具有平坦整齊的表面。再者,如前述,實施例所提出之厚樹脂基板其總厚度範圍約為30μm~250μm,在一連串的製程後,內埋式線路基板的總厚度係為厚樹脂基板20厚度加上第一、二銲料層206、207之厚度(分別約10μm~20μm),約為50μm~290μm。因此,本發明所製得之內埋式線路基板不但表面平整,其整體厚度也可降低至約290μm以下,十分符合應用產品日漸趨於輕薄短小之需求。
另外,在現有製程中蝕刻、雷射和電鍍的能力下,此實施例更對於如第2C圖所示在樹脂層處所形成之溝槽大小與形狀作進一步研究。
請參照第3圖,其繪示依照本發明一較佳實施例之厚樹脂基板之局部放大示意圖。其中在中心層301上方的第一樹脂層303係具有數個溝槽。第3圖中係標示了與溝槽尺寸相關之三種參數,包括:溝槽壁厚TS(trench wall thickness)、溝槽寬度TW(trench width)和溝槽深度TD(trench depth)。此三種參數值對於最終產品的特性會造成影響,例如溝槽壁厚TS太薄,進行後續製程時槽壁容易有損壞;若溝槽寬度過寬將不易進行後續導電材料電鍍和平坦化步驟;而溝槽深度也會受到所在樹脂層厚度和導電材料電鍍能力的限制。
因此,依照本發明一實施例,溝槽的寬深比TW/TD(aspect ratio)係約為4~1/4。由於本發明所提出之內埋式線路基板,會在溝槽內填入導電材料以形成線路,因此溝槽的寬深比TW/TD會影響線路的訊號完整性。而多個溝槽的寬深比可以相同或不同,其確切數值視應用狀況而定,本發明並不特別限制。舉例來說,若本發明之溝槽在應用中將成為保護頻帶線路(guardband circuit),則可選用較低的寬深比數值,例如1/2或其他小於1之數值;若本發明之溝槽在應用中將成為導電線路(conducting circuit),則可選用較高的寬深比數值,例如2或其他大於1之數值。
再者,於一實施例中,每一溝槽的壁厚TS可約為5μm~15μm、或是5μm~12μm;每一溝槽的寬度TW可約為5μm~15μm、或是5μm~12μm。而對於選用第一、二銲料層206、207之厚度分別約10μm~20μm的線路基板(請參照第2F圖),溝槽深度TD可約為5μm~12μm。
再者,溝槽的壁厚和深度比TS/TD(aspect ratio)會影響槽壁的強度進而影響產品良率(yield),也會影響產品的穩定度(reliability)如漏電流(leakage)或干擾(cross-talking)。因此,在實施例中溝槽的壁厚和深度比可例如是約4~1/4。但本發明對此並不特別限制,其確切數值視應用狀況而定。舉例來說,若應用本發明之產品要求內埋線路具高良率和高穩定度,則可選用較高的TS/TD比值例如2,且溝槽的壁厚TS值例如是15μm;若應用本發明之產品沒有特別要求內埋線路具高良率和高穩定度,則可選用低一點的TS/TD比值例如1/2(或1/2以上),且溝槽的壁厚TS值可選擇5μm(或5μm以上)。
綜上所述,本發明實施例之內埋式線路基板之製造方法,係在一厚樹脂基板的樹脂上直接定義出溝槽和形成通孔,並利用一次電鍍同時形成溝槽和通孔處之導電材料電鍍,且經過去除多餘的導電材料和平坦化步驟後即可形成基板的線路圖案,且線路與樹脂表面齊平。因此,依照本發明實施例之方法所製得之內埋式線路基板,其表面平坦整齊,且整體厚度亦大幅下降,十分符合應用產品日漸趨於輕薄短小之需求。
綜上所述,雖然本發明已以較佳實施例揭露如上,然其並非用以限定本發明。本發明所屬技術領域中具有通常知識者,在不脫離本發明之精神和範圍內,當可作各種之更動與潤飾。因此,本發明之保護範圍當視後附之申請專利範圍所界定者為準。
11...中心層
12...第一導電層
13...第二導電層
121、122、131、132...通孔
20...厚樹脂基板
201、301...中心層
203、303...第一樹脂層
205...第二樹脂層
21a...基板20之上表面
21b...基板20之下表面
22...通孔
23a~23d、25a~25c...溝槽
26...導電材料
206...第一銲料層
207...第二銲料層
208a~208c...金屬層
第1圖繪示一種傳統內埋式線路之整合性基板之示意圖。
第2A~2G圖繪示本發明一實施例之內埋式線路基板之製造方法。
第3圖繪示依照本發明一較佳實施例之厚樹脂基板之局部放大示意圖。
201...中心層
203...第一樹脂層
205...第二樹脂層
21a...基板20之上表面
21b...基板20之下表面
22...通孔
23a~23d、25a~25c...溝槽
26...導電材料

Claims (48)

  1. 一種內埋式線路基板之製造方法,包括:提供一基板,該基板係為一厚樹脂基板(Thick Resin Core,TRC),其結構包括:一中心層(central core);和一第一樹脂層和一第二樹脂層,分別形成於該中心層之上下兩側;在該基板處形成一通孔(through hole)與複數個溝槽(trenches),且該通孔貫穿該基板,該些溝槽則形成於該基板之一上表面和一下表面處;和對該基板進行一次電鍍(one-plating step),使該通孔和該些溝槽同時鍍滿一導電材料。
  2. 如申請專利範圍第1項所述之製造方法,其中該中心層包括至少一玻璃纖維樹脂層。
  3. 如申請專利範圍第2項所述之製造方法,其中該玻璃纖維樹脂層和該第一、第二樹脂層所包括之一樹脂材料係為二氟化銨樹脂(Ammonium Bifluoride,ABF)、雙馬來酰亞胺樹脂(Bismaleimide,BT)、玻璃布基有環氧樹脂(FR4、FR5)、聚亞醯胺樹脂(polyimide,PI)、液晶聚合樹脂(LCP)或環氧樹脂(Epoxy)。
  4. 如申請專利範圍第2項所述之製造方法,其中該玻璃纖維樹脂層之厚度和該第一、第二樹脂層之厚度分別約為10μm~50μm。
  5. 如申請專利範圍第4項所述之製造方法,其中該厚樹脂基板之一總厚度約為30μm~250μm。
  6. 如申請專利範圍第1項所述之製造方法,其中先形成該通孔貫穿該基板,再於該第一樹脂層和該第二樹脂層處形成該些溝槽。
  7. 如申請專利範圍第6項所述之製造方法,其中係利用一機械鑽孔(mechanical drill)方式或一雷射鑽孔(laser drill)方式,以打穿該基板而形成該通孔。
  8. 如申請專利範圍第7項所述之製造方法,其中係使用一長波長雷射光對該基板進行雷射鑽孔,以形成該通孔。
  9. 如申請專利範圍第6項所述之製造方法,其中係利用一短波長雷射光對該第一樹脂層和該第二樹脂層進行雷射切割,以定義出該些溝槽。
  10. 如申請專利範圍第1項所述之製造方法,其中每一溝槽的一寬深比係約為4~1/4。
  11. 如申請專利範圍第10項所述之製造方法,其中每一溝槽的一寬度(trench width)約為5μm~15μm。
  12. 如申請專利範圍第10項所述之製造方法,其中每一溝槽的一壁厚(trench wall)約為5μm~15μm。
  13. 如申請專利範圍第1項所述之製造方法,其中係將該基板浸置於一電鍍槽中,使該通孔和該些溝槽同時鍍滿該導電材料。
  14. 如申請專利範圍第1項所述之製造方法,更包括:去除該基板之該上表面和該下表面處多餘的該導電材料,使鍍填於該通孔和該些溝槽的該導電材料其表面與該基板之該上表面和該下表面齊平。
  15. 如申請專利範圍第14項所述之製造方法,其中係利用一蝕刻(etching)方式或一機械研磨(grinding)方式去除該基板之該上表面和該下表面處多餘的該導電材料。
  16. 如申請專利範圍第14項所述之製造方法,更包括:在該基板之該上表面和該下表面分別形成一第一銲料層和一第二銲料層,且該第一、第二銲料層分別露出該通孔和該些溝槽處的該導電材料之部分表面。
  17. 如申請專利範圍第16項所述之製造方法,其中該第一、第二銲料層之厚度分別約為10μm~20μm。
  18. 如申請專利範圍第16項所述之製造方法,在形成該第一、第二銲料層之後,包括:在該通孔和該些溝槽處的該導電材料所露出之部分表面係進行一表面處理,以形成一金屬層或是一金屬保護層。
  19. 如申請專利範圍第18項所述之製造方法,其中該表面處理係為一無電鍍金屬製程(Bus-less metal finish)。
  20. 如申請專利範圍第1項所述之製造方法,其中該導電材料係為一金屬銅。
  21. 一厚樹脂基板(Thick Resin Core,TRC),包括:一中心層(central core),包括一玻璃纖維樹脂層,該玻璃纖維樹脂層之厚度約為10μm~50μm;和一第一樹脂層和一第二樹脂層,分別形成於該中心層之一上表面和一下表面,該第一、第二樹脂層之厚度分別約為10μm~50μm。
  22. 如申請專利範圍第21所述之厚樹脂基板,其中 該中心層(central core)包括複數層玻璃纖維樹脂層。
  23. 如申請專利範圍第21所述之厚樹脂基板,其中該厚樹脂基板之一總厚度約為30μm~250μm。
  24. 如申請專利範圍第21所述之厚樹脂基板,其中該玻璃纖維樹脂層和該第一、第二樹脂層所包括之一樹脂材料係為二氟化銨樹脂(Ammonium Bifluoride,ABF)、雙馬來酰亞胺樹脂(Bismaleimide,BT)、玻璃布基有環氧樹脂(FR4、FR5)、聚亞醯胺樹脂(polyimide,PI)、液晶聚合樹脂(LCP)或環氧樹脂(Epoxy)。
  25. 如申請專利範圍第21所述之厚樹脂基板,其中該第一、第二樹脂層更包括複數個溝槽(trench),且每一溝槽的一寬深比係約為4~1/4。
  26. 申請專利範圍第25所述之厚樹脂基板,其中每一溝槽的一寬度(trench width)約為5μm~15μm。
  27. 如申請專利範圍第25所述之厚樹脂基板,其中每一溝槽的一壁厚(trench wall)約為5μm~15μm。
  28. 一種兩層式內埋線路之基板結構,包括:一中心層(central core),包括一玻璃纖維樹脂層;一第一樹脂層和一第二樹脂層,分別形成於該中心層之一上表面和一下表面,且該第一、第二樹脂層處則具有複數個溝槽(trenches);和一導電材料,填充於該些溝槽中,且位於該些溝槽之該導電材料係分別與該第一、第二樹脂層之表面齊平。
  29. 申請專利範圍第28所述之基板結構,更包括至少一通孔貫穿該第一樹脂層、該中心層和該第二樹脂層, 且該導電材料亦填充於該通孔中,且位於該通孔處之該導電材料係分別與該第一、第二樹脂層之表面齊平。
  30. 如申請專利範圍第28項所述之基板結構,其中該中心層(central core)包括複數層玻璃纖維樹脂層。
  31. 申請專利範圍第28所述之基板結構,其中該玻璃纖維樹脂層之厚度約為10μm~50μm,該第一、第二樹脂層之厚度分別約為10μm~50μm。
  32. 如申請專利範圍第31項所述之基板結構,其中該基板結構之一總厚度約為30μm~250μm。
  33. 如申請專利範圍第28項所述之基板結構,其中該玻璃纖維樹脂層和該第一、第二樹脂層所包括之一樹脂材料係為二氟化銨樹脂(Ammonium Bifluoride,ABF)、雙馬來酰亞胺樹脂(Bismaleimide,BT)、玻璃布基有環氧樹脂(FR4、FR5)、聚亞醯胺樹脂(polyimide,PI)、液晶聚合樹脂(LCP)或環氧樹脂(Epoxy)。
  34. 如申請專利範圍第28項所述之基板結構,其中每一溝槽的一寬深比係約為4~1/4。
  35. 如申請專利範圍第34項所述之基板結構,其中每一溝槽的一寬度(trench width)約為5μm~15μm。
  36. 如申請專利範圍第34項所述之基板結構,其中每一溝槽的一壁厚(trench wall)約為5μm~15μm。
  37. 如申請專利範圍第28項所述之基板結構,其中該導電材料係為一金屬銅。
  38. 一種內埋式線路基板之結構,包括:一基板結構,包括: 一中心層(central core),包括一玻璃纖維樹脂層;一第一樹脂層和一第二樹脂層,分別形成於該中心層之一上表面和一下表面,且該第一、第二樹脂層處則具有複數個溝槽(trenches);一第一導電材料,填充於該些溝槽中,且位於該些溝槽之該第一導電材料係分別與該第一、第二樹脂層之表面齊平;一第一銲料層和一第二銲料層,分別形成於該第一、第二樹脂層上,且該第一、第二銲料層分別具有複數個孔洞以暴露出該第一導電材料之部分表面;和一第二導電材料,形成於該第一、第二銲料層之該些孔洞處。
  39. 如申請專利範圍第38項所述內埋式線路基板之結構,其中該基板結構更包括至少一通孔貫穿該第一樹脂層、該中心層和該第二樹脂層,且該第一導電材料亦填充於該通孔中。
  40. 如申請專利範圍第38項所述內埋式線路基板之結構,其中該中心層(central core)包括複數層玻璃纖維樹脂層。
  41. 申請專利範圍第38所述內埋式線路基板之結構,其中該玻璃纖維樹脂層之厚度約為10μm~50μm,該第一、第二樹脂層之厚度分別約為10μm~50μm。
  42. 如申請專利範圍第41項所述內埋式線路基板之結構,其中該基板結構之一總厚度約為30μm~250μm。
  43. 如申請專利範圍第38項所述內埋式線路基板之結構,其中該玻璃纖維樹脂層和該第一、第二樹脂層所包括之一樹脂材料係為二氟化銨樹脂(Ammonium Bifluoride,ABF)、雙馬來酰亞胺樹脂(Bismaleimide,BT)、玻璃布基有環氧樹脂(FR4、FR5)、聚亞醯胺樹脂(polyimide,PI)、液晶聚合樹脂(LCP)或環氧樹脂(Epoxy)。
  44. 如申請專利範圍第38項所述內埋式線路基板之結構,其中每一溝槽的一寬深比係約為4~1/4。
  45. 如申請專利範圍第44項所述內埋式線路基板之結構,其中每一溝槽的一寬度(trench width)約為5μm~15μm。
  46. 如申請專利範圍第44項所述內埋式線路基板之結構,其中每一溝槽的一壁厚(trench wall)約為5μm~15μm。
  47. 如申請專利範圍第38項所述內埋式線路基板之結構,其中該第一、第二銲料層之厚度分別約為10μm~20μm。
  48. 如申請專利範圍第38項所述內埋式線路基板之結構,其中該第一、第二導電材料係為一金屬銅。
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