TWI379430B - A method of fabricating a thin interface for internal light reflection and impurities isolation - Google Patents

A method of fabricating a thin interface for internal light reflection and impurities isolation Download PDF

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TWI379430B
TWI379430B TW098112603A TW98112603A TWI379430B TW I379430 B TWI379430 B TW I379430B TW 098112603 A TW098112603 A TW 098112603A TW 98112603 A TW98112603 A TW 98112603A TW I379430 B TWI379430 B TW I379430B
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layer
thin film
film layer
metallurgical grade
material substrate
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TW201039457A (en
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Tsun Neng Yang
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Atomic Energy Council
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Description

六、發明說明: 【發明所屬之技術領域】 本發明係有關於一種兼具内部光反射與雜質阻隔之薄膜 介面層結構之製備方法,尤指一種製備兼具内部光反射與雜質 阻隔等功能之雜介面層結構,並可剌於開發低成本與高效 率蟲晶梦薄膜太陽電池之方法者。 【先前技術】 目前較為騎之方㈣在提純冶金㈣(Upgraded
Metallufgical Grade Silic〇n,⑽⑽)基板表面利用電化學方 法於該提純冶金級石夕基板表面層,形成多孔性結構。藉由葬 =(近健氣)财不同之雜轉,耻職_内部光反 =,又孔洞之表面係為一種缺陷,可作為雜質陷落處以陷住 =該顯冶金、_基板材料内部之金卿f,進而達到防止 步舰轉細相。—,此種方 生故=程’會產生化學廢料’因此係有環保之問題發 生。故,一般習用者係無法符合使用者於實際使用時之所需。 【發明内容】 題並知技藝所遭遇之上述問 介_構,係可適用於開發低成本===: 電池之方法者。 、门双手蕊日日矽 >専膜太陽 本發明之次要目的係在於,該薄膜介面声 提純冶金卿材料基板内部之金屬雜質進;擴敎至= 1379430 • * f.晶石夕薄騎内’ _村作為⑽反射層吨昇光電轉效 為達以上之目的’本發明係—種兼具内部光反射與
躲狀⑽枝,細域本之觀冶金_ 材料作為基板,並於此基板上形成一高品質之石夕薄膜層可適 用於開發“箱獻陽電池。而域得—域核高效率蟲 晶石夕薄膜太陽f池之目的,賴提抑_層魏太陽光之效 率,與防止因基板材料中高金屬雜質之擴散污染而降低效率。 因此本發明之重耗於提純冶纽树縣板與高品質蟲晶 石夕薄膜層間’設計_種兼具内部歧射赫組隔等功能之薄 膜介面層結構。
於一較佳實施例中,係選擇一純度大於4N範圍之提純冶 金級石夕材料基板;以物理或化學方法,於該提純冶金級石夕材^ 基板表面形成一表面粗糙化結構;再以物理或化學方法,於該 提純冶金級石夕材料基板之表面粗糙化結構上,先後被覆一錯金 屬(Ge)薄膜層及一非晶矽(a_Si)薄膜層;以及以化學氣相 沉積法(Chemical Vapor Deposition,CVD)進行高溫磊晶處 理,於該提純冶金級矽材料基板上形成一高品質磊晶矽薄膜 層,並將該提純冶金級石夕材料基板與該高品質磊晶矽薄臈層間 之鍺金屬薄膜層與非晶石夕薄膜層,合成為一石夕鍺金屬化合物 (Si(l-x)Gex)薄膜介面層,且在該提純冶金級 該砍鍺金屬化合物薄膜介面層介面處亦形成有一雜質聚集區。 【實施方式】 請參閱『第1圖〜第5圖』所示,係分別為本發明之製備 5 13/9430 流程示意圖、本發明一較佳實施例之第-結翻面示意圖、本 發明-較佳實施例之第二結構剖面示意圖、本發明一較佳實施 例之第三結構剖面示意圖及本發明一較佳實施例之最終結構 eJ面示忍圖。如圖所示:本發明係一種兼具内部光反射與雜質 P且隔之薄膜介面層結構之製備方法,其至少包含下列步驟: (A)選取基板步驟11 :如第2圖所示,係用以選擇一 純度大於4N範圍之提純冶金級石夕(Upgraded腕此咕㈤
GradeSilicon,UMG-Si)材料基板 2 1 ; • ( B)侵餘粗糖化步驟12 :如第3圖所示,係用以物理 或化學方法,於該提純冶金級矽材料基板2 1表面形成一表面 粗糙化結構2 2 ; (C) 被覆步驟13 .如第4圖所示,係用以物理或化學 - 方法,於該提純冶金級矽材料基板21之表面粗糙化結構2 2 上,先被覆一鍺金屬(Ge)薄膜層2 3後,再於該鍺金屬薄 膜層2 3上被覆一非晶矽(a_Si)薄膜層2 4 ;以及 (D) 向溫蟲晶步驟14:如第5圖所示,係用以化學氣 φ 相沉積法(Chemical Vapor Deposition,CVD )進行高溫磊晶處 理,在介於1100〜12〇0〇C範圍之溫度下,於該提純冶金: 材料基板2 1上形成一咼品質蟲晶石夕薄膜層2 5,並將該提純 冶金級矽材料基板21與該高品質磊晶矽薄膜層2 5間之鍺 金屬薄膜層與非晶矽薄膜層,合成為一矽錯金屬化合物 (Si(l-x)Gex)薄臈介面層2 6,且在該提純冶金級矽材料基 板21與該矽鍺金屬化合物薄膜介面層2 6介面處亦形成有 一雜質聚集區2 7。 當本發明於運用時,於一較佳實施例中,係選擇一純度大 6 1379430 * 於99.99% (>4N)之提純冶金級矽材料基板2 1,利用電聚侵 蝕法,於該提純冶金級梦材料基板2 1表面侵蝕形成一表面粗 糙化結構2 2 ’再利用物理或化學方法,於該提純冶金級石夕材 料基板2 1之表面粗链化結構2 2上,先後被覆一錯金屬薄膜 層2 3及一非晶矽薄膜層2 4,接著利用常;1化學氣相沉積法 (Atmospheric Pressure Chemical Vapor Deposition,APCVD )進 行高溫蟲晶製程,在介於1100〜12〇〇°C範圍之溫度下,於該 提純冶金級石夕材料基板2 1上形成一高品質蟲晶石夕薄膜層2
5,並同時於該提純冶金級矽材料基板2 i與該高品質磊晶矽 薄膜層2 5間’將該鍺金屬薄膜層2 3與該非晶矽薄臈層2 4 合成為一矽錯金屬化合物薄膜介面層2 6。
完成上述程序後,由於石夕與矽鍺金屬化合物為異質結構, 兩種材料間有不完美之晶格匹配,因此於矽與矽鍺金屬化合物 介面處,即該提純冶金級矽材料基板2 i與該矽鍺金屬化合物 薄膜介面層2 6介Φ處’係形成-具有複雜之網狀差排缺陷之 雜質聚集H2 7 ’可由該些缺陷陷住來自該提純冶金級石夕材料 基板2 1内之金屬雜質,以防止金屬雜質進一步擴散進入該高 品質遙晶料膜層2 5,導致太陽能轉換效率之衰退。此外, 基於稍齡屬’或賴鍺金屬化合_,含有不同之光折射 率,加上該提純冶金級矽材料基板2 i之表面粗糙化結構2 2 :係可增強穿_高品妓晶⑪薄賴2 5光束之反射與漫 射等效果’目而增加人射光在該高品質蟲㈣細層2 5中之 光學路检’㈣達到提昇太陽轉換效率之目的。 、藉此,在本發明以低成本之提純冶金級矽材料作為基板, 並於此基板上形成—高品質之料膜層,.可適躲開發遙晶石夕 7 薄膜太陽電池。而為獲得—低成本與高效率i晶㈣膜太陽電 池之目的’必顯昇_顧吸收太陽光之效率,與防止因基 板材料中高金屬雜質之擴散污染而降低效率。因此本發明之重 點係於提純冶金級賴料基板與高品膜層間,設計 -種兼具畴光反射_f_等功能之薄膜介面層結構,不 僅可抑,該提純冶金級㈣料基板内部之金屬雜質進一步擴 散至該高品雜晶料膜層内,亦可作勒部反射層,以提昇 光電轉效率者。 綜上所述,本發明係—種兼具⑽歧射與雜質阻隔之薄 ,介面縣構之製備方法,可有狀善f狀種種缺點,係於 提純冶金級石夕材料基板與高品質蠢晶石夕薄膜層間,設計一種兼 -内。P光反射與雜質阻隔等魏之薄臈介面層結構,不僅可抑 5提純冶金級雜料基板内部之金屬雜質進-步擴散至該 问口口質遙日日日⑪薄膜勒’亦可作勒部反射層,以提昇光電轉 效率,為可_發域核高鱗“_獻陽電池之 的者it而使本發明之産生能更進步、更實用、更符合使用 之所須’確已符合發明專射請之要件,銳法提出專利申 請。 准以上所述者,僅為本㈣之較佳實關*已,當不能以 ^限定本㈣實施之故,凡依本發明申請專利範圍及發 s月曰内谷所作之簡單的等效變化與修飾,皆應仍屬本發明 【圖式簡單說明】 第1圖,係本發明之製備流程示意圖。 1379430 第2圖,係本發明一較佳實施例之第一結構示意圖。 第3圖,係本發明一較佳實施例之第二結構示意圖。 第4圖,係本發明一較佳實施例之第三結構示意圖。 第5圖,係本發明一較佳實施例之最終結構示意圖。 【主要元件符號說明】 步驟(A)選取基板11 步驟(B)侵蝕粗糙化12 _ 步驟(C)被覆13 步驟(D)高溫磊晶14 提純冶金級矽材料基板21 表面粗糙化結構2 2 鍺金屬薄膜層23 非晶矽薄膜層24 ' 高品質磊晶矽薄膜層25 矽鍺金屬化合物薄膜介面層2 6 # 雜質聚集區27

Claims (1)

1379430 101年10月24日桉正替換頁 七、申請專利範圍: 2〇、丽25 1·-種兼具內部光反射與雜f阻隔之_介面層結構之製備方 法,其至少包含下列步驟: β ( Α)選取基板步驟:係用以選擇一純度大於4Ν範圍之 提純冶金級矽(Upgraded Metamirgieal sme()n UM&⑴ 材料基板; (B) 侵蝕粗糙化步驟:係用以物理或化學方法,於該 提純冶金級石夕材料基板表面形成一表面粗縫化結構其中, # 該化學方法係為電漿侵姓法(Plasma Etching); (C) 被覆步驟:係用以物理或化學方法,於該提純冶 金級石夕材料基板之表面粗链化結構上,先被覆一錯金屬(Ge) 薄膜層後,再於該鍺金屬薄膜層上被覆一非晶矽(a Si)薄膜 層;以及 ' (D )尚溫磊晶步驟:係用以化學氣相沉積法(Chemicai Vapor Deposition,CVD)進行高溫磊晶處理,於該提純冶金級 石夕材料基板上形成-高品質蟲晶㈣膜層,並將該提純冶金 • 級矽材料基板與該高品質磊晶矽薄膜層間之鍺金屬薄膜層與 非晶矽薄膜層,合成為一矽鍺金屬化合物(Si(1_x)Gex)薄膜 介面層,且在該提純冶金級矽材料基板與該矽鍺金屬化合物 薄膜介面層介面處亦形成有一雜質聚集區,其中,該石夕鍺金 屬化合物涛膜介面層不僅可抑制該提純冶金級矽材料基板内 部之金屬雜質進一步擴散至該高品質磊晶矽薄膜層内,亦可 作為内部反射層,以提昇光電轉效率,且該雜質聚集區係為 複雜之網狀差排缺陷,可用以陷住來自該提純冶金級矽材料 基板内之金屬雜質。 098112603 10 1013411297-0 1379430 101年10月24日按正替换頁 2 _====_€ 桃觀(編。 Cnemical Vapor Deposition, APC VD ) 〇 3 私細第1撕叙兼具⑽歧雜雜質阻隔 ^專膜”面層結構之製備方法,其中,該步驟(d)之蟲晶 處理係介於llOO'UOOoc範圍之溫度。 4·依,申請專利範圍第}項所述之兼具内部光反射與雜質阻隔
=4膜介面層結構之製備方法,其中,該高品妓晶石夕薄膜 層係可適用於磊晶矽薄膜太陽電池。
098112603 1013411297-0
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Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2009062117A1 (en) * 2007-11-09 2009-05-14 Sunpreme, Inc. Low-cost solar cells and methods for their production
US9324841B2 (en) * 2013-10-09 2016-04-26 Globalfoundries Inc. Methods for preventing oxidation damage during FinFET fabrication

Family Cites Families (43)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3961997A (en) * 1975-05-12 1976-06-08 The United States Of America As Represented By The Administrator Of The National Aeronautics And Space Administration Fabrication of polycrystalline solar cells on low-cost substrates
US4253882A (en) * 1980-02-15 1981-03-03 University Of Delaware Multiple gap photovoltaic device
US4377723A (en) * 1980-05-02 1983-03-22 The University Of Delaware High efficiency thin-film multiple-gap photovoltaic device
US4496788A (en) * 1982-12-29 1985-01-29 Osaka Transformer Co., Ltd. Photovoltaic device
US4598164A (en) * 1983-10-06 1986-07-01 Exxon Research And Engineering Co. Solar cell made from amorphous superlattice material
US4923524A (en) * 1985-05-06 1990-05-08 Chronar Corp. Wide ranging photovoltaic laminates comprising particulate semiconductors
JP2951146B2 (ja) * 1992-04-15 1999-09-20 キヤノン株式会社 光起電力デバイス
KR100280838B1 (ko) * 1993-02-08 2001-02-01 이데이 노부유끼 태양전지
US6072117A (en) * 1996-02-27 2000-06-06 Canon Kabushiki Kaisha Photovoltaic device provided with an opaque substrate having a specific irregular surface structure
US6184456B1 (en) * 1996-12-06 2001-02-06 Canon Kabushiki Kaisha Photovoltaic device
JP3327811B2 (ja) * 1997-05-13 2002-09-24 キヤノン株式会社 酸化亜鉛薄膜の製造方法、それを用いた光起電力素子及び半導体素子基板の製造方法
JPH1146006A (ja) * 1997-07-25 1999-02-16 Canon Inc 光起電力素子およびその製造方法
US6379521B1 (en) * 1998-01-06 2002-04-30 Canon Kabushiki Kaisha Method of producing zinc oxide film, method of producing photovoltaic element, and method of producing semiconductor element substrate
US6224736B1 (en) * 1998-01-27 2001-05-01 Canon Kabushiki Kaisha Apparatus and method for forming thin film of zinc oxide
KR20010079918A (ko) * 1998-09-25 2001-08-22 야마모토 카즈모토 반도체 기판과 그 제조 방법, 및 그것을 이용한 반도체디바이스와 그 제조 방법
FR2797093B1 (fr) * 1999-07-26 2001-11-02 France Telecom Procede de realisation d'un dispositif comprenant un empilement de plans de boites quantiques sur un substrat de silicium ou germanium monocristallin
US6592739B1 (en) * 1999-11-29 2003-07-15 Canon Kabushiki Kaisha Process and apparatus for forming zinc oxide film, and process and apparatus for producing photovoltaic device
JP4111669B2 (ja) * 1999-11-30 2008-07-02 シャープ株式会社 シート製造方法、シートおよび太陽電池
US6728281B1 (en) * 2000-02-10 2004-04-27 The Board Of Trustees Of The Leland Stanford Junior University Quantum-dot photon turnstile device
JP2002080998A (ja) * 2000-07-03 2002-03-22 Canon Inc 酸化亜鉛膜の製造装置、および酸化亜鉛膜の製造方法
US6329296B1 (en) * 2000-08-09 2001-12-11 Sandia Corporation Metal catalyst technique for texturing silicon solar cells
US6576112B2 (en) * 2000-09-19 2003-06-10 Canon Kabushiki Kaisha Method of forming zinc oxide film and process for producing photovoltaic device using it
WO2002091482A2 (en) * 2001-05-08 2002-11-14 Massachusetts Institute Of Technology Silicon solar cell with germanium backside solar cell
KR100414204B1 (ko) * 2001-05-31 2004-01-07 삼성전자주식회사 캐퍼시터 소자를 갖는 반도체 메모리 장치 및 그 형성 방법
JP2003128411A (ja) * 2001-10-18 2003-05-08 Sharp Corp 板状シリコン、板状シリコンの製造方法および太陽電池
JP2004289034A (ja) * 2003-03-25 2004-10-14 Canon Inc 酸化亜鉛膜の処理方法、それを用いた光起電力素子の製造方法
US7259084B2 (en) * 2003-07-28 2007-08-21 National Chiao-Tung University Growth of GaAs epitaxial layers on Si substrate by using a novel GeSi buffer layer
EP1774562B1 (en) * 2004-06-08 2012-02-22 Dichroic cell s.r.l. System for low-energy plasma-enhanced chemical vapor deposition
US7515777B2 (en) * 2004-12-09 2009-04-07 The Board Of Trustees Of The Leland Stanford Junior University Silicon-based Ge/SiGe optical interconnects
US7354831B2 (en) * 2005-08-08 2008-04-08 Freescale Semiconductor, Inc. Multi-channel transistor structure and method of making thereof
US7863157B2 (en) * 2006-03-17 2011-01-04 Silicon Genesis Corporation Method and structure for fabricating solar cells using a layer transfer process
JP2007281018A (ja) * 2006-04-03 2007-10-25 Mitsubishi Heavy Ind Ltd 光電変換装置及びその製造方法
DE102006042617B4 (de) * 2006-09-05 2010-04-08 Q-Cells Se Verfahren zur Erzeugung von lokalen Kontakten
US7442599B2 (en) * 2006-09-15 2008-10-28 Sharp Laboratories Of America, Inc. Silicon/germanium superlattice thermal sensor
US7498265B2 (en) * 2006-10-04 2009-03-03 Micron Technology, Inc. Epitaxial silicon growth
US8035028B2 (en) * 2006-10-09 2011-10-11 Solexel, Inc. Pyramidal three-dimensional thin-film solar cells
US20080178793A1 (en) * 2007-01-31 2008-07-31 Calisolar, Inc. Method and system for forming a higher purity semiconductor ingot using low purity semiconductor feedstock
US7955433B2 (en) * 2007-07-26 2011-06-07 Calisolar, Inc. Method and system for forming a silicon ingot using a low-grade silicon feedstock
JP2010536170A (ja) * 2007-08-08 2010-11-25 エージェンシー フォー サイエンス,テクノロジー アンド リサーチ 半導体構造および製造方法
US8273591B2 (en) * 2008-03-25 2012-09-25 International Business Machines Corporation Super lattice/quantum well nanowires
WO2010027782A2 (en) * 2008-08-25 2010-03-11 Orion Laboratories, Llc Magnesiothermic methods of producing high-purity solution
NO329987B1 (no) * 2009-02-26 2011-01-31 Harsharn Tathgar Halvkontinuerlig fremgangsmate for dannelse, separasjon og smelting av store, rene silisiumkrystaller
US7858427B2 (en) * 2009-03-03 2010-12-28 Applied Materials, Inc. Crystalline silicon solar cells on low purity substrate

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