丄MOM 九、發明說明： 【發明所屬之技術領域】 本發明係關於一種液晶顯示器。 【先前技術】 液晶顯示器因其具有低輻 特點，故於使用上日漸廣泛，且賴小及耗電低等 新，其種類亦日益繁多。 W相關技術之成熟及創 节液Γ顯閲f卜％但轉技術液晶顯示器之示意圖。 该液B日顯不器1 〇包括一液曰— 〜口 12、-掃描驅動器13、一;;^板U、-時序控制器 生器15。該掃描驅動器13及續 =4及一公共電磨產 液晶顯示面板U，該時序控制〜動裔14用於驅動該 液晶顯示面板丨丨提供公共電壓。Μ裔5用於為泫 131(G1 ^ 了顯不面板11包括複數平行之掃描線 資料線14^ 行且與該掃指、線131、絕緣垂直相交之 16…# 卜001)、一公共電壓線1〇卜複數薄膜電晶體 之nif素電極17及—與該複數晝素電極p相對設置 la共电極18。 =膜電晶體16之閘極連接至該掃描線i3i，源極連 芦料線141 ’没極連接至該晝素電極17。該公共電 )U 1 5經由戎公共電壓線} 〇 1連接至該公共電極 八^旦素電極17與該公共電極18構成一液晶電容Clc 〇 V A /、電壓線1〇1平行於該資料線141設置於該液晶顯示 7 1377533 面板11之一側。與該掃描線131及該資料線141絕緣。 。亥牯序控制盗12產生複數掃描同步訊號用於控制該 掃描驅動器13，以及複數該資料同步訊號用於控制該資料 驅動器14。 ' 該掃描驅動器13根據掃描同步訊號依次提供複數掃 號至該掃描線13丨，該掃描線131所連接之複數薄膜 電晶體16依次導通。在該掃描線131被掃描時，該資料驅 動器14根據資料同步訊號提供複數灰階電壓至該複數資 料線141。該灰階電壓經由對應導通之薄膜電晶體16施加 至s亥晝素電極17。 該公共電壓產生器15產生一 5V直流公共電壓, »亥A /、電I Vc()m經由g玄公共電壓線1 〇 1施加至該公共電極 17 ’用於驅動該液晶顯示面板丨J。 通常，該公共電壓線10丨與該資料線141之間具有一 閘極絕緣層，於是該公共電壓線1〇1與該資料線141之間 形成一寄生電容。故而當該複數資料線141之灰階電壓值 快速變化時，該公共電壓線101上之實際公共電壓會因液 晶電容clc之耦合作用而產生尖波（ripple)。從而使該液晶 顯不器10之顯示畫面發生串擾（crosstalk)，該液晶顯示器 1〇之顯示晝面質量降低。 【發明内容】 有鑑於此，提供一種顯示晝面質量較高之液晶顯示器 實為必要。 一種液晶顯示器，其包括一液晶顯示面板、一公共電 8 1377533 壓產生器及一公共電壓補償器。該液晶顯示面板包括一公 共電極、一第一公共電壓線及一第二公共電壓線。該公共 電壓補償器包括一輸入端及一輸出端。該公共電壓產生器 經由該第一公共電壓線連接至該公共電極。該公共電壓補 償器之輸入端經由該第一公共電壓線連接至該公共電極， 輸出端經由該第二公共電壓線連接至該公共電極。該公共 電壓產生器用於為該液晶顯示面板提供公共電壓，該公共 電壓補償器用於根據該實際公共電壓提供補償公共電壓至 該液晶顯示面板。 相較於先前技術，本發明液晶顯示器根據實際公共電 壓提供補償公共電壓，使得公共電壓保持穩定，因此該液 晶顯示器之顯示畫面不會發生串擾，進而具有較高之顯示 晝面質量。 【實施方式】 請參閱圖2，係本發明液晶顯示器20 —較佳實施方式 之示意圖。該液晶顯示器2 0包括一液晶顯示面板21、一 時序控制器22、一掃描驅動器23、一資料驅動器24、一 公共電壓產生器25及一公共電壓補償器29。該掃描驅動 器23及該資料驅動器24用於驅動該液晶顯示面板21，該 時序控制器22用於控制該掃描驅動器23及該資料驅動器 24。該公共電壓產生器25用於為該液晶顯示面板21提供 公共電壓。該公共電壓補償器29用於對該液晶顯示面板 21提供補償公共電壓。 該液晶顯示面板21包括複數平行之掃描線 9 1377533 231 (G1〜Gn)、複數平行且與該掃描線231絕緣垂直相交之 資料線241(D1〜Dm)、一第一公共電壓線201、一第二公共 電壓線202、複數薄膜電晶體26、複數晝素電極27及一與 該複數晝素電極2 7相對設置之公共電極2 8。 該公共電壓補償器包括一輸入端296及一輸出端297。 該薄膜電晶體26之閘極連接至該掃描線23 1，源極連 接至該資料線241，汲極連接至該晝素電極27。該晝素電 極27與該公共電極2 8構成·~~液晶電容Cic。該公共電壓產 生器25經由該第一公共電壓線201連接至該公共電極 28。該公共電壓補償器29之輸入端296經由該第一公共電 壓線201連接至該公共電極28，輸出端297經由該第二公 共電壓線202連接至該公共電極28。該第一及第二公共電 壓線201、202平行於該資料線241設置於該液晶顯示面板 21二側。該第一公共電壓線201及該第二公共電壓202線 與該掃描線231及該資料線241絕緣。 請一併參閱圖3，係該公共電壓補償器29之電路結構 示意圖。該公共電壓補償器29進一步包括一第一薄膜電晶 體291、一第二薄膜電晶體292、一隔直電容293、一第一 直流端294及一第二直流端295。該第一薄膜電晶體291 之閘極連接至該第一直流端294並連接至該第一薄膜電晶 體291之源極。該第一薄膜電晶體291之汲極經由該第二 薄膜電晶體292之汲極、源極連接至該第二直流端295。 該第二薄膜電晶體292之閘極連接至該輸入端296。該隔 直電容293之一端連接至第二薄膜電晶體292之汲極，另 之ΪΪ接至該輪出端297。該第一直流端294提供一2〇v 兩：甩壓電源Vgh，該第二直流端295提供一以之低電壓 # ’总 Vdd 〇 。亥序控制器22產生複數掃描同步訊號用於控制該 驅動裔23，以及複數資料同步訊號用於控制該資料驅 忒，描驅動器23根據掃描同步訊號依次提供掃描訊 ^至°亥知描線231，該掃描線231所連接之複數薄膜電晶 " 依人導通。在5亥掃描線23 1被掃描時，該資料驅動器 4根據資料同步訊號提供複數灰階電屢至該複數資料線 24卜該灰階電壓經由對應導通之薄膜電晶體％施加 晝素電極27。 、/亥，共電壓產生器25產生一 5V之公共電壓，用 =驅動4液晶顯示面板21。該公共電壓v議經由該第一 a共電壓線201施加至該公共電極28。 “二a 7、电壓補•斋29之輸入端296接收來自該第一公 共電壓線201之實際公共電壓，輸出端297輸出補償公共 電壓至該第二公共電壓線202。 通常，該公共電壓線201與該資料線241之間具有一 閘極'、&、.彖層，於疋该公共電壓線2〇丨與該資料線1之間 形成寄生電容。故當該複數資料線241之灰階電壓值快 速變化時，該公共電壓線201上之實際公共電壓會因液晶 電容clc之耦合作用而產生尖波（ripple)。 印一併參閱圖4，係該實際公共電壓與補償公共電壓 1377533 之波形圖。其中，係該帝 丘恭两TT/ A 电壓線201上之膏際公 W2係該補償公共電/二:具：向^戈向下方向之尖波。 门之大波，且與Wl之尖波對應，方向相反。 以tl〜t2期間為例對該公 行說明： 八电！補祕态之工作原理進 田W丨所不貝際公共電壓無 電晶體別之閘極連接至該第 二由於及弟一薄膜 薄膜雷日栌9cn、t 直仙·知294 ,所以該第一 得联电日日體291導通。該第二薄 至該第一公丑哈厫括Λ 、电日日體292之閘極連接 电屋線201，其閘極電壓為Ve。，所以 二缚膜電晶體2<59道.s , ^ com所以5亥第 电日日也292導通。此時該隔直電容293 -诚+颅& 變化，補償公共電壓為零。 一编电壓無 當W1所示實際公共電麼向下產生 時，第二薄膜電晶體292 、之大波 曰骑mo 闸独罨壓減小。該第二薄膜雷 曰日體292之閘極與源極間電麼^ ^ 、 阻增大。所以該第二薄膜=92:原極與沒極間導通電 擗士 —哲* 安曰曰體292之源極與沒極間分壓 =電膜電晶體292之沒極之電壓升高。該補償 於該隔直電容293之輕合作用產生一向上之正 電反之父波’如圖中w2波形所示。 當恥所示實際公共電壓向上 時，該第二薄膜電晶體292之__=於； =”2之間極與源極間電壓增大’源極二導通 ^ ^以該第二薄膜電晶體292之源極與沒極間分 ^減小。，亥弟二薄膜電晶體292之汲極之電壓降低。該補 1377533 償公共電壓由於該隔直電容293之耦合作用產 下之 負電壓之尖波，如圖中W2波形所示。 1 士母第公共電壓線2()1上之實際公共電壓產 生尖波…該公共㈣補償^ 29便輸出—相位相反之尖 波。該反方向之尖波經由該第二公共電麼線加施加至該 „’反相補償公共電麼之尖波，從而消除公共電 壓之尖波。 該液晶顯示器20包括 際公共電壓提供補償公共電 而該液晶顯示器之顯示晝面 之顯不晝面質量。 :公共電壓補償器用於根據實 壓’使公共電壓保持穩定，從 不會發生串擾，進而具有較高 事實上，只需滿足高電壓直流電源、範圍在15仏 V一 25V ’低電壓直流電源、、範圍在〇v^ 3·3ν即 可使本發明液晶顯示器具有較高之顯示晝面質量。 综上所述，本發明確已符合發明專利之要件，爰依法 ，出專利申請ϋ上所述者僅為本發明之較佳實施方 式，本發明之範圍並不以上述實施方式為限，舉凡孰習本 =技藝之人士援依本發明之精神所作之等效修飾或變化， 皆應涵蓋於以下申請專利範圍内。 【圖式簡單說明】 圖1係一種先前技術液晶顯示器之示意圖。 圖2係本發明液晶顯示器一較佳實施方式之示意圖。 圖3係圖2中公共電壓補償器之電路結構圖。 圖4係貫際公共電壓與補償公共電壓之波形圖。 13 1377533 【主要元件符號說明】 液晶顯不益 第一公共電壓線 第二公共電壓線 液晶顯不面板 時序控制器 掃描驅動器 掃描線 貧料驅動裔 資料線 公共電壓產生器 薄膜電晶體 畫素電極 27 公共電極 28 公共電壓補償器 29 第一薄膜電晶體 291 第二薄膜電晶體 292 隔直電容 293 第一直流端 294 第二直流端 295 輸入端 296 輸出端 297 14丄MOM IX. Description of the Invention: TECHNICAL FIELD OF THE INVENTION The present invention relates to a liquid crystal display. [Prior Art] Due to its low-spoke characteristics, liquid crystal displays are becoming more and more widely used, and they are becoming more and more diverse. The maturity of the W-related technology and the creation of a liquid crystal display. The liquid B display device 1 includes a liquid helium - port 12, a scan driver 13, a; a board U, a timing controller 15 . The scan driver 13 and the continuation = 4 and a common electro-grinding liquid crystal display panel U, the timing control ~ kinetic 14 is used to drive the liquid crystal display panel to provide a common voltage. Μ 5 5 is used for 泫 131 (G1 ^ display panel 11 includes a plurality of parallel scan line data lines 14^ and intersects the sweep finger, line 131, insulation perpendicularly 16...# 001), a common voltage The line 1 has a nifin electrode 17 of a plurality of thin film transistors and a la common electrode 18 is disposed opposite to the plurality of elemental electrodes p. = the gate of the membrane transistor 16 is connected to the scan line i3i, and the source connected to the strand line 141' is not connected to the halogen electrode 17. The common electric) U 1 5 is connected to the common electrode via the 戎 common voltage line 〇 1 and the common electrode 18 forms a liquid crystal capacitor Clc 〇 VA /, and the voltage line 1 〇 1 is parallel to the data line 141 is disposed on one side of the panel 11 of the liquid crystal display 7 1377533. The scanning line 131 and the data line 141 are insulated from each other. . The plurality of scan sync signals are used to control the scan driver 13, and the plurality of data sync signals are used to control the data driver 14. The scan driver 13 sequentially supplies a plurality of scans to the scan line 13A according to the scan sync signal, and the plurality of thin film transistors 16 connected to the scan line 131 are sequentially turned on. When the scan line 131 is scanned, the data drive 14 provides a complex gray scale voltage to the complex data line 141 based on the data sync signal. The gray scale voltage is applied to the sigma electrode 17 via the correspondingly turned-on thin film transistor 16. The common voltage generator 15 generates a 5V DC common voltage, and »H A /, I Vc()m is applied to the common electrode 17' via the g-home common voltage line 1 ’ 1 for driving the liquid crystal display panel 丨J. Generally, the common voltage line 10A and the data line 141 have a gate insulating layer, so that a parasitic capacitance is formed between the common voltage line 〇1 and the data line 141. Therefore, when the gray scale voltage value of the complex data line 141 changes rapidly, the actual common voltage on the common voltage line 101 generates a ripple due to the coupling of the liquid crystal capacitance clc. Thereby, the display screen of the liquid crystal display device 10 is crosstalked, and the quality of the display surface of the liquid crystal display device is lowered. SUMMARY OF THE INVENTION In view of the above, it is necessary to provide a liquid crystal display having a high quality of the kneading surface. A liquid crystal display comprising a liquid crystal display panel, a common power 8 1377533 pressure generator and a common voltage compensator. The liquid crystal display panel includes a common electrode, a first common voltage line and a second common voltage line. The common voltage compensator includes an input and an output. The common voltage generator is coupled to the common electrode via the first common voltage line. An input of the common voltage compensator is coupled to the common electrode via the first common voltage line, and an output is coupled to the common electrode via the second common voltage line. The common voltage generator is configured to provide a common voltage to the liquid crystal display panel, and the common voltage compensator is configured to provide a compensation common voltage to the liquid crystal display panel according to the actual common voltage. Compared with the prior art, the liquid crystal display of the present invention provides a compensation common voltage according to the actual common voltage, so that the common voltage remains stable, so that the display screen of the liquid crystal display does not crosstalk, and thus has a higher display quality. [Embodiment] Please refer to Fig. 2, which is a schematic view of a preferred embodiment of a liquid crystal display 20 of the present invention. The liquid crystal display 20 includes a liquid crystal display panel 21, a timing controller 22, a scan driver 23, a data driver 24, a common voltage generator 25, and a common voltage compensator 29. The scan driver 23 and the data driver 24 are used to drive the liquid crystal display panel 21, and the timing controller 22 is used to control the scan driver 23 and the data driver 24. The common voltage generator 25 is for supplying a common voltage to the liquid crystal display panel 21. The common voltage compensator 29 is for supplying a compensation common voltage to the liquid crystal display panel 21. The liquid crystal display panel 21 includes a plurality of parallel scanning lines 9 1377533 231 (G1 GGn), a plurality of parallel data lines 241 (D1 DDm) perpendicularly intersecting the scanning line 231, a first common voltage line 201, and a The second common voltage line 202, the plurality of thin film transistors 26, the plurality of halogen electrodes 27, and a common electrode 28 disposed opposite to the plurality of halogen electrodes 27. The common voltage compensator includes an input 296 and an output 297. The gate of the thin film transistor 26 is connected to the scan line 23, the source is connected to the data line 241, and the drain is connected to the germane electrode 27. The halogen electrode 27 and the common electrode 28 constitute a liquid crystal capacitor Cic. The common voltage generator 25 is connected to the common electrode 28 via the first common voltage line 201. An input 296 of the common voltage compensator 29 is coupled to the common electrode 28 via the first common voltage line 201, and an output 297 is coupled to the common electrode 28 via the second common voltage line 202. The first and second common voltage lines 201 and 202 are disposed on the two sides of the liquid crystal display panel 21 in parallel with the data line 241. The first common voltage line 201 and the second common voltage 202 line are insulated from the scan line 231 and the data line 241. Please refer to FIG. 3 together, which is a schematic diagram of the circuit structure of the common voltage compensator 29. The common voltage compensator 29 further includes a first thin film transistor 291, a second thin film transistor 292, a DC blocking capacitor 293, a first DC terminal 294 and a second DC terminal 295. The gate of the first thin film transistor 291 is connected to the first DC terminal 294 and is connected to the source of the first thin film transistor 291. The drain of the first thin film transistor 291 is connected to the second DC terminal 295 via the drain and source of the second thin film transistor 292. The gate of the second thin film transistor 292 is coupled to the input terminal 296. One end of the blocking capacitor 293 is connected to the drain of the second thin film transistor 292, and is further connected to the rounded end 297. The first DC terminal 294 provides a 2 〇v two: a rolling power source Vgh, and the second DC terminal 295 provides a low voltage # ‘total Vdd 〇 . The sequence controller 22 generates a plurality of scan sync signals for controlling the driver 23, and the plurality of data sync signals are used to control the data drive. The scan driver 23 sequentially supplies the scan signals to the display lines 231 according to the scan sync signals. The plurality of thin film electro-crystals connected to the scanning line 231 are turned on. When the 5 Hz scan line 23 1 is scanned, the data driver 4 supplies a plurality of gray scales to the plurality of data lines 24 according to the data sync signal. The gray scale voltage is applied to the pixel electrode 27 via the correspondingly turned on thin film transistor %. And /, the common voltage generator 25 generates a common voltage of 5V, and drives the liquid crystal display panel 21 with =. The common voltage v is applied to the common electrode 28 via the first a common voltage line 201. The input terminal 296 of the second a 7, voltage supplement, receives the actual common voltage from the first common voltage line 201, and the output 297 outputs the compensation common voltage to the second common voltage line 202. Typically, the common voltage line Between the 201 and the data line 241, there is a gate ', &, 彖 layer, a parasitic capacitance is formed between the common voltage line 2 〇丨 and the data line 1. Therefore, when the complex data line 241 is gray When the voltage value of the step changes rapidly, the actual common voltage on the common voltage line 201 will generate a ripple due to the coupling of the liquid crystal capacitor clc. Referring to FIG. 4, the actual common voltage and the compensation common voltage are 1373533. The waveform diagram. Among them, the Emperor Qiu Gong two TT / A voltage line 201 on the paste of the public W2 system of the compensation public electricity / two: with a sharp wave toward the downward direction of the ^ Ge. The big wave of the door, and The sharp wave of Wl corresponds to the opposite direction. Take the period of tl~t2 as an example to explain the public line: Eight electric power! The working principle of the secret state is entered in the field. The common voltage of the non-battery is not connected to the gate. Second, due to the film of a thin film, Lei Riqi 9cn, t Xian·zhi 294, so the first to get the U.S. day 291 to turn on. The second thin to the first public ugly Harbin 、, the electric Japanese body 292 the gate connected to the electric house line 201, its gate voltage For Ve., so the two-bonded transistor 2 < 59 s. s, ^ com so 5 hai electric day is also 292 conduction. At this time the blocking capacitor 293 - Cheng + cranial & change, the compensation public voltage is zero When the voltage of the voltage is not the same as the actual public power indicated by W1, the second thin film transistor 292, the large wave 曰 mo mo mo mo 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 The source is between ^ ^ and the resistance is increased. Therefore, the second film = 92: the pole between the primary pole and the pole is energized. The gentleman - Zhe * The body of the body 292 is separated from the source and the voltage between the electrodes. The voltage of the eccentricity of the transistor 292 rises. The compensation for the light cooperation of the DC blocking capacitor 293 produces an upward positive power and the parent wave 'as shown by the w2 waveform in the figure. When the actual common voltage is indicated by shame The voltage of the second thin film transistor 292 is increased by __=; and the voltage between the source and the source is increased between the source and the source of the second thin film transistor 292. And the non-polar points ^ reduce. The voltage of the bungee of the 292 second film transistor 292 is lowered. The supplement 1377533 compensates for the sharp voltage of the negative voltage generated by the coupling of the DC blocking capacitor 293, as shown by the waveform of W2 in the figure. 1 The actual common voltage on the common voltage line 2 () of the mother is generated by the sharp wave... The common (four) compensation ^ 29 is output - the opposite phase of the sharp wave. The sharp wave in the opposite direction is applied to the sharp wave of the inverted common compensation circuit via the second common electric wire, thereby eliminating the sharp wave of the common voltage. The liquid crystal display 20 includes the common voltage to provide compensation for the public power. The display of the liquid crystal display shows the quality of the surface. The common voltage compensator is used to stabilize the common voltage according to the real voltage, and crosstalk does not occur, so that it has a high degree of fact, and only needs to satisfy the high voltage DC. The power supply, the range of 15 仏V to 25V 'low voltage DC power supply, the range of 〇v^3·3ν can make the liquid crystal display of the invention have higher display surface quality. In summary, the present invention has indeed met The requirements of the invention patents, the patent application, and the patent application are only preferred embodiments of the present invention, and the scope of the present invention is not limited to the above embodiments, and those who are skilled in the art Equivalent modifications or variations of the spirit of the invention are intended to be included within the scope of the following claims. BRIEF DESCRIPTION OF THE DRAWINGS Figure 1 is a schematic illustration of a prior art liquid crystal display. 2 is a schematic diagram of a preferred embodiment of the liquid crystal display of the present invention. Fig. 3 is a circuit diagram of the common voltage compensator of Fig. 2. Fig. 4 is a waveform diagram of a common common voltage and a compensation common voltage. 13 1377533 [Main component symbol Description] LCD display is not beneficial first common voltage line second common voltage line liquid crystal display panel timing controller scan driver scan line poor material driven data line common voltage generator thin film transistor pixel electrode 27 common electrode 28 common voltage compensation 29 first thin film transistor 291 second thin film transistor 292 DC blocking capacitor 293 first DC terminal 294 second DC terminal 295 input terminal 296 output terminal 297 14