TWI333677B - Method of manufacturing spacer - Google Patents

Description

P950244 22620twf.doc/n 九、發明說明： 【發明所屬之技術領域】 本發明是有關於一種半導體結構的製造方法， 是有關於一種L型間隙壁的製造方法。 ’且特別 【先前技術】 隨著電腦與電子產品功能的加強，應用電路亦 雜，基於成本與穩定性的考量，積體電路内所要求電a曰^ 的密度也就大大地增加。但是要在一個積體電路上擁有卵 大的密度，並非單純地減少積體電路内元件的大小比例ς 可達到，因為佈局大小比例的改變，一則要受到設計準則 (Design Rule)與製程上的限制；一則亦需詳加考慮元件 物理特性上的改變。 請參照圖1，以金氧半導體電晶體(M〇s)為例，基底 100上的兩個]ViOS電晶體11〇、12〇之間的距離相當靠近， 加上M0S電晶體11〇的閘極115，以及M〇s電晶體12〇 的閘極125側壁又分別設置有間隙壁n7、127。由於間隙 壁117、127是呈現弧狀，使得兩個m〇s電晶體之間的距 離又更加縮短，在後續製作接觸窗140的過程中，很容易 就會產生填塞(filling)不良的情形，造成孔洞(v〇id)13〇的形 成。此外，由於閘極U5、125可能有不平整的輪廓側壁， 這些情形，在高電壓的操作下，很容易導致漏電的問題， 影響元件的電性表現。 【發明内容】 有鑑於此’依照本發明實施例之目的就是在提供一種 1J33677 P950244 22620twf.doc/n 間隙壁的製造方法，可以利用聚合物層作為罩幕，利用一 道蝕刻製程即形成L型間隙壁。 依照本發明提供實施例之再—目的是提供—種間隙壁 2造方法，介電解析增進塗佈技術形成的保護層作為 罩幕’而形成L型的間隙壁。 本發明提出-種L型間隙壁的製造方法，先提供基 底，基底上已軸有突起結構。錢，於基底上形成^ 材料’覆蓋住突起結構。接著，實施移除介電材料步驟， 於此步驟㈣移較起結構頂部與部分基底上之介電材 料，留下L型間隙壁。 依照本發明實施例所述之間隙壁的製造方法，其中移 除介電材料步驟包含了先於介電材料上形成_層聚合物 層，聚合物層與介電材料具有不同的蝕刻選擇比。然後進 行钱刻製知，包含移除部分聚合物層，形成聚合間隙壁， 之後以聚合間隙壁為罩幕，圖案化介電材料以形成L型間 隙壁。 依照本發明實施例所述之間隙壁的製造方法，其中聚 合物層的形成方法包括一介電解析增進塗佈技術(didectrie resolution enhancement coating technique)。 依照本發明實施例所述之間隙壁的製造方法，其中聚 合物層的材質包括碳氫氟化物。 依照本發明實施例所述之間隙壁的製造方法，其中餘 刻衣程為單一鞋刻製程(single etch process) 〇 依照本發明實施例所述之間隙壁的製造方法，其中钕 5 丄：〇：)0/ / P950244 22620twf.d〇c/n 刻製程為乾式钱刻製程。 於一發明實施例所述之間_的製造方法，更包括 於问在、度電漿蝕刻器中進行蝕刻製程。 依照本糾實關所紅邮P950244 22620twf.doc/n IX. Description of the Invention: TECHNICAL FIELD The present invention relates to a method of fabricating a semiconductor structure, and to a method of fabricating an L-type spacer. 'Specially' [Prior Art] With the enhancement of the functions of computers and electronic products, the application circuits are also complicated. Based on the consideration of cost and stability, the density of the required electrical capacitance in the integrated circuit is greatly increased. However, to have a large density of eggs on an integrated circuit, it is not simply to reduce the size ratio of the components in the integrated circuit. Because of the change in the layout size, one is subject to the Design Rule and the process. Limitations; one also needs to consider the changes in the physical characteristics of the components. Referring to FIG. 1, taking the MOS transistor (M〇s) as an example, the distance between the two VIOS transistors on the substrate 100 is relatively close, and the gate of the M0S transistor 11〇 is added. The poles 115, and the sidewalls of the gates 125 of the M〇s transistors 12A are further provided with spacers n7, 127, respectively. Since the spacers 117 and 127 are curved, the distance between the two m〇s transistors is further shortened, and in the subsequent process of making the contact window 140, it is easy to cause a poor filling. Causes the formation of holes (v〇id) 13〇. In addition, since the gates U5, 125 may have uneven profile sidewalls, in the case of high voltage operation, it is easy to cause leakage problems, affecting the electrical performance of the components. SUMMARY OF THE INVENTION In view of the above, it is an object of the present invention to provide a method for manufacturing a 1J33677 P950244 22620twf.doc/n spacer, which can utilize an polymer layer as a mask to form an L-shaped gap by an etching process. wall. A further object of the present invention is to provide a spacer 2 manufacturing method in which a dielectric layer formed by a dielectric analysis enhancing coating technique is used as a mask to form an L-shaped spacer. The present invention proposes a method of manufacturing an L-shaped spacer, which first provides a substrate having a raised structure on the substrate. Money forms a material on the substrate to cover the protrusion structure. Next, a step of removing the dielectric material is performed, and in this step (4), the dielectric material on the top portion and the portion of the substrate is removed, leaving an L-shaped spacer. According to a method of fabricating a spacer according to an embodiment of the invention, the step of removing the dielectric material comprises forming a layer of a polymer layer prior to the dielectric material, the polymer layer having a different etching selectivity than the dielectric material. Then, it is known to remove the polymer layer to form a polymeric spacer, and then the dielectric spacer is used as a mask to pattern the dielectric material to form an L-type spacer. A method of manufacturing a spacer according to an embodiment of the invention, wherein the method of forming the polymer layer comprises a didectrie resolution enhancement coating technique. A method of manufacturing a spacer according to an embodiment of the invention, wherein the material of the polymer layer comprises a hydrocarbon hydrofluoride. A manufacturing method of a spacer according to an embodiment of the present invention, wherein the remaining garment process is a single shoe etch process, and a method for manufacturing a spacer according to an embodiment of the present invention, wherein 钕5 丄:〇 :)0/ / P950244 22620twf.d〇c/n The engraving process is a dry-money engraving process. The method of manufacturing between the embodiments of the invention further includes performing an etching process in the plasma plasma etcher. According to this correction, the redmail

_ =本發明實施例所述之間隙壁妙造方法，其中於 ;案化"電材料的步驟+，更包括-併移除部分聚合間隙 受0 依照本發明實施例所述之間隙壁的製造方法， 於形成間隙壁之後，移除剩餘之聚合間隙壁。 依照本發明實施例所述之間隙壁的製造方法，其中移 除剩餘之聚合_㈣方法包括乾式剝除光阻法與剝 除光阻法。 …_ = a method for fabricating a spacer according to an embodiment of the present invention, wherein the step of + "removing the electrical material" further includes - and removing a portion of the polymerization gap from 0 to the spacer according to the embodiment of the present invention. The manufacturing method removes the remaining polymeric spacers after forming the spacers. A method of manufacturing a spacer according to an embodiment of the present invention, wherein the method of removing the remaining polymerization_(4) comprises a dry stripping photoresist method and a stripping photoresist method. ...

依照本發明實施例所述之間隙壁的製造方法，其中介 電材料的材質包括氧化矽、氮化矽或氮氧化矽。〃 依照本發明實施例所述之間隙壁的製造方法，其中突 起結構為閘極結構。 〃 本發明提出另一種間隙壁的製造方法，先提供基底， 基底上已形成有突起結構。之後，於基底上形成一層介電 材料，覆蓋住突起結構。以介電解析增進塗佈技術(didectfic resolution enhancement coating technique)於基底上形成一層 保護層，保護層與介電材料具有不同的蝕刻選擇比。然後， 移除部分保護層而形成保護間隙壁。再以保護間隙壁為罩 6 1333677 P950244 22620twf.doc/n 幕’圖案化介電材料。 依照本發明實施例所述之間隙壁的製造方法，1 護層包括聚合物層。 ’、* -依照本發明實施例所述之間隙壁的製造方法，其 合物層的材質包括碳氫氟化物。 ’、♦ 依照本發明實施例所述之間隙壁的製造方法，其中 除部分保護層與圖案化介電材料的步驟為單1刻製程^ • 依照本發明實施例所述之間隙壁的製造方法，=包括 於乾式侧器中進行移除部分保護層與圖案化介電材$ 步驟。 依照本發明實施例所述之間隙壁的製造方法，其 式蝕刻器包括高密度電漿蝕刻器。 /、乙A method of manufacturing a spacer according to an embodiment of the invention, wherein the material of the dielectric material comprises cerium oxide, cerium nitride or cerium oxynitride. A method of manufacturing a spacer according to an embodiment of the present invention, wherein the protruding structure is a gate structure. 〃 The present invention proposes another method of manufacturing a spacer, which first provides a substrate on which a protrusion structure has been formed. Thereafter, a dielectric material is formed on the substrate to cover the protruding structure. A protective layer is formed on the substrate by a didectfic resolution enhancement coating technique, and the protective layer and the dielectric material have different etching selectivity ratios. Then, part of the protective layer is removed to form a protective spacer. Then, the protective spacer is used as a cover 6 1333677 P950244 22620twf.doc/n screen to pattern the dielectric material. According to a method of manufacturing a spacer according to an embodiment of the invention, the sheath comprises a polymer layer. ', * - A method of manufacturing a spacer according to an embodiment of the present invention, the material of which comprises a hydrocarbon fluoride. A method for manufacturing a spacer according to an embodiment of the present invention, wherein the step of removing a portion of the protective layer and the patterned dielectric material is a single-etch process, and the method for manufacturing the spacer according to the embodiment of the present invention , = is included in the dry side device to remove part of the protective layer and patterned dielectric material $ steps. According to a method of fabricating a spacer according to an embodiment of the invention, the etcher includes a high density plasma etcher. /, B

依照本發明實施例所述之間隙壁的製造方法，其中 式蝕刻器為高密度電漿多晶矽蝕刻器。 ” L 依照本發明實施例所述之間隙壁的製造方法，立 鲁 隙壁的剖面成L型。 ”間 依照本發明實施例所述之間隙壁的製造方法，其中於 圖案化介電材料的步驟中，更包括一併移除部分聚合間^ 依照本發明實施例所述之間隙壁的製造方法，更包括 於形成間隙壁之後，移除剩餘之聚合間隙壁。 依照本發明實施例所述之間隙壁的製造方法，其中 除剩餘之聚合間隙壁的方法包括乾式剝除光阻法鱼渴^ 除光阻法。 /…^ 7 ⑴ 3677 P950244 22620twf.doc/n 依照本發明實施例所述之間隙壁的製造方法，其中介 電材料的材質包括氧化矽、氮化矽或氮氧化矽。 照本發明實施例所述之間隙壁的製造方法，其中突起 結構包括閘極結構。 本發明以介電解析解析增進塗佈技術，於介電材料上形 成了一層保護層，利用保護層與介電材料蝕刻選擇比的差 在一道蝕刻步驟中，即可形成乙型的間隙壁。此方法 ，單，且相當容易控制，利用保護間隙壁的厚度，就可以 靠·作出不同寬度的L型間隙壁，能夠彈性地配合元件的需 求。 一為讓本發明之上述和其他目的、特徵和優點能更明顯 易懂，下文特舉實施例，並配合所附圖式，作詳細說明如 下。 【實施方式】 圖2A至圖2E是繪示本發明一實施例之一種間隙壁 製造流程剖面圖。 ★請參照圖2A，先提供基底200,基底2〇〇上已形成有 突，結構225。基底200例如是石夕基底。突起結構奶例 =是具有閘介電層210與閘極220之閘極結構。其中，閘 介電層210的材質例如是氧化石夕，問極22〇的材質例如是 擦雜多晶。 八然後’請參照圖2B，於基底上形成介電材料如 層230’覆蓋住突起結構225。介電層⑽的材質例如 疋乳化碎、氮切魏氧㈣，其形齡法例如是化學氣 8 1333677 P950244 22620twf.doc/n 相沈積法。接著，於基底200上形成一層聚合物層240， 此聚合物層240的形成方法例如是介電解析增進塗佈技術 (dielectric resolution enhancement coating technique)。此聚合物 層240的材質例如是碳氫氟化物(CxHyFz)，如三氟甲烧 (CHF3)、二氟甲烧(CHA)，或是不含氫之氟化碳(CxFy)， 如八氟丁烯(QF8)、六氟乙烷(C#6)、四氟化碳(cf4)，或者 是碳氫氟化物與氟化碳的混合物。聚合物層240例如是以According to a method of fabricating a spacer according to an embodiment of the invention, the etcher is a high density plasma polysilicon etcher. The manufacturing method of the spacer according to the embodiment of the present invention, the cross-sectional wall of the vertical gap is L-shaped. The method for manufacturing the spacer according to the embodiment of the present invention, wherein the dielectric material is patterned. In the step, the method further includes: removing a part of the polymerization space according to the embodiment of the invention, and further comprising removing the remaining polymerization spacer after forming the spacer. A method of manufacturing a spacer according to an embodiment of the present invention, wherein the method of removing the remaining spacers comprises a dry stripping method for removing fish. /...^ 7 (1) 3677 P950244 22620twf.doc/n A method of manufacturing a spacer according to an embodiment of the present invention, wherein the material of the dielectric material comprises ruthenium oxide, tantalum nitride or ruthenium oxynitride. A method of manufacturing a spacer according to an embodiment of the present invention, wherein the protruding structure comprises a gate structure. The present invention utilizes a dielectric analysis to enhance the coating technique, forming a protective layer on the dielectric material, and utilizing the difference in etching selectivity between the protective layer and the dielectric material. In a etching step, a B-type spacer can be formed. This method is simple and easy to control. By using the thickness of the protective spacer, it is possible to make L-shaped spacers of different widths to elastically match the requirements of the components. The above and other objects, features, and advantages of the present invention will become more apparent from the description of the appended claims appended claims [Embodiment] Figs. 2A to 2E are cross-sectional views showing a manufacturing process of a spacer according to an embodiment of the present invention. ★ Referring to Figure 2A, a substrate 200 is provided first, and a protrusion 225 is formed on the substrate 2 . The substrate 200 is, for example, a stone base. Projection structure milk example = is a gate structure having a gate dielectric layer 210 and a gate electrode 220. The material of the gate dielectric layer 210 is, for example, oxidized stone, and the material of the gate 22 is, for example, a rubbed polycrystal. Eight then, please refer to FIG. 2B, in which a dielectric material such as layer 230' is formed over the substrate to cover the protrusion structure 225. The material of the dielectric layer (10) is, for example, cerium emulsified ash, nitrogen oxydisulfide (IV), and its ageing method is, for example, chemical gas 8 1333677 P950244 22620 twf.doc/n phase deposition method. Next, a polymer layer 240 is formed on the substrate 200. The formation method of the polymer layer 240 is, for example, a dielectric resolution enhancement coating technique. The material of the polymer layer 240 is, for example, a hydrocarbon hydrofluoride (CxHyFz) such as trifluoromethane (CHF3), difluoromethane (CHA), or hydrogen-free carbon fluoride (CxFy), such as octafluorocarbon. Butene (QF8), hexafluoroethane (C#6), carbon tetrafluoride (cf4), or a mixture of hydrocarbon fluoride and fluorinated carbon. The polymer layer 240 is, for example,

電漿化學氣相沈積法所形成的，其厚度可以是依照元件的 需求而定。 在一實施例中，上述聚合物層240可以是使用lam 9100之钱刻器（etcher)，配合控制反應中的沈積/钱刻率 (deposition/etchingratio)之方法(recipe)，於介電層 23〇 上 成之。關於聚合物層240的形成方法，可參照： ： 請號第09/978,546號的全部或部*方法盘衫= 此一併做為參考。 令在The thickness of the plasma chemical vapor deposition method can be determined according to the requirements of the component. In one embodiment, the polymer layer 240 may be an etcher using lam 9100, in conjunction with a deposition/etching recipe for controlling the reaction, on the dielectric layer 23 〇上成成. Regarding the method of forming the polymer layer 240, reference may be made to: : All or part of the method No. 09/978,546, the method of shirting = this is also taken as a reference. In

繼而’請參關2C，絲部分料 聚合間隙壁245，移除的方法例如是乾式_法。=成 請參照圖2D’以聚合間隙壁245為罩幕 ^， 230以形成間隙壁235 ’圖案化的方法例如是^=二％層 所形成的間隙壁235的剖面呈乙型。疋乾式蝕刻法。 在一實施例中，移除部分聚合物厗 / 電層 ϋ刻製 隙壁245，而後以聚合間隙* 24 ^ 〇，形成聚合間 早 230以形成間隙壁235，這些步驟，例如’ ^案化介 程(single etch process)所形成的。 用 9 1333677 P950244 22620twf.doc/n 舉例以，㈣倾可叹在高紐電㈣刻 牆r)，如高密度電漿多晶独刻器(HDp购灿的中進 仃’利用回侧的方式，先對聚合物層24〇進行 以 形成聚合間隙壁245。絲，繼續進賴刻，由於聚合間 隙壁245與介電層230具有不同的姓刻選擇比，介電層挪 ===Γ，聚合間隙壁245可以作為“介 屯曰〇的罩幕之用，進而形成L型的間隙壁235。當然，Then, please refer to 2C, the wire portion is aggregated to the partition 245, and the method of removal is, for example, a dry method. Referring to Fig. 2D', the method of patterning the spacers 235' with the polymeric spacers 245, 230, for example, is formed by a ^=2% layer. Dry etching. In one embodiment, a portion of the polymer germanium/electric layer engraved spacers 245 are removed, and then the interstitial spaces 230 are formed by the polymerization gaps*24^〇 to form the spacers 235, such as '^ Formed by the single etch process. Use 9 1333677 P950244 22620twf.doc/n for example, (4) sigh in the high-voltage (four) engraved wall r), such as high-density plasma polycrystalline single engraver (HDp buy can't use the back side of the way) First, the polymer layer 24 is first formed to form a polymeric spacer 245. The filament continues to enter, since the polymeric spacer 245 and the dielectric layer 230 have different surrogate ratios, the dielectric layer shifts ===Γ, The polymeric spacer 245 can be used as a "meal mask" to form an L-shaped spacer 235. Of course,

钱刻介電層23G的過程中，部分聚合間隙壁245也^隨之 一併被移除，而剩下聚合間隙壁245a。 曰 換句話說’由於聚合物層24〇是以介電解析增進塗佈 技術所形成的，其與介電層23〇置於蝴器中，可以利用單— 钱刻製程’輕易地對這兩層進行侧而形成L型的間隙壁 235。在-實施例中，此單一铜製程自始至終甚至可以使用 相同的壓力、氣體麵、氣贿量等條件，大幅 間，降低製程的複雜度 $During the process of engraving the dielectric layer 23G, a portion of the polymeric spacers 245 are also removed along with the polymeric spacers 245a. In other words, 'Because the polymer layer 24 is formed by dielectric analysis and coating technology, it is placed in the butterfly with the dielectric layer 23, and can be easily used for the two-money process. The layer is laterally formed to form an L-shaped spacer 235. In the embodiment, the single copper process can even use the same pressure, gas surface, gas brittle amount and the like, greatly reducing the complexity of the process.

特別說明的是’若是要形成較寬的間随235(即間隙 壁235L型的底部較長）’則可以沈積較厚的聚合物層24〇, 使後續形成的聚合間隙壁245a厚度增加，則下方形成的間 隙壁235也會比較寬。換言之，間隙壁23S的寬度（即間 隙壁235L型的底部）可以藉由控制聚合物層施的厚度而 調整，更有助於配合元件的設計需求，無論是高壓元件或 是低壓元件都可以適用。 接著，請參照圖2£，移除剩餘之聚合間隙壁245a， 留下位於突起結構225兩側之L型間隙壁235。移除聚合 P950244 22620twf.d〇c/n 除取人門蚣辟 ’、田然，也可以是先以乾式蝕刻剥 例:二：Ί45&’錢再以濕式姓刻清洗之 。在一實施 二例如是以乾式剝除光阻與赋齡総來移除聚 δ間隙壁245a。 ^述實補可知’本發日月利时電解析增進塗佈技 "丨電層上喊了聚合物層。由於這—層聚合物層與 ”电層之間具有不__選擇比，因此可以利用單一 =刻衣程’在同-個㈣II巾逐步地移除部分聚合物層與 J電層，而形成L型的間隙壁。 現 此間隙壁的製造方法相當單純而不複雜，無須經過進 出爐官等升溫、降溫的步驟，可以大幅地縮短製造流程， 且對於_㈣寬度也可轉得很精麵控制，不論是高 壓元件或是低壓元件都可以應用本發明之製造方法。此 卜應用本發明之方法所形成的間隙壁，還能夠預防於後 續接觸窗+生成孔洞，進而防止漏電，增進元件的電性表 雖然本發明已以實施例揭露如上，然其並非用以限定 本發明，任何所屬技術領域中具有通常知識者，在不脫離 本發明之精神和範圍内，當可作些許之更動與潤飾，因此 本發明之保護範圍當視後附之申請專利範圍所界定者為 準。 ’ 【圖式簡單說明】 圖1是繪示已知金氧半導體電晶體之結構剖面圖。 1333677 P950244 22620twf.doc/n 圖2A至圖2E是繪示本發明一實施例之一種間隙壁的 製造流程剖面圖。 【主要元件符號說明】 100、200 :基底 110、120 : MOS 電晶體 115、125、220 :閘極 117、127 :間隙壁 130 :孔洞 210 :閘介電層 225 :突起結構 230 :介電層 235 :間隙壁 240 :聚合物層 245、245a :聚合間隙壁 12In particular, 'If a wider space is to be formed with 235 (ie, the bottom of the spacer 235L type is longer)', a thicker polymer layer 24〇 can be deposited to increase the thickness of the subsequently formed polymeric spacer 245a. The spacer 235 formed below will also be relatively wide. In other words, the width of the spacer 23S (ie, the bottom of the spacer 235L type) can be adjusted by controlling the thickness of the polymer layer, which is more suitable for the design requirements of the component, whether it is a high voltage component or a low voltage component. . Next, referring to FIG. 2, the remaining polymeric spacers 245a are removed leaving the L-shaped spacers 235 on either side of the raised structures 225. Remove the aggregate P950244 22620twf.d〇c/n In addition to taking the door to open ‘, Tian Ran, it can also be first dry etching etched: two: Ί 45 & 'money and then cleaned with a wet name. In one embodiment, for example, the photoresist spacers and the ageing defects are removed by dry stripping to remove the polyδ spacers 245a. ^Reported to know that 'this hair, the day of the month, the analysis of the time to improve the coating technology " on the electric layer shouted the polymer layer. Since there is no __select ratio between the layer of the polymer layer and the "electric layer, a part of the polymer layer and the J layer can be gradually removed in the same (four) II towel by using a single = etched process. L-shaped spacers. Now the manufacturing method of the spacers is quite simple and not complicated. It does not need to go through the steps of heating and cooling, such as entering and leaving the furnace, which can greatly shorten the manufacturing process, and can also be very fine for the width of _(4). Control, whether it is a high-voltage component or a low-voltage component, the manufacturing method of the invention can be applied. The spacer formed by the method of the invention can also prevent the subsequent contact window + generating holes, thereby preventing leakage and improving component The present invention has been disclosed in the above embodiments, but it is not intended to limit the invention, and any person skilled in the art can make some changes without departing from the spirit and scope of the invention. The scope of protection of the present invention is defined by the scope of the appended claims. ' [Simple Description of the Drawings] Figure 1 is a diagram showing a known MOS semiconductor. 1333677 P950244 22620twf.doc/n FIG. 2A to FIG. 2E are cross-sectional views showing a manufacturing process of a spacer according to an embodiment of the present invention. [Description of Main Components] 100, 200: Substrate 110, 120 : MOS transistor 115, 125, 220: gate 117, 127: spacer 130: hole 210: gate dielectric layer 225: protrusion structure 230: dielectric layer 235: spacer 240: polymer layer 245, 245a: polymerization Clearance wall 12

Claims (1)

1333677 厂 99-8-24 I年月t 十、申謗專利範面： I--^ 1. 一種間隙壁的製造方法，包括： &供基底’該基底上已形成有一突起結構； 於該基底上形成-介電材料，覆蓋住該突起許構. 輿二:護層完全覆蓋於該介電材料之上，；保護層 與該；丨電材料具有不同的蝕刻選擇比；以及 型間=移除部分娜護層與部分該介電材㈣形成一 l1333677 Factory 99-8-24 I Year Month 10, Shenyi Patent Specification: I--^ 1. A method for manufacturing a spacer, comprising: & substrate for forming a protrusion structure on the substrate; Forming a dielectric material on the substrate to cover the protrusion. 舆2: the cover layer completely covers the dielectric material; the protective layer and the 丨 electric material have different etching selectivity ratios; and the type = Removing a portion of the protective layer and a portion of the dielectric material (4) to form a l 立由專利範圍第1項所述之間隙壁的製造方法’ 其中該保濩層包括一聚合物層。 3·如申請專利範圍第2項所述之間隙壁的製造方法， 其中同時移除部分該保護層與部分該介電材料之步驟包 括· 進行一蝕刻製程，包括： 移除部分該聚合物層，形成一聚合間隙壁；以及 以該Ι合間隙壁為罩幕，圖案化該介電材料以形 成該L型間隙壁。 4.如申請專利範圍第3項所述之間隙壁的製造方法， 其中該聚合物層的形成方法包括—介電解析增進塗佈技術 (dielectric resolution enhancement coating technique) * 5·如申請專利範圍第3項所述之間隙壁的製造方法， 其中該聚合物層的材質包括碳氫氟化物。 6.如申凊專利範圍第3項所述之間隙壁的製造方法， 其中該蝕刻製程為單一姓刻製程(single etch巩〇cess)。 13 1333677 λ如^專利綱第3項所述之職㈣製造方法， ，、中該蝕刻製程為一乾式蝕刻製程。 &如μ柄制第3撕叙_壁㈣造方法， 匕括於—高妓電漿侧Μ進行祕刻製程。 盆由!專利範㈣8獅述之間隙壁㈣造方法， 八5>t向雄度电漿敍刻器為一高密度電渡多曰;豹丨》» (HDP p〇ly etcher) 〇 錢電漿^日軸刻盗 法專利範圍第3項所述之間隙壁的製造方 法’其中㈣案倾介電材料的步驟中 部分該聚合間隙壁。 诉和除 11. Μ請糊制f3項料 =包括於形成該L型間隙壁之後，移除剩= 12. 如申請專利範圍第u 法，其中移除嶋之該聚合間_的=㈣製造方 阻法與濕摘除光崎。 ㈣料括乾式剝除光 13. 如申請專利範圍第丨項 ::其中該介電材料的材質包括氧化發、;化== 法，一V:構述，壁的製造方 14The method for producing a spacer according to the first aspect of the invention, wherein the protective layer comprises a polymer layer. 3. The method of manufacturing a spacer according to claim 2, wherein the step of simultaneously removing a portion of the protective layer and a portion of the dielectric material comprises: performing an etching process, comprising: removing a portion of the polymer layer Forming a polymeric spacer; and patterning the dielectric material to form the L-shaped spacer with the barrier spacer as a mask. 4. The method for producing a spacer according to claim 3, wherein the method for forming the polymer layer comprises: a dielectric resolution enhancement coating technique; The method for producing a spacer according to any of the preceding claims, wherein the material of the polymer layer comprises a hydrocarbon fluoride. 6. The method of manufacturing a spacer according to claim 3, wherein the etching process is a single etch process. 13 1333677 λ, as described in the third paragraph of the patent (4) manufacturing method, , the etching process is a dry etching process. & For example, the method of making the third tearing _ wall (four) of the stalk is carried out in the sorghum plasma side sill for the secret engraving process. Potted by! Patent Fan (4) 8 lion's gap wall (four) manufacturing method, eight 5 > t to the male plasma scriber for a high-density electric ferry; leopard 丨» (HDP p〇ly etcher) 〇钱The manufacturing method of the spacer described in the third aspect of the patent application method of the third aspect of the invention is a portion of the polymerization spacer in the step of (d) discarding the dielectric material. v. and 11. In addition to the paste f3 item = included in the formation of the L-shaped spacer, remove the remaining = 12. As in the scope of the patent application, the method of removing the 聚合 of the polymerization _ = (4) manufacturing Square resistance method and wet removal of Kawasaki. (4) Covering the dry stripping of light 13. If the scope of the patent application is ::: :: the material of the dielectric material includes oxidized hair, chemistry == method, one V: configuration, wall manufacturer 14