九、發明說明： 【發明所屬之技術領域】 本發明侧於-顯示面板與其控制電路構裂賴，制是指一 種利用導電雜隔絲，可避斜線_發生腐敗顯示面板與 其控制電路構裝結構。 【先前技術】 隨著市場上對於高晝質與薄型化顯示器的需求帶動下，液晶顯 示面板的封裝型式也朝向高腳數(high pin _t)與超細間距(flne pitch)的趨勢發展。 液晶顯示面板主要包含有-陣列基板(array substrate)、一彩色 濾光片基板(CF substrate)，以及設置於其中之液晶分子層。陣列基 板上會佈設許多金屬導線圖案，以供給控制電路(驅動忙)將控制 訊號，如掃描訊號、資料訊號或共通電極訊號傳遞至薄膜電晶體 或共通電極’藉此控制液晶顯示面板的灰階。 一般而言液晶顯示面板於製作完成後會進行一可靠度測試，讓 液晶顯示面板處於高溫與高溼度的環境中進行長時間的操作，藉 由在上述惡劣的環境下檢測出液晶顯示面板之可靠度，然而在^ 靠度測試的過程中卻容易使金屬導線圖案產生腐蝕問題，特別是 對於傳遞高壓訊號的金屬導線而言。而一旦金屬導線圖案發生腐 蝕現象，將導致導線之電阻值發生變化而影響訊號之傳遞，腐蝕 1321234 問題嚴重時甚至會造成斷線。一般而言，腐蝕現象發生的原因主 要係金屬導線圖案之封止膠材的溼氣隔絕能力不足，配合上電場 強度過大所導致。 明參考第1圖’第1圖為習知一液晶顯示面板之控制電路構裝 結構的示意圖。如第i騎示，液晶顯示面板包含有—陣列基板 10 ’且陣列基板1〇之周邊包含有一控制電路連接區12。陣列基板 ίο上由下而上依序包含有一第一金屬層圖帛、一絕緣層％、一 第二金屬層圖案18 —保護層2〇，其中絕緣層16包含有一外引 腳接口開口 22 ’暴露出部分第一金屬層圖案14，而保護層2〇則 包含有-第二金屬層開σ 24，暴露出部分第二金屬層圖案18。另 外’陣列基板10另包含有—透明導電層％，藉由外⑽接合開口 22與第二金屬制口 24電性連接第—金屬賴案 層圖案18。 上述為陣列基板1G上之金屬導線_之配置，而習知控制電 路構裝結構另包含控制晶#構裝結構3()，並藉由—導電㈣與透 明導電層26電性連接，藉此控制晶片構裝結構3()所發出之㈣ 訊號可經由導電膠28、透明導電層％、第一金屬層圖案㈣第 -金屬層_ 18傳遞至_基板1()，以控制液晶顯示面板。 =斤述’金屬導線圖案產生顧現象的主要原因為金屬導線 圖案之封止騎的賊隔絕能力不足，而於習知液碑示面板之 1321234 控制電路構裝結構中，導電膠28與控制晶片構裝結構30僅覆蓋 於外引腳接合開口 22之上，而並未覆蓋於控制電路連接區12内 之其它區域，例如第二金屬層開口 24上，換言之第二金層層開口 24上僅覆蓋有透明導電層26，然而透明導電層％之溼氣隔絕能 '： 力不佳，在此狀況下若金屬導線圖案中相鄰之導線存在有較大之 … 電位差時’例如當一導線係用於傳輸一高電位訊號(如Vgh),而其 相鄰之導線係用於傳輸一低電位訊號(如Vc〇m)，則不論是第一金 _ 屬層圖案14或是與之電性連接之第二金屬層圖案18均極易產生 腐银問題。 【發明内容】 匕本發月之目的之一在於提供一顯示面板與其控制電路構 裝結構，以避免導線圖案產生腐蝕問題。 為達上述目的，本發明之一較佳實施例提供一顯示面板包含有 車歹i基板控制電路連接區、一導線圖案、一絕緣層覆蓋於 、-透明導電層設置於該絕緣層之上、一導電膜 ==導電層與該_之上，錢—_賴結構 §又置於該導電膠之表面。該絕緣層具有複數個利腳接合開口， 案開口’暴露出部分該導線圖案。該透明導電 第雜如與該導線圖 電連接^ Ί片構魏構藉由該導電膠與該透明導電層 電性連接。該彻完峨魏緣層爾外細合開口與 1321234 該等導線圖案開口所暴露出之該導線圖案。 為達上述目的，本發明之另一較佳實施例提供一顯示面板之控 制電路構裝結構。上述控制電路構裝結構包含有一基板、一導線 •圖案佈設於該基板上、一絕緣層覆蓋於該導線圖案之表面、一透 〃 明導電層設置於該絕緣層之上、一導電膠設置於該透明導電層與 該絕緣層之上’以及-控制晶片構裝結構設置於該導電膠之表 鲁面。該絕緣層具有複數個外引腳接合開口，以及複數個導線圖案 開口’暴露出部分該導線圖案。該透明導電層透過該等外引腳接 合開口 ’以及該等導線圖案開口與該導線圖案電性連接。該導電 膠係對應各該料腳接合開σ與各該導賴·口，且該導電膠 之尺寸大於树外5丨腳接合開口之尺寸與各該導線_開口之尺 寸藉此該導電谬完全覆蓋各該外引腳接合開口與各該導線圖案 開口所暴露出之該導線_。該㈣晶片構裝結構藉由該導電膠 與該透明導電層電性連接。 —為J使責審查委員能更近-步了解本發明之特徵及技術内 •谷，請參閱以下有關本發明之詳細說明與附圖。然而所附圖式僅 供參考與輔助說明用，並非用來對本發明加以限制者。 【實施方式】 為讓本發明之上述和其他目的、特徵和優點能更明顯易懂，下 - ㈣舉數個較佳實施例，並配合所關式，作詳細說明如下， 1321234 值得說明的是本發明之顯示面板與其控制電路構裝結構可應用於 液晶顯示面板、電聚顯示面板與有機發光面板等各式顯示裝置。 請參閱第2圖，第2圖為本發明一第一較佳實施例之顯示面板 之示意圖。如第2圖所示，本實施例之顯示面板包含有一陣列基 板50，陣列基板50包含有一控制電路連接區52，一導線圖案佈 設於控制電路連接區52内，以及一絕緣層56覆蓋於導線圖案之 表面。於本實施例中，導線圖案係為一雙層金屬導線圖案，其包 含有一第一金屬層圖案54、一第二金屬層圖案58，而絕緣層56 則包含有一第一絕緣層56a覆蓋於第一金屬層圖案54之表面，以 及一第一絕緣層(保護層)56b覆蓋於第二金屬層圖案％之表面。 第一絕緣層56a包含有複數個外引腳接合開口 62，暴露出部分第 一金屬層圖案54，而第二絕緣層56b則包含有複數個第二金屬層 開口（導線圖案開口 )64，暴露出部分第二金屬層圖案5 8。 曰 另外，絕緣層56之上設置有一透明導電層66，透明導電層66 透過外引腳接合開σ 62與第一金屬層圖案54連接，以及透過第 -金屬層開π 64與第二金屬層圖案58連接，藉此第—金屬層圖 案54與第二金屬層圖案58互相電性連接，而可降低導線圖案之 電阻值。導線圖案之作用在於將控制電路之訊號傳遞至顯示面 板，因此導線圖㈣與_基板5G上之薄膜電晶體或共通電極等 電性連接，其金屬層圖案M倾薄膜電晶體之第一金屬層 (m )同時疋義，而第二金屬層圖案冗則與薄膜電晶體之第二 1321234 金屬層(metal2)同時定義，而視所欲傳輸之訊號不同，分別與掃描 線或資料線連接。 陣列基板50另包含有一導電膠⑼，設置於透明導電層66與絕 : 緣層56之上，以及一控制晶片構裝結構70，設置於導電膠68之 一 表面並藉由導電膠68與透明導電層66電性連接。於本實施例中， 導電膠68係使用異方性導電膠(ACF)，而控制晶片構裝結構7〇可 φ 為一晶粒/軟膜(chiP〇nfilm，COF)構裝結構、或是一捲帶式軟質載 板構裝結構(tape carrier package，TCP)等。控制晶片構裝結構70包 含有一承載層72、一外引腳層74設置於承載層74之下、一内引 腳層（圖未示)與外引腳層74電性連接，以及控制晶片（圖未示)銲接 於内引腳層。承載層72之材質一般為聚亞醯胺(p〇lyimide,pi)，但 可視封裝型式不同而為不同材質之捲帶或軟膜。外引腳層74係與 下方之外引腳接合開口 62對應，藉此控制晶片之控制訊號可經由 外引腳層74、導電膠68與導線圖案傳遞至陣列基板5〇上之顯示 ® 區，以控制顯示面板之運作。 值得說明的是，本實施例顯示面板之導電膠68係完全覆蓋於 外引腳接合開口 62與第二金屬層開口 64之上，而由於導電膠邰 在貼附控制晶片構裝結構70之後會被加熱硬化，因此具有良好的 溼氣阻絕能力，在此狀況下第一金屬層圖案54與第二金屬層圖案 58藉由導電膠68之覆蓋而可有效地與外界溼氣隔絕，故可^效降 - 低導線圖案產生腐蝕現象的機率。 12 U21234 請參閱第3圖’第3圖為本發明一第二較佳實施例之顯示面板 之不忍圖’其中為便於比較本實施例與前述實施例之異同，於第3 圖中相同之元件使用與第2圖相同之標號。如第3圖所示，本實 ·：施例之顯示面板包含有一陣列基板50,陣列基板50包含有-控制 電路連接區52 ’ 一第一金屬層圖案54設於控制電路連接區52内 之陣列基板50上，-第-絕緣層56a覆蓋於第一金屬層圖案％ ❿技面、-第二金屬層圖案58，以及-第二絕緣層(保護層)56b覆 盍於第二金屬層圖案58之表面。第—絕緣層56a包含有複數個外 引腳接合開〇 62，以及複數個第一金屬層開口 Μ暴露出部分第一 金屬層圖案54 ’其中外引腳接合開口 62鱗應於控制晶片構裝結 構7〇之外引腳層74，藉此與之電性連接之用，而第一金屬層開口 63則並未與外引腳層74對應，而係由於結構設計上或導線圖案之 電性等考量所設置。另外，第二絕緣層娜則包含有複數個第二 金屬層開口 64，暴露出部分第二金屬層圖案58。 • 絕緣層56之上設置有一透明導電層66,透明導電層66透過外 引腳接合開口 62與第一金屬層開口 63與第一金屬層圖案54連 接，以及透過第二金屬層開口 64與第二金屬層圖案58連接，藉 …此第一金屬層圖案54與第二金屬層圖案58互相電性連接，而^ 降低導線圖案之電阻值。 陣列基板5〇另包含有-導電膠紹，奴於透料電層的與絕 1321234 緣層56之上，以及一控制晶片構褒結構70，設置於導電膠68之 表面並藉由導電膠68與透明導電層祕電性連接。控制晶片構裝 結構7〇可為-晶粒/軟膜魏結構、或是一捲帶式軟韻板構裝結 構。控制晶片構裝結構70包含有一承載層72、一外引腳層”設 ·：置於承載層74之下、一内引腳層(圖未示)與外引腳層74電性連 - 接’以及控制晶片（圖未示)鮮接於内引腳層。外引腳層74係與下 方之外引腳接合如62對應，藉此控制⑼之㈣峨可經由外 • 引腳層74、導電膠68與導線圖案傳遞至陣列基板50。 於前述實補不同之處在於，由於本實施儀示面板包含有外 引腳接合開〇62、第-金屬層開口 63與第二金屬層開口 64，因 此導電膠68之設置係完全覆蓋於外引腳接合開口以'第一金屬層 開口 63與第二金屬層開口 64之上，藉此更可有效提供第一金屬 層圖案54與第二金屬層圖案58良好躲氣隔絕能力。 鲁由上述本發明之二實施例可知本發明利用導電膠全面覆蓋控 制電路連接區，藉此阻絕水氣的滲透而達到防蝕的功用。在實際 應用上’導轉之設置鮮需全面覆蓋控㈣料接區，而可視 控制電路連接區佈局方式不同加以變化。請參考第4圖至第6圖， 第4圖至第6圖為顯示面板之控制電路連接區之上視圖，其中第4 圖顯不了僅具有外⑽接合開口之顯示面板設計，第5圖顯示了 具有外引腳接合開π與第—金屬層開 口之顯示面板設計，而第6 圖顯不了具有㈣腳接合開口、第—金屬層開口與第二金屬層開 14 1321234 口之顯示面板設計。 如第4圖所示，於控制電路連接區52中，導電膠68之長度與 寬度分別為La與W2，而外引腳接合開口 62之長度與寬度分別為 Lb與W卜由於在控制電路連接區52中僅設置有外引腳接合開口 62 ’因此在導電膠68與外引腳接合開口 62之長度與寬度滿足 La>Lb與W2>W1的條件下，即可有效避免腐蝕問題。換言之， 鲁 導電膠68覆蓋住外引腳接合開口 62所暴露出之導線圖案，即可 有效隔絕澄氣，而不必全面覆蓋控制電路連接區52。 如第5圖所示，於控制電路連接區52中，導電膠砧之長度與 見度分別為La與W2，外引腳接合開口 62與第一金屬層開口 63 之長度和為Lc、寬度為W1。由於在控制電路連接區52中僅設置 有外引腳接合開口 62與第一金屬層開口幻，因此在導電膠仍、 外引腳接σ開π 62鮮—金屬賴σ 03之長度與寬度滿足 ♦與W^Wl的條件下，即可有效避免腐關題。換言之，導電膠 僅而覆蓋住外引腳接合開口 62與第一金屬層開口 63所暴露出 、Θ案即可有效隔絕渔氣，而不必全面覆蓋控制電路連接 區52。 扣:圖所示’於控制電路連接區52中，導電膠68之長度與 別為L^W2，外引腳接合開口 62、第-金屬層開口 63 —”第二金屬層開口 64之長度和為Ld、寬度為w。由於在控制電IX. Description of the invention: [Technical field of the invention] The present invention is directed to the display panel and its control circuit. The system refers to a conductive spacer wire which can avoid oblique lines _ corruption display panel and its control circuit structure . [Prior Art] With the demand for high-quality and thin-type displays on the market, the package type of the liquid crystal display panel is also moving toward the trend of high pin_t and flne pitch. The liquid crystal display panel mainly comprises an array substrate, a color filter substrate (CF substrate), and a liquid crystal molecule layer disposed therein. A plurality of metal wire patterns are arranged on the array substrate to supply a control circuit (drive busy) to transmit control signals, such as scan signals, data signals or common electrode signals, to the thin film transistor or the common electrode, thereby controlling the gray scale of the liquid crystal display panel. . Generally, after the liquid crystal display panel is completed, a reliability test is performed to allow the liquid crystal display panel to operate in a high temperature and high humidity environment for a long time, and the liquid crystal display panel is reliably detected by the above-mentioned harsh environment. However, in the process of the reliability test, it is easy to cause corrosion problems in the metal wire pattern, especially for the metal wire that transmits the high voltage signal. Once the metal wire pattern is corroded, it will cause the resistance value of the wire to change and affect the transmission of the signal. Corrosion 1321234 may cause wire breakage even when the problem is serious. In general, the cause of the corrosion phenomenon is mainly caused by insufficient moisture barrier capability of the sealing material of the metal wire pattern, which is caused by excessive electric field strength. 1 is a schematic view showing a structure of a control circuit of a conventional liquid crystal display panel. For example, the liquid crystal display panel includes an array substrate 10' and the periphery of the array substrate 1 includes a control circuit connection region 12. The array substrate ίο includes a first metal layer pattern, an insulating layer %, and a second metal layer pattern 18 - a protective layer 2 上 from bottom to top, wherein the insulating layer 16 includes an outer pin interface opening 22 ′ A portion of the first metal layer pattern 14 is exposed, and the protective layer 2 includes a second metal layer opening σ 24 exposing a portion of the second metal layer pattern 18. Further, the array substrate 10 further includes a transparent conductive layer %, and the outer metal (10) bonding opening 22 and the second metal opening 24 are electrically connected to the first metal barrier layer pattern 18. The above is the configuration of the metal wires on the array substrate 1G, and the conventional control circuit structure further includes a control crystal structure 3 (), and is electrically connected to the transparent conductive layer 26 by the conductive (four). The (four) signal emitted by the control wafer structure 3 can be transferred to the substrate 1 via the conductive paste 28, the transparent conductive layer %, the first metal layer pattern (4), and the metal layer 18 to control the liquid crystal display panel. The main reason for the metal wire pattern to produce the Gu phenomenon is that the metal wire pattern is not sufficient for the thief's ability to block the riding. In the 13312234 control circuit structure of the conventional liquid inscription panel, the conductive adhesive 28 and the control chip The structure 30 covers only the outer pin bond opening 22 and does not cover other areas within the control circuit connection region 12, such as the second metal layer opening 24, in other words, the second gold layer opening 24 Covered with a transparent conductive layer 26, however, the moisture permeability of the transparent conductive layer is '': the force is not good, in this case, if there is a large difference between adjacent wires in the metal wire pattern... potential difference', for example, when a wire is Used to transmit a high-potential signal (such as Vgh), and its adjacent wire is used to transmit a low-potential signal (such as Vc〇m), whether it is the first gold-based layer pattern 14 or its electrical The connected second metal layer pattern 18 is highly susceptible to rosin problems. SUMMARY OF THE INVENTION One of the purposes of the present invention is to provide a display panel and its control circuit structure to avoid corrosion problems in the conductor pattern. In order to achieve the above object, a preferred embodiment of the present invention provides a display panel including a truss i substrate control circuit connection region, a wire pattern, an insulating layer covering, and a transparent conductive layer disposed on the insulating layer. A conductive film == conductive layer and the _ above, the money - _ structure § is placed on the surface of the conductive paste. The insulating layer has a plurality of leg engaging openings, and the opening ' exposes a portion of the wire pattern. The transparent conductive material is electrically connected to the conductive pattern by electrically connecting the conductive material to the transparent conductive layer. The outer edge of the Wei edge layer is finely closed and the wire pattern exposed by the opening of the wire pattern 1321234. In order to achieve the above object, another preferred embodiment of the present invention provides a control circuit assembly structure for a display panel. The control circuit assembly structure comprises a substrate, a wire pattern disposed on the substrate, an insulating layer covering the surface of the wire pattern, a transparent conductive layer disposed on the insulating layer, and a conductive adhesive disposed on the substrate The transparent conductive layer and the insulating layer are disposed on the surface of the conductive paste. The insulating layer has a plurality of outer pin bond openings, and a plurality of wire pattern openings ' expose a portion of the wire pattern. The transparent conductive layer is electrically connected to the wire pattern through the outer lead-bonding openings ’ and the wire pattern openings. The conductive adhesive is corresponding to each of the foot joints and the respective openings, and the size of the conductive glue is larger than the size of the 5 foot joint openings of the tree and the size of each of the wire openings. Covering each of the outer pin engagement openings and the wire _ exposed by each of the wire pattern openings. The (four) wafer structure is electrically connected to the transparent conductive layer by the conductive paste. - For the sake of J, the review committee can be closer to the features and techniques of the present invention. Please refer to the following detailed description and drawings relating to the present invention. The drawings are to be considered in all respects as illustrative and not restrictive. BRIEF DESCRIPTION OF THE DRAWINGS The above and other objects, features and advantages of the present invention will become more <RTIgt; </ RTI> <RTIgt; </ RTI> <RTIgt; </ RTI> <RTIgt; </ RTI> <RTIgt; The display panel and the control circuit assembly structure thereof of the present invention can be applied to various display devices such as a liquid crystal display panel, an electro-polymer display panel, and an organic light-emitting panel. Please refer to FIG. 2, which is a schematic view of a display panel according to a first preferred embodiment of the present invention. As shown in FIG. 2, the display panel of the present embodiment includes an array substrate 50. The array substrate 50 includes a control circuit connection region 52. A wire pattern is disposed in the control circuit connection region 52, and an insulating layer 56 covers the wire. The surface of the pattern. In this embodiment, the wire pattern is a two-layer metal wire pattern including a first metal layer pattern 54 and a second metal layer pattern 58, and the insulating layer 56 includes a first insulating layer 56a covering the first layer. A surface of a metal layer pattern 54 and a first insulating layer (protective layer) 56b cover the surface of the second metal layer pattern %. The first insulating layer 56a includes a plurality of outer lead bonding openings 62 exposing a portion of the first metal layer pattern 54, and the second insulating layer 56b includes a plurality of second metal layer openings (wire pattern openings) 64 for exposing A portion of the second metal layer pattern 58 is exited. Further, a transparent conductive layer 66 is disposed on the insulating layer 56. The transparent conductive layer 66 is connected to the first metal layer pattern 54 through the outer lead bonding opening σ 62, and the first metal layer is opened through the first metal layer π 64 and the second metal layer. The patterns 58 are connected, whereby the first metal layer pattern 54 and the second metal layer pattern 58 are electrically connected to each other, and the resistance value of the wire pattern can be lowered. The function of the wire pattern is to transmit the signal of the control circuit to the display panel. Therefore, the wire pattern (4) is electrically connected to the thin film transistor or the common electrode on the _ substrate 5G, and the metal layer pattern M is tilted to the first metal layer of the thin film transistor. (m) Simultaneously, the second metal layer pattern is defined at the same time as the second 1321234 metal layer (metal2) of the thin film transistor, and is connected to the scan line or the data line, respectively, depending on the signal to be transmitted. The array substrate 50 further includes a conductive paste (9) disposed on the transparent conductive layer 66 and the edge layer 56, and a control wafer structure 70 disposed on one surface of the conductive paste 68 and transparent by the conductive paste 68. The conductive layer 66 is electrically connected. In the present embodiment, the conductive paste 68 is made of an anisotropic conductive paste (ACF), and the control wafer structure 7 φ can be a grain/soft film (COF) structure or a Tape carrier package (TCP), etc. The control wafer structure 70 includes a carrier layer 72, an outer pin layer 74 disposed under the carrier layer 74, an inner pin layer (not shown) electrically coupled to the outer pin layer 74, and a control die ( The figure is not shown) soldered to the inner pin layer. The material of the carrier layer 72 is generally poly-plylimide (pi), but it may be a tape or a soft film of different materials depending on the package type. The outer pin layer 74 corresponds to the lower pin bonding opening 62, whereby the control signal for controlling the wafer can be transferred to the display area of the array substrate 5 via the outer pin layer 74, the conductive paste 68, and the wire pattern. To control the operation of the display panel. It should be noted that the conductive paste 68 of the display panel of the present embodiment completely covers the outer lead bonding opening 62 and the second metal layer opening 64, and the conductive adhesive will be attached after the control wafer structure 70 is attached. It is heat-hardened and therefore has good moisture resistance. In this case, the first metal layer pattern 54 and the second metal layer pattern 58 can be effectively insulated from the outside by being covered by the conductive paste 68. Effect drop - the probability of corrosion caused by low wire patterns. 12 U21234 Please refer to FIG. 3 'FIG. 3 is a diagram of a display panel according to a second preferred embodiment of the present invention. In order to facilitate comparison between the present embodiment and the foregoing embodiment, the same components in FIG. 3 are used. The same reference numerals as in Fig. 2 are used. As shown in FIG. 3, the display panel of the embodiment includes an array substrate 50, and the array substrate 50 includes a control circuit connection region 52'. A first metal layer pattern 54 is disposed in the control circuit connection region 52. On the array substrate 50, the -first insulating layer 56a covers the first metal layer pattern %, the second metal layer pattern 58, and the second insulating layer (protective layer) 56b covers the second metal layer pattern The surface of 58. The first insulating layer 56a includes a plurality of outer lead bonding openings 62, and a plurality of first metal layer openings Μ exposing a portion of the first metal layer pattern 54', wherein the outer pin bonding openings 62 are arranged to control the wafer structure The pin layer 74 of the structure 7 is electrically connected thereto, and the first metal layer opening 63 does not correspond to the outer pin layer 74, but is due to the structural design or the electrical pattern of the wire pattern. Wait for the considerations to be set. In addition, the second insulating layer Na includes a plurality of second metal layer openings 64 exposing a portion of the second metal layer pattern 58. A transparent conductive layer 66 is disposed on the insulating layer 56. The transparent conductive layer 66 is connected to the first metal layer opening 54 through the outer lead bonding opening 62 and the first metal layer opening 63, and through the second metal layer opening 64 and The two metal layer patterns 58 are connected, and the first metal layer pattern 54 and the second metal layer pattern 58 are electrically connected to each other, and the resistance value of the wire pattern is lowered. The array substrate 5 further includes a conductive paste, a slave dielectric layer and a 1321234 edge layer 56, and a control wafer structure 70 disposed on the surface of the conductive paste 68 and provided with a conductive paste 68. It is electrically connected to the transparent conductive layer. The control wafer structure 7 can be a grain/soft film structure or a tape-type flexible board structure. The control wafer structure 70 includes a carrier layer 72, an outer pin layer disposed under the carrier layer 74, and an inner pin layer (not shown) electrically connected to the outer pin layer 74. 'and the control chip (not shown) is spliced to the inner pin layer. The outer pin layer 74 is associated with the lower pin bond such as 62, thereby controlling (4) (4) via the outer pin layer 74, The conductive paste 68 and the wire pattern are transferred to the array substrate 50. The foregoing implementation differs in that the present embodiment panel includes an outer lead bonding opening 62, a first metal layer opening 63 and a second metal layer opening 64. Therefore, the conductive paste 68 is disposed completely over the outer lead bonding opening to be over the first metal layer opening 63 and the second metal layer opening 64, thereby effectively providing the first metal layer pattern 54 and the second metal The layer pattern 58 has good air-insulating ability. According to the second embodiment of the present invention, the present invention utilizes a conductive adhesive to completely cover the control circuit connection region, thereby blocking the penetration of moisture and achieving the function of corrosion prevention. The setting of the transfer needs to be fully covered and controlled (4) The layout of the visual control circuit connection area is changed differently. Please refer to Fig. 4 to Fig. 6, and Fig. 4 to Fig. 6 are top views of the control circuit connection area of the display panel, wherein the fourth figure shows only the outer view. (10) The display panel design of the joint opening, FIG. 5 shows the display panel design with the outer pin joint opening π and the first metal layer opening, and the sixth figure shows the (four) foot joint opening, the first metal layer opening and the first The display panel design of the two metal layers is opened 14 1321234. As shown in Fig. 4, in the control circuit connection region 52, the length and width of the conductive paste 68 are La and W2, respectively, and the length of the outer pin bonding opening 62 is The widths are Lb and Wb, respectively, since only the outer pin bonding opening 62' is provided in the control circuit connection region 52, so that the length and width of the conductive paste 68 and the outer pin bonding opening 62 satisfy La>Lb and W2> Under the condition, the corrosion problem can be effectively avoided. In other words, the conductive paste 68 covers the wire pattern exposed by the outer pin joint opening 62, thereby effectively insulating the gas without having to completely cover the control circuit connection. 52. As shown in FIG. 5, in the control circuit connection region 52, the length and visibility of the conductive anvil are La and W2, respectively, and the length of the outer pin bonding opening 62 and the first metal layer opening 63 is Lc, The width is W1. Since only the outer pin junction opening 62 and the first metal layer opening illusion are disposed in the control circuit connection region 52, the conductive pin is still connected to the outer pin π 62 fresh-metal σ σ 03 When the length and width satisfy the condition of ♦ and W^Wl, the corrosion problem can be effectively avoided. In other words, the conductive adhesive covers only the outer lead joint opening 62 and the first metal layer opening 63 to expose the case. The fish gas is effectively insulated without having to completely cover the control circuit connection region 52. Buckle: As shown in the figure, in the control circuit connection region 52, the length of the conductive paste 68 is different from that of L^W2, the outer pin bonding opening 62, the first metal layer opening 63, and the length of the second metal layer opening 64. Ld, width w. due to control of electricity
15 1321234 路連接區52中設置有外引腳接合開口 62、第-金屬層開口 63與 第二金屬層開口 64,因此在導電膠68、外引腳接合開口幻、第一 金屬層開口 63與第二金屬層開口 64之長度與寬度滿足La>Ld與 #條件下’即可有效避免雜問題。 由上it了知，針對各式不同的顯示面板設計，本發明的設計原 則為導電膠之尺寸應大於各利腳接合開口之尺寸與各導線圖案 開口（包含有第-金屬層開口與第二金屬層開口)之尺寸，藉此導電 膠可元全覆蓋各外⑽接合開口與各導關細口所暴露出之導 線圖案，而達到隔絕溼氣的作用。 鉍上所述’本發明之顯示面板與其控制電路構裝結構的設計係 棚原先用於黏著並電性連接陣列基板與㈣晶#縣結構之導 電膠作為隔峨的阻絕層，藉由硬化後之導電膠覆蓋於導線圖 案之上’可有雜_氣㈣免導顧餘謂相試或在高澄 度環境下操作時發生腐蝕情形。 所Γ上所述僅為本㈣讀佳_丨，凡依本發财請專利範圍 所做之均㈣化與修飾，皆應屬本發明之涵蓋範圍。 【圖式簡單說明】 =圖為習知-液晶顯示面板之㈣電路财結構的示 第2圖為本發明-第-較佳實補之顯和板之示意圖。 16 1321234 第3圖為本發明一第二較佳實施例之顯示面板之示意圖。 第4圖至第6圖為顯示面板之控制電路連接區之上視圖。 【主要元件符號說明】 10 陣列基板 14 第一金屬層圖案 18 第二金屬層圖案 22 外引腳接合開口 26 透明導電層 30控制晶片構裝結構 52 控制電路連接區 56 絕緣層 56b第二絕緣層 62外弓丨腳接合開口 64第二金屬層開口 68導電膠 72承载層 12 控制電路連接區 16 絕緣層 2〇 保護層 24 第二金屬層開口 28 導電膠 50 陣列基板 54 第一金屬層圖案 56a第一絕緣層 58 第二金屬層圖案 63 第一金屬層開口 66 透明導電層 7〇 控制晶片構裝結構 74 外引腳層15 1321234 The connection region 52 is provided with an outer lead bonding opening 62, a first metal layer opening 63 and a second metal layer opening 64, so that the conductive paste 68, the outer pin bonding opening, the first metal layer opening 63 and The length and width of the second metal layer opening 64 satisfy the condition of La>Ld and #' to effectively avoid the problem of impurities. It is known from the above that for various display panel designs, the design principle of the present invention is that the size of the conductive paste should be larger than the size of each of the leg joint openings and the opening of each wire pattern (including the opening of the first metal layer and the second The size of the opening of the metal layer is such that the conductive adhesive can completely cover the outer conductor pattern of the outer (10) joint opening and each of the small guide ports to achieve moisture shielding. The design of the display panel and the control circuit structure of the present invention is originally used for adhering and electrically connecting the array substrate with the conductive paste of the (four) crystal structure of the county as a barrier layer of the barrier, after hardening The conductive adhesive is overlaid on the wire pattern. 'There may be miscellaneous gas (4), and the corrosion may occur when the operation is performed under high-intensity environment. The above description is only for the purpose of reading (4), and all the terms and conditions of the patent application scope should be within the scope of the present invention. [Simple description of the drawing] = The figure is a conventional example - (4) The circuit structure of the liquid crystal display panel Fig. 2 is a schematic view of the display panel of the invention - the first preferred embodiment. 16 1321234 FIG. 3 is a schematic view of a display panel according to a second preferred embodiment of the present invention. Figures 4 through 6 are top views of the control circuit connection area of the display panel. [Main component symbol description] 10 Array substrate 14 First metal layer pattern 18 Second metal layer pattern 22 External pin bonding opening 26 Transparent conductive layer 30 Control wafer structure 52 Control circuit connection region 56 Insulation layer 56b Second insulation layer 62 outer bow foot joint opening 64 second metal layer opening 68 conductive adhesive 72 carrier layer 12 control circuit connection region 16 insulating layer 2 〇 protective layer 24 second metal layer opening 28 conductive paste 50 array substrate 54 first metal layer pattern 56a First insulating layer 58 second metal layer pattern 63 first metal layer opening 66 transparent conductive layer 7〇 control wafer structure 74 outer pin layer