TWI293480B - - Google Patents

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TWI293480B
TWI293480B TW092105357A TW92105357A TWI293480B TW I293480 B TWI293480 B TW I293480B TW 092105357 A TW092105357 A TW 092105357A TW 92105357 A TW92105357 A TW 92105357A TW I293480 B TWI293480 B TW I293480B
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Taiwan
Prior art keywords
film
plasma
etching method
plasma etching
gas
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TW092105357A
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Chinese (zh)
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TW200305944A (en
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Noriyuki Kobayashi
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Tokyo Electron Ltd
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3105—After-treatment
    • H01L21/311—Etching the insulating layers by chemical or physical means
    • H01L21/31144—Etching the insulating layers by chemical or physical means using masks
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3105—After-treatment
    • H01L21/311—Etching the insulating layers by chemical or physical means
    • H01L21/31105—Etching inorganic layers
    • H01L21/31111—Etching inorganic layers by chemical means
    • H01L21/31116—Etching inorganic layers by chemical means by dry-etching

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  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Chemical & Material Sciences (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • General Chemical & Material Sciences (AREA)
  • Inorganic Chemistry (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • Drying Of Semiconductors (AREA)

Description

1293480 (1) 玖、發明說明 【發明所屬之技術領域】 本發明係有關以半導體裝置製造步驟所成之電漿蝕刻 方法者。 【先前技術】 先行使被處理基板中之Si02膜做爲通過光阻開口圖型 後進行電漿蝕刻時之蝕刻氣體者係以氟碳做爲主體氣體 被使用者。 惟，以氟碳做爲主體氣體時，蝕刻進行之同時於孔內 亦堆積副產物，造成蝕刻率變小，而停止蝕刻之進行，亦 即引起蝕刻停止現象。該鈾刻停止其孔徑爲亞微型時愈爲 明顯，近年來無法應付微細加工之要求。 因此，爲解決此蝕刻停止，於蝕刻氣體中加入氧，嘗 試使不易生成孔內之副產物者。 而，最近，多半以金屬、金屬氮化物做爲光罩之硬光罩 取代光阻之使用之。於以金屬、金屬氮化物做爲光罩之Si02 之蝕刻中使用含氟碳與氧之氣體後，將於鈾刻孔內產生金 屬氧化物之積垢的問題點。此積垢即使以濕式洗淨亦無法去 除之。又，若使用含C1氣體進行電漿處理雖可去除積垢， 卻同時使硬光罩被触刻之。 【發明內容】 本發明鑑於上述課題，以提供一種控制蝕刻停止，且 -5- 1293480 (2) ，於蝕刻孔內不致產生積垢之電漿鈾刻方法做爲該目的 者。 爲解決該課題之本發明電漿蝕刻方法其特徵係使導入 處理容器之含(：3¥ (Xg2)與CF4之氣體進行電漿化後，使 此處理容器內被處理體中之膜透過此膜上金屬化合物之光罩 開口圖型，進行電漿蝕刻者。 該金屬化合物可爲金屬氮化物者。該金屬氮化物可爲 TiN者。且，該金屬氮化物亦可爲TaN者。 除該含CxFy (x22)與CF4之氣體外，更可含有N2者。 另外，該氣體更可含有Ar者。 該被處理體中之膜可爲Si02膜者。又，該被處理體中之 膜亦可爲SiOC膜者。其中，SiOC係指其主鏈由-Si-O-所成者 ，部份以上之側鏈具有甲基等之有機官能基之所謂有機系氧 化矽者。 該氣體之CxFy (x-2)可爲C4F6者。此時，針對該氣體 之0?4之€^6流量比（(：4?6流量/€?4流量）以0.12〜0.20者宜 。當超出0.20時，將造成鈾刻停止，反之，不足0.12時則於 孔內產生積垢，降低對於光罩呈鈾刻對象膜之選擇比（膜 的蝕刻率/光罩之蝕刻率）。該氣體之CxFy (X 2 2)可爲 C4F8者。又，該氣體之CxFy(xg2)可爲C5F8者。 本發明電漿蝕刻方法之特徵係使導入處理容內之含 C4F6與N2之氣體進行電漿化後，使該處理容器內被處理體 中之Si02膜透過此Si02膜上之金屬化合物光罩之開口圖型’ 進行電漿蝕刻者。 -6- 1293480 (3) 又’本發明電漿蝕刻方法之特徵係使導入處理容器內 之含c4F6與n2之氣體進行電漿化後，使此處理容器內被處 理體中之Sic膜透過此SiC膜上之金屬化合物光罩之開口圖型 ，進行電漿蝕刻者。 另外’本發明電漿蝕刻方法之特徵係使導入處理容器 之含〇4?6與N2之氣體進行電漿化後，將此處理容器內被 處理體中之SiOC膜透過此SiOC膜上之金屬化合物光罩之 開口圖型，進行電漿蝕刻者。 該金屬化合物可爲金屬氮化物。該金屬氮化物可爲TiN 者。又，該金屬氮化物可爲TaN者。 【實施方式】 以下針對參考附加圖面之本發明實施形態進行說明。 圖1係代表本發明所實施之電漿鈾刻裝置1之截面圖者 。處理容器2係藉由表面氧化處理之鋁所形成後，安全接 地者。處理容器2內之底部介著絕緣體後，設置晶圓保持 體5做爲平行平板電極下部電極之機能者。此晶圓保持體 5連接高通濾波器 （HP F) 6。晶圓保持體5上面設置靜電 夾頭11，其上載置半導體晶圓等被處理體W。靜電夾頭11 係介存電極12於絕緣體間構成者，由電極12所連接直流電 源1 3外加直流電壓後，使被處理體W進行靜電吸附。再， 配置包圍被處理體W之焦點環1 5。此焦點環1 5係由Si、 Si02等所成者，可提昇蝕刻之均勻性。 又，晶圓保持體5之上方面對晶圓保持體5設置上部電 1293480 (4) 極21，此上部電極21介著絕緣體22，支撐於處理容器2之 上部，由噴頭狀之電極板24及支撐此電極板24之支撐體25 所構成者。 於支撐體25之中央設置氣體導入口 26,此氣體導入口 26依順序連接氣體供給管27、氣門28、質量流調整器29、 蝕刻氣體供給源30。由此蝕刻氣體供給源30供給CxFy (xg 2)、CF4、N2、Ar等氣體。CxFy (xg 2)爲 C4F6、C4F8、C5 F8等者。又，使用C4F6時，針對CF4之C4F6流量比（C4F6流 量/CF4流量）以0.12〜0.20者宜，使用（：4?6時，可以N2取代 CF4使用之。 又，處理容器2之底部連接排氣管3 1，此排氣管3 1連接 排氣裝置35。又，處理容器2之側壁爲閘式閥32者，被處理 體W於與鄰接真空預備室（未示圖）間被運送之。 上部電極21介著低通濾波器（LPF) 42與整合器41後分 別與第1高周波電源40進行連接。下部電極之晶圓保持體5係 介著整合器51連接第2高周波電源50。 再利用該電漿蝕刻方法，針對使被處理體W中之Si02 膜透過光罩之開口圖型之電漿蝕刻步驟進行說明。其中， 如圖2所示，針對使SiN膜61所形成之Si02膜62透過TiN膜 63之開口圖型之電漿鈾刻進行說明。 開放閘式閥3 2後，將被處理體W搬入處理容器2後， 載置靜電夾頭11。再關閉閘式閥32，藉由排氣裝置35使 處理容器2內進行減壓後，放開氣門28，由蝕刻氣體供給 源30供給該蝕刻氣體，如：(：4?6與€?4及Ar所成之蝕刻氣體 1293480 (5) 、或、〇4?6與比及八!^所成之蝕刻氣體。 此狀態下於上部電極2 1與下部電極之晶圓保持體5由 高周波電源供給高周波電力，使蝕刻氣體進行電漿化後 ，進行被處理體W中Si02膜62之蝕刻。另外，於上下電極 供給高周波電力之前後由直流電源1 3至靜電夾頭1 1之電 極1 2中外加直流電壓之後，使被處理體W於靜電夾頭1 1進 行靜電吸附。 蝕刻中藉由終點檢出器（未示圖）檢出所定發光強 度，以此爲基準做爲完成蝕刻。 本實施形態中，以（：4?6做爲含此CxFy (xg2)與CF4之 氣體，或CxFy使用時以N2取代CF4之含有氣體後，介著TiN 膜63進行Si02膜62之蝕刻後，控制蝕刻停止，同時，可形 成不產生積垢於蝕刻孔內之孔。 另外，飩刻對象未限定爲Si02膜，至少1種Si02、SiC、 SiOC時特別可有效發揮該效果。又，使用TiN做爲光罩膜使 用之，而亦可使用TaN者，更可使用其他金屬氮化物者。而 ，蝕刻裝置之構成亦不限於圖1者。 [實施例] 以下，針對本發明實施例進行說明。1293480 (1) Description of the Invention [Technical Field of the Invention] The present invention relates to a plasma etching method formed by a semiconductor device manufacturing step. [Prior Art] The etched gas in the case where the SiO 2 film in the substrate to be processed is subjected to plasma etching after passing through the photoresist opening pattern is fluorocarbon as the main gas. However, when fluorocarbon is used as the main gas, by-products are also deposited in the pores while etching, and the etching rate is reduced, and the etching is stopped, that is, the etching stops. The uranium engraving is becoming more and more obvious when the pore diameter is submicron, and in recent years, it has been unable to cope with the requirements of microfabrication. Therefore, in order to solve this etching stop, oxygen is added to the etching gas, and it is tried to make it difficult to generate by-products in the pores. Recently, most of the hard masks using metal and metal nitride as a mask have replaced the use of photoresist. The use of a gas containing fluorine and oxygen in the etching of SiO 2 using a metal or metal nitride as a mask causes a problem of scale formation of metal oxide in the uranium engraved hole. This scale cannot be removed even if it is washed in a wet manner. Further, if the plasma treatment is carried out using the C1-containing gas, the scale can be removed, but the hard mask can be simultaneously engraved. SUMMARY OF THE INVENTION The present invention has been made in view of the above problems, and provides a plasma uranium engraving method for controlling etching stop and -5 - 1293480 (2) to prevent scale formation in an etching hole. In order to solve the problem, the plasma etching method of the present invention is characterized in that a gas containing (:3¥(Xg2) and CF4) is introduced into the processing container, and then the film in the object to be processed in the processing container is passed through. The reticle opening pattern of the metal compound on the film is performed by a plasma etcher. The metal compound may be a metal nitride. The metal nitride may be TiN. Moreover, the metal nitride may also be a TaN. In addition to the gas containing CxFy (x22) and CF4, it may further contain N2. In addition, the gas may further contain Ar. The film in the object to be treated may be a SiO 2 film, and the film in the treated body is also The term "SiOC" refers to a so-called organic cerium oxide whose main chain is composed of -Si-O-, and some of which have an organic functional group such as a methyl group in the side chain. CxFy of the gas (x-2) can be C4F6. At this time, the flow ratio of 0^4 of the gas is (0:6 flow rate / €4 flow rate) is 0.12~0.20. When it exceeds 0.20 Will cause uranium engraving to stop. Conversely, if it is less than 0.12, it will cause fouling in the pores, reducing the selectivity of the uranium engraved target film. The etching rate of the film / the etching rate of the mask. The CxFy (X 2 2) of the gas may be C4F8. Further, the CxFy (xg2) of the gas may be C5F8. The plasma etching method of the present invention is characterized by After the gas containing C4F6 and N2 introduced into the treatment volume is plasma-formed, the SiO 2 film in the object to be treated in the treatment container is passed through the opening pattern of the metal compound mask on the SiO 2 film to perform plasma etching. -6- 1293480 (3) Further, the plasma etching method of the present invention is characterized in that the gas containing c4F6 and n2 introduced into the processing container is plasma-treated, and the Sic film in the object to be processed in the processing container is passed through The opening pattern of the metal compound mask on the SiC film is subjected to plasma etching. Further, the plasma etching method of the present invention is characterized in that the gas containing 〇4?6 and N2 introduced into the processing container is plasma-treated. The SiOC film in the processed object in the processing container is passed through the opening pattern of the metal compound mask on the SiOC film to perform plasma etching. The metal compound may be a metal nitride. The metal nitride may be a TiN. Also, the metal nitride may be a TaN. BEST MODE FOR CARRYING OUT THE INVENTION Hereinafter, embodiments of the present invention will be described with reference to additional drawings. Fig. 1 is a cross-sectional view showing a plasma uranium engraving apparatus 1 according to the present invention. The processing container 2 is formed by surface oxidation treatment of aluminum. After that, the safety grounder is placed in the bottom of the processing container 2. After the insulator is placed, the wafer holder 5 is provided as a function of the lower electrode of the parallel plate electrode. The wafer holder 5 is connected to a high-pass filter (HP F) 6. An electrostatic chuck 11 is placed on the upper surface of the wafer holding body 5, and a workpiece W such as a semiconductor wafer is placed thereon. The electrostatic chuck 11 is formed by interposing the electrodes 12 between the insulators, and the DC power source 13 connected to the electrodes 12 is supplied with a direct current. After the voltage, the object to be processed W is electrostatically adsorbed. Further, a focus ring 15 surrounding the object W to be processed is disposed. The focus ring 15 is made of Si, SiO 2 or the like, which improves the uniformity of etching. Further, on the wafer holder 5, an upper electric 1293480 (4) electrode 21 is provided to the wafer holder 5, and the upper electrode 21 is supported on the upper portion of the processing container 2 via the insulator 22, and the nozzle-shaped electrode plate 24 is provided. And a support body 25 that supports the electrode plate 24. A gas introduction port 26 is provided in the center of the support body 25. The gas introduction port 26 is connected to the gas supply pipe 27, the valve 28, the mass flow regulator 29, and the etching gas supply source 30 in this order. Thereby, the etching gas supply source 30 supplies a gas such as CxFy (xg 2), CF4, N2, or Ar. CxFy (xg 2) is C4F6, C4F8, C5 F8, and the like. Moreover, when C4F6 is used, the flow ratio of C4F6 to CF4 (C4F6 flow rate/CF4 flow rate) is preferably 0.12 to 0.20, and when (4:6 is used, N2 can be used instead of CF4. Further, the bottom connection row of the processing container 2 is used. The air pipe 3 1, the exhaust pipe 31 is connected to the exhaust device 35. Further, the side wall of the processing container 2 is the gate valve 32, and the object to be processed W is transported between the adjacent vacuum preparation chamber (not shown). The upper electrode 21 is connected to the first high-frequency power source 40 via the low-pass filter (LPF) 42 and the integrator 41. The wafer holder 5 of the lower electrode is connected to the second high-frequency power source 50 via the integrator 51. Further, the plasma etching method for etching the SiO 2 film in the object to be processed W through the reticle pattern will be described. The SiO 2 formed by the SiN film 61 is shown in FIG. The film 62 is described by the uranium engraving of the opening pattern of the TiN film 63. After the gate valve 3 2 is opened, the object to be processed W is carried into the processing container 2, and the electrostatic chuck 11 is placed. The gate valve 32 is closed again. After decompressing the inside of the processing container 2 by the exhaust device 35, the valve 28 is released, and The etching gas supply source 30 supplies the etching gas, such as: (4:6 and 4? and Ar made etching gas 1293480 (5), or 〇4?6 and ratio and 八!^ In this state, the wafer holding body 5 of the upper electrode 21 and the lower electrode is supplied with high-frequency power from a high-frequency power source, and the etching gas is plasma-formed, and then the SiO 2 film 62 in the object W is etched. Before the electrode is supplied with high-frequency power, a DC voltage is applied from the DC power source 13 to the electrode 1 2 of the electrostatic chuck 1 1 , and then the object to be processed W is electrostatically adsorbed on the electrostatic chuck 1 1. The end point detector is used in the etching. (not shown) The predetermined luminous intensity is detected, and the etching is performed based on this. In the present embodiment, (: 4 to 6 is used as the gas containing CxFy (xg2) and CF4, or CxFy is used as N2. After the gas containing CF4 is replaced, the etching of the SiO 2 film 62 is performed through the TiN film 63, and then the etching is stopped, and pores which do not cause fouling in the etching holes are formed. Further, the etching target is not limited to the SiO 2 film. At least one type of SiO 2 , SiC, and SiOC can effectively achieve this effect. Further, TiN is used as the photomask film, and TaN may be used, and other metal nitrides may be used. However, the configuration of the etching apparatus is not limited to those in Fig. 1. [Embodiment] The embodiments of the invention are described.

外加於上部電極高周波電源之周波數：60MHz 外加於上部電極高周波電力 ：1 000WThe number of cycles applied to the upper electrode high-frequency power supply: 60MHz plus the upper electrode high-cycle power: 1 000W

外加於下部電極高周波電源之周波數：2MHz 外加於下部電極高周波電力 ：800W 1293480 (6)The number of cycles applied to the high-frequency power supply of the lower electrode: 2MHz plus the high-frequency power of the lower electrode: 800W 1293480 (6)

晶圓保持體溫度 ：40°C 處理容器內壓力 ：6.65Pa (5 0mToi:r) 鈾刻氣體之流量： C4F6爲 〇.〇18L/min (18sccm) CF4爲 0.1L/min (lOOsccm)Wafer holder temperature: 40 °C Pressure inside the processing vessel: 6.65 Pa (50 mToi: r) Flow rate of uranium engraved gas: C4F6 is 〇.〇18L/min (18sccm) CF4 is 0.1L/min (lOOsccm)

Ar爲 0.6L/min (600sccm) 該條件下，使如圖2於聚矽氧晶圓所設置之Si02膜透過TiN 光罩膜之開口圖型後進行蝕刻。 此結，未產生積垢於鈾刻孔內，亦未引起蝕刻停止。 又，該實施例中將蝕刻氣體中之C4F6變更爲C5F8後， 進行鈾刻後，同樣未產生積垢於蝕刻孔內，亦無出現蝕刻 停頓，可順利進行触刻者。 更於該實施例中將蝕刻氣體中之CF4變更爲比後，使 流量做成2倍之0.2L/min (200sccm)進行蝕刻後，同樣未 產生積垢於蝕刻孔內，亦未出現蝕刻之停頓現象。 由以上說明證明本發&月係使金屬氮化物等金屬化合物 圖型化之Si02膜等之膜藉由含CxFy (X- 2)與CF4之氣體、 含C4F6與N2之氣體電漿後進行蝕刻下，可控制蝕刻停頓， 同時可形成不會產生積垢於蝕刻孔內之孔者。 【圖式簡單說明】 圖1代表適用於本發明之電漿蝕刻裝置之槪略截面圖者 -10- 1293480Ar is 0.6 L/min (600 sccm) Under this condition, the SiO 2 film provided on the polysilicon wafer as shown in Fig. 2 is etched through the opening pattern of the TiN photomask film. At this junction, no scale was formed in the uranium engraved hole, and no etching was stopped. Further, in this embodiment, after C4F6 in the etching gas was changed to C5F8, after uranium engraving, no scale was formed in the etching hole, and no etching pause occurred, and the contact could be smoothly performed. Further, in this embodiment, after the CF4 in the etching gas was changed to a ratio, and the flow rate was doubled to 0.2 L/min (200 sccm), etching was not performed, and no scale was formed in the etching hole, and etching was not observed. Pause. As described above, it has been confirmed that the film of the SiO 2 film or the like in which the metal compound such as a metal nitride is patterned by the present invention is subjected to a gas containing CxFy (X-2) and CF4, and a gas slurry containing C4F6 and N2. Under etching, the etching pause can be controlled, and at the same time, a hole which does not cause fouling in the etching hole can be formed. BRIEF DESCRIPTION OF THE DRAWINGS Fig. 1 represents a schematic cross-sectional view of a plasma etching apparatus suitable for use in the present invention -10- 1293480

圖2代表被處理體之蝕刻對象的截面模式圖者。 主要元件對照表 41 整合器 40 第1高周波電源 1 電漿鈾刻裝置 30 鈾刻氣體供給源 42 低通濾波器 27 氣體供給管 26 氣體導入口 22 絕緣體 28 氣門 29 質量流調整器 2 處理容器 24 電極板 25 支撐體 21 上部電極 15 焦點環 11 靜電夾頭 12 電極 32 閘式閥 5 晶圓保持體 3 絕緣體 13 直流電源 -11 - 1293480Fig. 2 is a cross-sectional pattern diagram showing an object to be etched of the object to be processed. Main component comparison table 41 Integrator 40 1st high-frequency power supply 1 Plasma uranium engraving device 30 Uranium engraving gas supply source 42 Low-pass filter 27 Gas supply pipe 26 Gas introduction port 22 Insulator 28 Valve 29 Mass flow regulator 2 Processing container 24 Electrode plate 25 Support body 21 Upper electrode 15 Focus ring 11 Electrostatic chuck 12 Electrode 32 Gate valve 5 Wafer holder 3 Insulator 13 DC power supply -11 - 1293480

6 高通濾波器 3 1 排氣管 35 排氣裝置 5 1 整合器 50 第2高周波電源 63 氮化鈦膜 62 二氧化矽膜 6 1 氮化矽膜 -126 High-pass filter 3 1 Exhaust pipe 35 Exhaust device 5 1 Integrator 50 2nd high-frequency power supply 63 Titanium nitride film 62 Ceria film 6 1 Tantalum nitride film -12

Claims (1)

1293480 (1) 拾、申請專利範圍 1. 一種電漿蝕刻方法，其特徵係將導入處理容器內之 含CxFy(x-2)與CF4之氣體進行電槳化後， 將此處理容器內被處理體中之膜，透過此膜上金屬化合 物光罩之開口圖型’進行電獎触刻者。 2 ·如申請專利範圍第1項之電漿蝕刻方法，其中該金 屬化合物爲金屬氮化物者。 3 ·如申g靑專利範圍第2項之電漿飩刻方法，其中該金 屬氮化物爲TiN者。 4.如申請專利範圍第2項之電漿蝕刻方法，其中該金 屬氮化物爲TaN者。 5·如申請專利範圍第1項至第4項中任一項之電漿蝕 刻方法’其中該氣體更含有n2者。 6. 如申請專利範圍第1項至第4項中任一項之電漿飩 刻方法’其中該氣體更含有A r者。 7. 如申請專利範圍第1項至第4項中任一項之電漿蝕 刻方法’其中該被處理體中之膜爲si〇2膜者。 8·如申請專利範圍第丨項至第4項中任一項之電漿蝕 刻方法’其中該被處理體中之膜爲SlC膜者。 9·如申請專利範圍第1項至第4項中任一項之電漿蝕 亥ίί：&法’其中該被處理體中之膜爲Si0C膜者。 I 〇·如申請專利範圍第1項至第4項中任一項之電漿 触刻方法，其中該氣體之CxFy (xg 2)爲C4F6者。 II ·如申請專利範圍第1 〇項之電漿蝕刻方法，其中該 -13- 1293480 (2) 氣體針對CF4時C4F6之流量比（C4F6流量/CF4之流量）爲 0.12〜0.20 者。 1 2·如申請專利範圍第1項至第4項中任一項之電漿 蝕刻方法，其中該氣體之CxFy (xg 2)爲C4F8者。 1 3.如申請專利範圍第1項至第4項中任一項之電漿 鈾刻方法，其中該氣體之CxFy (xg 2)爲C5F8者。 14. 一種電漿蝕刻方法，其特徵係使導入處理容器內 之含C4F6與N2之氣體進行電漿化後，將此處理容器內被處 理體中之Si〇2膜，透過此Si〇2膜上之金屬化合物光罩之開 口圖型，進行電漿鈾刻者。 15. —種電漿蝕刻方法，其特徵係使導入處理容器內 之含〇46與N2之氣體進行電漿化後，將此處理容器內被處 理體中之SiC膜，透過此SiC膜上之金屬化合物光罩之開口 圖型，進行電漿蝕刻者。 16. —種電漿蝕刻方法，其特徵係使導入處理容器內 之含C4F6與N2之氣體進行電漿化後，將此處理容器內被處 理體中之SiOC膜，透過此SiOC膜上之金屬化合物光罩之 開口圖型，進行電漿鈾刻者。 1 7 ·如申請專利範圍第1 4項至第1 6項中任一項之電 漿飩刻方法，其中該金屬化合物爲金屬氮化物者。 1 8.如申請專利範圍第1 7項之電漿鈾刻方法，其中該 金屬氮化物爲TiN者。 1 9.如申請專利範圍第1 7項之電漿蝕刻方法，其中該 金屬氮化物爲TaN者。 -14- 1293480 陸、（一） (二） 、本案指定代表圈為：第2圖 、本代表圖之元件代表符號簡單說明： 63 氮化鈦膜 62 二氧化矽膜 6 1 氮化矽膜 W 被處理體 柒、本案若有化學式時，請揭示最能顯示發明特徵的化學 式·· -3-1293480 (1) Pickup, Patent Application Range 1. A plasma etching method characterized in that a gas containing CxFy(x-2) and CF4 introduced into a processing container is electrically padded, and then processed in the processing container The film in the body passes through the opening pattern of the metal compound mask on the film to perform the electric prize. 2. The plasma etching method according to claim 1, wherein the metal compound is a metal nitride. 3. The plasma etching method of claim 2, wherein the metal nitride is TiN. 4. The plasma etching method according to claim 2, wherein the metal nitride is TaN. 5. The plasma etching method according to any one of claims 1 to 4 wherein the gas further contains n2. 6. The plasma etching method of any one of claims 1 to 4 wherein the gas further contains Ar. 7. The plasma etching method according to any one of claims 1 to 4 wherein the film in the object to be treated is a si 2 film. 8. The plasma etching method according to any one of the above claims, wherein the film in the object to be treated is a SlC film. 9. The plasma etching method according to any one of claims 1 to 4 wherein the film in the object to be processed is a SiO film. The plasma-etching method according to any one of claims 1 to 4, wherein the CxFy (xg 2) of the gas is C4F6. II. The plasma etching method according to the first aspect of the patent application, wherein the flow ratio of the C13F6 (the flow rate of the C4F6 flow/CF4) of the -13 to 1293480 (2) gas to the CF4 is 0.12 to 0.20. The plasma etching method according to any one of claims 1 to 4, wherein the CxFy (xg 2) of the gas is C4F8. The plasma uranium engraving method according to any one of claims 1 to 4, wherein the CxFy (xg 2) of the gas is C5F8. A plasma etching method characterized in that after a gas containing C4F6 and N2 introduced into a processing container is plasma-treated, the Si〇2 film in the object to be treated in the processing container is passed through the Si〇2 film. On the opening pattern of the metal compound mask, the plasma uranium engraved. A plasma etching method characterized in that a gas containing cerium 46 and N2 introduced into a processing vessel is plasma-treated, and then a SiC film in the object to be processed in the processing container is passed through the SiC film. The opening pattern of the metal compound mask is used for plasma etching. 16. A plasma etching method characterized in that after a gas containing C4F6 and N2 introduced into a processing container is plasma-treated, the SiOC film in the object to be treated in the processing container is passed through the metal on the SiOC film. The opening pattern of the compound mask is used to perform plasma uranium engraving. A plasma engraving method according to any one of claims 1 to 16, wherein the metal compound is a metal nitride. 1 8. The method of plasma uranium engraving according to claim 17 of the patent application, wherein the metal nitride is TiN. 1 9. The plasma etching method of claim 17, wherein the metal nitride is TaN. -14- 1293480 Lu, (1) (2) The designated representative circle in this case is: Figure 2, the representative symbol of the representative figure is a simple description: 63 Titanium nitride film 62 Ceria film 6 1 Tantalum nitride film W When the object to be treated is used, if there is a chemical formula in this case, please disclose the chemical formula that best shows the characteristics of the invention.
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Publication number Priority date Publication date Assignee Title
US8129282B2 (en) * 2006-07-19 2012-03-06 Tokyo Electron Limited Plasma etching method and computer-readable storage medium
JP4948278B2 (en) * 2006-08-30 2012-06-06 ルネサスエレクトロニクス株式会社 Manufacturing method of semiconductor device
JP5982223B2 (en) * 2012-08-27 2016-08-31 東京エレクトロン株式会社 Plasma processing method and plasma processing apparatus
JP2014220387A (en) * 2013-05-08 2014-11-20 東京エレクトロン株式会社 Plasma etching method
JP6284786B2 (en) 2014-02-27 2018-02-28 東京エレクトロン株式会社 Cleaning method for plasma processing apparatus
KR102224847B1 (en) 2014-10-10 2021-03-08 삼성전자주식회사 method for manufacturing semiconductor device
JP6529357B2 (en) * 2015-06-23 2019-06-12 東京エレクトロン株式会社 Etching method
CN106356297B (en) * 2015-07-16 2019-02-22 中微半导体设备(上海)有限公司 A kind of lithographic method of tantalum nitride TaN film
US10854430B2 (en) 2016-11-30 2020-12-01 Tokyo Electron Limited Plasma etching method
JP7008474B2 (en) * 2016-11-30 2022-01-25 東京エレクトロン株式会社 Plasma etching method
JP6833657B2 (en) 2017-11-07 2021-02-24 東京エレクトロン株式会社 How to plasma etch the substrate
JP7195113B2 (en) * 2018-11-07 2022-12-23 東京エレクトロン株式会社 Processing method and substrate processing apparatus

Family Cites Families (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5300460A (en) * 1989-10-03 1994-04-05 Applied Materials, Inc. UHF/VHF plasma for use in forming integrated circuit structures on semiconductor wafers
US5468339A (en) * 1992-10-09 1995-11-21 Advanced Micro Devices, Inc. Plasma etch process
US5700740A (en) * 1996-03-25 1997-12-23 Taiwan Semiconductor Manufacturing Company Ltd Prevention of corrosion of aluminum interconnects by removing corrosion-inducing species
US5942446A (en) * 1997-09-12 1999-08-24 Taiwan Semiconductor Manufacturing Company, Ltd. Fluorocarbon polymer layer deposition predominant pre-etch plasma etch method for forming patterned silicon containing dielectric layer
JPH11340321A (en) * 1998-05-27 1999-12-10 Sony Corp Semiconductor device and its manufacture
US6007733A (en) * 1998-05-29 1999-12-28 Taiwan Semiconductor Manufacturing Company Hard masking method for forming oxygen containing plasma etchable layer
US6319822B1 (en) * 1998-10-01 2001-11-20 Taiwan Semiconductor Manufacturing Company Process for forming an integrated contact or via
JP2000150463A (en) * 1998-11-16 2000-05-30 Canon Inc Method for etching organic interlayer insulating film
JP2001007202A (en) * 1999-06-22 2001-01-12 Sony Corp Manufacture of semiconductor device
JP4173307B2 (en) * 1999-06-24 2008-10-29 株式会社ルネサステクノロジ Manufacturing method of semiconductor integrated circuit
AU1606101A (en) * 1999-11-15 2001-05-30 Lam Research Corporation Materials and gas chemistries for processing systems
JP3400770B2 (en) * 1999-11-16 2003-04-28 松下電器産業株式会社 Etching method, semiconductor device and manufacturing method thereof
JP2001274264A (en) * 2000-03-24 2001-10-05 Mitsubishi Electric Corp Semiconductor device and manufacturing method therefor
US6410424B1 (en) * 2001-04-19 2002-06-25 Taiwan Semiconductor Manufacturing Company Process flow to optimize profile of ultra small size photo resist free contact

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