1270962 九、發明說明： 【發明所屬之技術領域】 本發明係提供一種製作非揮發性記憶體胞的方法，尤 指一種製作含石夕氧-氮化矽_石夕氧堆疊結構的非揮發性記憶 體胞的方法。 Φ 【先前技術】 一般而言，快閃記憶體主要包含有一用來儲存電荷的浮 置閘極(floating gate)以及一用來控制資料存取的控制閘極 (control gate)設置於浮置閘極上，並藉由一矽氧-氮化石夕一石夕 氧(oxide-nitride-oxide)結構的介電層與浮置閘極相隔離。所 以記憶體可以利用熱電子或穿遂的原理，將感應電荷儲存 於堆疊式閘極中，使記憶體存入訊號，，0，，。如果需要更換記 • ^ 十思體中的資料，只需再供給些許額外的能量，抹除儲存於 浮置閘極中的電子，就可再重新進行資料寫入。 、 而目前應用較廣的非揮發性記憶體胞則是採取矽_石夕氧_ 氡化矽-矽氧-矽（S0N0S)結構，其是應用氮化矽層當作 <荷儲存介質（charge trapping medium)以構成浮置閘極，再 利用穿隧效應或源極側邊注入（source side injection)效應 1270962 之衫來滚電子陷於(trap)浮置閘極中，用以儲存位元。作 若源極與汲極之間的通道太短時，則電子可能會擊穿浮置 閘極，造成此技術在應用於小尺寸之記憶體單元的困難 度，又因為矽-矽氧-氮化矽_矽氧_矽（s〇N〇s)結構抹除 (erase)資料不完全亦會造成唯讀資料的混亂，這使得區域 型矽氧-氮化矽-矽氧記憶體(L〇n〇M)應運而生。 利用來避處間極。這種子 增加光罩及製程的成本， accuracy)的失敗機率大， 不一致，影孿恧敁丑丨丨a ^ 區域型石夕氧-氮化石夕-石夕氧記憶體係藉由區域型的石夕氣、 氮化石夕-石夕氧堆豐結構和不對稱的結構型態達到較好的抹 除資料功效。但是標準的區域财氧·氮切_魏記憶體 製程至少需使用兩道光軍(phGt㈣ask):—道祕趙來形 成]農曼魏生隹却羞，姓二i先罩則是 這種作法不但增加光罩圖案的密集度，1270962 IX. Description of the Invention: [Technical Field] The present invention provides a method for fabricating a non-volatile memory cell, and more particularly to a non-volatile process for fabricating a rock-wound oxygen-containing tantalum oxide-shixi oxygen stack structure. The method of memory cells. Φ [Prior Art] Generally, the flash memory mainly includes a floating gate for storing electric charge and a control gate for controlling data access to the floating gate. The pole is isolated from the floating gate by a dielectric layer of an oxygen-nitride oxide-nitride-oxide structure. Therefore, the memory can store the induced charge in the stacked gate by using the principle of hot electron or through, so that the memory is stored in the signal, 0,,. If you need to replace the data in the body, you only need to supply a little extra energy to erase the electrons stored in the floating gate, and then re-write the data. However, the currently widely used non-volatile memory cells adopt the structure of 矽_石 氧 _ 氡 矽 矽 矽 矽 矽 矽 , , , , , , , , , , , , , , , , , , , , 荷 荷 荷 荷Charge trapping medium) to form a floating gate, and then use a tunneling effect or source side injection effect 1709962 shirt to roll electron trap into the floating gate to store the bit. If the channel between the source and the drain is too short, the electrons may break through the floating gate, which makes the technique difficult to apply to a small-sized memory cell, and because of the 矽-矽---nitrogen矽 矽 矽 矽 矽 〇 〇 〇 〇 〇 结构 结构 结构 结构 结构 结构 结构 结构 不 不 不 不 不 不 不 不 不 不 不 不 不 不 不 不 不 不 不 不 不 不 不 不 不 不 不 不 不 不 不 不n〇M) came into being. Use to avoid the interpolar. This kind of sub-addition of mask and process cost, accuracy) has a large probability of failure, inconsistency, affecting ugly a ^ regional type of Shi Xi oxygen - nitride Xi Xi - Shi Xi oxygen memory system by regional type Shi Xi Gas, nitrite-shixi oxygen heap structure and asymmetric structure type achieve better erase data efficiency. However, the standard regional financial oxygen and nitrogen cut_Wei memory system requires at least two Guangjun (phGt (four) ask): - Dao secret Zhao to form] Nong Man Wei Sheng is shy, surnamed two i hood is this practice not only increases light The density of the hood pattern,
因此如何發展— 憶體製造方法，竇： ^一種更有效的區域型矽氧-氮化矽-矽氧記 貧為談領域之當務之急。 1270962 【發明内容】 本發明係提供一種製作非揮發性記憶體胞的方法，以解 決上述問題。 、 縣發明最佳實_中，係提供—種製造轉發性記憶體胞 (n〇n_V〇latile memory cell)的方法，包含提供一半導體基底形成一 矽氧-氮化矽-矽氧（ΟΝΟ)堆疊結構於該半導體基底表面，形成複 鲁數個遮罩（mask)於該石夕氧-IU匕石夕-石夕氧（ΟΝΟ)堆疊結構上， 形成複數個第一側壁子(spacer)於各該遮罩周圍侧壁，去除未被該 等第一侧壁子和該等遮罩覆蓋之部分該_ 構’去除該等里二倒選子，形成一曼1 導電層的厚度小於該等遮罩之厚度，於該導電層上形成複數個第 二侧壁子環繞於該遮罩周圍侧壁，去除未被該等第二側壁子覆蓋 ^ 切爱該，丛絲除雛笫占側壁子、、讓等遮罩以及被該 、另外，在本發明最佳實施例中，係提供一種製造非揮發性記 憶體胞(non-volatile memory cell)的方法，包含形成一電荷陷阱 (trapping)層於一半導體基底上；形成一複數個遮罩（mask)於該 電荷陷阱(trapping)層上；提供一第一蝕刻(etch)製程形成一第一側 壁子(spacer)於該遮罩周圍側壁與該電荷(trapping)陷阱層上，並自 1270962 土率去除該第—麵子和魏細卜的該输__ng)層； 去除該第-·子；形成—導電層於該等遮罩之間；形成一第二 側壁子於該遮罩顯側壁和該導騎之上；去除該第二側壁子以 7成F甲 1極(gate) ’以及去除該遮罩及該遮罩之下的該電荷 (trapping)陷阱層。 由於本發明係直接利用側壁子當作廬呈㈣ 知技道光罩來達到相同目的，同時因為 光罩的使用減v ’更使得製作失敗機率下降，簡化製程也 降低成本，矽氧-氮化矽_矽氧堆疊結構一致，非揮發性記 憶體胞記憶體表現更穩定。 【實施方式】 請參閱第1圖至第11 圖至第U圖是本發明製 作非揮發性記紐胞㈣，。請見第i圖，首先於-半 導體曰日片1。上’利用熱氧化、化學氣相沈積法(cvd)及旋 轉塗佈依序沈積魏·氮切_魏堆疊結構14 #作電荷陷 阱(trapping)層、遮罩層Ίβ Ν 18和一光阻層（未顯示），接著再 利用-光罩（未顯7K)來進行微影製程，並將光罩（未顯 示）上之光罩圖案曝光顯影於光阻層（未顯示）中，形成 1270962 罩 ^ 罩19所覆盍的遮罩層18，形成遮罩22。其中，製備遮罩 2的方式除了上述之黃光暨蝕刻製程外，亦可直接利用一 "本"龟系數材料（photo-chemical low-k material)等之 感光性材料來取代，以省略塗佈光阻及制等製程。 、在去除光阻遮罩19之後，如第2圖所示，接著再均勻 ^貝側壁子層24，並利用·回飯刻（etch back)製程來去除 部分的侧壁子層24，直至魏德切，氧堆疊結構Μ表 7以形成被繞於遮| 22周圍側壁與石夕氧_氮化石夕一石夕氧 叠結構Μ上之側壁子34，接著以側壁子別當作遮罩 :用同日恤成则的方式，再自對準去除遮罩22和側 土子34以外的部分石夕氧遺化石夕—石夕氧堆疊結構μ， :體：°表面，形成如第3圖所示⑽^ :豐、、、。㈣上有遮罩22和環繞於遮罩22 子34的結構。 土<侧壁 值得注意岐，在㈣遮罩層18時，係 層16當作為蝕刻停止層， ’、、、、虱化」 增肖以保護蝕刻後之矽氧、鑛几, 石氧堆疊結構14的完整性’而利用側壁子 缓 乳化物層16與部分的錢·氮化㈣氧堆疊結構14^ 1270962 = 氮化發，氧堆疊結構14中最底層之W36 壞或導:避免祕刻製程和後續之清洗程序直接破 遮i層::？片10表面、 曰1 土子層24亦可視製程條件、產品設計及姓 =勻性之需求來考量該等材料之搭配組合，原則上，只 要旎滿足餘刻選擇比之不同即可。So how to develop - the method of making body, sinus: ^ A more effective regional type of argon-nitriding 矽 - 矽 记 贫 贫 贫 贫 贫 贫 。 。 。 。 。 。 。 。 。 。 。 1270962 SUMMARY OF THE INVENTION The present invention provides a method of making a non-volatile memory cell to solve the above problems. And a method for manufacturing a transfer memory cell (n〇n_V〇latile memory cell), comprising providing a semiconductor substrate to form a germanium-oxygen-nitride-oxygen (ΟΝΟ) Stacking a structure on the surface of the semiconductor substrate to form a plurality of masks on the stack structure of the 夕 氧 - 匕 夕 夕 夕 石 石 石 , , , , , , , , 于 于 于Removing a sidewall of each of the masks from the sidewalls of the mask and the masks to remove the two inverted columns to form a conductor layer having a thickness smaller than the thickness of the conductor layer a thickness of the mask, a plurality of second sidewalls are formed on the conductive layer to surround the sidewall of the mask, and the second sidewall is not covered by the second sidewall, and the ridge is removed from the sidewall. And, in addition to, in the preferred embodiment of the invention, a method of fabricating a non-volatile memory cell comprising forming a trapping layer On a semiconductor substrate; forming a plurality of masks on the charge a trapping layer; providing a first etch process to form a first spacer on the sidewall of the mask and the trapping trap layer, and removing the first layer from 1709962 a layer of the surface and the __ng layer of the Weiweibu; removing the first--; forming a conductive layer between the masks; forming a second sidewall on the sidewall of the mask and the guide Removing the second sidewall from 7 to F and removing the trap and the trapping trap layer under the mask. Since the present invention directly utilizes the side wall as a (4) ray mask to achieve the same purpose, and because the use of the reticle reduces v ', the probability of failure of production is reduced, the process is simplified, and the cost is reduced. _ 矽 oxygen stack structure is consistent, non-volatile memory cell memory performance is more stable. [Embodiment] Referring to Figures 1 to 11 to Figure U, the present invention is a non-volatile memory cell (4). Please refer to the i-th picture, first in the - semiconductor 曰 1 1 . On the 'Using Thermal Oxidation, Chemical Vapor Deposition (cvd) and spin coating to deposit Wei·Nu-cut _Wei stack structure 14 as charge trapping layer, mask layer Ίβ Ν 18 and a photoresist layer (not shown), then the lithography process is performed using a photomask (not shown 7K), and the reticle pattern on the reticle (not shown) is exposed and developed in a photoresist layer (not shown) to form a 1270962 hood. ^ The mask layer 18 covered by the cover 19 forms a mask 22. The method for preparing the mask 2 may be replaced by a photosensitive material such as a photo-chemical low-k material instead of the above-mentioned yellow light and etching process. Coating photoresist and manufacturing processes. After removing the photoresist mask 19, as shown in FIG. 2, the sidewall sub-layer 24 is then uniformly applied, and part of the sidewall sub-layer 24 is removed by an etch back process until Wei Deche, the oxygen stack structure is shown in Table 7 to form a side wall 34 which is wound around the side wall of the cover 22 and the Xiyang oxygen_nitridite Xi Shishi oxygen stack structure, and then the side wall is used as a mask: The method of forming the shirt, and then self-aligning to remove the part of the mask 22 and the side soil 34 other than the side of the stone, the Xi Shi oxygen stack structure μ, : body: ° surface, formed as shown in Figure 3 (10) ^ : Feng,,,. (d) having a mask 22 and a structure surrounding the mask 22 sub. The soil < sidewall is noteworthy, in the (four) mask layer 18, the layer 16 as an etch stop layer, ',,,,,,,,,,,,,,,,,,,,,,,,,,,, The integrity of the structure 14' utilizes the sidewall sub-emulsion layer 16 and a portion of the carbon-nitride (tetra) oxygen stack structure 14^1270962 = nitrided, the lowest layer of the oxygen stack 14 is W36 bad or guided: avoiding secrets The process and subsequent cleaning procedures directly break the i-layer::? The surface of the film 10 and the surface layer of the 曰1 soil layer 24 can also be considered in terms of process conditions, product design and surname = uniformity to consider the combination of the materials. In principle, it is only necessary to satisfy the choice of the remaining time.
接下來請參閱第4圖，先去除側壁子34以及被側壁子 34所覆蓋的緩衝氮化物層16，再拥熱氧化(加⑽ —η)製程，以於任兩相鄰之石夕氧氮化石夕_石夕氧堆叠結 構14間的半導體晶片ισ表面重新生成—品質較好的問相 氧化層（gate〇xidelayer)42。其中，在生成閘極氧化層42 之前’可先完全去除石夕氧_氮化石夕_石夕氧堆疊結構14中最底 層之矽氧層，再進行該熱氧化製程。 如第5圖所示，接著於半導體晶片1〇上均勻沈積一導 電層52,其可為單一之摻雜多晶矽層、金屬矽化物(silicide) 層或是摻雜多晶矽層與金屬矽化物層的複合結構層。然後 利用遮罩22當作停止層來對導電層π進行一化學機械研 磨（CMP)，直到呈現第6圖中，導電層52和遮罩22等高 的情況後便可停止該化學機械研磨製程。隨後再回钱刻導 11 1270962 電層52,以使各遮罩22均突出於餘刻後的導電層u表面， 如同第7圖所示。 之後再於半導體晶片1〇上均句沈積一侧壁子層糾，如 第8圖所^並利用龍刻製程來去除部分的侧壁子層 84，直至導電層52表面，以使得侧壁子層似形成如第9 圖中的側壁子94，環繞於遮罩22周圍侧壁和導電層52上 I方接著利用側壁子94當為閘極遮罩，來對導電層幻進 行一閘極自對準餘刻製程，以錢刻後的導電層52形成如 第10圖中的閘極1〇2。隨後進行一離子佈植，以於問極收 未和遮罩22連接的一側植入離子，形成汲極(drain)(未顯 示），最後再去除側壁子94。 〜 如帛11圖所示，接著去除遮罩22、遮罩22下方的緩衝 IUb物;I 16㈣氧_氮切_錢堆疊結構14，並於原遮罩 22處’亦即兩兩相鄰之閘極102間的源極區域112，再進 行-離子佈植，以於源極區域112的基底12中形成源極 (source)114。最後再填入介電層於丰導體晶片10上，並利 用微影與餘刻製程，於各汲極（未顯示）上方形成接觸窗 開口(未顯示），然後將金屬填入接觸窗開口中，以製備金 屬接觸(metal contact)，並依照設計完成多重金屬内連線 12 1270962 Λ (multilevel interconnects)，再加上保護層（passivati〇n)，則 可形成功用完整的非揮發性記憶體胞。 和習知技術相較，過去矽氧-氮化矽_矽氧記憶體製程至 少需使用兩這光罩，一道光罩形成區域型矽氧_氮化矽_矽 氧堆疊結構，另外一道光罩則利用來形成閘極，這種作法 不但增加光罩圖案的密集度，增加光罩及製程的成本，同 日π也口為對準精確度(alignment accuracy)的失敗機率大，而 使得石夕氧_氮切，氧堆疊結構不―致，影響區域型石夕氧_ 氮化石夕·錢記憶體表現，所以常需要重卫(簡叫而大幅 提高成本，甚至報廢，嚴重降低產能(throughput)。但是， J 34^ 94當並I—對準遮罩使可 ㈣兔處1紐 .〜實撕於的〜—〜，办〆,：，〜·”〜，— ， " * Xj^ - *^1 s f @&[m 來達到相 同目的，同時因為光罩的使用減少，而且是利用自對準 (self_alignmen⑽方式製作，因此對準精確度提高、積隼度 簡㈣程也降低成本，更使财氧氮切_石夕氧堆 且…構致’非揮發性記憶體胞記憶體表現更穩定。 条以上所述僅為本㈣之較讀_，凡依本發明申 利範圍所做之均等變、#访 、化/、修飾，皆應屬本發明之涵蓋範圍。 13 1270962 【圖式簡單說明】 第1圖至第11圖是本發明製作非揮發性記憶體胞的流程 圖。 【主要元件符號說明】 10 半導體晶片 12 基底 14 碎乳-氣化碎-碎乳堆豐結構 16 緩衝氮化物層 18 遮罩層 19 光阻遮罩 22 遮罩 24、84側壁子層 36 矽氧層 34、94側壁子 42 閘極氧化層 52 導電層 102 閘極 112 源極區域 114 源極 14Next, referring to FIG. 4, the sidewall spacers 34 and the buffer nitride layer 16 covered by the sidewall spacers 34 are removed first, followed by a thermal oxidation (plus (10)-n) process for any two adjacent stones. The surface of the semiconductor wafer ισ between the fossil eve_stone oxide stack structure 14 is regenerated - a good quality gate oxide layer 42. Wherein, before the gate oxide layer 42 is formed, the bottom layer of the tantalum oxide layer in the Xiyang oxygen_nitriditium oxide-shixi oxygen stack structure 14 may be completely removed, and then the thermal oxidation process is performed. As shown in FIG. 5, a conductive layer 52 is then uniformly deposited on the semiconductor wafer 1 , which may be a single doped polysilicon layer, a metal silicide layer or a doped polysilicon layer and a metal halide layer. Composite structural layer. Then, a chemical mechanical polishing (CMP) is performed on the conductive layer π by using the mask 22 as a stop layer until the conductive layer 52 and the mask 22 are equal in the sixth figure, and the chemical mechanical polishing process can be stopped. . Then return the money to engrave 11 1270962 electrical layer 52, so that each mask 22 protrudes from the surface of the remaining conductive layer u, as shown in Fig. 7. Then, a sidewall sub-layer correction is deposited on the semiconductor wafer, and as shown in FIG. 8 , a portion of the sidewall sub-layer 84 is removed by a dragon engraving process until the surface of the conductive layer 52, so that the sidewalls are The layer is formed as a side wall 94 as shown in FIG. 9, surrounding the side wall of the mask 22 and the conductive layer 52, and then using the side wall 94 as a gate mask to perform a gate on the conductive layer. In alignment with the engraving process, the gate layer 1〇2 in FIG. 10 is formed by the conductive layer 52 after the engraving. An ion implantation is then performed to implant ions on the side where the junction is not connected to the mask 22, to form a drain (not shown), and finally to remove the sidewalls 94. ~ As shown in Fig. 11, the mask 22 and the buffered IUb under the mask 22 are removed; the I 16 (tetra) oxygen-nitrogen cut_money stack structure 14 is adjacent to the original mask 22, that is, adjacent to each other. The source region 112 between the gates 102 is further ion implanted to form a source 114 in the substrate 12 of the source region 112. Finally, a dielectric layer is further filled on the abundance conductor wafer 10, and a contact opening (not shown) is formed over each of the drain electrodes (not shown) by using a lithography and a process, and then the metal is filled into the contact window opening. In order to prepare metal contacts and complete the multi-metal interconnects 12 1270962 Λ (multilevel interconnects) according to the design, together with the protective layer (passivati〇n), the complete non-volatile memory cells can be successfully used. . Compared with the prior art, in the past, at least two reticles were used for the 矽---矽 矽 矽 记忆 memory system, and a reticle formed a regional type 矽 _ 矽 矽 矽 矽 矽 矽 堆叠 , , , , , , , It is used to form the gate. This method not only increases the density of the mask pattern, but also increases the cost of the mask and the process. On the same day, the probability of failure of the alignment accuracy is large, and the stone is oxygen. _ Nitrogen cut, the oxygen stack structure does not cause, affecting the regional type of Shi Xi oxygen _ nitrite Xi Qian memory performance, so often need to re-defend (short call to significantly increase costs, and even scrapped, severely reduce the throughput (throughput). However, J 34^ 94 and I-align the mask so that (4) rabbits at 1 New York. ~ Really teared ~ ~ ~, 〆, :, ~·"~, —, " * Xj^ - * ^1 sf @&[m to achieve the same purpose, because the use of the mask is reduced, and the self-alignment (self_alignmen (10) method is used, so the alignment accuracy is improved, and the accumulation is simple (four) process also reduces the cost, Cut the oxygen and nitrogen nitrogen _ Shi Xi oxygen heap and ... constitute a 'non-volatile memory cell The above-mentioned performance is more stable. The above is only the reading of this (4), and all the equivalents, # visits, and/or modifications made in accordance with the scope of the invention shall fall within the scope of the present invention. 1270962 [Simple Description of the Drawings] Figs. 1 to 11 are flow charts of the present invention for producing non-volatile memory cells. [Description of main components] 10 Semiconductor wafer 12 Substrate 14 Ground milk-gasification crushed-milk heap Abundant structure 16 buffer nitride layer 18 mask layer 19 photoresist mask 22 mask 24, 84 sidewall sublayer 36 germanium oxide layer 34, 94 sidewall spacer 42 gate oxide layer 52 conductive layer 102 gate 112 source region 114 Source 14