1270942 九、發明說明： 【發明所屬之技術領域】 ' 本專利申請案主張德國專利申請案102004026231.4-33 . 之優先權，其已揭示的內容於此作爲參考。 本發明涉及一種依據申請專利範圍第1項前言之導電性 111 - V半導體層之製造方法以及一種依據申請專利範圍第 1 6或1 7項前言之光電半導體組件。 光電半導體組件（特別是電致發光二極體或半導體雷射裝 • 置）中，通常期望適當地藉由半導體層之各別的部份區域使 流經半導體本體之電流轉向，以提高該組件的效率。 例如，在發出輻射用的光電組件中電流不會注入至電性 連接接觸區（連接墊）之下方，此乃因活性區之位於該連接接 觸區下方之區域中所產生的電磁輻射之佔有大比例的成份 已在該連接接觸區之內部中被吸收，且因此不會由該組件 中發出。 此外’通常亦期望光電半導體組件之由電流所流過的面 B 積被限制在半導體晶片之一部份區域上，以便在該部份區 域中達成一種高的電荷載體密度且因此使光電組件達成一 種較短的切換時間。 【先前技術】 使經由半導體組件之電流路徑受到影響所用的習知方法 是使電性連接接觸區下方墊上一種隔離層，使質子植入半 r -— 導體層之一部份區域中或使磊晶製成的A1 As層被選擇性地 氧化’以便以此種方式製成電流限制用的阻隔件。 、----------〜 Ϊ270942 在具有高的橫向導電性之半導體材料中，電性連接接觸 區下方墊上一種隔離層時的有效性當然只限制在表面附近 、 之區域上，此乃因半導體材料本身之導電性不會因此而受 _ 影響。反之，利用先前之質子植入法或AlAs層被選擇性地 氧化，則可使半導體層之各別的部份區域之導電性改變。 當然，這些方法在技術上較昂貴。： 【發明內容】 本發明的目的是提供一種方法，藉此能以較少的耗費而 • 在導電性的ΠΙ-ν气導體層內部中產生一種導電性已下降 的區域，本發明另提供一種有利的光電組件，其具有上述 之III-V半導體層。 上述目的以申請專利範圍第1項的方法或申請專利範圍 第1 6或1 7項的光電半導體組件來達成。本發明有利的其 它形式描述在申請專利範ji各附屬項中。 在導電性的III-V半掌體層內部中製成至少一種導電性 已下降的區域所用的方法中，依據本發明須在半導體層之 I 區域上施加一種ZnO層且隨後進行退火。藉由本方法因此 可有利地在III-V半導體層內部中產生一種區域，此區域中 之導電性相對於III-V半導體層之與導電性已下降的區域 ' 相鄰的區域而言已下降。例如，111 - V半導體層具有導電率 ' σ!，且在導電性的ΠΙ-ν半導體層內部中產生一種區域，其 具有一較還小的導電率σ2，則〇2<σι。 Ζ η 0層較佳是在溫度小於1 5 0 °C (較佳是在2 5 °C (含）和1 2 0 °C (含）之間）時沈積在-半導體材料上。ZnO層可有利 1270942 地藉由濺鍍法施加而成。隨後所進行的退火較佳是在溫度 3 〇 0 °C和5 0 0 °C之間進行。 ' 爲了界定上述的區域（其中半導體層的導電性應下降），則 . 例如可藉由微影術或一種剝離（Lift-Off)技術使ZnO層被結 構化。爲了改良ZnO層之導電性，則ΖηΟ層可以鋁來摻雜， 較佳是以濃度至多3%之鋁來摻雜。 本發明以下述的認知爲基準：III-V半導體層之導電性（特 別是橫向導電性）可藉由施加一種ZnO層且隨後以退火過程 • 而適當地受到影響。特別是已證實：III-V半導體層之導電 性之下降是與溫度有很大的關係，其中III-V半導體層中已 施力□ ZnO層。在沈積溫度小於150°c時，則例如可使III-V 半導體層之導電性下降至少2倍，較佳是下降至少5倍且 特別是可下降至少倍。另一方面，III-V半導體層之導 電性在溫度大於15〇°C時（例如，在2 5 0 °C時）可藉由施加ZnO 層且隨後進行退火而受到較小的影響，較佳是甚至只微不 足道地受到影響。 B ZnO層可在退火之後去除或亦可保留在半導體層上且例 如在光電組件之內部中用作電流擴大層。 本發明的方法特別適用於ΙΠ-V半導體層，其含有半導體 ' 材料 InuyGaxAlyP，其中 Ogxgl，OSySl 且 0Sx + y$l ' 或Ali_xGaxAs，其中OSxSl。III-V半導體層較佳是p摻 雜者。 在本發明的一種較佳的方法中，III-V半導體層包含在一 種光電組件中，特別是包含在電致發光二極體中或包含在 1270942 半導體雷射裝置中。在一種特別優良的實施形式中，光電 組件包含一種輻射發射用的活性區且藉由導電性已下降的 ' 區域使流經活性區之一部份區域的電流下降。因此，導電 ^ 性已下降的區域可有利地配置在光電組件之電性連接接觸 區和活性區之間。 本發明之方法之另一種有利的形式是在半導體層之第一 區域上沈積第一 ZnO層且在在半導體層之第二區域上沈積 第二ZnO層，其中第二ZnO層之沈積溫度較第一 ZnO層之 ® 沈積溫度還高，以便在隨後的退火過程中使半導體層之第 二區域之導電性至少可下降成較第一區域之導電性還低。 較佳是在溫度大於150°C時（例如，在250°C時）施加第二ZnO 層。 此外，本發明的範圍中設有一種光電半導體組件，其含 有一種III-V半導體層，此III-V半導體層具有至少一以本 發明的方法所製成的導電性已下降的區域。 本發明之光電半導體組件之一種較佳的實施形式具有 B ιπ-ν半導體層，其在至少一第一區域中以Zn〇層覆蓋，其 中在以ZnO層覆蓋之第一區域中半導體本體之導電性小於 半導體層之橫向相鄰區域之導電性。 " 111 — V半導體層之第一區域之導電性較半導體層之橫向相 鄰區域之導電性至少小2倍，較佳是至少小5倍且特別好 的情況是至少小1 0倍。111 - v半導體層較佳是包含半導體 材料 iiM_x_yGaxAiyp，其中 0‘χ^1，且0 或Al^GaxAs，其中O^x^l中之一種。 1270942 在半導體層之第二區域上可沈積第二ZnO層，其中半導 體層之第二區域之導電性大於第一區域之導電性。 、 特別是第一 ZnO層和第二ZnO層係相鄰接且配置在光電 . 組件之III-V半導體層和連接接觸區之間。第一 Zn0層和第 二ZnO層因此以有利的方式共同形成一種電流擴大層。 光電半導體組件較佳是含有一種輻射發射用的活性區， 其中導電性已下降的區域配置在光電組件之電性連接接觸 區和活性區之間，以使注入至活性區之與連接接觸區相面 ® 對的區域中的電流減少。因此，該區域中所產生的輻射即 可減少且連接接觸區中的吸收率亦可有利地下降。 本發明以下將依據第1，2圖中之二種實施例來描述。 【實施方式】 相同或作用相同的元件在各圖中以相同的參考符號來表 不 ° 本發明光電組件在第1 a，1 b圖中所示的第一實施例在基 板2上包含至少一種p摻雜的111 - v半導體層3和至少一種 I η摻雜的半導體層5，此二層之間形成一種輻射發射用的活 性區4。只顯示於第1 b圖中的半導體層序列3，4，5在本 發明的範圍中可具有一種對電致發光二極體或半導體雷射 裝置而言是任意形式之一般實施形式。特別是亦可設有量 子層以作爲輻射發射用的活性區4。 在III-V半導體層3之部份區域8上施加一種第一 ZnO 層1 ’其在溫度25 t和120°C之間藉由濺鍍過程沈積而成。 在溫度3 0 0 °C和5 0 0 °C之間藉由第一 ZnO層1沈積之後所進 1270942 行的退火過程而在II Ι-ν半導體層3內部中產生一種導電性 已下降的區域8。 、 第二ZnO層6在橫向中鄰接於第一 ZnO層1，相對於第 . 一 ZnO層1而言，第二ZnO層6是在大於150°C (例如，大 約2 5 0 °C )時的較高的沈積溫度中施加而成。 第一 ZnO層1和第二ZnO層6之施加過程例如可以下述 方式來進行：首先，在III-V半導體層3之整面上施加第二 ZnO層6，且隨後以第一遮罩層來覆蓋，第一遮罩層在一種 • 爲第一 ZnO層所設置的部份區域中含有一種開口。第二ZnO 層6在此部份區域中例如以一種蝕刻方法而被去除且隨後 在一種小於1 5 0 °C之沈積溫度中施加第一 ZnO層1。然後， 施加第一連接接觸區7。由第二ZnO層6之以遮罩層覆蓋 的區域中使第一 ZnO層1-和該連接接觸區7之在該區域中 所沈積的材料都與遮罩層一起被去除（剝離（Lift-Off)技 術）。然後，在溫度3 00 °C和5 0 (TC之間進行退火，以便在第 一 ZnO層1之內部中產生一導電性已下降的區域8。 B 藉由此一導電性已下降的區域8，則電流可有利地在活性 區4之未與該連接接觸區7相面對的區域中由第一 ZnO層 1上的電性連接接觸區7導引至第二連接接觸區9，其例如 配置在基板2之迷離該活性區4之背面上。電流由連接接 觸區7至半導體層內部3中的活性區4所經過的較佳路徑 在第1 b圖中以箭頭1 0來表示。此種形式的電流路徑1 0之 優點是：由光電組件所發射的輻射中只有一小部份會產生 在活性區4之與該連接接觸區7相面對的區域中。因此， -10- 1270942 該連接接觸區7中的吸收損耗較低。 本實施例中第一 Zn0層1和第二ZnO層6相鄰接且共同 ' 形成一種電流擴大層。各z n 0層1，6可有利地以鋁來摻雜 . 至3 %。由於Ζ η 0層1，6之良好的橫向導電性（其亦可在退 火步驟中保持著），則電流可由連接接觸區7經由第一 ZnO 層1和第二ZnO層6而注入至III-V半導體層3之導電性未 下降-或只稍微下降之區域中。 本發明之光電組件之在第2a，2b圖中所示的第二實施例 Φ 不同於第1圖之處是：電流不是經由第二ZnO層6而施加 至半導體層3中而是經由一種以結構化的形式施加至半導 體層3上的接觸層1 1來達成。此接觸層1 1較佳是一種金 屬層，其適合用來在半導體層3上形成一種歐姆接觸區且 特別是可含有金，鋅（Zn)或這些材料的化合物。 由第2 a圖可知，接觸層1 1被結構化成其在俯視圖中所 描繪的正方形輪廓。另一方式是該接觸層1 1亦可具有另一 種結構形式。該接觸層1 1經由連接條1 2而與配置在中央 B 的連接接觸區7相連接。 由第2b，2c圖所示的橫切面可知，就像第一實施例一樣， 該連接接觸區7配置在第一 ZnO層1上，第一 ZnO層1依 ' 據前述的方法而施加在III-V半導體層3上且退火以使其下 方區域之導電性下降。本實施例中與該連接接觸區7相面 對的區域8中該III-V半導體層3之導電性因此會下降，使 電流經由接觸層1 1而優先進入活性區4之未與該連接接觸 區7相面對的區域中。由光電組件所發出的輻射之在該連 -11- 1270942 接接觸區7中的吸收率於是可下降且因此可使該組件的效 率提高。 本發明不限於上述依據實施例所作的描述。反之，本發 明包含其每一新的特徵和各特徵的每一種組合，其特別包 含各申請專利範圍中各特徵的每一種組合，當該特徵或該 組合本身未明顯地顯示在各申請專利範圍中或各實施例中 時亦同。 【圖式簡單說明】 第1 a圖本發明之第一實施例之光電組件之俯視圖。 第1 b圖係沿著本發明第1 a圖中所示之實施例之線AB 之橫切面之圖解。 第2 a圖本發明之第二實施例之光電組件之俯視圖。 第2 b圖係沿著本發明第2 a圖中所示之實施例之線C D 之橫切面之圖解。 第2c圖係沿著本發明第2a圖中所示之實施例之線EF 之橫切面之圖解。 【主要元件符號說明】 1 第一 ZnO層 2 基板 3 p摻雜的111 - V半導體層 4 活性層 5 η摻雜的III-V半導體層 6 第二ZnO層 7 第一連接接觸區 Ϊ270942 8 導 電 性 已 下 降 的區域 9 第 二 連 接 接 觸 區 10 冃U 頭 11 接 觸 層 12 連 接 條</ RTI> <RTIgt; </ RTI> <RTIgt; </ RTI> <RTIgt; </ RTI> <RTIgt; </ RTI> <RTIgt; </ RTI> <RTIgt; </ RTI> <RTIgt; The present invention relates to a method of manufacturing a conductive 111 - V semiconductor layer according to the preamble of claim 1 and an optoelectronic semiconductor component according to the preamble of claim 16 or 17. In an optoelectronic semiconductor component, in particular an electroluminescent diode or a semiconductor laser device, it is generally desirable to appropriately divert the current flowing through the semiconductor body by respective partial regions of the semiconductor layer to enhance the component. s efficiency. For example, in a photovoltaic module for emitting radiation, current is not injected under the electrical connection contact region (connection pad) because the electromagnetic radiation generated by the active region in the region below the connection contact region is large. The proportions of the ingredients have been absorbed in the interior of the joint contact zone and are therefore not emitted by the assembly. Furthermore, it is generally also desirable that the surface B product of the optoelectronic semiconductor component through which current flows is limited to a portion of the semiconductor wafer in order to achieve a high charge carrier density in the partial region and thus the optoelectronic component is achieved. A short switching time. [Prior Art] A conventional method for affecting the current path through a semiconductor component is to place an isolation layer under the electrical connection contact region to implant a proton into a portion of the half-r--conductor layer or to cause a beam. The crystallized A1 As layer is selectively oxidized' to form a current limiting barrier in this manner. ,----------~ Ϊ270942 In semiconductor materials with high lateral conductivity, the effectiveness of electrically connecting a spacer under the contact area is of course limited only to the area near the surface. This is because the conductivity of the semiconductor material itself is not affected by this. On the contrary, the conductivity of the respective partial regions of the semiconductor layer can be changed by the prior proton implantation or the selective oxidation of the AlAs layer. Of course, these methods are technically more expensive. SUMMARY OF THE INVENTION An object of the present invention is to provide a method whereby a region having reduced conductivity can be produced in the interior of a conductive ΠΙ-ν gas conductor layer with less expense, and the present invention further provides a An advantageous optoelectronic component having the above-described III-V semiconductor layer. The above object is achieved by the method of claim 1 or the optoelectronic semiconductor component of claim 16 or 17. Other forms that are advantageous in the present invention are described in the respective patent applications. In the method for forming at least one region of reduced conductivity in the interior of the conductive III-V half-powder layer, a layer of ZnO is applied to the region I of the semiconductor layer in accordance with the invention and subsequently annealed. By this method it is thus advantageously possible to create a region in the interior of the III-V semiconductor layer in which the conductivity in the region has decreased with respect to the region of the III-V semiconductor layer adjacent to the region where the conductivity has decreased. For example, the 111 - V semiconductor layer has a conductivity ' σ ! and a region is created in the interior of the conductive ΠΙ-ν semiconductor layer having a relatively small conductivity σ2, then 〇2 < σι. The η η 0 layer is preferably deposited on the - semiconductor material at a temperature of less than 150 ° C (preferably between 25 ° C (inclusive) and 120 ° C (inclusive)). The ZnO layer can be applied by sputtering in favor of 1270942. The subsequent annealing is preferably carried out at temperatures between 3 〇 0 °C and 500 °C. In order to define the above region (wherein the conductivity of the semiconductor layer should be lowered), the ZnO layer can be structured, for example, by lithography or a lift-off technique. In order to improve the conductivity of the ZnO layer, the ΖnΟ layer may be doped with aluminum, preferably doped with aluminum at a concentration of up to 3%. The present invention is based on the recognition that the conductivity (especially the lateral conductivity) of the III-V semiconductor layer can be suitably affected by the application of a ZnO layer and subsequent annealing. In particular, it has been confirmed that the decrease in the conductivity of the III-V semiconductor layer is largely dependent on the temperature in which the ZnO layer has been applied to the III-V semiconductor layer. When the deposition temperature is less than 150 ° C, for example, the conductivity of the III-V semiconductor layer can be reduced by at least 2 times, preferably by at least 5 times and, in particular, by at least a factor of two. On the other hand, the conductivity of the III-V semiconductor layer is less affected by the application of the ZnO layer and subsequent annealing, at a temperature greater than 15 ° C (for example, at 250 ° C), preferably. It is even affected insignificantly. The B ZnO layer may be removed after annealing or may remain on the semiconductor layer and, for example, as a current spreading layer in the interior of the photovoltaic module. The method of the invention is particularly applicable to a ΙΠ-V semiconductor layer comprising a semiconductor 'material InuyGaxAlyP, wherein Ogxgl, OSySl and 0Sx + y$l ' or Ali_xGaxAs, wherein OSxSl. The III-V semiconductor layer is preferably a p-doped person. In a preferred method of the invention, the III-V semiconductor layer is comprised in an optoelectronic component, particularly in an electroluminescent diode or in a 1270942 semiconductor laser device. In a particularly preferred embodiment, the optoelectronic component comprises an active region for radiation emission and the current flowing through a portion of the active region is reduced by a region where the conductivity has decreased. Therefore, the region where the conductivity has decreased can be advantageously disposed between the electrical connection contact region of the photovoltaic module and the active region. Another advantageous form of the method of the present invention is to deposit a first ZnO layer on a first region of the semiconductor layer and a second ZnO layer on a second region of the semiconductor layer, wherein the second ZnO layer is deposited at a lower temperature The deposition temperature of a ZnO layer is also high so that the conductivity of the second region of the semiconductor layer can be reduced at least to a lower conductivity than the first region during the subsequent annealing. Preferably, the second ZnO layer is applied at a temperature greater than 150 ° C (e.g., at 250 ° C). Furthermore, it is within the scope of the invention to provide an optoelectronic semiconductor component comprising a III-V semiconductor layer having at least one region of reduced conductivity produced by the method of the invention. A preferred embodiment of the optoelectronic semiconductor component of the invention has a B ππ-ν semiconductor layer which is covered by a Zn 〇 layer in at least a first region, wherein the semiconductor body is electrically conductive in a first region covered by the ZnO layer The conductivity is less than the conductivity of the laterally adjacent regions of the semiconductor layer. < 111 - The conductivity of the first region of the V-semiconductor layer is at least 2 times less than that of the laterally adjacent region of the semiconductor layer, preferably at least 5 times smaller and particularly preferably at least 10 times smaller. The 111 - v semiconductor layer preferably comprises a semiconductor material iiM_x_yGaxAiyp, wherein 0 'χ^1, and 0 or Al^GaxAs, of which one of O^x^l. 1270942 A second ZnO layer can be deposited on the second region of the semiconductor layer, wherein the second region of the semiconductor layer is more conductive than the first region. In particular, the first ZnO layer and the second ZnO layer are adjacent to each other and disposed between the III-V semiconductor layer of the optoelectronic component and the connection contact region. The first Zn0 layer and the second ZnO layer thus jointly form a current spreading layer in an advantageous manner. Preferably, the optoelectronic semiconductor component comprises an active region for radiation emission, wherein the region where the conductivity has decreased is disposed between the electrically connected contact region of the optoelectronic component and the active region, so as to be injected into the active region and the contact contact region. The current in the area of the Face® is reduced. Therefore, the radiation generated in this region can be reduced and the absorption rate in the connecting contact region can also be advantageously lowered. The invention will be described below in terms of two embodiments in Figures 1 and 2. [Embodiment] The same or similar elements are denoted by the same reference symbols in the respective drawings. The first embodiment shown in the first embodiment of the photovoltaic module of the present invention includes at least one type on the substrate 2. A p-doped 111 - v semiconductor layer 3 and at least one I η -doped semiconductor layer 5 form an active region 4 for radiation emission between the two layers. The semiconductor layer sequences 3, 4, 5 which are only shown in Fig. 1b can have a general embodiment of any form for the electroluminescent diode or semiconductor laser device within the scope of the invention. In particular, a quantum layer can also be provided as the active region 4 for radiation emission. A first ZnO layer 1' is applied over a portion 8 of the III-V semiconductor layer 3 which is deposited by a sputtering process at temperatures between 25 t and 120 °C. A region of reduced conductivity in the interior of the II Ι-ν semiconductor layer 3 is formed between the temperature of 300 ° C and 500 ° C by an annealing process of 1709942 lines after deposition of the first ZnO layer 1 8. The second ZnO layer 6 is adjacent to the first ZnO layer 1 in the lateral direction, and the second ZnO layer 6 is greater than 150 ° C (for example, about 250 ° C) with respect to the first ZnO layer 1 Applied at a higher deposition temperature. The application process of the first ZnO layer 1 and the second ZnO layer 6 can be performed, for example, by first applying a second ZnO layer 6 over the entire surface of the III-V semiconductor layer 3, and then using the first mask layer To cover, the first mask layer contains an opening in a portion of the area provided for the first ZnO layer. The second ZnO layer 6 is removed in this partial region, for example by an etching method, and then the first ZnO layer 1 is applied at a deposition temperature of less than 150 °C. Then, the first connection contact region 7 is applied. The region of the second ZnO layer 6 covered by the mask layer is such that the first ZnO layer 1 and the material deposited in the region of the connection contact region 7 are removed together with the mask layer (Lift- Off) Technology). Then, annealing is performed between a temperature of 300 ° C and 50 (TC) to produce a region 8 in which conductivity has decreased in the interior of the first ZnO layer 1. By using this region 8 where conductivity has decreased The current can advantageously be guided by the electrical connection contact region 7 on the first ZnO layer 1 to the second connection contact region 9 in the region of the active region 4 which is not facing the connection contact region 7, for example Disposed on the back side of the substrate 2 which is detached from the active region 4. The preferred path through which the current passes between the connection contact region 7 and the active region 4 in the interior 3 of the semiconductor layer is indicated by arrow 1 0 in Fig. 1b. An advantage of the current path 10 of the form is that only a small fraction of the radiation emitted by the optoelectronic component is generated in the region of the active region 4 that faces the connection contact region 7. Thus, -10- 1270942 The absorption loss in the connection contact region 7 is relatively low. In this embodiment, the first Zn0 layer 1 and the second ZnO layer 6 are adjacent to each other and collectively form a current expansion layer. Each zn 0 layer 1, 6 may advantageously Aluminum is doped to 3%. Due to the good lateral conductivity of Ζ η 0 layer 1,6 (which can also be in the annealing step The current is maintained by the connection contact region 7 through the first ZnO layer 1 and the second ZnO layer 6 to the region where the conductivity of the III-V semiconductor layer 3 is not lowered or only slightly lowered. The second embodiment Φ shown in the 2a, 2b diagram of the optoelectronic component is different from the first figure in that the current is not applied to the semiconductor layer 3 via the second ZnO layer 6 but is structured by one. The form is applied to the contact layer 11 on the semiconductor layer 3. The contact layer 11 is preferably a metal layer which is suitable for forming an ohmic contact region on the semiconductor layer 3 and in particular may contain gold, zinc. (Zn) or a compound of these materials. As can be seen from Figure 2a, the contact layer 11 is structured into its square profile as depicted in the top view. Alternatively, the contact layer 11 may have another configuration. The contact layer 11 is connected to the connection contact region 7 disposed at the center B via the connection strip 12. The cross-section shown in Figs. 2b, 2c shows that the connection contact region 7 is the same as the first embodiment. Arranged on the first ZnO layer 1, the first ZnO layer 1 is based on The foregoing method is applied to the III-V semiconductor layer 3 and annealed to lower the conductivity of the lower region. The III-V semiconductor layer 3 in the region 8 facing the connection contact region 7 in this embodiment. The conductivity is thus reduced, so that the current preferentially enters the region of the active region 4 that is not facing the connection contact region 7 via the contact layer 11. The radiation emitted by the optoelectronic component is connected to the connection -11-1207942 The absorption rate in the contact zone 7 can then be lowered and thus the efficiency of the assembly can be increased. The invention is not limited to the description made above according to the embodiment. Conversely, the invention encompasses each of its new features and each combination of features. It is intended to include, in particular, each combination of features in the scope of the various claims, and the same or not BRIEF DESCRIPTION OF THE DRAWINGS Fig. 1a is a plan view of a photovoltaic module according to a first embodiment of the present invention. Figure 1b is an illustration of a cross-section along line AB of the embodiment shown in Figure 1a of the present invention. Fig. 2a is a plan view of the photovoltaic module of the second embodiment of the present invention. Figure 2b is an illustration of a cross-section along line C D of the embodiment shown in Figure 2a of the present invention. Figure 2c is an illustration of a cross-section along line EF of the embodiment shown in Figure 2a of the present invention. [Main component symbol description] 1 First ZnO layer 2 Substrate 3 p-doped 111 - V semiconductor layer 4 Active layer 5 η-doped III-V semiconductor layer 6 Second ZnO layer 7 First connection contact region Ϊ 270942 8 Conductive Sexually degraded area 9 second connection contact area 10 冃U head 11 contact layer 12 connecting strip
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