TWI269465B - P-type group III nitride semiconductor and production method thereof - Google Patents

Abstract

An object of the present invention is to provide a method for producing a p-type group III nitride semiconductor which can be used to produce a light-emitting device exhibiting a low operation voltage and a sufficiently high reverse voltage. The inventive method for producing a p-type group III nitride semiconductor comprises, during lowering temperature after completion of growth of a group III nitride semiconductor containing a p-type dopant, immediately after completion of the growth, starting, at a temperature at which the growth has been completed, supply of a carrier gas composed of an inert gas and reduction of the flow rate of a nitrogen source; and stopping supply of the nitrogen source at a time in the course of lowering the temperature.

Description

1269465 九、發明說明： 【發明所屬之技術區域】 本發明係關於III族氮化物p型半導體之製法及使用其 所製造之III族氮化物半導體發光元件。尤其是關於可以高 良率獲得低驅動電壓（Vf )、及足夠高的逆電壓（Vr )之 發光元件之III族氮化物p型半導體之製法。 【先前技術】 近年來用以發出短波長光的發光元件用半導體材料，有 一種氮化物半導體材料受到世人的注目。一般而言，氮化 物半導體係以藍寳石單結晶及各種氧化物結晶及m-v族 化合物半導體單結晶等作爲基板，而在其上以金屬有機化1269465 IX. Description of the Invention: The present invention relates to a method for producing a group III nitride p-type semiconductor and a group III nitride semiconductor light-emitting device produced using the same. In particular, it is a method of producing a group III nitride p-type semiconductor which can obtain a low driving voltage (Vf) and a sufficiently high reverse voltage (Vr) as a light-emitting element with high yield. [Prior Art] In recent years, a semiconductor material for a light-emitting element for emitting short-wavelength light has attracted attention from the world. In general, a nitride semiconductor is formed by using a sapphire single crystal, various oxide crystals, and a m-v compound semiconductor single crystal as a substrate, and metalizing thereon.

學氣相沉積法（MOCVD法）或分子束磊晶生長法（MBE 法）或以氫化物氣相磊晶生長法（HVPE法）等實施積層 〇 在III族氮化物半導體方面，已有一段長期間不易製造 出具有足夠的載子濃度之p型半導體。然而，根據揭示一 種對經摻雜Mg之氮化鎵（GaN )照射低速度電子射線之方 法（參閱日本發明專利特開平第2-257679號公報），或一 種在不含氫之氣氛中將經同樣地摻雜Mg之氮化鎵加以熱 處理之方法（參閱日本發明專利特開平第5 - 1 83 1 89號公報 )等即得知仍有可能製得具有足夠的載子濃度之p型半導 體。何以能製得足夠的載子濃度之機構，其係被認爲藉由 上述方法將以氫所鈍化之半導體中p型摻質予以脫氫即可 使其活性化之緣故。實際上，經施加活性化退火處理之摻 1269465The vapor deposition method (MOCVD method) or the molecular beam epitaxial growth method (MBE method) or the hydride vapor phase epitaxial growth method (HVPE method) is used to carry out the lamination of the group III nitride semiconductor. It is not easy to produce a p-type semiconductor having a sufficient carrier concentration during the period. However, a method of irradiating a low-speed electron beam to a Mg-doped gallium nitride (GaN) is disclosed (refer to Japanese Laid-Open Patent Publication No. 2-257679), or an atmosphere in a hydrogen-free atmosphere. A method of heat-treating Mg-doped gallium nitride in the same manner (see Japanese Patent Laid-Open Publication No. Hei. No. Hei. No. Hei. No. 5 - 1 83 1 89), etc., is known to make it possible to obtain a p-type semiconductor having a sufficient carrier concentration. A mechanism for producing a sufficient carrier concentration is considered to be activated by dehydrogenating a p-type dopant in a semiconductor passivated by hydrogen by the above method. In fact, the addition of activated annealing treatment 1269465

Mg的氮化鎵系半導體，其Η之濃度係Mg濃度之約1/10。 生長結晶性佳的III族氮化物半導體之方法，一般係使 用金屬有機化學氣相沉積法（MOCVD法）。然而在 MOCVD法中用以進行結晶生長的生長裝置內，卻以高濃度 下存在著用作爲將原料化合物載運至基板上所需之載氣的 氫氣，或因用作爲V族原料的氨（NH3 )發生分解所產生 之氫分子或自由基狀或原子狀之氫。於是該等氫將在III族 氮化物半導體之結晶層的生長中被取入於結晶內，並在施 加從結晶層生長溫度起之冷卻時，將與經摻雜於結晶的P 型摻質產生鍵結。藉由如此方式爲氫所鈍化之P型摻質是 已爲非活性，因此無法產生電洞。然而，只要對該試料照 射電子射線或施加熱處理時，即可切斷結晶內之P型摻質 與氫之鍵結，從結晶內逐出氫以使P型摻質活性化。 上述兩種方法中照射電子射線之方法，由於一次所能施 加處理之區域有限，爲處理全面積則需耗時間，以致無法 應用在工業上。 在另一方面，已知在具有藉由施加熱處理之方法所製造 的P型III族氮化物半導體的發光元件結構之晶圓中，在所 形成電極所測得之電氣特性中對pn接合朝逆方向流通規定 値電流時之電壓（Vr )爲低的晶片，會以某一比率混雜在 一起之現象。Vr爲低係意謂正有電流對pn接合漏洩，因 此對製品而言是不佳。換言之，只要取除該晶片即可使良 率大幅度地降低。一般而言，已知若因熱處理而會從111族 氮化物半導體脫氫時，則氮也會同時脫離，以致結晶性將 -6- 1269465 降低，此現象有可能爲導致Vr降低之原因。 另外，已揭示一種在冷卻經摻雜P型雜質的氮化鎵系化 合物半導體時，藉由在400 °C以上之溫度由含氨氣之氣氛 切換爲氫氣或氮氣之氣氛’以使經摻雜P型雜質之層予以 低電阻化之技術（參閲日本發明專利特開平第8- 1 1 5880號 公報）。並且在該文獻則作爲實施例而揭示一種在結束生 長摻Mg的層後，直至600°C爲止以NH3與H2之混合氣體 實施冷卻，且在600°C停止NH3之供應而切換成僅爲氫之 氣氛的實例。 然而，根據本發明之發明人等實驗結果，若直至600°C 爲止使NH3流通以實施冷卻時，卻無法獲得使元件降低驅 動電壓之功效。特別是當正極材料採用Pt等之金屬時，則 得知在施加接合之前是已充分降低的驅動電壓，竟會因接 合時所施加約30(TC之熱而上升。 在另一方面，也有報告指出經生長III族氮化物半導體 後在冷卻至室溫時，若將氣氛氣體取代成H2氣及NH3氣以 外之惰性氣體以進行冷卻時，即可獲得足夠的載子濃度（ 參閱日本發明專利特開平第8-125222號公報）。其在實施 例中則揭示藉由真空狀態而實施氮之取代以取代成氮氣或 惰性氣體以製得p型半導體。 然而，即使將氣氛氣體取代成H2氣、NH3氣以外之惰性 氣體以進行冷卻，也無法一槪而在高良率下獲得低驅動電 壓之晶片。亦即，只使加以控制該文獻所規定之條件，也 不可能在高良率下獲得優良再現性及優良特性之晶片。而 -7- 1269465 且，也知道在正極材料使用Pt等之情況時，則將產生驅動 電壓因在接合時所歷經之熱而上升。 此外，也已公開一種在經生長氮化物半導體後，立即在 生長溫度之1，1 00°c予以取代成惰性氣體之技術（參閲曰本 發明專利特開平第9- 129929號公報）。並且，若根據此等 方法時，從經取代成惰性氣體後起至降溫成室溫則必須歷 時2〜3小時。 然而，根·據此等經結束生長後立即進行對惰性氣體的取 代之方法時，根據吾等之實驗則查明所製得之晶片的Vr將 降低。並且，以歷經長時間來降低溫度，也會導致Vr降低 〇 最後，已有提案揭示一種將在70(TC以上之生長溫度所 生長之結晶在700 °C以下之冷卻，以在氫以外之載氣氣氛 下實行之低電阻p型氮化鎵系化合物半導體之生長方法（ 參閲日本發明專利特開平第9- 199758號公報）。在此文獻 之實施例，則在經結束在l，〇3 0°C的p型氮化鎵系化合物半 導體之生長後，在700°C將由氫與氨所形成之氣氛予以取 代成氮。 該方法吾等也已加以檢討，結果即使在氫以外的氣體氣 氛中實施700 °C以下之冷卻，也無法在高良率下獲得低驅 動電壓之晶片。換言之，只是加以控制以該文獻所規定之 條件，仍然無法在高良率下獲得優良再現性及優良特性之 晶片。而且，將產生因正極材料採用Pt等時，在接合時所 施加的熱而導致驅動電壓上升。 1269465 總結言之，若根據日本發明專利特開平第5- 1 83 1 89號公 報及特開平第9- 129929號公報之方法時，則將變成Vr爲 低之漏洩性之晶片，在另一方面，若根據日本發明專利特 開平第8- 1 1 5880號公報、特開平第8- 1 25222號公報及特 開平第9- 1 9975 8號公報之方法時，則驅動電壓將增高。尤 其是將產生因正極材料採用Pt等時，在接合時所施加的熱 而導致驅動電壓上升。 如上所述，一種在製造III族氮化物半導體元件時，可 使元件特性與良率同時存在且完全無問題之含有p型摻質 之層之形成方法並未有提案。 而且，在該等先前例中則必須使含有p型摻質之層予以 低電阻化，因此在任一種技術也提及必須提供低電阻之p 型半導體層之必要性。 【發明內容】 本發明係爲解決上述先前技術之問題而達成，其目的係 提供一種可在高良率下獲得低驅動電壓（Vf )、及足夠高 的逆電壓（Vr)之發光元件之III族氮化物p型半導體之 製法。 本發明係提供如下述之發明。 (1 ) 一種III族氮化物p型半導體之製法，其特徵爲經 使含有p型摻質之III族氮化物半導體生長後在降 溫時，以與生長結束時之溫度相同的溫度，從生 長剛結束之後起載氣則使用惰性氣體，且使氮源 之流量減少，並在其後之降溫過程途中停止供應 1269465 氮源。 (2 ) 如申請專利範圍第1項之製法，其中生長結束時 之溫度爲900°C以上。 (3 ) 如申請專利範圍第1或2項之製法，其中氮源爲 氨氣。 (4 ) 如申請專利範圍第1至3項中任一項之製法，其 中在生長半導體時之載氣係含有氫氣。The gallium nitride-based semiconductor of Mg has a concentration of about 1/10 of the Mg concentration. The method of growing a crystalline group III nitride semiconductor is generally carried out by metal organic chemical vapor deposition (MOCVD). However, in the growth apparatus for crystal growth in the MOCVD method, hydrogen which is used as a carrier gas for carrying a raw material compound to a substrate at a high concentration or ammonia (NH3 which is used as a group V raw material) exists at a high concentration. ) Hydrogen molecules or radical or atomic hydrogen generated by decomposition. The hydrogen will then be taken into the crystal during the growth of the crystal layer of the group III nitride semiconductor and will be produced with the P-type dopant doped into the crystal upon application of cooling from the growth temperature of the crystal layer. Bonding. The P-type dopant which is passivated by hydrogen in this way is already inactive and therefore cannot generate holes. However, as long as the electron beam is applied to the sample or a heat treatment is applied, the P-type dopant in the crystal is cleaved with hydrogen, and hydrogen is removed from the crystal to activate the P-type dopant. In the above two methods, the method of illuminating the electron beam is limited in time, and it takes time to process the entire area, so that it cannot be applied to the industry. On the other hand, in a wafer having a light-emitting element structure of a P-type group III nitride semiconductor manufactured by a method of applying heat treatment, it is known that the pn junction is reversed in the electrical characteristics measured by the formed electrode. The direction in which the voltage (Vr) at which the current is low is specified in the direction of the flow is mixed at a certain ratio. A low Vr means that a positive current leaks into the pn junction, and thus is not good for the article. In other words, the yield can be greatly reduced by simply removing the wafer. In general, it is known that when hydrogen is dehydrogenated from a group 111 nitride semiconductor by heat treatment, nitrogen is also released at the same time, so that the crystallinity is lowered by -6 to 1269465, which may cause a decrease in Vr. Further, it has been disclosed that when a gallium nitride-based compound semiconductor doped with a P-type impurity is cooled, it is doped by an atmosphere containing ammonia gas to a hydrogen or nitrogen atmosphere at a temperature of 400 ° C or higher. A technique of lowering the resistance of a layer of a P-type impurity (refer to Japanese Laid-Open Patent Publication No. 8-1-1854). Further, in this document, as an example, it is disclosed that after the growth of the Mg-doped layer is completed, cooling is performed with a mixed gas of NH3 and H2 up to 600 ° C, and the supply of NH 3 is stopped at 600 ° C to switch to hydrogen only. An example of the atmosphere. However, according to the experimental results of the inventors of the present invention, when NH3 is circulated until cooling is performed up to 600 °C, the effect of lowering the driving voltage of the element cannot be obtained. In particular, when a metal such as Pt is used as the positive electrode material, it is known that the driving voltage which has been sufficiently lowered before the bonding is applied is increased by about 30 (the heat of TC) at the time of bonding. On the other hand, there is also a report. It is pointed out that when the III-nitride semiconductor is grown and cooled to room temperature, if the atmosphere gas is replaced by an inert gas other than H2 gas and NH3 gas for cooling, sufficient carrier concentration can be obtained (see Japanese Invention Patent) Kaiping No. 8-125222. In the embodiment, it is disclosed that a substitution of nitrogen is performed by a vacuum state instead of nitrogen or an inert gas to produce a p-type semiconductor. However, even if an atmosphere gas is substituted for H 2 gas, An inert gas other than NH3 gas is used for cooling, and it is not possible to obtain a wafer with a low driving voltage at a high yield. That is, it is impossible to obtain excellent reproduction at a high yield only by controlling the conditions stipulated in the literature. And the characteristics of the wafer. And -7- 1269465, also know that when the positive electrode material uses Pt, etc., it will produce the driving voltage due to the heat experienced during the bonding Further, a technique of immediately replacing the inert gas with a growth temperature of 1,100 ° C after the growth of the nitride semiconductor has been disclosed (refer to Japanese Laid-Open Patent Publication No. Hei 9-129929) And, according to these methods, it takes 2 to 3 hours from the time of substitution to the inert gas to the temperature drop to room temperature. However, the roots are replaced by inert gas immediately after the completion of the growth. In the method, according to our experiments, it is found that the Vr of the obtained wafer will decrease. Moreover, lowering the temperature over a long period of time will also cause the Vr to decrease. Finally, the proposal has revealed that one will be above 70 (TC). A method of growing a low-resistance p-type gallium nitride-based compound semiconductor which is cooled at a temperature of 700 ° C or lower and is carried out under a carrier gas atmosphere other than hydrogen (refer to Japanese Patent Laid-Open No. 9-- In the example of this document, after the growth of the p-type gallium nitride-based compound semiconductor which is finished at 1, 30 ° C, the atmosphere formed by hydrogen and ammonia is given at 700 ° C. Replace Nitrogen. This method has also been reviewed. As a result, even if it is cooled below 700 °C in a gas atmosphere other than hydrogen, it is impossible to obtain a wafer with a low driving voltage at a high yield. In other words, it is only controlled. Under the conditions specified, it is still impossible to obtain a wafer having excellent reproducibility and excellent characteristics at a high yield. Further, when Pt or the like is used as the positive electrode material, the driving voltage is increased due to heat applied during bonding. 1269465 According to the method of Japanese Laid-Open Patent Publication No. Hei. No. Hei. No. Hei. No. Hei. No. Hei. No. 9-129929, which is a method in which Vr is low in leakage, on the other hand, according to Japan. When the method of the Japanese Patent Laid-Open Publication No. Hei. No. Hei. No. Hei. No. Hei. No. Hei. No. Hei. In particular, when Pt or the like is used as the positive electrode material, heat applied during bonding causes an increase in driving voltage. As described above, a method of forming a layer containing a p-type dopant which can simultaneously exhibit element characteristics and yield and which is completely problem-free in the production of a group III nitride semiconductor device has not been proposed. Further, in these prior examples, it is necessary to lower the resistance of the layer containing the p-type dopant, and therefore, the necessity of providing a low-resistance p-type semiconductor layer is also mentioned in any of the techniques. SUMMARY OF THE INVENTION The present invention has been made to solve the above problems of the prior art, and an object thereof is to provide a group III of a light-emitting element capable of obtaining a low driving voltage (Vf) and a sufficiently high reverse voltage (Vr) at a high yield. A method of producing a nitride p-type semiconductor. The present invention provides the invention as described below. (1) A method for producing a group III nitride p-type semiconductor, characterized in that a growth of a group III nitride semiconductor containing a p-type dopant is carried out at a temperature equal to the temperature at the end of growth when the temperature is lowered after growth At the end of the carrier gas, an inert gas is used, and the flow rate of the nitrogen source is reduced, and the supply of 1269465 nitrogen source is stopped during the subsequent cooling process. (2) In the method of claim 1, the temperature at the end of growth is 900 °C or higher. (3) If the method of claim 1 or 2 is applied, the nitrogen source is ammonia. (4) The method of any one of claims 1 to 3, wherein the carrier gas during the growth of the semiconductor contains hydrogen.

(5 ) 如申請專利範圍第1至4項中任一項之製法，其中減 少後之氮源之流量爲全氣體體積中之0.001〜10 %。 (6 ) 如申請專利範圍第1至5項中任一項之製法，其 中停止供應氮源之溫度爲700〜95 0°C。 (7) 一種ΠΙ族氮化物p型半導體，其特徵爲含有多於 P型摻質濃度之1/5，且少於p型摻質濃度之量的 氫原子。 (8 ) —種III族氮化物p型半導體，其特徵爲電阻率爲 20Ω cm 〜10,000Ω cm 〇 (9) 一種III族氮化物半導體發光元件，係在基板上設 置由III族氮化物半導體所構成之η型層、發光層 和Ρ型層，且負極和正極係分別設置在η型層和 Ρ型層上，其特徵爲Ρ型層之製法爲如申請專利 範圍第1至6項中任一項之製法。 (10) —種III族氮化物半導體發光元件，係在基板上設 置由III族氮化物半導體所構成之η型層、發光層 和ρ型層，且負極和正極係分別設置在η型層和 -10- 1269465 P型層上，其特徵爲p型層爲如上所述第7或8 項之III族氮化物p型半導體。 (11) 如申請專利範圍第9或1 〇項之發光元件，其中正 極係將選自Pd、Pt、Rh、〇s、Ir及Ru之白金族 金屬用正極材料。 (12) 如申請專利範圍第9至1 1項中任一項之發光元件 ，其中發光元件爲覆晶晶片型。 (13) 如申請專利範圍第9至1 1項中任一項之發光元件 • 爲面朝上組裝型。 若根據本發明，則可獲得可用作爲半導體元件而使用的 層級之具有足夠的特性之P型ΠΙ族氮化物半導體。並且， 使用該III族氮化物ρ型半導體，即可在高良率下製造不致 於產生因熱的驅動電壓上升，且具有高Vr之III族氮化物 半導體發光元件。 【實施方式】 〔本發明之最佳實施方式〕 # 可適用於本發明之製造方法的III族氮化物ρ型半導體 之III族氮化物半導體，係除GaN之外也包括：InN、A1N 等之二元系混晶，InGaN、AlGaN等之三元系混晶，及 InAlGaN等之四元系混晶等之所有III族氮化物半導體。但 是在本發明中，則更進一步包括氮以外之V族元素，亦即 GaPN、GaN As等之三元系混晶，或對其再含有In或A1之 一 InGaPN、InGaAsN、AlGaPN、AlGaAsN 等之四元系混晶， 並且進一步含有In、A1之兩者的AlInGaPN、AlInGaAsN、 -11 - 1269465 或Q有P與As之兩者的AlGaPAsN、InGaPAsN等之五元 系混晶，並且含有所有元素的AlInGaPAsN之六元系混晶 ，也包括在III族氮化物半導體中。 本發明係在上述中，特別適合使用於製造比較容易且又 無分解之危險性的GaN、InN、A1N等之二元系混晶， InGaN、AlGaN等之三元系混晶，inAlGaN等之四元系混晶 等之作爲V族而僅含有N的III族氮化物半導體。若以通 式AUIriyGa^x-yN (OSx + y^l)來表示時，X較佳爲在〇 〜0.5之範圍，且y較佳爲在〇〜〇.1之範圍。 另外，可使用於本發明之p型摻質，係包括已揭示所指 出或預估的摻雜於III族氮化物半導體即會顯現出p型導電 性的Mg、Ca、Zn、Cd、Hg等。此等之中，藉由熱處理的 活性化率爲高的Mg，係特別適合用作爲p型摻質。摻質之 使用量較佳爲1 X 1018〜1 X 1021 cm·3。若爲少於1 X 1〇18 cnT3時，則將導致發光強度降低。相反地，若多於l x 1021 cnT3時，則將引起結晶性惡化，因此不佳，且更佳爲 1 X 1019 〜1 X 1〇20 cm-3 〇 根據本發明所揭示之方法所製造之p型半導體層，在其 結晶中也可含有氫原子。爲製造逆向之電壓Vr爲高之元件 ，有時寧以在結晶中含有氫原子爲較佳之情況。包含在結 晶中的氫原子之量，較佳爲少於所摻雜的p型摻質之量。 氫原子之含量，在與p型摻質之含量爲相同之情況’或多 於P型摻質之含量的情況時，則不易獲得p型電極之電氣 接觸，因此較佳爲比其爲少者。氫原子之含量更佳爲P型 -12- 12694,65 摻質之9/10以下，且特佳爲7/8以下。然而，若氫原子之 含量爲P型摻質之1 /5以下時，則將同時產生氮之脫離， 因此較佳爲多於1/5 ’更佳爲1/3以上，若爲1/2以上則更 理想。另外，P型半導體層之鎂及氫之原子濃度係以一般 的 SIMS ( 一 次離子質譜儀：Secondary Ion Mass Spectroscopy)加以定量。 另外，p型層係不會因在結晶中含有氫而成爲低電阻， 但是其並不會對元件特性構成問題。在使用III族氮化物半 導體之元件，由於P型層多半是形成比其他半導體之情況 較薄，因此P型層本身之電阻並不致於對元件之驅動電壓 Vf造成太大的影響。p型層之電阻率爲高，爲保持高Vr是 較爲理想。 P型層之電阻率較佳爲約20Qcm〜10,000Qcm。若高於 10,000 Qcm時，則將導致發光強度降低，若低於20Qcm 時，則有可能會導致Vr降低，而更佳爲50Ω cm〜2,000 Ω cm，且特佳爲 lOOQcm〜l，000Qcm。另外，電阻率係以 一般的 TLM (遙測：Transfer Length Measurement)法加 以測定。 適用於本發明之ΙΠ族氮化物P型半導體之生長方法， 並無特殊的限定，可使用MOCVD (金屬有機化學氣相生長 法）、HVPE (氫化氣相磊晶生長法）、MBE (分子束磊晶 生長法）等之習知的可供生長III族氮化物半導體之所有方 法。較佳的生長方法，若從膜厚控制性、量產性的觀點來 考慮則爲MOCVD法。 -13- 1269465 動電壓無法隨心所欲地降低。此時，若氮源流量也使其爲 零時，則將會導致來自構成P型層之結晶的氮進行脫離， 以導致元件之V r降低。氮源量較佳爲設定爲全氣體量之體 積之0.00 1 %以上，更佳爲0.01 %以上。 此外，較佳爲在氮源之流量變更及剛切換載氣之後開始 降溫。若生長結束後的溫度之保持時間爲長時，則不僅是 將導致結晶性降低，將蓄積對發光層之熱損傷而降低發光 強度。 另外，必須將一旦降低流量的氮源之流量，在降溫過程 中實行完全使其成爲零之操作。藉由在未停止氮源流通下 ，使溫度降至例如300°C等之低溫所製造之元件，將因接 合時所施加之熱而產生元件驅動電壓上升之現象。 在降溫途中使氮源流量爲零之溫度，較.佳爲950°C以下 、700°C以上。若以高於950°C之溫度使氮源流量成爲零時 ，則元件之Vr將降低，若繼續使氮源流通至低於700°C時 ，則將導致因熱使得驅動電壓上升。 再者，從生長結束後起至使氮源流量成爲零爲止之時間 ’雖然是視降溫速度而定，但是爲從約3 0秒鐘至約8分鐘 〇 本發明之III氮化物p型半導體及其製法，係可使用於 各種半導體元件之製造。例如除發光二極體或雷射二極體 等之半導體發光元件以外，只要是需要用到各種高速電晶 體或受光元件等之III族氮化物P型半導體的半導體元件之 製造，則可使用於任何元件之製造，但是特別是適合於需 -15- 1269465 要形成pn接合與形成優良特性之電極的半導體發光元件之 製造。 第1圖係展示以使用本發明之III族氮化物P型半導體 及其製法所製造之III族氮化物半導體發光元件示意模式圖 。其係必要時則隔著緩衝層2而將III族氮化物之η型半導 體層3、發光層4和ρ型半導體層5依此順次積層在基板1 上，且將負極6和正極7分別形成在η型半導體層3和ρ 型半導體層5上。 基板1係可在並無特殊的限定下使用藍寶石、SiC、GaN 、AIN、Si、ZnO等及其他氧化物基板等之傳統習知的材料 。但是較佳爲藍寶石。緩衝層2係必要時爲調節基板與將 生長在其上面的η型半導體層3之晶格失配所設置。必要 時可使用傳統習知的緩衝層技術。 η型半導體層3之組成及結構，係可使用在該技術領域 中爲眾所皆知之習知的技術來形成吾人所希望之組成及結 構即可。通常η型半導體層係由可與負極獲得優良的歐姆 接觸之接觸層與比發光層具有 。負極6也可使用在該技術領域中爲眾所皆知之習知的技 術來形成吾人所希望之組成及結構即可。 ##層4也是可在並無特殊的限定下使用單一量子井結 構（SQW )及多重量子井結構（MQW )等傳統習知的組成 及結構。 p g半導體層5係由本發明之製造方法所形成。關於其 Μ &，結構，則使用在該技術領域中爲眾人皆知的技術形 -16- 1269465 成吾人所希望之組成及結構即可。通常與η型半導體層同 樣地係由可與負極獲得優良的歐姆接觸之接觸層與具有比 發光層大的帶隙能量之包層所構成。 可供接觸於以本發明之方法所製造之Ρ型層的正極7之 材料，可使用 Au、Ni、Co、Cu、Pd、Pt、Rh、Os、Ir、Ru 等之金屬。而且，也可含有ITO或NiO、CoO等之透明氧 化物。含透明氧化物之形態，可製成爲塊而包含在上述金 屬膜中，也可製成爲層狀而與上述金屬膜疊合來形成。 尤其是將Pd、Pt、Rh、Os、Ir、Ru等之白金族金屬用作 爲正極材料時，若使用本發明則可防止在接合時之熱而導 致驅動電壓上升，因此可發揮更大之功效。其中Pd、Pt、 Rh係比較容易取得高純度者，因此較容易使用。 而且，正極也可形成大致會覆蓋全面之方式，也可隔著 間隙而形成格子狀或樹形狀。經形成正極後，也有施加以 合金化或透明化爲目的之熱退火處理之情況，但是不施加 也無妨。 元件之形態也可爲使用透明正極以從半導體側導出發光 之所謂「面朝上組裝（FU )型」，也可製成爲使用反射型 正極以由基板側導出發光之所謂「覆晶晶片（FC )型」。 〔實施例〕 茲根據實施例將本發明詳加說明如下，但是本發明並不 受限於此等實施例。 〔實施例1〕 在第2圖展示使用於根據本實施例所製造LED 1 0之磊晶 -17- 1269465 積層結構體1 1之剖面模式圖。此外，在第3圖則展示 LED 10之俯視（平面）模式圖。 積層結構體11係在由藍寶石之c面（（〇〇〇 1 )結晶面） 所構成之基板101上，隔著由A1N所構成之緩衝層（未圖 示），將非摻雜的GaN層（層厚 =8微米）1〇2、摻Si的 η型GaN層（層厚 =2微米、載子濃度 = lxl019cnT3) 103、摻Si的η型Al0.07Ga0.93N包層（層厚 =25奈米、 載子濃度 =1 X 1〇18 cnT3 ) 104 '由6層之摻Si的GaN阻 障層（層厚 =14·0奈米、載子濃度 =lxl〇18cnT3)與5 層之非摻雜的In〇.2()Ga().8()N之井層（層厚 =2.5奈米）所 構成之多重量子結構之發光層 105、摻 Mg的 P型 Alo.07Gao.93N包層（層厚 =10奈米）106、及摻Mg的P 型Alo.Q2Gao.9 8N接觸層（層厚 =150奈米）107依此順序 予以積層所構成。上述積層結構體11之各構成層102〜 107係以一般的減壓MOCVD方法使其生長。 尤其是摻Mg的p型AlGaN接觸層107係以下列順序使 其生長： (1) 經結束摻Mg的p型Al〇.()7Ga().93N包層106之生長 後，使生長反應爐內壓力設定爲2 X 1 〇4帕斯卡（Pa );載氣係使用氫氣。 (2) 以三甲基鎵、三甲基鋁及氨作爲原料，以雙環戊烯 合鎂作爲Mg之摻雜源，並在1，020°C開始摻Mg的 p型AlGaN層之氣相生長。 (3) 將三甲基鎵、三甲基鋁、氨及雙環戊烯合鎂，以歷 -18 - 1269465 時4分鐘繼續對生長反應爐內供應’以使層厚爲 0.15微米之摻Mg的p型Al〇.〇2Ga〇.98N層生長。(5) The method of any one of claims 1 to 4, wherein the flow rate of the reduced nitrogen source is 0.001 to 10% of the total gas volume. (6) The method of claim 1, wherein the temperature at which the supply of the nitrogen source is stopped is 700 to 95 °C. (7) A bismuth nitride p-type semiconductor characterized by containing more than 1/5 of the concentration of the P-type dopant and less than the hydrogen atom of the p-type dopant concentration. (8) A Group III nitride p-type semiconductor characterized by a resistivity of 20 Ω cm to 10,000 Ω cm 9 (9) A group III nitride semiconductor light-emitting device provided with a group III nitride semiconductor on a substrate The n-type layer, the light-emitting layer and the ruthenium-type layer are formed, and the negative electrode and the positive electrode are respectively disposed on the n-type layer and the ruthenium-type layer, and the yttrium-type layer is formed by the method of the first to sixth aspects of the patent application. A method of production. (10) A group III nitride semiconductor light-emitting device, wherein an n-type layer, a light-emitting layer, and a p-type layer composed of a group III nitride semiconductor are provided on a substrate, and the negative electrode and the positive electrode are respectively disposed on the n-type layer and -10- 1269465 P-type layer characterized in that the p-type layer is a Group III nitride p-type semiconductor of item 7 or 8 as described above. (11) A light-emitting element according to claim 9 or claim 1, wherein the positive electrode is a positive electrode material for a platinum group metal selected from the group consisting of Pd, Pt, Rh, 〇s, Ir, and Ru. (12) A light-emitting element according to any one of claims 9 to 11, wherein the light-emitting element is a flip chip type. (13) A light-emitting element as claimed in any one of claims 9 to 11 which is a face-up type. According to the present invention, a P-type bismuth nitride semiconductor having sufficient characteristics which can be used as a semiconductor element can be obtained. Further, by using the group III nitride p-type semiconductor, it is possible to manufacture a group III nitride semiconductor light-emitting device having a high Vr without causing a rise in driving voltage due to heat at a high yield. [Embodiment] [Best Embodiment of the Invention] # A Group III nitride semiconductor of a Group III nitride p-type semiconductor applicable to the manufacturing method of the present invention includes, in addition to GaN, InN, A1N, or the like. Binary mixed crystals, ternary mixed crystals such as InGaN and AlGaN, and all III-nitride semiconductors such as quaternary mixed crystals such as InAlGaN. However, in the present invention, it further includes a group V element other than nitrogen, that is, a ternary mixed crystal of GaPN or GaN As, or a further one of In or A1, InGaPN, InGaN, AlGaPN, AlGaAsN, or the like. a quaternary mixed crystal, and further contains AlInGaPN, AlInGaAsN, -11 - 1269465 of In and A1, or a pentad mixed crystal of AlGaPAsN, InGaPAsN, etc., which has both P and As, and contains all elements. The hexavalent mixed crystal of AlInGaPAsN is also included in the group III nitride semiconductor. In the above, the present invention is particularly suitable for use in the production of binary mixed crystals such as GaN, InN, and A1N which are relatively easy to be produced without decomposition, and ternary mixed crystals such as InGaN and AlGaN, and the like of inAlGaN. A group III nitride semiconductor containing only N as a group V, such as a mixed crystal of a metasystem. When expressed by the general formula AUIriyGa^x-yN (OSx + y^l), X is preferably in the range of 〇 to 0.5, and y is preferably in the range of 〇~〇.1. In addition, the p-type dopants which can be used in the present invention include Mg, Ca, Zn, Cd, Hg, etc. which exhibit p-type conductivity when doped with a group III nitride semiconductor as disclosed or predicted. . Among these, Mg having a high activation ratio by heat treatment is particularly suitable as a p-type dopant. The amount of dopant used is preferably 1 X 1018 to 1 X 1021 cm·3. If it is less than 1 X 1 〇 18 cnT3, it will cause the luminescence intensity to decrease. On the contrary, if it is more than lx 1021 cnT3, the crystallinity is deteriorated, so it is not preferable, and more preferably 1 X 1019 〜1 X 1 〇 20 cm-3 〇p manufactured according to the method disclosed by the present invention The type semiconductor layer may also contain a hydrogen atom in its crystallization. In order to manufacture a component in which the reverse voltage Vr is high, it is preferable to contain a hydrogen atom in the crystal. The amount of hydrogen atoms contained in the crystals is preferably less than the amount of the p-type dopant doped. When the content of the hydrogen atom is the same as the content of the p-type dopant or more than the content of the P-type dopant, the electrical contact of the p-type electrode is not easily obtained, so it is preferably smaller than the content of the p-type dopant. . The content of the hydrogen atom is more preferably P-type -12- 12694, 65 or less of the dopant, and particularly preferably 7/8 or less. However, when the content of the hydrogen atom is 1/5 or less of the P-type dopant, the nitrogen is simultaneously released, so it is preferably more than 1/5', more preferably 1/3 or more, and 1/2 or more. The above is more ideal. Further, the atomic concentrations of magnesium and hydrogen of the P-type semiconductor layer were quantified by a general SIMS (Secondary Ion Mass Spectroscopy). Further, the p-type layer does not have low resistance due to hydrogen contained in the crystal, but it does not pose a problem in element characteristics. In the case of using a group III nitride semiconductor element, since the P-type layer is mostly formed thinner than other semiconductors, the resistance of the P-type layer itself does not cause too much influence on the driving voltage Vf of the element. The p-type layer has a high resistivity, and it is preferable to maintain a high Vr. The resistivity of the p-type layer is preferably from about 20 Qcm to 10,000 Qcm. If it is higher than 10,000 Qcm, the luminescence intensity will be lowered. If it is lower than 20 Qcm, Vr may be lowered, and more preferably 50 Ω cm to 2,000 Ω cm, and particularly preferably 100 Ω cm to 1,000 Q cm. In addition, the resistivity is measured by a general TLM (Transfer Length Measurement) method. The growth method of the bismuth nitride P-type semiconductor suitable for use in the present invention is not particularly limited, and MOCVD (Metal Organic Chemical Vapor Phase Growth), HVPE (Hydrogen Phase Epitaxial Growth), MBE (Molecular Beam) can be used. All methods of growing a Group III nitride semiconductor, such as epitaxial growth method). A preferred growth method is the MOCVD method from the viewpoint of film thickness controllability and mass productivity. -13- 1269465 The dynamic voltage cannot be reduced as desired. At this time, if the flow rate of the nitrogen source is also made zero, the nitrogen from the crystal constituting the p-type layer is detached, resulting in a decrease in the Vr of the element. The amount of nitrogen source is preferably set to be 0.001% or more, more preferably 0.01% or more, of the volume of the total gas. Further, it is preferable to start the temperature drop after the flow rate of the nitrogen source is changed and the carrier gas is just switched. When the holding time of the temperature after the completion of the growth is long, not only the crystallinity is lowered, but also the thermal damage to the light-emitting layer is accumulated to lower the light-emitting intensity. In addition, it is necessary to carry out the operation of completely reducing the flow rate of the nitrogen source once it is reduced to zero. By lowering the temperature to an element manufactured by a low temperature such as 300 ° C without stopping the flow of the nitrogen source, the element driving voltage is increased due to the heat applied during the bonding. The temperature at which the nitrogen source flow rate is zero during the cooling process is preferably 950 ° C or lower and 700 ° C or higher. If the nitrogen source flow rate is zero at a temperature higher than 950 ° C, the Vr of the element will decrease, and if the nitrogen source continues to flow below 700 ° C, the driving voltage will rise due to heat. Further, the time from the completion of the growth until the flow rate of the nitrogen source is zero is determined by the temperature drop rate, but the III nitride p-type semiconductor of the present invention is from about 30 seconds to about 8 minutes. The manufacturing method can be used for the manufacture of various semiconductor elements. For example, in addition to a semiconductor light-emitting element such as a light-emitting diode or a laser diode, it can be used for the production of a semiconductor element of a group III nitride P-type semiconductor such as a high-speed transistor or a light-receiving element. The fabrication of any component, but particularly suitable for the fabrication of semiconductor light-emitting components requiring -15- 1269465 to form pn junctions and electrodes that form excellent characteristics. Fig. 1 is a schematic view showing a group III nitride semiconductor light-emitting device manufactured by using the group III nitride P-type semiconductor of the present invention and a process for producing the same. When necessary, the n-type semiconductor layer 3, the light-emitting layer 4, and the p-type semiconductor layer 5 of the group III nitride are sequentially laminated on the substrate 1 via the buffer layer 2, and the negative electrode 6 and the positive electrode 7 are respectively formed. On the n-type semiconductor layer 3 and the p-type semiconductor layer 5. The substrate 1 can be a conventionally known material such as sapphire, SiC, GaN, AIN, Si, ZnO, or the like, and other oxide substrates, without any particular limitation. However, it is preferably sapphire. The buffer layer 2 is provided to adjust the substrate to the lattice mismatch of the n-type semiconductor layer 3 to be grown thereon as necessary. Conventional conventional buffer layer techniques can be used if necessary. The composition and structure of the n-type semiconductor layer 3 can be formed into a desired composition and structure using conventional techniques well known in the art. Generally, the n-type semiconductor layer is provided by a contact layer and a specific light-emitting layer which can obtain excellent ohmic contact with the negative electrode. The negative electrode 6 can also be formed using conventional techniques well known in the art to form the desired composition and structure. ##层4 is also a conventionally known composition and structure that can be used without a specific limitation, such as a single quantum well structure (SQW) and a multiple quantum well structure (MQW). The p g semiconductor layer 5 is formed by the production method of the present invention. Regarding the structure of Μ &, it is possible to use the composition and structure of the technique known in the art -16-1269465. The n-type semiconductor layer is usually composed of a contact layer which can obtain excellent ohmic contact with the negative electrode and a cladding layer having a larger band gap energy than the light-emitting layer. As the material of the positive electrode 7 which can be contacted with the ruthenium-type layer produced by the method of the present invention, a metal such as Au, Ni, Co, Cu, Pd, Pt, Rh, Os, Ir, Ru or the like can be used. Further, a transparent oxide such as ITO, NiO or CoO may be contained. The form containing the transparent oxide may be formed into a block and contained in the metal film, or may be formed into a layer shape and laminated on the metal film. In particular, when a platinum group metal such as Pd, Pt, Rh, Os, Ir, or Ru is used as the positive electrode material, the use of the present invention can prevent the driving voltage from rising due to heat during bonding, thereby exerting a greater effect. . Among them, Pd, Pt, and Rh are relatively easy to obtain high purity, so they are easier to use. Further, the positive electrode may be formed so as to cover substantially the entire shape, or may be formed in a lattice shape or a tree shape via a gap. After the positive electrode is formed, there is a case where a thermal annealing treatment for alloying or transparency is applied, but it may not be applied. The form of the element may be a so-called "face-up assembly (FU) type" in which light is emitted from the semiconductor side using a transparent positive electrode, or a so-called "flip-chip" (FC) in which a reflective positive electrode is used to derive light from the substrate side. )type". [Embodiment] The present invention will be described in detail below based on the embodiments, but the present invention is not limited to the embodiments. [Embodiment 1] Fig. 2 is a cross-sectional schematic view showing the epitaxial -17-1269465 laminated structure 1 1 used for the LED 10 manufactured according to the present embodiment. In addition, the top view (planar) pattern of the LED 10 is shown in the third figure. The laminated structure 11 is a non-doped GaN layer on a substrate 101 made of a c-plane ((〇〇〇1) crystal plane) of sapphire via a buffer layer (not shown) made of A1N. (layer thickness = 8 μm) 〇2, Si-doped n-type GaN layer (layer thickness = 2 μm, carrier concentration = lxl019cnT3) 103, Si-doped n-type Al0.07Ga0.93N cladding layer (layer thickness = 25 Nano, carrier concentration = 1 X 1〇18 cnT3 ) 104 ' consists of 6 layers of Si-doped GaN barrier layer (layer thickness = 14.0 nm, carrier concentration = lxl 〇 18cnT3) and 5 layers of non- Light-emitting layer 105 of multi-quantum structure composed of doped layer of In〇.2()Ga().8()N (layer thickness=2.5 nm), Mg-doped P-type Alo.07Gao.93N package The layer (layer thickness = 10 nm) 106 and the Mg-doped P-type Alo. Q2Gao.9 8N contact layer (layer thickness = 150 nm) 107 were laminated in this order. Each of the constituent layers 102 to 107 of the laminated structure 11 is grown by a general pressure reduction MOCVD method. In particular, the Mg-doped p-type AlGaN contact layer 107 is grown in the following order: (1) After the growth of the Mg-doped p-type Al〇.()7Ga().93N cladding layer 106, the growth reactor is allowed to be grown. The internal pressure is set to 2 X 1 〇 4 Pascals (Pa); the carrier gas system uses hydrogen. (2) Using trimethylgallium, trimethylaluminum and ammonia as raw materials, using dicyclopentene magnesium as the doping source of Mg, and starting the vapor phase growth of Mg-doped p-type AlGaN layer at 1,020 °C . (3) Trimethylgallium, trimethylaluminum, ammonia and dicyclopentene magnesium were continuously supplied to the growth reactor for 4 minutes from -18 to 1269465 to make the Mg-doped layer having a layer thickness of 0.15 μm. P-type Al〇.〇2Ga〇.98N layer growth.

(4) 停止對生長反應爐內供應三甲基鎵、三甲基鋁、氨 及雙環戊烯合鎂，以停止摻Mg的P型A1G.Q2GaG.98N 層之生長。 經結束由摻Mg的P型A1GaN層所構成之接觸層107之 氣相生長後’立即將載氣由氫切換爲氮’並降低氣之流量 且以相當於所降低的部份之量增加載氣的氮之流量。具體 而言，將在生長中是佔全流通氣體量以體積計爲50 %之氨 ，予以減少至0.2 %。同時，停止對爲加熱基板1〇1所使用 的高頻感應加熱式加熱器之通電。 然後，在此狀態保持2分鐘後，停止氨之流通。此時， 基板溫度爲8 5 0 °C。於第4圖展示該降溫過程之模式圖。 藉由在此狀態下冷卻至室溫後，由生長反應爐取出積層 結構體11，以一般的SIMS分析法將接觸層107之鎂及氫 之原子濃度加以定量。結果Mg原子係以7 X 1019 cm_3之 濃度且從表面向深度方向大致呈一定之濃度分佈。在另一 方面，氫原子係含有6 X 1019 cnT3之約一定的濃度。另外 ，電阻率係藉由一般的TLM (遙測）法之測定結果來估計 則大致爲1 5 0 Ω c m。 使用上述具有P型接觸層之磊晶積層結構體1 1以製造 LED 10。首先，在供形成負極108之預定區域施加一般的 乾蝕刻，且僅限於該區域使摻Si的GaN層103之表面露出 。在經露出的表面部份形成由疊層鈦（Ti ) /鋁（A1 )所構 -19- 1269465 成之負極108。 在剩餘的接觸層1 07之表面的約全域，則予以形成具有 可將來自發光層之發光向藍寶石基板101側反射的功能且 經疊層白金（Pt)膜/铑（Rh)膜/金（An)膜所構成之正 極109。與p型接觸層107之表面接觸之金屬膜係使用白 金膜。 經形成負極108和正極109後，則將藍寶石基板101之 背面使用金剛石微粒之硏磨粒來加以硏磨，最後則予以精 Φ 加工成鏡面。然後切斷積層結構體11，予以分離成350微 米方形之正方形之個別LED 1 0。然後，使負極和正極分別 接著於子安裝架以製成覆晶型之晶片。此時將施加約爲 3 00°C之熱在晶片之電極。然後進一步使其載置於導線架後 ，以金（An )線與導線架結線。 如上所述之步驟所製造之LED晶片，在其負極108和正 極1 09之間使正向電流流通，以評估電氣特性及發光特性 。正向電流設定爲20 mA時之正向驅動電壓（Vf)爲3.0 φ V，使電流設定爲1 〇 // A時之逆向電壓（V1·)則爲2 0 V以 上。如此，並未發生因接合時之熱而導致驅動電壓上升。 而且，由藍寶石基板1 〇 1朝著外部透射的發光之波長爲 455奈米，且藉由一般的積分球所測定之發光輸出爲10 mW。另外，由直徑5 · 1公分（2英寸）之晶圓中除去外觀 不良品後，雖然獲得約爲1〇,〇〇〇個之LED，但是全部在並 無變化下顯現出如上所述之特性。 〔實施例2〕 -20 - 1269465 以實施例2所製造之積層結構體爲如下述之結構。 積層結構體11係在由藍寶石之C面（（0001 )結晶面） 所構成之基板1 〇 1上，隔著由A1N所構成之緩衝層（未圖 示），將非摻雜的GaN層（層厚 =8微米）1〇2、摻Ge的 η型GaN層（層厚 =2微米、載子濃度 =7><1018 cm·3 ) 103、摻Si的η型InonGaowN包層（層厚 =18奈米、載 子濃度 =1 x 1〇18 cnT3 ) 104、由6層之摻Si的GaN阻障 層（層厚 =14.0奈米、載子濃度 = lxl〇17 cm·3 )與5 層之非慘雜的In〇.2〇Ga().8〇N之井層（層厚 =2.5奈米）所 構成之多重量子結構之發光層105、摻 Mg的ρ型 Al〇.〇7Ga().93N包層（層厚 =12奈米）106、及摻Mg的 Al〇.()2Ga().98N接觸層（層厚 =175奈米）107依此順序予 以積層所構成。上述積層結構體1 1之各構成層102〜107 係使用一般的減壓MOCVD方法使其生長。 摻Mg的AlGaN接觸層107係以與實施例1相同順序使 其生長。氣相生長結束後，積層結構體11係以與實施例1 相同順序使其冷卻至室溫。 經冷卻至室溫後，由生長反應爐取出積層結構體1 1，藉 由一般的SIMS分析法將接觸層107之鎂及氫之原子濃度 加以定量。結果Mg原子係以1.5 X 102G cm_3之濃度且從 表面朝著深度方向大致一定之濃度分佈。在另一方面’氫 原子係含有8 X 1019 cm·3之約一定的濃度。另外’電阻率 係藉由一般的TLM法之測定結果來估計則大致爲1 80 Ω cm -21 - 1269465 使用上述具有P型接觸層之磊晶積層結構體1 1以製造 LED 1 0。製造之順序、電極之結構等係與實施例1相同。 藉由如上所述之步驟所製造之LED晶片，在其負極1〇8 和正極1 09之間使正向電流流通以評估電氣特性及發光特 性。正向電流設定爲20 mA時之正向驅動電壓（Vf)爲 3.3 V，使電流設定爲10// A時之逆向電壓（Vr)則爲20 V以上。如此，並未發生因接合時之熱而導致驅動電壓上 升。 而且，由藍寶石基板101朝著外部透射的發光之波長爲 470奈米，且藉由一般的積分球所測定之發光輸出爲12 mW。另外，由直徑5.1公分（2英寸）之晶圓中除去外觀 不良品後，雖然獲得約爲10,000個之LED，但是全部在並 無變化下顯現出如上所述之特性。 〔比較例1〕 除改變生長後之處理法以外，其餘則以與上述實施例1 相同地形成摻Mg的p型AlGaN接觸層。亦即，在本比較 例，則根據與實施例1所揭示相同之順序、條件形成實施 例1所揭示之積層結構體後，雖然將在氣相生長時所使用 的載氣之氫予以切換爲氮，但是氨則在生長結束時予以減 爲〇 . 2 %後，然後繼續使其流通，降溫至3 5 〇它。第5圖係 以模式展示該降溫過程之圖。 對於藉由比較例1所製得之試料，根據與實施例相同地 藉由SIMS法測定Mg、Η之濃度，結果Mg原子濃度爲7 χ 1 019 c m 3之與實施例1之情況相同，在另一方面，氫原子 -22- 1269465 Q有7 x 1019 c πΓ3之濃度。另外，根據與實施例1柑同之 TLM法測定電阻率結果，大致估計爲15,〇〇〇Ω(：ιη。 將與實施例1相同地製成爲FC型元件之晶片載置於導 、 線架上，然後在負極108和正極109之間使正向電流流通 ’以評估電氣特性及發光特性。正向電流設定爲20 mA時 之正向驅動電壓（Vf)係上升爲4·0 V，發光輸出則爲8 mW 〇 〔比較例2〕 ® 除改變生長後之處理法以外，其餘則以與上述實施例1 相同地形成摻Mg的p型GaN接觸層。亦即，在本比較例 ’則根據與實施例1所揭示相同之順序、條件形成實施例 1所揭示之積層結構體後，在氣相生長時所使用的載氣之 氫則予以切換爲氮，同時停止氨之流通，並降溫至3 5 0 °C 。第6圖係以模式展示該降溫過程之圖。 對於藉由比較例2所製得之試料，根據與實施例相同地 藉由SIMS法測定Mg、Η之濃度，結果Mg原子濃度爲7 X 1〇19 cm 3之與實施例1之情況相同，在另一方面，氫原子 含有1 X 1019 cnT3之濃度。另外，根據與實施例1相同之 TLM法測定電阻率結果，大致估計爲1〇 Ω cm。 將與實施例1相同地製成爲FC型元件之晶片載置於導 _ 線架上，然後在負極108和正極109之間使正向電流流通 ，以評估電氣特性及發光特性。正向電流設定爲20 mA時 之正向驅動電壓（Vf)爲3·0 V，發光輸出則爲10 mW， 但是電流設定爲1 〇 # A時之逆向電壓（Vr )則爲5 V。 -23- 1269465 〔實施例3〕 在實施例3，則使用與在實施例1所揭示者相同之積層 結構體，並予以形成FU型之電極以製得LED。第7圖係 根據本實施例所形成之電極之俯視（平面）圖。 在剩餘的接觸層10 7之表面的約全域，則予以形成具有 可將來自發光層之發光導出至外部之透光性且經疊層白金 (Pt)膜/金（Au)膜所構成之正極109。與p型接觸層 1 07之表面接觸之金屬膜係使用白金膜。 II 並且，進一步在上述透光性電極1〇9之上面形成最外表 面爲使用Au之接合墊1 10。然後，則以與實施例1相同順 序予以分離成350微米方形之正方形的個別LED20。(4) Stop supplying trimethylgallium, trimethylaluminum, ammonia and dicyclopentadienylmagnesium to the growth reactor to stop the growth of the Mg-doped P-type A1G.Q2GaG.98N layer. After the vapor phase growth of the contact layer 107 composed of the Mg-doped P-type A1GaN layer is completed, the carrier gas is immediately switched from hydrogen to nitrogen and the gas flow rate is reduced and the load is increased by the amount corresponding to the reduced portion. The flow of nitrogen in the gas. Specifically, it is 50% ammonia by volume of the total gas flowing during growth, and is reduced to 0.2%. At the same time, the energization of the high frequency induction heating heater used to heat the substrate 1〇1 is stopped. Then, after maintaining this state for 2 minutes, the circulation of ammonia was stopped. At this time, the substrate temperature was 850 °C. A schematic diagram of the cooling process is shown in FIG. After cooling to room temperature in this state, the laminated structure 11 was taken out from the growth reactor, and the atomic concentrations of magnesium and hydrogen in the contact layer 107 were quantified by a general SIMS analysis method. As a result, the Mg atom system was distributed at a concentration of 7 X 1019 cm_3 and at a certain concentration from the surface to the depth direction. On the other hand, the hydrogen atom contains a certain concentration of 6 X 1019 cnT3. Further, the specific resistance is estimated to be approximately 150 Ω c m by the measurement result of the general TLM (telemetry) method. The above-described epitaxial laminate structure 1 having a P-type contact layer is used to manufacture the LED 10. First, a general dry etching is applied to a predetermined region where the negative electrode 108 is formed, and only the region is exposed to expose the surface of the Si-doped GaN layer 103. A negative electrode 108 made of a laminated titanium (Ti) / aluminum (A1) -19 - 1269465 is formed on the exposed surface portion. Approximately the entire surface of the surface of the remaining contact layer 107 is formed to have a function of reflecting the light from the light-emitting layer toward the side of the sapphire substrate 101 and laminated white gold (Pt) film / rhodium (Rh) film / gold ( An) A positive electrode 109 composed of a film. The metal film in contact with the surface of the p-type contact layer 107 is a platinum film. After the negative electrode 108 and the positive electrode 109 are formed, the back surface of the sapphire substrate 101 is honed using the honing particles of the diamond fine particles, and finally, the Φ is processed into a mirror surface. Then, the laminated structure 11 was cut and separated into individual LEDs 10 of a square of 350 μm square. Then, the negative electrode and the positive electrode were respectively placed on the submount to form a flip chip. At this time, an electrode of about 300 ° C is applied to the electrode of the wafer. Then, it is further placed on the lead frame, and the gold (An) wire is connected to the lead frame. The LED wafer manufactured by the above-described steps circulates a forward current between its negative electrode 108 and the positive electrode 109 to evaluate electrical characteristics and luminescent characteristics. When the forward current is set to 20 mA, the forward drive voltage (Vf) is 3.0 φ V, and the reverse voltage (V1·) when the current is set to 1 〇 // A is 20 V or more. Thus, the driving voltage does not rise due to the heat at the time of bonding. Further, the wavelength of the light emitted from the sapphire substrate 1 〇 1 to the outside was 455 nm, and the light output measured by a general integrating sphere was 10 mW. In addition, after removing the defective product from the wafer having a diameter of 5 · 1 cm (2 inches), although about one 〇, one LED is obtained, all of them exhibit the characteristics as described above without change. . [Example 2] -20 - 1269465 The laminated structure produced in Example 2 had the following structure. The laminated structure 11 is formed of a buffer layer (not shown) made of A1N on a substrate 1 〇1 composed of a C-plane ((0001) crystal plane) of sapphire, and an undoped GaN layer ( Layer thickness = 8 μm) 1, 2 Ge-doped η-type GaN layer (layer thickness = 2 μm, carrier concentration = 7 >< 1018 cm·3 ) 103, Si-doped n-type InonGaowN cladding (layer thickness) =18 nm, carrier concentration = 1 x 1 〇18 cnT3) 104, a 6-layer Si-doped GaN barrier layer (layer thickness = 14.0 nm, carrier concentration = lxl 〇 17 cm·3) and 5 The luminescent layer 105 of multi-quantum structure composed of a layer of non-complex In〇.2〇Ga().8〇N (layer thickness=2.5 nm), Mg-doped p-type Al〇.〇7Ga (). 93N cladding layer (layer thickness = 12 nm) 106, and Mg-doped Al 〇. () 2Ga (). 98N contact layer (layer thickness = 175 nm) 107 is laminated in this order. Each of the constituent layers 102 to 107 of the laminated structure 1 1 is grown by a general pressure reduction MOCVD method. The Mg-doped AlGaN contact layer 107 was grown in the same order as in Example 1. After the vapor phase growth was completed, the laminated structure 11 was cooled to room temperature in the same manner as in Example 1. After cooling to room temperature, the laminated structure 1 was taken out from the growth reactor, and the atomic concentrations of magnesium and hydrogen of the contact layer 107 were quantified by a general SIMS analysis method. As a result, the Mg atomic system was distributed at a concentration of 1.5 X 102 G cm 3 and at a substantially constant concentration from the surface toward the depth direction. On the other hand, the hydrogen atom contains a concentration of about 8 X 1019 cm·3. Further, the resistivity is estimated to be approximately 1 80 Ω cm -21 - 1269465 by the measurement result of the general TLM method. The above-described epitaxial layered structure 1 1 having a P-type contact layer is used to manufacture the LED 10 . The order of manufacture, the structure of the electrodes, and the like are the same as in the first embodiment. With the LED wafer manufactured by the above-described steps, a forward current was passed between the negative electrode 1〇8 and the positive electrode 109 to evaluate electrical characteristics and light-emitting characteristics. The forward drive voltage (Vf) is set to 3.3 V when the forward current is set to 20 mA, and the reverse voltage (Vr) when the current is set to 10//A is 20 V or more. Thus, the driving voltage does not rise due to the heat at the time of bonding. Further, the wavelength of the light emitted from the sapphire substrate 101 toward the outside was 470 nm, and the light output measured by a general integrating sphere was 12 mW. Further, after removing the defective product from the wafer having a diameter of 5.1 cm (2 inches), although about 10,000 LEDs were obtained, all of the above characteristics were exhibited without change. [Comparative Example 1] A Mg-doped p-type AlGaN contact layer was formed in the same manner as in the above Example 1, except that the treatment after the growth was changed. That is, in the present comparative example, the laminated structure disclosed in Example 1 was formed in the same order and conditions as disclosed in Example 1, and the hydrogen of the carrier gas used in the vapor phase growth was switched to Nitrogen, but ammonia is reduced to 〇. 2% at the end of growth, then continue to circulate and cool to 3 5 〇 it. Figure 5 is a diagram showing the cooling process in a pattern. With respect to the sample prepared in Comparative Example 1, the concentration of Mg and yttrium was measured by the SIMS method in the same manner as in the Example, and as a result, the atomic concentration of Mg was 7 χ 1 019 cm 3 as in the case of Example 1, On the other hand, the hydrogen atom-22-1269465 Q has a concentration of 7 x 1019 c π Γ 3 . Further, the resistivity was measured according to the TLM method of Example 1 and was estimated to be approximately 15, 〇〇〇 Ω (: ηη. The wafer which was fabricated as the FC type element in the same manner as in Example 1 was placed on the guide line. On the shelf, a forward current is then passed between the negative electrode 108 and the positive electrode 109 to evaluate the electrical characteristics and the light-emitting characteristics. The forward drive voltage (Vf) is raised to 4·0 V when the forward current is set to 20 mA. The light-emitting output was 8 mW 比较 [Comparative Example 2] ® except that the treatment after the growth was changed, the Mg-doped p-type GaN contact layer was formed in the same manner as in the above Example 1. That is, in the present comparative example' Then, according to the same procedure and conditions as disclosed in Example 1, the laminated structure disclosed in Example 1 is formed, and the hydrogen of the carrier gas used in the vapor phase growth is switched to nitrogen, and the circulation of ammonia is stopped. The temperature was lowered to 305 ° C. Fig. 6 is a graph showing the cooling process in a mode. For the sample prepared by Comparative Example 2, the concentration of Mg and yttrium was measured by SIMS method as in the example. As a result, the concentration of Mg atoms was 7 X 1 〇 19 cm 3 and that of Example 1 On the other hand, the hydrogen atom contained a concentration of 1 X 1019 cnT3, and the resistivity measurement was carried out by the same TLM method as in Example 1, and was estimated to be approximately 1 〇Ω cm. The same procedure as in Example 1 was carried out. The wafer which becomes the FC type element is placed on the lead frame, and a forward current is passed between the negative electrode 108 and the positive electrode 109 to evaluate the electrical characteristics and the light-emitting characteristics. The forward current is set to 20 mA for forward drive. The voltage (Vf) is 3·0 V, and the light-emitting output is 10 mW, but the reverse voltage (Vr) when the current is set to 1 〇# A is 5 V. -23- 1269465 [Embodiment 3] In Embodiment 3 Then, the same laminated structure as that disclosed in Example 1 was used, and a FU-type electrode was formed to obtain an LED. Fig. 7 is a plan view (planar) of the electrode formed according to the present embodiment. On the entire surface of the contact layer 107, a positive electrode 109 having a light-transmitting and laminated white gold (Pt) film/gold (Au) film which can conduct light from the light-emitting layer to the outside is formed. The metal film in contact with the surface of the p-type contact layer 107 uses platinum Further, the outermost surface of the translucent electrode 1〇9 is further formed by using the bonding pad 110 of Au. Then, the individual LEDs 20 are separated into squares of 350 micrometer squares in the same order as in the first embodiment. .

如上所述之步驟所製造之LED晶片，在其負極108和正 極1 09之間使正向電流流通，以評估電氣特性及發光特性 。正向電流設定爲20 mA時之正向驅動電壓（Vf)爲3.0 V，使電流設定爲10 // A時之逆向電壓（Vr)則爲20 V以 上。而且，由半導體層側朝著外部透射的發光之波長爲 # 455奈米，且藉由一般的積分球所測定之發光輸出爲6 mW 。另外，由直徑5.1公分（2英寸）之晶圓中除去外觀不良 品後，雖然獲得約爲1〇,〇〇〇個之LED，但是全部在並無變 化顯現出如上所述之特性。 〔產業上之利用性〕 根據本發明所提供之III族氮化物P型半導體之製法， ^ 係可同時實現高Vi*與低驅動電壓之特性。因此，在III族 氮化物半導體發光元件之製造上極其有用。 -24- 1269465 【圖式簡單說明】 第1圖係以模式展示本發明之111族氮化物半導體發光 元件圖。 第2圖係以實施例1所製造之磊晶積層結構體之剖面模 式圖。 第3圖係以實施例1所製造之LED之俯視（平面）模式 第4圖係展示在實施例1之降溫方法模式圖。 第5圖係展示在比較例1之降溫方法模式圖。 第6圖係展示在比較例1之降溫方法模式圖。 第7圖係以實施例2所製造之LED之俯視（平面）模式 圖。 【主要元件符號說明】 1 基板 2 緩衝層 3 η型半導體層 4 發光層 5 Ρ型半導體層 6 負極 7 正極 10 LED 11 積層結構體 20 LED 101 基板 -25- 1269465The LED wafer manufactured by the above-described steps circulates a forward current between its negative electrode 108 and the positive electrode 109 to evaluate electrical characteristics and luminescent characteristics. The forward drive voltage (Vf) is set to 3.0 V when the forward current is set to 20 mA, and the reverse voltage (Vr) when the current is set to 10 // A is 20 V or more. Further, the wavelength of the light emitted from the side of the semiconductor layer toward the outside was #455 nm, and the light output measured by a general integrating sphere was 6 mW. Further, after removing the appearance defect from the wafer having a diameter of 5.1 cm (2 inches), although about one turn and one LED were obtained, all of them showed no change as described above. [Industrial Applicability] According to the method for producing a group III nitride P-type semiconductor provided by the present invention, the characteristics of high Vi* and low driving voltage can be simultaneously achieved. Therefore, it is extremely useful in the manufacture of a group III nitride semiconductor light-emitting device. -24- 1269465 BRIEF DESCRIPTION OF THE DRAWINGS Fig. 1 is a view showing a group 111 nitride semiconductor light-emitting device of the present invention in a mode. Fig. 2 is a cross-sectional view showing the epitaxial laminate structure produced in the first embodiment. Fig. 3 is a plan view (planar) mode of the LED manufactured in the first embodiment. Fig. 4 is a schematic view showing a cooling method in the first embodiment. Fig. 5 is a view showing a mode of the cooling method in Comparative Example 1. Fig. 6 is a view showing a mode of the cooling method in Comparative Example 1. Fig. 7 is a plan view (planar) pattern of the LED manufactured in the second embodiment. [Description of main components] 1 Substrate 2 Buffer layer 3 η-type semiconductor layer 4 Light-emitting layer 5 Ρ-type semiconductor layer 6 Negative electrode 7 Positive electrode 10 LED 11 Multi-layer structure 20 LED 101 Substrate -25- 1269465

102 非摻雜的 103 η M GaN 104 包層 105 發光層 106 包層 107 接觸層 108 負極 109 正極 1 10 接合墊102 undoped 103 η M GaN 104 cladding 105 luminescent layer 106 cladding 107 contact layer 108 negative electrode 109 positive electrode 1 10 bonding pad

GaN層 層GaN layer

-26--26-

Claims (1)

1269465 第94 1 1 52 1 3號「III族氮化物ρ型半導體及其製法」專利案 (2006年06月26日修正） 十、申請專利範圍： 1 . 一種III族氮化物半導體發光元件之製法，係於基板上 形成由111族氮化物半導體形成的η型接觸層、發光層 及Ρ型接觸層之III族氮化物半導體發光元件之製法， 其特徵爲經使含有Ρ型摻質之 ρ型接觸層生長後在降 溫時，以與生長結束時之溫度相同的溫度，從生長剛結 束之後起載氣則使用惰性氣體，且使氮源之流量減少， 並在其後之降溫過程途中，於700〜950°C之溫度下， 停止供應氮源。 2. 如申請專利範圍第1項之III族氮化物半導體發光元件 之製法，其中生長結束時之溫度爲900°C以上。 3. 如申請專利範圍第1項之III族氮化物半導體發光元件 之製法，其中氮源爲氨氣。 4. 如申請專利範圍第1項之III族氮化物半導體發光元件 之製法，其中在生長半導體時之載氣係含有氫氣。 5 · 如申請專利範圍第1項之III族氮化物半導體發光元件 之製法’其中減少後之氮源之流量爲全氣體體積之 0 · 0 0 1 〜1 0 %。 6· —種III族氮化物P型半導體，ρ型摻質之濃度爲1 X 1〇" 〜1 X 1 0*·1 cnr3 ’其特徵爲含有多於該ρ型摻質濃度之 1269465 1/5，且少於p型摻質濃度之量的氫原子，電阻率爲5〇 Dcm 〜2,000Qcm。 1 · 一種η!族氮化物半導體發光元件，係在基板上設置由 ΠΙ族氮化物半導體所構成之n型接觸層、發光層和p 型接觸層，且負極和正極係分別設置在η型接觸層和ρ 型接觸層上之ΠΙ族氮化物半導體發光元件，其特徵爲 Ρ型接觸層之Ρ型摻質濃度爲1Χ1018〜IX 1021cm·3， 含有多於該P型摻質濃度之1 /5，且少於ρ型摻質濃度 之量的氫原子，電阻率爲50Qcm〜2,000Dcm。 8. 如申請專利範圍第7項之III族氮化物半導體發光元件 ，其中發光元件爲覆晶晶片型。 9. 如申請專利範圍第7項之III族氮化物半導體發光元件 ，其中發光元件爲面朝上組裝型。1269465 No. 94 1 1 52 1 No. 3 "III-type nitride p-type semiconductor and its preparation method" patent (amended on June 26, 2006) X. Patent application scope: 1. A method for preparing a III-nitride semiconductor light-emitting device A method for forming a group III nitride semiconductor light-emitting device comprising an n-type contact layer, a light-emitting layer and a germanium-type contact layer formed of a group 111 nitride semiconductor on a substrate, characterized in that a p-type containing a germanium-type dopant is formed After the contact layer grows, when the temperature is lowered, at the same temperature as the temperature at the end of the growth, the inert gas is used from the carrier gas immediately after the end of the growth, and the flow rate of the nitrogen source is decreased, and in the subsequent cooling process, At a temperature of 700 to 950 ° C, the supply of nitrogen source is stopped. 2. The method of producing a group III nitride semiconductor light-emitting device according to claim 1, wherein the temperature at the end of growth is 900 ° C or higher. 3. The method of producing a group III nitride semiconductor light-emitting device according to claim 1, wherein the nitrogen source is ammonia gas. 4. The method of producing a group III nitride semiconductor light-emitting device according to claim 1, wherein the carrier gas during the growth of the semiconductor contains hydrogen. 5 · The method of manufacturing a group III nitride semiconductor light-emitting device according to claim 1 wherein the reduced nitrogen source flow rate is 0·0 0 1 to 1 0% of the total gas volume. 6. A group III nitride P-type semiconductor, the concentration of the p-type dopant is 1 X 1 〇 " ~1 X 1 0*·1 cnr3 'characterized by containing more than the p-type dopant concentration of 1269465 1 /5, and less than the p-type dopant concentration of the hydrogen atom, the resistivity is 5 〇 Dcm ~ 2,000 Qcm. 1) A η! group nitride semiconductor light-emitting device, wherein an n-type contact layer composed of a lanthanum nitride semiconductor, a light-emitting layer, and a p-type contact layer are provided on a substrate, and the negative electrode and the positive electrode are respectively disposed at n-type contact The bismuth nitride semiconductor light-emitting device on the layer and the p-type contact layer is characterized in that the 掺-type contact layer has a 掺-type dopant concentration of 1Χ1018~IX 1021cm·3, and contains more than 1/5 of the P-type dopant concentration. And a hydrogen atom in an amount smaller than the p-type dopant concentration, and the specific resistance is 50 Qcm to 2,000 Dcm. 8. The group III nitride semiconductor light-emitting device according to claim 7, wherein the light-emitting element is a flip chip type. 9. The group III nitride semiconductor light-emitting device according to claim 7, wherein the light-emitting element is of a face-up assembly type.