TWI241614B - Plasma display panel and front substrate thereof and manufacturing method of front substrate of plasma display panel - Google Patents

Abstract

A plasma display panel, front substrate thereof and the manufacturing method of front substrate of plasma display panel are provided. The front substrate includes: a substrate, a plurality of pair of electrodes disposed on the substrate, a dielectric layer and a protect layer disposed on the substrate to cover the pairs of electrodes, the dielectric layer has a plurality of cavity with different depth. The luminous efficiency of plasma display panel can be optimized by designing the depth of the cavity corresponding to the different properties of fluorescence material.

Description

1241614 13546twf.doc/g 九、發明說明： 【發明所屬之技術領域】 本發明是有_ 一種電激顯示器（pla_ Di1241614 13546twf.doc / g IX. Description of the invention: [Technical field to which the invention belongs] The present invention has _ a kind of electric display (pla_ Di

Panel ’ PDP)，且特別是有關於—種在前基板的介電層上呈 f不同深度凹穴的錢顯4及其前基板及電漿顯示器之 前基板的製造方法。 【先前技術】 • _隨著多媒體的發展，作為人與電腦介面之溝通界面的 顯示器其重要性也逐日增加。近年來，平面顯示器更是大 幅地取代了傳統的陰極射線管顯示器。目前平面顯示哭主 要有下列幾種：電漿顯示器、有機電激發光顯示器(㈣牆 - Electro-Luminescent Display，〇ELD)以及液晶顯示哭 ㈣祝，LCD)等。其中，電漿顯示器以& 大尺寸、自發光、無視角依存、輕薄以及全彩化等 具有極大的應用潛力’可望成為下一代的平面顯示器之主 流。 _ 目前的電㈣示器主要係由前基板(fr⑽油伽⑹、 後基板(rear substrate)以及放電氣體所構成。圖示為習 知電漿顯示器的立體示意圖。請參照圖丨，電漿顯示器1()〇 主要係由前基板120、後基板11〇以及位於前基板12〇與 後基板110之間的反應氣體(未繪示)所構成。其中，前基 板120主要係由基板122、X電極124、Y電極125、介^ 層126以及保護層127所構成。X電極124主要係由透明 電極124a與匯流電極(buselectrode)124b所構成，而γ電 5 介電層126係配晋於其4 Ί 、， # 夏於基板122上，亚覆盍住X電極124 與Υ電極125，而保謂展1?7 你邊層127則係配置於介電層ι26上， 用以保護X電極124盥 , 4 ” Υ电極125，以避免在電漿顯示器 的放電過程中損壞X電極124與γ電極125。Panel ′ PDP), and in particular, it relates to a method of manufacturing a Qianxian 4 with recesses of different depths on the dielectric layer of the front substrate, a front substrate thereof, and a front substrate of a plasma display. [Previous technology] • _ With the development of multimedia, the importance of monitors as communication interfaces between humans and computers has increased day by day. In recent years, flat panel displays have largely replaced traditional cathode ray tube displays. At present, there are the following types of flat display crying: plasma display, organic electro-luminescence display (ELD), and liquid crystal display crying, LCD and so on. Among them, the plasma display has great application potential due to its large size, self-luminous, no viewing angle dependence, light and thin, and full color. It is expected to become the mainstream of the next generation of flat panel displays. _ The current electronic display is mainly composed of a front substrate (fr⑽ 油 ⑹, rear substrate) and a discharge gas. The diagram is a three-dimensional schematic diagram of a conventional plasma display. Please refer to Figure 丨, plasma display 1 () 〇 is mainly composed of front substrate 120, rear substrate 110, and a reaction gas (not shown) located between front substrate 120 and rear substrate 110. Among them, front substrate 120 is mainly composed of substrates 122, X The electrode 124, the Y electrode 125, the dielectric layer 126, and the protective layer 127. The X electrode 124 is mainly composed of a transparent electrode 124a and a bus electrode 124b, and a γ dielectric 5 dielectric layer 126 is further provided therefrom. 4 Ί ,, # Xia on the substrate 122, the X electrode 124 and the Y electrode 125 are sub-covered, and the edge layer 127 is arranged on the dielectric layer 26 to protect the X electrode 124. To prevent the X electrode 124 and the gamma electrode 125 from being damaged during the discharge of the plasma display, the 4 ”scandium electrode 125 is used.

1241614 13546tvvf.doc/g f 125縣由透明電極125a與匯流電極1祝所構成。目 器中’透明電極i24a與透明電㈣元的材 貝U疋‘電乳化物(Indium Tin Oxide，IT0)，但由於導 電氧化物的導電性I4h ^ $电㈣1屬她之下仍較為不足，所以會在 透明電極124a與透明雨代t x 曰牡 边月％極125a上分別配置金屬材質的匯 流電極124b與匯流雷#』，k 、 _ /;,1甩極12北，以便於增加X電極124盥 Υ電極125的導電性。 一 後基板110主要係由基板112、定址電極(address electr〇de)114、阻隔璧(r_6以及螢光材料層118所構 成。其中，定址電極114係配置在基板112上，且在定址 二極114上配置有—層上玻物爾層Μ。一般而 言，阻隔壁116則係配置在相鄰的定址電極ιΐ4之間的上 玻璃層II5上而在基板II2上形成多個放電空間⑽。 邊光材料層118則是配置在放電空間13〇中的定址電極 114上方的上玻璃層115上，並覆蓋住阻隔壁ιΐ6的側壁。 此外，放電氣體(未繪示）係配置在放電空間13〇之内。 然而，在圖1的電漿顯示器中，其放電空間13〇僅由 阻隔壁116所形成，因而使得其放電空間較小，並且在圖 1的交流電式電漿顯*器(AC_PDP)中，會因為電場的互相 干擾(Cross talk)而產生誤放電現象。 1241614 13546twf.doc/g 圖2所繪示為本發明習知另一種電漿顯示器的 意圖，圖2中與圖1中代表相同構件者係使用相同二= 並省略其說明。於圖2中，係藉由減少χ電極124與^二 極125所對應位置的介電層丨26厚度，亦即是在前基板丨^ 的介電層126中形成多數個凹穴128，從而降低初、 增加放電空間及介電層之電容。 ^ ^ 然而，在圖2所示的電漿顯示器中，在介電層丨26中 所形成之凹穴128的深度一致，因此無法針對紅色θ、綠色、 藍色等不同特性的螢光材料來調整其電容與電荷之累積， 從而無法進一步的將電漿顯示器的發光效率^ =化了貝 【發明内容】 因此，本發明的目的就是提供一種電漿顯示器及盆前 基板及電漿齡ϋ之前基㈣製造方法，能夠降低電紫顧 :器的初始電壓、並增加放電空間，提昇電軸示器 光效率。 本發明的另一目的就是提供一種電聚顯示器及其前基 =電漿顯示H之前紐的製造料，能_低電浆顯示 态屋生互相干擾(Cross talk)的現象。 本發明的再一目的就是提供一種電漿 及其製造方法，能夠因應螢光材料的特性，二二ς 漿顯示器的發級率最佳化。 進ν的將電 本發明提出一種電漿顯示器之前基板， 二ΐί電極對以及—介電層。其中介電層，設置於基板上 後盍電極對，介電層在對應此些電極對的位置具有多數 71241614 13546tvvf.doc / g f County 125 is composed of a transparent electrode 125a and a bus electrode 1b. In the eyepiece, the transparent electrode i24a and the transparent electric element material U 疋 'electric emulsion (Indium Tin Oxide, IT0), but due to the conductivity of the conductive oxide I4h ^ $ 电 ㈣1 is still insufficient under her, Therefore, on the transparent electrode 124a and the transparent rain generation tx, the side electrode 125a, a metal bus electrode 124b and a bus lightning bolt # ″, k, _ / ;, 1 pole 12 north, in order to increase the X electrode 124 The conductivity of the toilet electrode 125. A rear substrate 110 is mainly composed of a substrate 112, an address electrode 114, a barrier 璧 (r_6), and a fluorescent material layer 118. Among them, the address electrode 114 is disposed on the substrate 112 and is located on the address diode. 114 is provided with an upper glass layer M. Generally, the barrier wall 116 is disposed on the upper glass layer II5 between the adjacent address electrodes ιΐ4 to form a plurality of discharge spaces 基板 on the substrate II2. The edge light material layer 118 is disposed on the upper glass layer 115 above the address electrode 114 in the discharge space 13 and covers the side wall of the barrier wall ι6. In addition, a discharge gas (not shown) is arranged in the discharge space 13 However, in the plasma display of FIG. 1, the discharge space 13 is formed only by the barrier wall 116, thus making the discharge space smaller, and in the AC plasma display device (AC_PDP of FIG. 1). ), A false discharge phenomenon may occur due to the cross talk of the electric field. 1241614 13546twf.doc / g Fig. 2 shows the intention of another plasma display according to the present invention. Fig. 2 and Fig. 1 Those who represent the same component use the same = And its explanation is omitted. In FIG. 2, the thickness of the dielectric layer 丨 26 corresponding to the position of the χ electrode 124 and the ^ diode 125 is reduced, that is, a majority is formed in the dielectric layer 126 of the front substrate ^ Recesses 128 to reduce the initial and increase the discharge space and the capacitance of the dielectric layer. However, in the plasma display shown in FIG. 2, the depth of the recesses 128 formed in the dielectric layer 26 is the same. Therefore, it is not possible to adjust the accumulation of capacitance and charge for fluorescent materials with different characteristics such as red θ, green, and blue, so that the luminous efficiency of the plasma display cannot be further improved. The object of the invention is to provide a plasma display, a basin front substrate and a plasma base substrate manufacturing method, which can reduce the initial voltage of the electric transformer, increase the discharge space, and improve the light efficiency of the electric axis indicator. Another object of the invention is to provide an electro-polymer display and its front substrate = plasma display material before H, which can reduce the phenomenon of low-plasma display cross talk. Another object of the present invention is to Provide a The plasma and its manufacturing method can optimize the development rate of the plasma display according to the characteristics of the fluorescent material. The present invention proposes a substrate before a plasma display, an electrode pair and a dielectric. The dielectric layer is disposed on the substrate and the back electrode pairs, and the dielectric layer has a majority of positions corresponding to these electrode pairs.

1241614 1 J546twf.doc/g 個凹=此些㈣具有不_深度。 對*極:Γ月提ί —種電漿顯示器，包括-第11 對兒極對、一介電層、一 基板、多數 上玻璃層、-阻隔壁以及—螢。料電極、-於第-基板上，介電> 1層、、中電極對配置 电層在對應電極對的位置 m電極對， 具有不同的深度。定址電極配 ς上且=穴 層上，且每:定址電極，阻隔壁配置於上玻璃 層W住jap#之（㈣極細阻隔翻隔，螢光材料 ;電側壁以及定址電極上方之上玻璃層，其 相對向的“，係與定址電極、阻隔壁、螢光材料層係 多數個放電空間 壁之間的空間與此些凹⑽構成 本發明提供一種電漿顯示器之前基板的製造方法，包 舌下列步驟：提供—基板’接著於基板上形成多數對電極 然後於基板上形成一介電層以覆蓋此些電極對，其中 "電層在預定形成放電空間的位置具有多數個凹穴，且此 些凹穴具有不同的深度。 本發明藉由在前基板的介電層中形成有凹穴，因此在 所形成之電漿顯示器中，放電空間是由阻隔壁之間的空間 與凹穴所構成，因此能夠得到較大的放電空間。而且，由 於在凹穴中的介電層的厚度較薄（亦即是指對應電極對位 置的介電層），因此能夠降低電漿顯示器的初始電壓，並提 高電漿顯示器的發光效率。 8 1241614 1 j>546twf.d〇c/g 而且’於本發明中，由於在介電層中所形成的凹穴呈 有不同的深度，亦即使得對應凹穴位置的 的厚度，因而能夠避免產生互相干擾的現象。-有不同 再者，於本發明中，由於在介電層中所形成的凹穴呈 有不同的深度，亦即使得對應凹穴位置的介電層具有不同 的厚度’因此本發明能夠根據不㈣性崎^料個別調 整其電容與電荷的累積值，進—步的將電漿顯示器的發光 效率最佳化。 ^為讓本發明之上述和其他目的、特徵和優點能更明顯 易懂，下文特舉較佳實施例，並配合所附圖式，作詳細說 明如下。 【實施方式】 圖3繪示為本發明一較佳實施例的一種電漿顯示器的 剖面圖。請參照圖2，電漿顯示器200主要包括後基板210 以及前基板220。 其中，後基板210至少包括基板212、定址電極214、 上玻璃層215、阻隔壁216以及螢光材料層218。定址電極 214係配置在基板212上，上玻璃層215係配置在基板212 上並覆蓋定址電極214,阻隔壁216係配置在上玻璃層215 上並用以將相鄰之定址電極214隔開。於本實施例中，阻 隔壁216例如是具有多個互相平行的條狀圖案的膜層，且 每一條狀圖案均位於相鄰之定址電極214之間。而螢光材 料層218則係覆蓋住定址電極214上方之上玻璃層215與 阻隔壁216之側壁，營光材料層218例如是分別包括有可 9 1241614 13546tvvf.doc/g 發出紅、綠、藍三種顏色的螢光材料。其中，在任兩條條 狀圖案=間的螢光材料層218例如是紅色螢光層、綠色榮 光層、=色螢光層的其中之一，並且此些螢光材料層218 係以疋的規律進行配置，其例如是以紅、綠、藍或是紅、 監、綠的順序進行排列。 月il基板220至少包括基板222、多對電極對223、介電 層226以及保護層229。電極對223係配置在基板222上， 參 而；1電層226係配置在基板222上並覆蓋此些電極對 223，此處特別的是，於介電層226中配置有多數個凹穴 228(228a、228b、228c)，其中此些凹穴228係對應電極對 223的位置配置’並且此些凹穴似具有不同的深度，此 外、’，由圖3可知，由於所形成的介電層226具有平坦的表 面亚j於凹穴228中未暴露出電極對223，因此相對於不 同^深度的凹穴228，於對應凹穴挪位置的介電層挪 亦^ 有不同的厚度。而保護層229則係配置於介電層226 上丄用以保護電極對223，以避免在電聚顯示器的放電過 響程中損壞電極對223。 再者，於發明較佳實施例的電漿顯示器中，每一對電 才σ、？ 223例如疋由互相平行的X電極224以及γ電極225 所構成，且其延伸方向係與定址電極214的延伸方向不 同:例如是相互垂直。而且，X電極224與¥電極225例 疋個別由透明電極224a、225a以及配置於其上的匯流電 極224b、225b所構成，其中透明電極224a、225a材質例 如是銦錫氧化物或是其他可作為透明電極的材質，而匯流 1241614 13546twf.doc/g 電極224b、225b的材質例如是低阻值之透明導電材質或金 屬材質，用以降低X電極224與γ電極225的阻值。並且， 此些凹穴228的位置係進一步對應基板212上的螢光材料 層 218。 此外，於本實施例中，相對應於螢光材料層218具有 紅色螢光層、綠色螢光層以及藍色螢光層，凹穴228(228a、 228b、228c)亦具有三種不同的深度，因此，對於紅色、綠 | 色以及藍色等三種不同顏色或特性的螢光材料而言，其在 螢光體室(cell)處所形成的放電空間230大小不相同，並且 在螢光體室處的介電層226厚度亦不相同。 在本實施例中，放電氣體（未繪示）係分別配置在此些 條狀阻隔壁216與凹穴228所組成的放電空間230中。當 靶加電壓於X電極224以及γ電極225上，並輸入訊號至 某放電空間230内的定址電極214時，則此放電空間230 内通有電壓的X電極224以及γ電極225之間將會產生放 電，並激發放電氣體使其發出紫外光，紫外光 召 ► 電空間23〇内之螢光材料層218，進而使電。；^ 2〇〇發出光線。 、於上述較佳實施例中，其中阻隔壁216係為多數個條 =圖案，且此些條狀圖案為彼此平行。然而本發明並不限 疋於此，其中阻隔壁216亦可以為多數個格狀圖案，並且 此些格狀圖案例如是以蜂巢狀之方式排列。 …於本發明上述較佳實施例中，由於在前基板22()的介 電層226中形成有凹穴228，在所形成之電漿顯示器200 1241614 13546t\vf.doc/g 中，放電空間230是由阻隔壁216之間的空間與凹穴228 所構成的，因此能夠得到較大的放電空間。而且，由於在 凹穴228中的介電層226的厚度較薄（亦即是指對應電極對 223位置的介電層226)，因此能夠降低電漿顯示器的初始 電壓，並提高電漿顯示器的發光效率。 而且於本發明上述較佳實施例中，由於在介電層226 中所形成的凹穴228具有不同的深度，亦即使得對應凹穴1241614 1 J546twf.doc / g dimples = these puppets have no depth. Pairs of poles: a kind of plasma display, including-the eleventh pair of pole pairs, a dielectric layer, a substrate, most of the upper glass layer,-a barrier, and-fluorescent. The electrode is on the first substrate, and the dielectric layer is arranged on the substrate. The dielectric layer is disposed at the position corresponding to the electrode pair. The electrode pairs have different depths. The address electrode is arranged on the hole layer, and each: the address electrode, the barrier wall is arranged on the upper glass layer, and the jap # is a thin barrier film, a fluorescent material; the electrical sidewall and the upper glass layer above the address electrode The opposite "system" and the address electrode, the barrier wall, and the fluorescent material layer are the spaces between the discharge space walls and these recesses. The present invention provides a method for manufacturing a substrate before a plasma display. The following steps: provide-the substrate, then form a plurality of pairs of electrodes on the substrate and then form a dielectric layer on the substrate to cover the electrode pairs, wherein the "electrical layer" has a plurality of cavities at the positions where the discharge space is to be formed, and These recesses have different depths. The present invention forms recesses in the dielectric layer of the front substrate, so in the formed plasma display, the discharge space is defined by the space between the barrier walls and the recesses. Structure, so that a larger discharge space can be obtained. Moreover, because the thickness of the dielectric layer in the cavity is thinner (that is, the dielectric layer corresponding to the position of the electrode pair), the electricity can be reduced. The initial voltage of the display and the luminous efficiency of the plasma display are improved. 8 1241614 1 j > 546twf.d0c / g Also, in the present invention, since the recesses formed in the dielectric layer have different depths, That is, the thickness corresponding to the position of the cavity can avoid the phenomenon of mutual interference.-There is a difference. Furthermore, in the present invention, since the cavity formed in the dielectric layer has different depths, The dielectric layers corresponding to the positions of the recesses have different thicknesses. Therefore, the present invention can individually adjust the accumulated value of its capacitance and charge according to the non-volatile material, and further optimize the luminous efficiency of the plasma display. ^ In order to make the above and other objects, features, and advantages of the present invention more comprehensible, the preferred embodiments are described below in detail with the accompanying drawings, as follows. [Embodiment Mode] FIG. A cross-sectional view of a plasma display according to a preferred embodiment of the present invention. Referring to FIG. 2, the plasma display 200 mainly includes a rear substrate 210 and a front substrate 220. The rear substrate 210 includes at least a substrate 212 and an address. Electrode 214, upper glass layer 215, barrier wall 216, and fluorescent material layer 218. Addressing electrode 214 is disposed on substrate 212, upper glass layer 215 is disposed on substrate 212 and covers addressing electrode 214, and barrier wall 216 is disposed on The upper glass layer 215 is used to separate adjacent address electrodes 214. In this embodiment, the barrier wall 216 is, for example, a film layer having a plurality of parallel strip patterns, and each strip pattern is located adjacent to each other. Between the address electrodes 214. The fluorescent material layer 218 covers the side walls of the glass layer 215 and the barrier ribs 216 above the address electrodes 214. The camping material layer 218 includes, for example, 9 1241614 13546tvvf.doc / g Fluorescent materials emitting three colors: red, green, and blue. Among them, the fluorescent material layer 218 between any two stripe patterns = is, for example, one of a red fluorescent layer, a green glory layer, and a = color fluorescent layer, and these fluorescent material layers 218 follow the rule of 疋The configuration is performed, for example, in the order of red, green, blue or red, monitor, and green. The substrate 220 includes at least a substrate 222, a plurality of pairs of electrode pairs 223, a dielectric layer 226, and a protective layer 229. The electrode pair 223 is disposed on the substrate 222, and so on; 1 The electrical layer 226 is disposed on the substrate 222 and covers these electrode pairs 223. In particular, a plurality of recesses 228 are disposed in the dielectric layer 226. (228a, 228b, 228c), where the recesses 228 are arranged corresponding to the positions of the electrode pair 223, and the recesses seem to have different depths. In addition, as shown in FIG. 3, due to the formed dielectric layer, 226 has a flat surface, and the electrode pair 223 is not exposed in the recess 228. Therefore, the dielectric layer 126 corresponding to the position of the recess 228 also has different thicknesses relative to the recess 228 of different depths. The protective layer 229 is disposed on the dielectric layer 226 to protect the electrode pair 223, so as to avoid damaging the electrode pair 223 during the discharge response of the electro-polymer display. Furthermore, in the plasma display of the preferred embodiment of the invention, each pair of electricity is σ ,? 223 is, for example, composed of X electrodes 224 and γ electrodes 225 that are parallel to each other, and the extension direction is different from the extension direction of the address electrode 214: for example, they are perpendicular to each other. In addition, the X electrode 224 and the ¥ electrode 225 are each composed of transparent electrodes 224a and 225a and bus electrodes 224b and 225b disposed thereon. The materials of the transparent electrodes 224a and 225a are, for example, indium tin oxide or others. The material of the transparent electrode, and the materials of the bus 1241614 13546twf.doc / g electrodes 224b, 225b are, for example, low-resistance transparent conductive materials or metal materials, to reduce the resistance of the X electrode 224 and the gamma electrode 225. The positions of these recesses 228 correspond to the fluorescent material layer 218 on the substrate 212. In addition, in this embodiment, corresponding to the fluorescent material layer 218 having a red fluorescent layer, a green fluorescent layer, and a blue fluorescent layer, the cavity 228 (228a, 228b, 228c) also has three different depths. Therefore, for three different colors or characteristics of red, green, and blue fluorescent materials, the discharge space 230 formed at the phosphor cell is different in size, and at the phosphor cell The thickness of the dielectric layer 226 is also different. In this embodiment, a discharge gas (not shown) is disposed in the discharge spaces 230 composed of the strip-shaped barrier ribs 216 and the recesses 228, respectively. When the target applies a voltage to the X electrode 224 and the gamma electrode 225 and inputs a signal to the address electrode 214 in a certain discharge space 230, the voltage between the X electrode 224 and the gamma electrode 225 in this discharge space 230 will be A discharge is generated, and the discharge gas is excited to emit ultraviolet light, and the ultraviolet light calls a fluorescent material layer 218 in the electric space 23, thereby enabling electricity. ; ^ 2〇〇 emits light. In the above preferred embodiment, the barrier ribs 216 are a plurality of bars = patterns, and the bar-shaped patterns are parallel to each other. However, the present invention is not limited to this. The barrier ribs 216 may also have a plurality of grid patterns, and the grid patterns are arranged in a honeycomb pattern, for example. ... In the above-mentioned preferred embodiment of the present invention, since the cavity 228 is formed in the dielectric layer 226 of the front substrate 22 (), the discharge space is formed in the formed plasma display 200 1241614 13546t \ vf.doc / g 230 is composed of the space between the barrier ribs 216 and the recess 228, so a larger discharge space can be obtained. Moreover, since the thickness of the dielectric layer 226 in the recess 228 is thin (that is, the dielectric layer 226 corresponding to the position of the electrode pair 223), the initial voltage of the plasma display can be reduced, and the plasma display can be improved. Luminous efficiency. Furthermore, in the above-mentioned preferred embodiment of the present invention, since the recesses 228 formed in the dielectric layer 226 have different depths, that is, the corresponding recesses are made

228位置的介電層226具有不同的厚度，因而能夠避免產 生互相干擾的現象。 再者於本發明較佳實施例中，由於在介電層226中 所形成的凹穴228具有不同的深度，亦即使得對應凹穴228 位置的介電層226具有不同的厚度，因此本發明能夠根據 不同顏色以及紐㈣光材料層侧輕其電容與電荷的 累積值，進一步的將電漿顯示器的發光效率最佳化。 圖从至圖4E所繪示為圖3所示之前基板的製造流程 ::示意圖。於本實施例之製造方法中，因應螢光材料 α括紅色、綠色以及藍色等三種顏色，於下述製程中所 形成的介電層係具有三種不同深度的凹穴。 上_ 基板222，接著於基板222 3成夕數對電極對223 ’其中此些電極對223的材質例 如疋銦錫钱物或是其他可作為透明電極的材質，並且 極對223例如是可採職影糊法或是缝法等已知方 法來形成。 、J乃 接著’請參照圖4B，於基板222上全面形成介電材料 12 1241614 13546twf.doc/g 層226a\其中此介電材料層22如係覆蓋於該些電極對 223，其形成的方法例如是採用網板印刷法。 、、接著，請參照圖4C，於介電材料層226a上形成介電 材料層226b，其中此介電材料層22你係形成在介電材料 層上之預定形成第一深度之凹穴以外的區域，並且其 材質與形成方法例如是與介電材料層226a相同。 接著，請參照圖4D，於介電材料層226b上形成介電 材料層226c，其中此介電材料層226c係形成在介電材料 層226b上之預定形成第一深度與第二深度之凹穴以外的 區或门樣的，其材質與形成方法亦例如是與介電材料層 226a相同。 曰 接著，請參照圖4E，於介電材料層226c上形成介電 材料層226d，其中此介電材料層226d係形成在介電材料 層226c上之預定形成第一深度、第二深度與第三深度之凹 穴以外的區域，並且其材質與形成方法例如是與介電材料 層226a相同。經由上述圖4B〜圖4E的步驟，係能夠形成 具有三種不同深度之凹穴228(228a、228b、228c)的介電層 226。 9 於上述實施例中，形成於介電層226中的凹穴228具 有三種不同的深度，然而本發明並不限定於此，本發明亦 可以因應實際上的需要，利用上述的製造方法在介電層 226中形成具有多種深度的凹穴。而且，於上述較佳實施 例中’係採用網版印刷的方式形成具有凹穴的介電層，然 而本發明亦可以採用先形成無凹穴的介電層，再採用例如 13 1241614 13546twf.doc/g =刻或是如㈣式在”層中料具有㈣深度的凹 限定===佳實施例揭露如上，然其並非㈣ 和範圍内，當可作在不脫離本發明之精神 範圍當視後咐4;;==者發明之保護 【圖式簡單說明】 疋考為準。The dielectric layer 226 at the 228 position has different thicknesses, so that mutual interference can be avoided. Furthermore, in the preferred embodiment of the present invention, the recesses 228 formed in the dielectric layer 226 have different depths, that is, the dielectric layers 226 corresponding to the positions of the recesses 228 have different thicknesses. Therefore, the present invention According to the different colors and the side of the light-emitting material layer, the accumulated value of capacitance and charge can be lightened to further optimize the luminous efficiency of the plasma display. The drawings from FIG. 4E to FIG. 4E show the manufacturing process :: schematic diagram of the substrate before FIG. 3. In the manufacturing method of this embodiment, the dielectric layer formed in the following process has pits of three different depths corresponding to three colors of red, green, and blue, including the fluorescent material α. On the substrate 222, and then on the substrate 222, several pairs of electrode pairs 223 are used. The materials of these electrode pairs 223 are, for example, indium tin alloy or other materials that can be used as transparent electrodes. It is formed by a known method such as a job shadow method or a seam method. , J is next 'Please refer to FIG. 4B, a dielectric material 12 1241614 13546twf.doc / g layer 226a is formed on the substrate 222 in full. Where the dielectric material layer 22 covers the electrode pairs 223, a method of forming the same For example, screen printing is used. Next, referring to FIG. 4C, a dielectric material layer 226b is formed on the dielectric material layer 226a, where the dielectric material layer 22 is formed on the dielectric material layer other than the cavity that is intended to form a first depth. And the material and formation method thereof are the same as those of the dielectric material layer 226a. Next, referring to FIG. 4D, a dielectric material layer 226c is formed on the dielectric material layer 226b. The dielectric material layer 226c is formed on the dielectric material layer 226b. For other regions or gates, the material and formation method are, for example, the same as those of the dielectric material layer 226a. Next, referring to FIG. 4E, a dielectric material layer 226d is formed on the dielectric material layer 226c, where the dielectric material layer 226d is formed on the dielectric material layer 226c at a predetermined formation first depth, second depth, and first The area other than the three-depth cavity is the same as the dielectric material layer 226a. Through the above steps of Figs. 4B to 4E, the dielectric layer 226 having the recesses 228 (228a, 228b, 228c) having three different depths can be formed. 9 In the above embodiments, the recesses 228 formed in the dielectric layer 226 have three different depths. However, the present invention is not limited to this. The present invention can also use the above-mentioned manufacturing method in the dielectric according to actual needs. Cavities having various depths are formed in the electrical layer 226. Moreover, in the above-mentioned preferred embodiment, the dielectric layer with a cavity is formed by screen printing. However, the present invention may also use a dielectric layer without a cavity, and then use, for example, 13 1241614 13546twf.doc / g = engraved or indented in the "layer" with a concavity limit of ㈣ depth === The preferred embodiment is disclosed above, but it is not within the ㈣ and range, and can be regarded as not departing from the spirit of the present invention. After ordering 4 ;; == the protection of the invention of the invention [simple description of the scheme]

圖。a所、、會知—種電漿顯示器的立體分解示意 種漿顯示器的剖面 圖2所繪示為本發明習知另一 意圖。 圖3繪示為本發明一 剖面不意圖。 較佳貫施例中的一電漿顯 示器之 將顧圖所繪示為本發明一較佳實施例的〜種電 漿顯不态之W基板的製造流程的剖面示意圖。 电 【主要元件符號說明】Illustration. a ,, will know-three-dimensional decomposition of a plasma display schematic sectional view of a plasma display Figure 2 shows another intention of the present invention. FIG. 3 is a schematic cross-sectional view of the present invention. A plasma display in the preferred embodiment is a schematic cross-sectional view of a manufacturing process of a W substrate with a plasma display in a preferred embodiment of the present invention. [Description of main component symbols]

100 ' 200 :電漿顯示器 110、210:後基板 112、122、212、222 :基板 114、 214 ·定址電極 115、 215 :上玻璃層 116、 216 :阻隔壁 118、218 :螢光材料層 120、220 :前基板 14 1241614 13546twf.doc/g 124、 224 : X 電極 125、 225 : Y 電極 124a、125a、224a、225a :透明電極 124b、125b、224b、225b ··匯流電極 126、 226 :介電層 127、 229 :保護層 128、 228、228a、228b、228c :凹穴 g 130、230 ··放電空間 223 :電極對 226a、226b、226c、226d ··介電材料層100 '200: Plasma display 110, 210: Back substrate 112, 122, 212, 222: Substrate 114, 214Addressing electrodes 115, 215: Upper glass layer 116, 216: Barrier wall 118, 218: Fluorescent material layer 120 , 220: front substrate 14 1241614 13546twf.doc / g 124, 224: X electrodes 125, 225: Y electrodes 124a, 125a, 224a, 225a: transparent electrodes 124b, 125b, 224b, 225b · bus electrodes 126, 226: media Electrical layers 127, 229: Protective layers 128, 228, 228a, 228b, and 228c: Cavities g 130, 230. Discharge space 223: Electrode pairs 226a, 226b, 226c, and 226d. Dielectric material layers

1515

Claims (1)

1241614 13546twf.doc/g 十、申請專利範圍： L一種電漿:顯示器之前基板，包括： 一基板； 多數對電極對，設置於該基板上；以及 一介電層，設置於該基板上且覆蓋該些電極對，其中 該介電層在對應該些電極對的位置具有多數個凹穴，該些 凹穴具有不同的深度。 _ 2.如申請專利範圍第1項所述之電漿顯示器之前基 板，其中該些凹穴個別具有一第一深度、一第二深度與一 第三深度，且該第一深度、該第二深度與該第三深度彼此 不相等。 3. 如申請專利範圍第1項所述之電漿顯示器之前基 板，其中每一該些電極對包括一 X電極以及一 Y電極。 4. 一種電漿顯示器，包括： 一第一基板； 多數對電極對，配置於該第一基板上；以及 | 一介電層，配置於該第一基板上且覆蓋該些電極對，其 中該介電層在對應該些電極對的位置具有多數個凹穴，且 該些凹穴具有不同的深度； 一苐'一基板， 多數條定址電極，配置於該第二基板上； 一上玻璃層，配置於該第二基板上且覆蓋該些定址電極； 一阻隔壁，配置於該上玻璃層上，且每二相鄰之該些定 址電極係以該阻隔壁相隔；以及 一螢光材料層，覆蓋住該阻隔壁之側壁以及該些定址 電極，其中該些電極對、該介電層係與該些定址電極、該 16 1241614 13546twf.doc/g 阻壁、忒螢光材料層相對向配置，並且該阻隔壁之間的 空間與該些凹穴係構成多數個放電空間。 5·如申請專利範圍第4項所述之電漿顯示器，其中該 螢光材料層包括多數個紅色螢光層、多數個綠色螢光層以 及多數個藍色螢光層。 曰 6. 如申請專利範圍第5項所述的之電漿顯示器，其中 該些凹穴係個別對應該些紅色螢光層、該些綠色螢光層與 該些J色枝層，並且對應該些紅色螢*層的該些凹二具 有一第一深度，對應該些綠色螢光層的該些凹穴具有一第 —/朱度，對應该些数色螢光層的該些凹穴具有一第二深 度’且該第一深度、該第二深度與該第三深度彼此不相一等^ 7. 如申請糊範圍第4項·之電漿顯示器， 阻隔壁包括多數個條狀圖案。 /、^邊 8. 如申請專利範圍第7項所述之電_示哭， 些條狀圖案彼此平行。 /、中式 9. 如申請專利範圍第4項所述之電_ 阻隔壁包括多數個格狀圖案。 。。其中该 10. 如申請專利範圍第9項所述之電 些格狀圖案係以蜂巢狀之方式排列。其中該 11. 如申請專利範圍第4項所述之電 —該些電極對包括一X電極以及一 Υ電極“、、。 其中每 驟 12. -種電漿顯示器之前基板的製造方法，包括下列+ 提供一基板； 於該基板上形成多數對電極對；以及 1241614 13546twf.doc/g 於S亥基板上形成〜人 介電層在預定形成放電極對，其中_ 些凹穴具有不同的深度。 ”有夕數個凹穴，且讀 13.如申請專利範^第以項 板的製造方法，其中形成該介电水顯不器之珂基 Μ.如申請專利範圍第13項^方二包括網板印刷法。 板的製造方法，其中讀些凹穴包 =顯示器之前義 多數個第二凹穴與多數個第三二、固第-凹穴、 介電層的方法包括： 以、、周板印刷法形成讀 對 麵 於該基板上形成—第一介電材料層以覆蓋該些電 斜展於預疋形^該些第一凹穴之區域以外的該第一介電杈 料層上形成一第二介電材料層； 柯 於預定形成該些第一凹穴與該些第 的該第二，材料層上形成一第三介電材料層；二及卜 於預疋形成该些第-凹穴、該此第 凹穴之區域以外的該第：介雷㈣凹4邊些第二 Μ μ ^乐一；丨弘材枓層上形成一第四介電材 j，且该弟一"電材料層、該第 介電材料層與該第四介電材制構成該介電層。弟一 181241614 13546twf.doc / g 10. Scope of patent application: L A plasma: a substrate before a display, including: a substrate; a plurality of electrode pairs disposed on the substrate; and a dielectric layer disposed on the substrate and covered The electrode pairs, wherein the dielectric layer has a plurality of recesses at positions corresponding to the electrode pairs, and the recesses have different depths. _ 2. The substrate before a plasma display according to item 1 of the scope of patent application, wherein each of these recesses has a first depth, a second depth, and a third depth, and the first depth, the second depth The depth and the third depth are not equal to each other. 3. The substrate for a plasma display according to item 1 of the patent application, wherein each of the electrode pairs includes an X electrode and a Y electrode. 4. A plasma display, comprising: a first substrate; a plurality of electrode pairs disposed on the first substrate; and | a dielectric layer disposed on the first substrate and covering the electrode pairs, wherein The dielectric layer has a plurality of cavities at positions corresponding to the electrode pairs, and the cavities have different depths; a substrate, and a plurality of addressing electrodes arranged on the second substrate; an upper glass layer Is disposed on the second substrate and covers the address electrodes; a barrier wall is disposed on the upper glass layer, and every two adjacent address electrodes are separated by the barrier wall; and a fluorescent material layer Covering the side wall of the barrier wall and the address electrodes, wherein the electrode pairs, the dielectric layer and the address electrodes, the 16 1241614 13546twf.doc / g barrier wall, and the phosphorescent material layer are oppositely disposed , And the space between the barrier walls and the recesses constitute a plurality of discharge spaces. 5. The plasma display according to item 4 of the scope of patent application, wherein the fluorescent material layer includes a plurality of red fluorescent layers, a plurality of green fluorescent layers, and a plurality of blue fluorescent layers. 6. The plasma display as described in item 5 of the scope of patent application, wherein the recesses correspond to the red fluorescent layers, the green fluorescent layers, and the J-color branch layers, respectively, and correspond to The cavities of the red fluorescent layers have a first depth, the cavities corresponding to the green fluorescent layers have a first-/ Zhu degree, and the cavities corresponding to the several fluorescent layers have A second depth ', and the first depth, the second depth, and the third depth are not equal to each other ^ 7. If the plasma display of item 4 of the application range is applied, the barrier wall includes a plurality of stripe patterns. / 、 ^ 边 8. As described in item 7 of the scope of patent application, these stripe patterns are parallel to each other. / 、 Chinese style 9. As mentioned in item 4 of the scope of patent application, the barrier _ includes a plurality of grid patterns. . . The 10. The grid-like patterns described in item 9 of the scope of patent application are arranged in a honeycomb pattern. Wherein 11. Electricity as described in item 4 of the scope of the patent application—these electrode pairs include an X electrode and a holmium electrode “,.” Wherein each step 12. A method for manufacturing a substrate before a plasma display includes the following: + Provide a substrate; form a plurality of electrode pairs on the substrate; and form 1241614 13546twf.doc / g on the substrate. A dielectric layer is formed to form an electrode pair, among which some recesses have different depths. "There are several cavities, and read 13. For example, the method of manufacturing a patent plate ^ No. 1 item manufacturing method, in which the Keji M of the dielectric water display device is formed. Screen printing method. The manufacturing method of the board, which reads some pockets = before the display, the majority of the second pockets and the majority of the second two, solid first-pockets, and dielectric layers. The methods include: A first dielectric material layer is formed on the substrate opposite to the first dielectric material layer to cover the electrical oblique spreads on the first dielectric material layer outside the area of the first recesses ^ to form a second dielectric. Material layer; Ke Yu is scheduled to form the first cavities and the second and second materials, a third dielectric material layer is formed on the material layer; Outside of the area of the first cavity, the second dielectric layer is formed on the four sides of the dielectric hole, and a fourth dielectric material j is formed on the Hongcai layer, and the brother " electrical material layer, The first dielectric material layer and the fourth dielectric material constitute the dielectric layer. Brother One 18