TWI232893B - Method for forming metal oxide layer by nitric acid oxidation - Google Patents
Method for forming metal oxide layer by nitric acid oxidation Download PDFInfo
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- TWI232893B TWI232893B TW92135307A TW92135307A TWI232893B TW I232893 B TWI232893 B TW I232893B TW 92135307 A TW92135307 A TW 92135307A TW 92135307 A TW92135307 A TW 92135307A TW I232893 B TWI232893 B TW I232893B
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- 238000000034 method Methods 0.000 title claims abstract description 80
- GRYLNZFGIOXLOG-UHFFFAOYSA-N Nitric acid Chemical compound O[N+]([O-])=O GRYLNZFGIOXLOG-UHFFFAOYSA-N 0.000 title claims abstract description 33
- 229910017604 nitric acid Inorganic materials 0.000 title claims abstract description 33
- 229910044991 metal oxide Inorganic materials 0.000 title claims abstract description 31
- 150000004706 metal oxides Chemical class 0.000 title claims abstract description 31
- 230000003647 oxidation Effects 0.000 title claims abstract description 18
- 238000007254 oxidation reaction Methods 0.000 title claims abstract description 18
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 claims abstract description 47
- 238000000137 annealing Methods 0.000 claims abstract description 42
- 229910052751 metal Inorganic materials 0.000 claims abstract description 33
- 239000002184 metal Substances 0.000 claims abstract description 33
- 239000000758 substrate Substances 0.000 claims abstract description 27
- 235000012239 silicon dioxide Nutrition 0.000 claims abstract description 23
- 239000000377 silicon dioxide Substances 0.000 claims abstract description 23
- 239000004065 semiconductor Substances 0.000 claims abstract description 21
- 238000000151 deposition Methods 0.000 claims abstract description 10
- 230000001590 oxidative effect Effects 0.000 claims abstract description 5
- 238000004519 manufacturing process Methods 0.000 claims description 20
- 238000005516 engineering process Methods 0.000 claims description 18
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 claims description 14
- 239000007789 gas Substances 0.000 claims description 14
- QGZKDVFQNNGYKY-UHFFFAOYSA-N Ammonia Chemical compound N QGZKDVFQNNGYKY-UHFFFAOYSA-N 0.000 claims description 13
- GQPLMRYTRLFLPF-UHFFFAOYSA-N Nitrous Oxide Chemical compound [O-][N+]#N GQPLMRYTRLFLPF-UHFFFAOYSA-N 0.000 claims description 10
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Substances O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 claims description 10
- 229910052757 nitrogen Inorganic materials 0.000 claims description 9
- 229910052760 oxygen Inorganic materials 0.000 claims description 9
- 239000001301 oxygen Substances 0.000 claims description 9
- 239000002253 acid Substances 0.000 claims description 7
- 239000000126 substance Substances 0.000 claims description 7
- 239000010936 titanium Substances 0.000 claims description 7
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims description 6
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 claims description 6
- 238000005229 chemical vapour deposition Methods 0.000 claims description 6
- 229910052710 silicon Inorganic materials 0.000 claims description 6
- 239000010703 silicon Substances 0.000 claims description 6
- KZNMRPQBBZBTSW-UHFFFAOYSA-N [Au]=O Chemical compound [Au]=O KZNMRPQBBZBTSW-UHFFFAOYSA-N 0.000 claims description 5
- 229910052782 aluminium Inorganic materials 0.000 claims description 5
- 230000005527 interface trap Effects 0.000 claims description 5
- 238000004151 rapid thermal annealing Methods 0.000 claims description 5
- JBRZTFJDHDCESZ-UHFFFAOYSA-N AsGa Chemical compound [As]#[Ga] JBRZTFJDHDCESZ-UHFFFAOYSA-N 0.000 claims description 4
- 229910000577 Silicon-germanium Inorganic materials 0.000 claims description 4
- RTAQQCXQSZGOHL-UHFFFAOYSA-N Titanium Chemical compound [Ti] RTAQQCXQSZGOHL-UHFFFAOYSA-N 0.000 claims description 4
- LEVVHYCKPQWKOP-UHFFFAOYSA-N [Si].[Ge] Chemical compound [Si].[Ge] LEVVHYCKPQWKOP-UHFFFAOYSA-N 0.000 claims description 4
- 229910021529 ammonia Inorganic materials 0.000 claims description 4
- 230000008021 deposition Effects 0.000 claims description 4
- 238000001704 evaporation Methods 0.000 claims description 4
- 230000008020 evaporation Effects 0.000 claims description 4
- 239000000463 material Substances 0.000 claims description 4
- 235000013842 nitrous oxide Nutrition 0.000 claims description 4
- 238000004544 sputter deposition Methods 0.000 claims description 4
- 229910052719 titanium Inorganic materials 0.000 claims description 4
- 239000013043 chemical agent Substances 0.000 claims description 3
- 238000005468 ion implantation Methods 0.000 claims description 3
- 229910052746 lanthanum Inorganic materials 0.000 claims description 3
- FZLIPJUXYLNCLC-UHFFFAOYSA-N lanthanum atom Chemical compound [La] FZLIPJUXYLNCLC-UHFFFAOYSA-N 0.000 claims description 3
- 238000002156 mixing Methods 0.000 claims description 3
- HBMJWWWQQXIZIP-UHFFFAOYSA-N silicon carbide Chemical compound [Si+]#[C-] HBMJWWWQQXIZIP-UHFFFAOYSA-N 0.000 claims description 3
- GYHNNYVSQQEPJS-UHFFFAOYSA-N Gallium Chemical compound [Ga] GYHNNYVSQQEPJS-UHFFFAOYSA-N 0.000 claims description 2
- 229910001218 Gallium arsenide Inorganic materials 0.000 claims description 2
- 239000013078 crystal Substances 0.000 claims description 2
- 238000007865 diluting Methods 0.000 claims description 2
- 229910052733 gallium Inorganic materials 0.000 claims description 2
- 229910001922 gold oxide Inorganic materials 0.000 claims description 2
- 239000007788 liquid Substances 0.000 claims description 2
- 229910000069 nitrogen hydride Inorganic materials 0.000 claims description 2
- VSZWPYCFIRKVQL-UHFFFAOYSA-N selanylidenegallium;selenium Chemical compound [Se].[Se]=[Ga].[Se]=[Ga] VSZWPYCFIRKVQL-UHFFFAOYSA-N 0.000 claims description 2
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 claims 2
- SMEROWZSTRWXGI-UHFFFAOYSA-N Lithocholsaeure Natural products C1CC2CC(O)CCC2(C)C2C1C1CCC(C(CCC(O)=O)C)C1(C)CC2 SMEROWZSTRWXGI-UHFFFAOYSA-N 0.000 claims 1
- 238000005530 etching Methods 0.000 claims 1
- 150000004820 halides Chemical class 0.000 claims 1
- 239000007791 liquid phase Substances 0.000 claims 1
- SMEROWZSTRWXGI-HVATVPOCSA-N lithocholic acid Chemical compound C([C@H]1CC2)[C@H](O)CC[C@]1(C)[C@@H]1[C@@H]2[C@@H]2CC[C@H]([C@@H](CCC(O)=O)C)[C@@]2(C)CC1 SMEROWZSTRWXGI-HVATVPOCSA-N 0.000 claims 1
- 239000010409 thin film Substances 0.000 abstract description 6
- 239000010410 layer Substances 0.000 description 53
- 229940074355 nitric acid Drugs 0.000 description 22
- 239000010408 film Substances 0.000 description 17
- 239000000872 buffer Substances 0.000 description 11
- MYMOFIZGZYHOMD-UHFFFAOYSA-N Dioxygen Chemical compound O=O MYMOFIZGZYHOMD-UHFFFAOYSA-N 0.000 description 7
- PNEYBMLMFCGWSK-UHFFFAOYSA-N aluminium oxide Inorganic materials [O-2].[O-2].[O-2].[Al+3].[Al+3] PNEYBMLMFCGWSK-UHFFFAOYSA-N 0.000 description 4
- 239000003989 dielectric material Substances 0.000 description 4
- 238000000231 atomic layer deposition Methods 0.000 description 3
- 230000005669 field effect Effects 0.000 description 3
- KRHYYFGTRYWZRS-UHFFFAOYSA-N Fluorane Chemical compound F KRHYYFGTRYWZRS-UHFFFAOYSA-N 0.000 description 2
- 238000009825 accumulation Methods 0.000 description 2
- 150000001875 compounds Chemical class 0.000 description 2
- 230000007423 decrease Effects 0.000 description 2
- 238000001912 gas jet deposition Methods 0.000 description 2
- 238000012827 research and development Methods 0.000 description 2
- 229920006395 saturated elastomer Polymers 0.000 description 2
- 239000000243 solution Substances 0.000 description 2
- 238000007740 vapor deposition Methods 0.000 description 2
- ZSLUVFAKFWKJRC-IGMARMGPSA-N 232Th Chemical compound [232Th] ZSLUVFAKFWKJRC-IGMARMGPSA-N 0.000 description 1
- 229910002651 NO3 Inorganic materials 0.000 description 1
- NHNBFGGVMKEFGY-UHFFFAOYSA-N Nitrate Chemical compound [O-][N+]([O-])=O NHNBFGGVMKEFGY-UHFFFAOYSA-N 0.000 description 1
- 229910052776 Thorium Inorganic materials 0.000 description 1
- YZCKVEUIGOORGS-NJFSPNSNSA-N Tritium Chemical compound [3H] YZCKVEUIGOORGS-NJFSPNSNSA-N 0.000 description 1
- HCHKCACWOHOZIP-UHFFFAOYSA-N Zinc Chemical compound [Zn] HCHKCACWOHOZIP-UHFFFAOYSA-N 0.000 description 1
- LSHFIWNMHGCYRS-UHFFFAOYSA-N [O-][N+]([O-])=O.[O-][N+]([O-])=O.[OH4+2] Chemical compound [O-][N+]([O-])=O.[O-][N+]([O-])=O.[OH4+2] LSHFIWNMHGCYRS-UHFFFAOYSA-N 0.000 description 1
- 238000003763 carbonization Methods 0.000 description 1
- 238000005253 cladding Methods 0.000 description 1
- -1 cladding (Ta) Chemical compound 0.000 description 1
- 239000004020 conductor Substances 0.000 description 1
- 239000008367 deionised water Substances 0.000 description 1
- 229910021641 deionized water Inorganic materials 0.000 description 1
- 238000013461 design Methods 0.000 description 1
- 230000005684 electric field Effects 0.000 description 1
- 230000005611 electricity Effects 0.000 description 1
- 238000004945 emulsification Methods 0.000 description 1
- 229910052732 germanium Inorganic materials 0.000 description 1
- GNPVGFCGXDBREM-UHFFFAOYSA-N germanium atom Chemical compound [Ge] GNPVGFCGXDBREM-UHFFFAOYSA-N 0.000 description 1
- 229910052735 hafnium Inorganic materials 0.000 description 1
- VBJZVLUMGGDVMO-UHFFFAOYSA-N hafnium atom Chemical compound [Hf] VBJZVLUMGGDVMO-UHFFFAOYSA-N 0.000 description 1
- VKYKSIONXSXAKP-UHFFFAOYSA-N hexamethylenetetramine Chemical compound C1N(C2)CN3CN1CN2C3 VKYKSIONXSXAKP-UHFFFAOYSA-N 0.000 description 1
- 230000005524 hole trap Effects 0.000 description 1
- 238000002347 injection Methods 0.000 description 1
- 239000007924 injection Substances 0.000 description 1
- 238000009413 insulation Methods 0.000 description 1
- 239000011229 interlayer Substances 0.000 description 1
- 238000002955 isolation Methods 0.000 description 1
- 239000008267 milk Substances 0.000 description 1
- 210000004080 milk Anatomy 0.000 description 1
- 235000013336 milk Nutrition 0.000 description 1
- 239000000203 mixture Substances 0.000 description 1
- 238000001451 molecular beam epitaxy Methods 0.000 description 1
- 239000012299 nitrogen atmosphere Substances 0.000 description 1
- 239000007800 oxidant agent Substances 0.000 description 1
- 238000005240 physical vapour deposition Methods 0.000 description 1
- 239000008213 purified water Substances 0.000 description 1
- 229910010271 silicon carbide Inorganic materials 0.000 description 1
- 229910052814 silicon oxide Inorganic materials 0.000 description 1
- 239000007921 spray Substances 0.000 description 1
- 239000004575 stone Substances 0.000 description 1
- 238000012360 testing method Methods 0.000 description 1
- 238000002207 thermal evaporation Methods 0.000 description 1
- 229910052722 tritium Inorganic materials 0.000 description 1
- 229910052725 zinc Inorganic materials 0.000 description 1
- 239000011701 zinc Substances 0.000 description 1
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- Formation Of Insulating Films (AREA)
- Insulated Gate Type Field-Effect Transistor (AREA)
Abstract
Description
12328931232893
【發明所屬之技術領域】 本案係關於一種製造金屬氧化層之方法，尤其是關於 一種利用硝酸氧化技術製造金屬氧化層之方法。 ' 【先前技術】[Technical field to which the invention belongs] This case relates to a method for manufacturing a metal oxide layer, and more particularly to a method for manufacturing a metal oxide layer using a nitric acid oxidation technology. '' [Prior art]
目前的CMOS製程技術已進入奈米元件時代，而更先進 的奈米製私技術（< 1 0 0 π in )也正加緊研發並已接近量產 階段；隨著製程技術不斷躍進，單位晶片所含的電晶|體數 目不斷增加’電晶體的尺寸越來越小，電晶體之閘極氧化 層也愈來愈薄’而傳統的二氧化矽閘極氧化層隨著厚度的 減少’其在水積區（accumulation region)之漏電流將 呈現指數上升=趨勢。為抑制漏電流以及提供較高閘極電 容，使用具有高介電常數值（high —k)之金屬氧化層來取 代傳統二氧化矽作為閘極氧化層的研究發展更為刻不容 緩·，在相同等效氧化層厚度（equivaUnt Qxide thkkness，E〇T)之下，具有高介電常數值之金屬氧化^ 與傳統二氧化石夕相比，可具有較低之漏電流和較高之間本 電：。$低功率的兀件上’低閘極漏電流能降低 散逸’間極電容的提升更能有效的控制通道， 閘極介電材料成為延續下-世代半導體;:The current CMOS process technology has entered the era of nano-components, and more advanced nano-technology (< 100 π in) is also stepping up research and development and is nearing the stage of mass production; with the continuous progress of process technology, unit chips The number of transistors included continues to increase 'The size of the transistor is getting smaller and smaller, and the gate oxide layer of the transistor is getting thinner', while the traditional silicon dioxide gate oxide layer decreases with thickness The leakage current in the accumulation region will show an exponential rise = trend. In order to suppress leakage current and provide higher gate capacitance, the research and development of using a metal oxide layer with a high dielectric constant value (high-k) instead of traditional silicon dioxide as the gate oxide layer is urgently needed. Below the effective oxide layer thickness (equivaUnt Qxide thkkness, E0T), metal oxides with high dielectric constant values can have lower leakage currents and higher intrinsic currents compared to traditional dioxides: . $ The low gate leakage current on the low-power component can reduce the dissipation and the improvement of inter-electrode capacitance can more effectively control the channel, and the gate dielectric material becomes the next-generation semiconductor ;:
目前成長超薄高介電當勤尸 · 數金屬氧化層技術主要有熱 長(thermal oxidation)、历工旺、士 L τ η ·. 原子層沉積法（AtomicCurrently growing ultra-thin and high-k dielectrics. • The metal oxide technology mainly includes thermal oxidation, Ligongwang, Shi L τ η. Atomic layer deposition method (Atomic
Layer Deposiΐion，ALD )、各風尸上 ^ . ^ ) 化學氣相沉積（ChemicalLayer Deposiΐion (ALD), ^. ^) Chemical Vapor Deposition
1232893 五、發明說明（2)1232893 V. Description of the invention (2)
Vapor Deposition，CVD)、分子束磊晶成長（M〇iecular Beam Epitaxy，MBE)、及喷射氣相沈積（Jet Vap〇r Deposition，JVD)等。其中熱成長須先沉積一層金屬或 含有金屬之化合物於基板上’再以熱氧化方式成長金屬氧 ，層，此方法雖然傳統且簡單方便，但須於高溫環境下進 行；分子束磊晶成長、化學氣相沉積、喷射氣相沈積及原 子層沉積法可直接在基板上成長金屬氧化層，但必須使用 昂貴的設備才能在高溫環境中達到高度的真空，故須 Π;;;本：因& ’實有必要發展-種無須在高溫或高 度真=境下成長金屬氧化層之方法，以降低生產成本。 盘研：疋2太ί發明鑑於習知技術之缺失，75悉心試驗 ’、九 亚 '"""""本雜而不夕中 用瑞辦气儿4士 k㈤ 捨之精神’終創作出本發明之『利 用硝酸乳化技術製造金屬氧化層之方法』。 【發明内容】 本發明係提供一種利用硝 之方法’其包含下列步驟：a ) 半導體基板表面成長一超薄二 石夕薄膜上沈積一金屬薄膜；^ ) 膜氧化成一金屬氧化層；以及 化層。 ^ 酸氧化技術製造金屬氧化層 ，供一半導體基板；b)在該 氧化石夕薄膜；c )在該二氧化 以硝酸氧化技術將該金屬薄 3)以高溫退火處理該金屬氧 如所述之方法 (S i)、碳化;ε夕（s i c) 中之一。 ^中該半導體基板之材質係選自矽 夕鍺（SixGeNx)、及砷化鎵（GaAs)其Vapor Deposition (CVD), Molecular Beam Epitaxy (MBE), and Jet Vapor Deposition (JVD). Among them, thermal growth must first deposit a layer of metal or a metal-containing compound on the substrate, and then grow the metal oxygen, layer by thermal oxidation. Although this method is traditional and simple and convenient, it must be performed in a high temperature environment; molecular beam epitaxial growth, Chemical vapor deposition, spray vapor deposition, and atomic layer deposition methods can directly grow metal oxide layers on substrates, but expensive equipment must be used to achieve a high vacuum in a high temperature environment. Therefore, this must be because of & 'It is really necessary to develop-a method that does not need to grow the metal oxide layer at high temperature or high true value to reduce production costs. Discussing: 疋 2 太 ίInvention In view of the lack of know-how, 75 carefully test the ', Jiuya' " " " " " The spirit of using the Swiss to do Qier 4 Shik 'Finally created the "method of manufacturing a metal oxide layer by using nitric acid emulsification technology" of the present invention. [Summary of the Invention] The present invention provides a method for utilizing nitrate, which includes the following steps: a) a semiconductor film is grown on the surface of an ultra-thin two-layered silicon film, and a metal thin film is deposited; . ^ Manufacture metal oxide layer by acid oxidation technology for a semiconductor substrate; b) thin film on the oxide stone; c) thin the metal by nitric acid oxidation technology during the oxidation 3) anneal the metal oxygen at high temperature as described Method (S i), carbonization; ε Xi (sic). The material of the semiconductor substrate is selected from silicon germanium (SixGeNx) and gallium arsenide (GaAs).
1232893 五、發明說明（3) 如所述之方法’其中步驟 台中進行。 ^驟15可於爐管或快速熱氧化機 如所述之方法，其中步驟、 — " 可以化學液相沉·積方式進 iT ° 如所述之方法，其中步驟 相沉積或分子束h日日成長方^濺鑛Ή、化學汽 值。如所述之方法’其中該金屬之氧化物具有高介電常數 如所述之方法，其中該夺厘及 rT·、州μ 、 I 屬係選自紹（A1 )、鈦 一。 （ΖΓ )、纽（Ta )、铪（Hf)其中之 如所述之方法，其中步驟H 、 4研、十、夕古土 甘山驟01係以稀釋之硝酸進行。 如斤述之方法，其中用以稀釋硝酸之溶 他可與硝酸相容之化學藥劑。 為X或其 如所述之方法，其中該蘇經 丨：15〜25之比例混合而得稀釋之確酸係將確酸與水以 ，ΐ中步驟e係於—退火氣體中進行。 如所述之方法，其中該退火氣體係選自1232893 V. Description of the invention (3) The method as described ′ wherein the steps are performed in a stage. ^ Step 15 can be carried out in a furnace tube or a rapid thermal oxidizer as described in the method, wherein the step, " can be chemically deposited and deposited into the iT ° method as described, wherein the step phase deposition or molecular beam h day Daily growth ^ splash ore, chemical vapor value. The method according to the method 'wherein the oxide of the metal has a high dielectric constant. The method according to the method wherein the tritium and rT ·, the state μ, and the I are selected from the group consisting of (A1) and titanium. (ZΓ), Niu (Ta), Hf (Hf) Among the methods as described above, wherein steps H, 4 and 10, Xigutu Ganshan step 01 is performed with diluted nitric acid. As described in the method, which is used to dilute the nitric acid and other chemicals compatible with nitric acid. It is X or the method as described above, wherein the Su Jing is mixed at a ratio of 15 to 25 to obtain a diluted acid. The acid and water are mixed, and step e is performed in an annealing gas. The method as described, wherein the annealing gas system is selected from
氨氣、笑氣（Να)及形成氣體（F〇rmin、乳乳、 90 % N2 +10 % H2 )其中之一。 s S 如所述之方法，其中步驟e係以爐管退火，其 度介於5 0 0〜90 0 °C之間，退火時間介於卜9〇分鐘之間。度 、如所述之方法，其中步驟e係以快速熱退火，&退火 溫度介於800〜l〇〇〇°C之間，退火時間介於〇〜9〇秒之間。 麵One of ammonia gas, laughing gas (Nα), and forming gas (Formin, milk, 90% N2 + 10% H2). s S The method as described, wherein step e is annealing with a furnace tube, the temperature is between 500 and 900 ° C, and the annealing time is between 90 minutes. The method as described above, wherein step e is rapid thermal annealing, & annealing temperature is between 800 ~ 100 ° C, and annealing time is between 0 ~ 90 seconds. surface
第8頁 1232893 五、發明說明（4) ' --------- 明另一方面提供一種製造一具高介電常數閘極介 征1 ^金氧半場效電晶體之方法，其包含下列步驟：a)提 半導體基板，其中該基板上具有一N井、一p井及一隔 $ 井及p井之氧化物；b)在該半導體基板表面成長一超 ^ 一氧化石夕薄膜；c)在該二氧化矽薄膜上沈積一金屬薄 膜；d)以硝酸氧化技術將該金屬薄膜氧化成一金屬氧化層 作為閘極氧化層；e)以高溫退火處理該閘極氧化層；f) ^ °玄閉極氧化層上沈積一閘極電極層；g)定義一閘極；h)利 用離子佈植技術形成汲極及源極；i )在具該閘極、汲極及 源極之該基板上沉積一氧化物絕緣層；]·)蝕刻出閘極、汲 極及源極窗口；以及k)定義一接觸導線，並使用高溫退火 降低界面陷阱濃度。 如所述之方法，其中該半導體基板之材質係選自矽 (Si)、碳化矽（SiC)、矽鍺（sixGei_x)、及砷化鎵（(^八5)其 中之一。 如所述之方法，其中步驟b可於爐管或快速熱氧化機 台中進行。 如所述之方法，其中步驟b可以化學液相沉積方式進 行。 如所述之方法，其中步驟c可以濺鍍、蒸鍍、化學汽 相沉積或分子束蠢晶成長方式進行。 如所述之方法，其中該金屬之氧化物具有高介電常數 如所述之方法，其中該金屬係選自鋁（A 1 )、欽Page 8 1232893 V. Description of the invention (4) '--------- On the other hand, a method for manufacturing a 1 ^ gold-oxygen half field effect transistor with high dielectric constant is provided. The method includes the following steps: a) extracting a semiconductor substrate, wherein the substrate has an N-well, a p-well, and a well and a p-well oxide; b) growing a super ^ oxide oxide film on the surface of the semiconductor substrate C) depositing a metal film on the silicon dioxide film; d) oxidizing the metal film to a metal oxide layer as a gate oxide layer using nitric acid oxidation technology; e) annealing the gate oxide layer at a high temperature; f) ^ ° A gate electrode layer is deposited on the gate oxide layer; g) defines a gate; h) uses ion implantation technology to form a drain and source; i) where the gate, drain and source are formed An oxide insulating layer is deposited on the substrate;] ·) the gate, drain, and source windows are etched; and k) a contact wire is defined, and the interface trap concentration is reduced using high temperature annealing. The method as described, wherein the material of the semiconductor substrate is one selected from the group consisting of silicon (Si), silicon carbide (SiC), silicon germanium (sixGei_x), and gallium arsenide (^^ 5). The method, wherein step b can be performed in a furnace tube or a rapid thermal oxidation machine. The method as described, wherein step b can be performed by a chemical liquid deposition method. As the method, wherein step c can be sputtering, evaporation, Chemical vapor deposition or molecular beam stupid crystal growth is performed. The method as described, wherein the oxide of the metal has a high dielectric constant, as described, wherein the metal is selected from the group consisting of aluminum (A 1), zinc
1232893 五、發明說明（5) (Τι )、鑭（La )、锆（zr )、包（Ta )、铪（Hf)其中之 —— 〇 如所述之方法，其中步驟d係以稀釋之硝酸進行。 如所述之方法，其中用以稀釋硝酸之溶液可為水或其 他可與硝酸相容之化學藥劑。 如所述之方法’其中該稀釋之硝酸係將硝酸與水以 1 : 1 5〜2 5之比例混合而得。 如所述之方法，其中步驟e係於一退火氣體中進行。 如所述之方法，其中該退火氣體係選自氮氣、氧氣、 氨氣（NH3)、关氣（N20)及形成氣體（F〇rming Gas， 9 0 % N2 + 1 0 % H2 )其中之一。 如所述之方法’其中步驟e係以爐管退火，其退火溫 度介於500〜90 0 °C之間，退火時間介於卜9〇分鐘之間。 如所述之方法’其中步驟e係以快速熱退火，其退火 度度介於8 0 0〜1 0 〇 〇。(：之間，退火時間介於〇〜9 〇秒之間。 本案彳于藉由下列實施方式與圖式說明，俾得一更清楚 之瞭解。 【實施方式】 本!^明係使用具有高介電常數值之金屬氧化層來取代 人、、先一氧化矽作為閘極氧化層，其中，超薄二氧化矽緩 "面層的採用能有效避免在高介電常數閘極介電層和基 ^間f屬f化物的產生。本發明之製程即在半導體基板上 、長超薄二氧化矽薄膜作為緩衝介面，之後沈積一高介1232893 V. Description of the invention (5) (Ti), lanthanum (La), zirconium (zr), cladding (Ta), hafnium (Hf)-〇 The method as described, wherein step d is diluted nitric acid get on. The method as described, wherein the solution for diluting the nitric acid may be water or other chemical agents compatible with nitric acid. The method as described above, wherein the diluted nitric acid is obtained by mixing nitric acid with water at a ratio of 1: 1 to 2-5. The method as described, wherein step e is performed in an annealing gas. The method as described, wherein the annealing gas system is selected from one of nitrogen, oxygen, ammonia (NH3), off gas (N20), and forming gas (90% N2 + 10% H2). . As described in the method ', in step e, the furnace tube is annealed, the annealing temperature is between 500 and 900 ° C, and the annealing time is between 90 minutes. The method as described above, wherein step e is rapid thermal annealing, and the degree of annealing is between 800 and 100. (:, The annealing time is between 0 ~ 90 seconds. This case is based on the following embodiments and illustrations, to get a clearer understanding. [Embodiment] This is a high-level use The metal oxide layer with a dielectric constant value replaces the first and the first silicon oxide as the gate oxide layer. Among them, the use of an ultra-thin silicon dioxide buffer layer can effectively avoid the high dielectric constant gate dielectric layer. And f is the generation of f compounds. The process of the present invention is to form a long and ultra-thin silicon dioxide film on the semiconductor substrate as a buffer interface, and then deposit a high dielectric
第10頁 1232893Page 10 1232893
電數金屬薄膜，再利用確酸氧化（NitricAcid _ 〇xl 技術將金屬氧化成金屬氧化層，並 μ夕古㈣-Γ二 質。本發明之製造金屬氧化 層之方法將σ羊細祝明如下。 請竭一圖⑴至（D)，其 佳實施例之製造金屬氧化層之方法。t先提供一乾淨的半 導體基板10，該基板可為石夕（Si)、碳化石夕（Sic)、石夕鍺 2ϊΐι)、碎化鎵（GaAS)或其他可用於成長金屬氧化物之 半V體基板。接著使用爐管（furnace)或快速熱氧化 (RTO)機台成長，或以化學液相沉積（Uquid phase Deposition，LPD)方式沉積一超薄二氧化矽薄膜丨丨於該半 導體基板ίο上，之後再以蒸鍍（evaporati〇n)、濺鍍 (sputtering)、化學汽相沉積或分子束磊晶成長方式沉 積一層具有兩介電常數之金屬薄膜12於該超薄二氧化矽薄 膜1 1上，该金屬可為鋁（A1 )、鈦（τ丨）、鑭（La )、鍅 (Zr)、鈕（Ta)、給（Hf)或其他氧化物具有高介電常 數之金屬。接著以稀釋之硝酸丨3將金屬氧化成為金屬氧化 層12’ ，其中用以稀釋硝酸之溶液可為水或其他可與硝酸 相容之化學藥劑，例如將硝酸與去離子水以1 : 1 5〜2 5 (車父佳為1 · 1 9 )之比例混合來稀釋硝酸，以對該金屬進 行氧化。之後'再對該金屬氧化層進行高溫退火來提高氧化 層之品質，即形成高介電常數閘極介電質。其中，所用之 退火氣體可為氮氣、氧氣、氨氣（NHS)、笑氣（N20)或 形成氣體（Forming Gas，90% N2 +10% H2);若以爐管The electric metal film is then oxidized with NitricAcid _ 0xl technology to oxidize the metal into a metal oxide layer, and μxigu ㈣-Γ is two. The method of manufacturing the metal oxide layer of the present invention will be described in detail below Please exhaust all the figures (D), a method for manufacturing a metal oxide layer in a preferred embodiment. First, provide a clean semiconductor substrate 10, which may be Si, Sic, Shi Xi germanium 2ϊΐι), shattered gallium (GaAS), or other semi-V body substrates that can be used to grow metal oxides. Then use a furnace or rapid thermal oxidation (RTO) machine to grow, or deposit an ultra-thin silicon dioxide film on the semiconductor substrate by chemical phase deposition (LPD), and then Then, a metal film 12 having two dielectric constants is deposited on the ultra-thin silicon dioxide film 11 by evaporation, sputtering, chemical vapor deposition or molecular beam epitaxial growth. The metal can be aluminum (A1), titanium (τ 丨), lanthanum (La), thorium (Zr), button (Ta), donating (Hf), or other metal having a high dielectric constant. Then the metal is oxidized to a metal oxide layer 12 'with diluted nitric acid. The solution used to dilute the nitric acid may be water or other chemicals compatible with nitric acid, such as 1: 1 and deionized water. Mix at a ratio of ~ 2 5 (Che Fu Jia 1 · 1 9) to dilute nitric acid to oxidize the metal. After that, the metal oxide layer is further annealed at a high temperature to improve the quality of the oxide layer, that is, a high dielectric constant gate dielectric is formed. Among them, the annealing gas used can be nitrogen, oxygen, ammonia (NHS), laughing gas (N20) or forming gas (90% N2 + 10% H2); if the furnace tube
第11頁 1232893 五、發明說明（7) (furnace )退火，其退火溫度介於5 0 0〜9〇〇亡之間，澴、 時間介於1〜90分鐘之間；若以快速熱退火，其退火溫^火 介於800〜l〇〇〇t：之間，退火時間介於〇〜9〇秒之間。·又則 睛參閱第二圖（A )至（G )，其係根據本發明之另一 較佳實施例之製造一具高介電常數閘極介電質之金氧 效電晶體之方法。首先提供一半導體基板2〇，並完成\每 及P井之製作，以及隔離用氧化物21之填充，接著在該 導體基板20表面成長一超薄二氧化矽薄膜22，再蒸鍍^ 之純鋁金屬薄膜23 ( 99.9999 % )於該超薄二氧化矽%膜、 22上，再以硝酸加入純水（dei〇nized職七”，HN〇 :、 4〇=1 :19)稀釋硝酸濃度進行硝酸氧化，氧化時3間為^ ^童^即形成氧化鋁之金屬氧化層23 之後再以爐管於氮 氣ί哀境中進行高溫退火，使用溫度為65〇 〇c，時間分 釦，即完成氧化層之製作。蒸鍍一金屬鋁 3_埃）於該金屬氧化層23,上以作為間極電極％ 2光 ^ ^ ^ 最後使用氫氟酸將晶片背面原生氧化層去 牙、，再瘵鍍金屬鋁做為晶片之背面接觸（ 氧）仆成整個元件之製作。完成之氧化銘薄膜 :MOS^T y : J =為1 8埃。若要製作金氧半場效電晶體 (.· 、必須在閘極定義完成後，以離子佈植技術 fn.lmP antati〇n)形成電晶體之汲、源極26 (Drain、Source )，夕你”姓 产,, ψ M朽、tt托η 之後》儿積一氧化物絕緣層，並蝕刻 出間極、汲極及源極窗口，再、一 1232893Page 11 1232893 V. Description of the invention (7) (furnace) annealing, the annealing temperature is between 500 and 900, and the time is between 1 and 90 minutes; if rapid thermal annealing, The annealing temperature is between 800 and 1000 t :, and the annealing time is between 0 and 90 seconds. • Then, please refer to the second figures (A) to (G), which is a method for manufacturing a gold oxide transistor having a high dielectric constant gate dielectric according to another preferred embodiment of the present invention. First, provide a semiconductor substrate 20, complete the production of each well, and fill it with oxide 21 for isolation, then grow an ultra-thin silicon dioxide film 22 on the surface of the conductor substrate 20, and then evaporate ^ pure An aluminum metal film 23 (99.9999%) was added to the ultra-thin silicon dioxide% film 22, and then purified water was added with nitric acid (deionized 7th grade, HN0 :, 4〇 = 1: 19). It is oxidized by nitric acid. When oxidizing, 3 are ^ ^ Tong ^, namely, the metal oxide layer 23 of alumina is formed, and then the furnace tube is subjected to high temperature annealing in a nitrogen atmosphere. The use temperature is 6500c. Fabrication of an oxide layer. A metal aluminum layer is deposited on the metal oxide layer 23 to serve as an interlayer electrode.% 2 light ^ ^ Finally, the hydrofluoric acid is used to remove the original oxide layer on the back of the wafer. Metal-plated aluminum is used as the back contact (oxygen) of the wafer to make the entire component. The finished oxide film: MOS ^ T y: J = 18 Angstroms. To make gold-oxygen half field effect transistors (. ·, After the definition of the gate is completed, the transistor must be formed by ion implantation technology (fn.lmP antati). Drain, Source 26 (Drain, Source), "Your name", "ψ M decay, tt to η" after the accumulation of an oxide insulation layer, and etched the electrode, drain and source window, and then, A 1232893
两溫 汲極及源極處，以形成一金氧半場效電晶體，並使用 退火降低界面陷阱濃度。 、第二圖顯不M〇S元件於定壓下之閘極電流變化情形。 為研究超薄二氧化矽氧化層作為緩衝介面對高介電常數閘 極介電質70件特性的重要性，在氧化鋁M〇s元件閘極施加一 1伏特的定電壓，觀察閘極單位注入電流（gate injection current density)變化情形；其結果可於第 二圖f觀察得知，元件若沒有氧化層作為緩衝介面，由於 金屬氧化物中含有大量的電子電洞陷阱（electr〇n and hoi e traps)，導致閘極漏電流的大幅增加。但是若事先 成長氧化層作為緩衝介面，則可看到閘極漏電流明顯的改 善。由此可以看出緩衝介面對介電層品質改善的重要性。 第四圖顯示M0S元件之電流-電壓（丨―v )特性。對以 本發明之方法製造之25個氧化鋁M0S元件（等效氧化層厚 度為19埃）量測其電流—電壓（卜v )特性，結果此25個元 件完全在同一條曲線上，顯示此製程有極高的均勻性；而 且在進入空乏區（depletion region)之後可得到飽合之 電’此飽合之電流將使得通道遷移率（c h a η n e 1 mobi 1 i ty )不會產生嚴重之衰退。 第五圖為對有無超薄二氧化矽氧化層緩衝介面的高介 電苇數閘極介電質在平帶電壓（flatband voltage)下，高 頻（1MHz)及低頻（ΙΚΗζ)電容差值之比較。由此可看出 在界面控制上，有緩衝氧化層之界面其界面陷阱 (interface trap)比沒有緩衝介面要少，更加證明緩衝Two temperature drain and source are used to form a gold-oxygen half field effect transistor, and annealing is used to reduce the interface trap concentration. 2. The second figure shows the gate current change of the MOS device under constant voltage. In order to study the importance of the ultra-thin silicon dioxide oxide layer as a buffer interface to the characteristics of 70 dielectrics with high dielectric constant gate dielectrics, a constant voltage of 1 volt was applied to the gate of the alumina M0s element, and the gate unit was observed The change of gate injection current density; the results can be observed in the second figure f. If the device does not have an oxide layer as a buffer interface, the metal oxide contains a large number of electron hole traps (electron and hoi e traps), resulting in a significant increase in gate leakage current. However, if the oxide layer is grown in advance as a buffer interface, the gate leakage current can be significantly improved. It can be seen that the importance of the buffer interface in improving the quality of the dielectric layer. The fourth figure shows the current-voltage (丨 ―v) characteristics of the M0S element. The current-voltage (Bu v) characteristics of 25 alumina M0S elements (equivalent oxide layer thickness of 19 angstroms) manufactured by the method of the present invention were measured. As a result, the 25 elements are completely on the same curve, and this is shown. The process has extremely high uniformity; and after entering the depletion region, a saturated electric current can be obtained. This saturated current will make the channel mobility (cha η ne 1 mobi 1 i ty) not serious. decline. The fifth figure shows the difference between the high-frequency (1MHz) and low-frequency (ΙΚΗζ) capacitance difference of the high-dielectric gate dielectric with or without ultra-thin silicon dioxide buffer interface under flatband voltage. Compare. It can be seen that in interface control, interface traps with buffer oxide layers have fewer interface traps than without buffer interfaces, which proves that buffers
第13頁 1232893 五、發明說明（9) 介面Γ肖酸氧化後介電層品質改善的重要#。 第六圖為對各種等效氧化層厚戶斤尸 行高溫退火與二氧化矽之漏電流比：：兮及氮氣下進 重覆製造之穩定製程，在不同等可看出本製程為可 二Η交二氧化矽為小之漏電流特性’ =J::均可得 度可達1 8埃。 取/寻之荨效氧化層厚 流-電第壓七夕上之氧化紹在不同退火溫度下之電 机冤μ (I - ν )特性。以硝酸氧 又卜之電 ：；(4H：SlC) . l - 2尽度為26埃，等效崩潰電場為7 M m 二 上傳統Si02氧化層之兩倍。 、力為叙化石夕 法，述明採用低成本之物理汽相沈積熱蒸鍍 ' =鍍-層金屬於基板上，#以硝酸氧化技術在適當 度，溫度及時間控制1^，讓所沉積之金屬完全氧化 屬乳化層再予以高溫退火。與其它技術比車交，此種製 於室溫環境下進行且不須昂貴之儀器，並且不須要在 =又真空（<l〇j torr )的環境下成長，因此可有效降低 生產成本及生長環境之熱容忍度（thermal budget)，並 可相谷於目前的製程設備與設計條件。 口 本發明運用了室溫硝酸氧化技術於金屬薄膜的氧化， 可，長超薄（等效氧化層厚度EOT <20埃）且高品質的閘 $氧化層’並且可以直接與現今CMOS製程整合而不須修改 製程參數及步驟，以達到元件極小化（m i n i m i ze )的最終 目的。 第14頁 1232893Page 13 1232893 V. Description of the invention (9) Important to improve the quality of the dielectric layer after oxidation of the interface Γ Xiao acid. The sixth figure is the leakage current ratio of high temperature annealing and silicon dioxide for various equivalent oxide layers. The stable manufacturing process of repeated manufacturing under nitrogen and nitrogen can be seen in different levels. The cross current silicon dioxide has a small leakage current characteristic '= J :: Availability is up to 18 angstroms. The thickness of the oxide layer on the current / electricity voltage is calculated from the thickness of the oxide oxide at the different annealing temperatures (μ-ν). Oxygen nitrate: (4H: SlC). L-2 is 26 angstroms, and the equivalent collapse electric field is 7 M m. The force is the fossil method, which states that low-cost physical vapor deposition thermal evaporation is used. '= Plating-layer metal on the substrate, #Control with appropriate nitric acid oxidation technology, temperature and time 1 ^, let the deposited The metal completely oxidizes the emulsified layer and is then annealed at high temperature. Compared with other technologies, this kind of manufacturing is performed at room temperature and does not require expensive instruments, and does not need to grow in a vacuum (< 10j torr) environment, so it can effectively reduce production costs and The thermal budget of the growing environment can be compared with the current process equipment and design conditions. The present invention uses room temperature nitric acid oxidation technology to oxidize metal thin films. It can be long, ultra-thin (equivalent oxide layer thickness EOT < 20 angstroms) and high quality gate oxide layer, and can be directly integrated with the current CMOS process. It is not necessary to modify the process parameters and steps in order to achieve the ultimate goal of minimizing components (minimi ze). Page 14 1232893
1232893 圖式簡單說明 ， 圖式簡單說明 第一圖（A )至（D )係根據本發明之一較佳實施例之製造 金屬氧化層之方法。 第二圖（A )至（G )係根據本發明之另一較佳實施例之製 造一具高介電常數閘極介電質之金氧半場效電晶體之方 法。 第三圖顯示MOS元件於定壓下之閘極電流變化情形。 第四圖顯示MOS元件之電流-電壓（I-V )特性。 第五圖為對有無超薄二氧化矽氧化層緩衝介面的高介電常 數閘極介電質在平帶電壓下，高頻及低頻電容差值之比 較。 第六圖為對各種等效氧化層厚度使用氧氣及氮氣下進行高 溫退火與二氧化矽之漏電流比較。 第七圖顯示碳化矽上之氧化鋁在不同退火溫度下之電流-電壓（I-V )特性。 圖式符號說明 10 :半導體基板 11 :超薄二氧化矽薄膜 1 2 :金屬薄膜 12, :金屬氧化層 13 硝酸 20 半導體基板 21 氧化物1232893 Brief description of the drawings. Brief description of the drawings. The first drawings (A) to (D) are a method for manufacturing a metal oxide layer according to a preferred embodiment of the present invention. The second figures (A) to (G) are a method for manufacturing a metal-oxide half-field-effect transistor with a high dielectric constant gate dielectric according to another preferred embodiment of the present invention. The third figure shows the gate current of the MOS device under constant voltage. The fourth figure shows the current-voltage (I-V) characteristics of the MOS device. The fifth figure shows the comparison of high-frequency and low-frequency capacitance difference between high dielectric constant gate dielectric with and without ultra-thin silicon dioxide buffer interface under flat band voltage. The sixth figure shows the comparison of the leakage current between high temperature annealing and silicon dioxide under various oxygen oxide thicknesses using oxygen and nitrogen. The seventh graph shows the current-voltage (I-V) characteristics of alumina on silicon carbide at different annealing temperatures. Description of Symbols 10: Semiconductor substrate 11: Ultra-thin silicon dioxide film 1 2: Metal film 12 ,: Metal oxide layer 13 Nitric acid 20 Semiconductor substrate 21 Oxide
第16頁 1232893 圖式簡單說明 22 ： 超 薄 二 氧化矽 23 ： 金 屬 薄 膜 23， :金屬氧化層 24 ： 閘 極 電 極層 25 ： 閘 極 26 : 汲 極 及 源極 imn 第17頁Page 16 1232893 Brief description of the drawings 22: Ultra-thin silicon dioxide 23: Metal thin film 23 ,: Metal oxide layer 24: Gate electrode layer 25: Gate 26: Drain and source imn Page 17
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