TWI220591B - A current-source sine wave voltage driving circuit via voltage-clamping and soft-switching techniques - Google Patents
A current-source sine wave voltage driving circuit via voltage-clamping and soft-switching techniques Download PDFInfo
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
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1220591 玖、發明說明: 【發明所屬之技術領域】 本發明乃將直流電轉換成交流正弦電壓之裝置,由交流 正弦電壓命令與回授電壓之誤差,控制開關導通時間,利 用電感產生電流源(Current Source),經過全橋式開關正、 負週期導引對電容充電,調整電壓上升或下降之幅度以累 積線性變化電壓。本發明所有開關及二極體皆具有柔性切 換(Soft-Switching)特性,可減少半導體元件之切換損失, 提高能量轉換效率。柔性切換之技術是由下列原理組成· 1·電壓箝制:利用變壓器磁通不滅定理,迫使系統操作電壓 限制設定範圍内,以降低元件之耐壓規格以及成本。 2·半諧振原理:利用LC諧振中電壓連續特性,使開關及二 極體具零電壓(Zero Voltage Switching,ZVS)截止之效果。 3·電感電流之控制在不連續模式:俾使每次開關導通時,電 感電流從零開始上升,形成開關及二極體零電流時導通(Zem1220591 发明 Description of the invention: [Technical field to which the invention belongs] The present invention is a device that converts DC power to AC sinusoidal voltage. The error of the AC sinusoidal voltage command and the feedback voltage controls the on-time of the switch and uses an inductor to generate a current source (Current Source), charge the capacitor through positive and negative period guidance of the full-bridge switch, and adjust the amplitude of the voltage rise or fall to accumulate a linearly varying voltage. All switches and diodes of the present invention have soft-switching characteristics, which can reduce switching losses of semiconductor elements and improve energy conversion efficiency. The technology of flexible switching is composed of the following principles: 1. Voltage clamping: Utilizing the transformer's inexhaustible theorem to force the system operating voltage to be limited within the set range, in order to reduce the withstand voltage specifications and cost of components. 2. Half-resonance principle: The use of the continuous voltage characteristic in LC resonance enables the switch and the diode to have the effect of zero voltage switching (ZVS) cutoff. 3. Control of the inductor current in discontinuous mode: every time the switch is turned on, the inductor current rises from zero to form the switch and the diode is turned on at zero current (Zem
Current Switching,ZCS)。 【先前技術】 目前市面上將直流電轉成60Hz交流電壓之產品大致分成 兩類;第一類是應用於交流馬達之變頻器,利用馬達之線 圈=感特性,將正弦脈波寬度調變電壓波形產生近似正弦 電流。除此之外’不能適用於電阻性或電容性負載,所以 基^上變頻器不能供應一般家電及電腦產品。第二類即針 對月J者缺點所推出產品,典型的商品為不斷電設備(UPS)為 代表與第一類比較,輸出端增加電感串聯電容之LC濾波 6 1220591 術應用於大功率IGBT開關元件,若干文獻中已證明可降低 PWM切換損失進而提高切換頻率,改善輸出電壓波形。 相對於傳統正弦脈波寬度調變電壓波形,電流源反流器 . 之正弦電壓,大部分控制電流源對電容充電以累積正弦電 . 壓,可以承受各種不同負載與頻率變化,但為何市面上少 有此種產品,分析原因乃電流源之電感太大,控制電感回 路與柔性切換技術不易實現,故而效率不高。國外有關正 弦電壓反流器論及應用柔性切換技術時,常無法克服諳振 . 電壓或電流過高之問題。最近美國電機電子協會(IEEE)發 * 表以電壓箝制理論應用於電流源反流器[1](參考附件文 獻),除具有柔性切換特性外,並抑制開關電壓在四倍以内, 惟電流源之電感虛功電流太大,其容量欲小不易,另電壓 波形漣波高,並無實作效率分析且驅動對象為感應馬達。 【發明内容】 本發明乃利用直流轉換器中,降壓式架構縮小電感容 量,並運用返驰式(Flyback)電壓箝制理論來限制系統電壓 _ 並達成整體開關元件具零電壓或零電流之柔性切換,進而 提高反流器之輸出效率,最後製作電路驗證理論之可行性。 i 本發明改善先前技術之原理及對照功效如下: 1. 利用電壓箝制技術、半諧振特性以及控制電感電流於不連 續模式,使得全部半導體開關及二極體均有柔性切換特性, 最高轉換效率大於95%。 2. 運用本發明電壓箝制技術,可降低開關元件之耐壓規格, 其中箝制電路開關耐壓由4倍輸入電源電壓降為2倍,反流 8 1220591 逆偏,二次側無電流路徑,一次侧電流對變壓器1儲存炉旦 當開關7;及&截止後,變壓器7; —次侧電壓反偏(黑點極性 為負)’ 一極體D/為順偏’二次側電流會將變壓5|先^处 量釋放至直流電源101,因此又稱為反饋電流,在釋放過=· 中,變壓器7;二次側電壓與電源相同(忽略二極體及内阻^ · 降),依匝數比限制一次侧電壓,使得本架構得以箝制兩倍 直流電源101電壓;最後當二次側電流Ζ/為零,代表變壓二 儲能完全釋放,爾後一次侧任何開關導通,都因電感I初 始電流為零而具有ZCS切換。因此,箝制電路除限制系統最 _ 咼電壓外,亦兼具柔性切換效果。反流器電路104採全橋式 架構,所採用IGBT開關串聯二極體,因此不會提供輸 容器短路路徑。藉由電感心之電流對輸出電容仏充電,積 分成正弦波電壓。本發明驅動訊號係以控制訊號電路ι〇5產 生,由60Hz單相電壓命令與迴授電壓比較,經邏輯控制等 驅動電路輸送給六個開關。反流器部分之開關7;+、與广、 7採雙極性模式以及延遲導通時間控制方式切換,將丄述 兩組訊號做邏輯控制後送至箝制電路1〇3中$、巧之驅動笊 % 號’並使得橋式開關具ZCS及ZVS特性。 本發明詳細說明如下: - 圖2表示本發明驅動電路工作模式圖。圖3驅動電路各點 . 波形時序圖,以下將以上述兩圖内容逐段說明工作原理·· 1·模式一 ··時間6〜~Current Switching (ZCS). [Previous technology] At present, products that convert DC to 60Hz AC voltage on the market are roughly divided into two categories; the first category is inverters for AC motors, which use the coil = inductive characteristics of the motor to modulate the voltage waveform of the sinusoidal pulse wave Generates approximately sinusoidal current. In addition, it cannot be applied to resistive or capacitive loads, so the basic up-converter cannot supply general home appliances and computer products. The second category is the product launched for the shortcomings of the month J. The typical product is a UPS that is compared to the first category. The LC filter with an additional series capacitor at the output end 6 1220591 is applied to high-power IGBT switches. Components, which have been proven in several documents to reduce PWM switching losses, thereby increasing switching frequency, and improving output voltage waveforms. Compared with the traditional sinusoidal pulse width modulation voltage waveform, the current source inverter. Most of the sinusoidal voltage controls the current source to charge the capacitor to accumulate sinusoidal voltage. The voltage can withstand a variety of different loads and frequency changes, but why on the market There are few such products. The reason for the analysis is that the inductance of the current source is too large, and the control inductance loop and flexible switching technology are not easy to implement, so the efficiency is not high. When foreign sine voltage inverters talk about the application of flexible switching technology, they often cannot overcome the problem of excessive vibration or excessive voltage or current. Recently, the American Electrical and Electronics Association (IEEE) has published a table that applies the voltage clamping theory to current source inverters [1] (refer to the attached document). In addition to its flexible switching characteristics, and suppressing the switching voltage to within four times, the current source The inductor's virtual work current is too large, its capacity is small, and the voltage waveform ripple is high. There is no practical efficiency analysis and the driving object is an induction motor. [Summary of the Invention] The present invention utilizes a step-down architecture in a DC converter to reduce the inductance capacity, and uses the flyback voltage clamping theory to limit the system voltage_ and achieve the flexibility of the entire switching element with zero voltage or zero current. Switching, thereby improving the output efficiency of the inverter, and finally making a circuit to verify the feasibility of the theory. The principles and comparative effects of the present invention to improve the prior art are as follows: 1. Utilizing voltage clamping technology, half-resonance characteristics, and controlling the inductor current in discontinuous mode, so that all semiconductor switches and diodes have flexible switching characteristics, and the highest conversion efficiency is greater than 95%. 2. By applying the voltage clamping technology of the present invention, the withstand voltage specifications of the switching elements can be reduced, in which the withstand voltage of the clamping circuit switch is reduced from 4 times the input power voltage to 2 times, the reverse current is 8 1220591 reverse bias, and there is no current path on the secondary side. The side current is stored in the transformer 1 when the switch 7; and & after the cut-off, the transformer 7;-the reverse voltage of the secondary side (the black point has a negative polarity) 'one pole D / is the forward bias' the secondary side current will Transformer 5 | The first amount is released to the DC power supply 101, so it is also called the feedback current. During the release period, the transformer 7; the secondary voltage is the same as the power supply (ignoring the diode and internal resistance ^ · drop) Limiting the primary voltage according to the turns ratio allows the architecture to clamp twice the voltage of the DC power supply 101. Finally, when the secondary current Z / is zero, it means that the secondary energy storage of the transformer is completely released, and then any switch on the primary side is turned on. There is ZCS switching because the initial current of the inductor I is zero. Therefore, in addition to limiting the maximum voltage of the system, the clamping circuit also has a flexible switching effect. The inverter circuit 104 adopts a full-bridge structure, and the IGBT switch is connected in series with the diode, so it will not provide a short circuit path for the output container. The output capacitor 仏 is charged by the current of the inductor core, and is integrated into a sine wave voltage. The driving signal of the present invention is generated by a control signal circuit ι05, which is compared with a 60Hz single-phase voltage command and a feedback voltage, and is transmitted to six switches through a driving circuit such as logic control. Inverter part switch 7; +, and wide, 7 use bipolar mode and delayed on-time control mode switching, the two sets of signals described above are logically controlled and sent to the clamp circuit 103, the smart drive. % 'And make the bridge switch with ZCS and ZVS characteristics. The present invention is explained in detail as follows:-Fig. 2 shows a working mode diagram of the driving circuit of the present invention. Figure 3 each point of the drive circuit. Waveform timing diagram, the following will explain the working principle step by step based on the contents of the above two pictures ... 1 mode 1 time 6 ~ ~
如圖2之模式一所示,此時迴授電壓”丨低於單相電壓及頻 率命令U夺,所有IGBT開關並未立即導通,延遲Q後,mBT 10 1220591 開始導通’此段時間稱為導通延遲 時間,主要目的有兩個:首先有^夠時間處理前 =期,儲存在變壓器内之磁通,依磁通不滅㈣,反^ 勢迫使-極體义順偏’藉由反饋電流"釋放變壓器之妒旦 為下-次導通具zcs特性作準備。兹令反饋電流:為 Vmax,反饋電流從峰值下降至零的時間為^,則As shown in Mode 1 of Figure 2, the feedback voltage at this time is lower than the single-phase voltage and frequency command U. All IGBT switches are not immediately turned on. After a delay of Q, mBT 10 1220591 begins to turn on. This period of time is called There are two main purposes for the turn-on delay time: first, there is enough time to process the period before; the magnetic flux stored in the transformer is not extinguished by the magnetic flux, and the reverse force forces the polar body to be forward-biased by the feedback current " Release the transformer's jealousy to prepare for the next-time conduction with zcs characteristics. Let the feedback current: Vmax, the time for the feedback current to drop from the peak to zero is ^, then
一 Lf· di I dt = VIN 展開積分後,得到變壓器二次側反饋電流所需截止時間⑴1 Lf · di I dt = VIN After the integration is expanded, the cut-off time required to obtain the secondary-side feedback current of the transformer is ⑴
t 广LfifrmJVlN 當時間0M、’表示變壓H内之電流迅速釋放為零, 時間線圈沒有1流也絲變壓ϋ沒㈣失,可提高系統整 體效率。當時間^時,可確保下次導通前,變壓器内部 儲存磁通為零,因此必須預估輸出電容最大充電電流。另 外目的限侧關切換解最域,令切換週期 T = td+t〇n+ts+t〇ff (3) 其中^為電壓箝制電路開關味Γ2導通時間,以力及Μ 土而C與7;-仍然導通之截止延遲時間、為輸出電麼高於 中令電壓且六個!GBT全部截止之時間。由於^私為電路 已f時間α疋值’ L與W之時間視負載及波形決定,所以 可设定切換頻率之極大值t 广 LfifrmJVlN When the time is 0M, ’indicates that the current in the transformer H is quickly released to zero. If there is no current in the time coil, the transformer becomes oblique and lost, which can improve the overall system efficiency. When time ^, it can be ensured that the magnetic flux stored in the transformer is zero before the next turn-on, so the maximum charging current of the output capacitor must be estimated. In addition, the purpose is to limit the switching domain of the side switch, so that the switching period T = td + t〇n + ts + t ff (3) where ^ is the on time of the voltage clamping circuit switch Γ2, and C and 7 ;-Still off-delay time for conduction, is the output power higher than the command voltage and six! The deadline for all GBT deadlines. Since ^ is a circuit, the time of f time α 疋 value ’L and W depends on the load and waveform, so the maximum value of the switching frequency can be set.
人(max) < + G) 2·模式二:時間ί2〜ί3 、如圖2之模式二所示,於時間~之前變壓器内之能量釋放 為零’-次側電感&之初始電流為零,因此具扼流圈功能’ 1220591 夺門在ί2時觸發TJ、A及(關,電流流經四個 開關所形成之回路,由零值開始建立,形成$、&及t、 η開關導通具ZCS特性。假設電容器Cq之初始電壓為^⑼, 輸出電容c〆初始電壓為^忽略壓降及漏感,c電感 為之跨壓為直流電源加上電容〇。與Ci之電壓,可描述為 編-vc+' (5) 冋時電容c。之初始電壓迫使二極體A、&逆偏而血法導 通丄戶斤以開關7;、[與上述個電壓儲存元件串聯而導通, 電容CQ之初始電壓來自於模式四所吸收截止能量,從方程 ,(5)y知可提升電感初始電流之攸升率,使之近似於電感 連續模式下之電流’降低導通時間與峰值電流。電容之 電壓可表示為 vc=Vc{〇)-±^ddt ⑹ 3·模式三:時間ί3〜ί4 依克希荷夫電壓定律,箝制電路之IGBT開關兩端電壓Man (max) < + G) 2. Mode 2: Time ί2 ~ ί3, as shown in Mode 2 of Figure 2, before the time ~ before the energy release in the transformer is zero '-the secondary current & the initial current is Zero, so it has a choke function '1220591 When the door is triggered, the trigger TJ, A and (off, current flows through the four switches formed by the zero switch, starting from zero value, forming $, & and t, η switches The conduction has ZCS characteristics. Assume that the initial voltage of the capacitor Cq is ^ ⑼, and the initial voltage of the output capacitor c 忽略 is ^ ignore the voltage drop and leakage inductance. The inductance of c is the DC voltage plus the capacitor 0. The voltage with Ci can be It is described as -vc + '(5) The initial voltage of the capacitor c. The initial voltage forces the diode A, & reverse bias and the blood method to turn on the switch 7 ;, [connected in series with the above voltage storage element, The initial voltage of the capacitor CQ comes from the cut-off energy absorbed by the mode 4. From the equation, (5) y knows that the initial rate of the inductor's initial current can be increased, so that it is similar to the current in the continuous mode of the inductor, which reduces the on time and peak current. The voltage of the capacitor can be expressed as vc = Vc {〇)-± ^ ddt · 3. Mode 3: Time ί3~ί4 by Kirchhoff's voltage law, clamp the voltage across the IGBT switching circuits
Vt.^c0+VD2Vt. ^ C0 + VD2
Vt2=Vc0+VDi (7) 所以二極體qq兩端電壓可移項為 vd2=Vt「Vc〇 FA=K。 (8) 開關η、r2導通後,兩端電壓降為飽和電壓,且電容器。 放電至接近零伏特時,二極體狀仏兩端電壓由逆偏降至° 零伏特,在轉為順偏後,形成二極體zvs導通。變壓器一 1220591 及ZVS特性。其耐壓規格僅考慮輸出電壓為逆向切換之情 形,因此小於輸入直流電壓。於ί4〜ί6區間系提供給電感一、 二次側交越時間,本發明稱之截止延遲時間,於時間^時, 一次側電流為零,可以關閉所有IGBT開關信號。 6.模式六:時間&7 時間G定義為下一週期(開始,代表輸出電容 器持續放電供應負載,電感反饋電流持續下降,此段時間 與負載大小有關。為使電流釋放至電感零磁通,確保電流 在不連續模式,使下次所有開關導通具ZCS特性,因此需增 加模式一之導通延遲時間。當反饋電流//=0時,二極體乃/ 兩端電壓呈現雜散電容與電感之諧振電壓,諧振電壓從零 開始,形成二極體义截止時同時具有ZCS與ZVS特性。至 於下一次欲導通IGBT開關7;+ ' C與配對串聯二極體<、 %兩端電壓持續保持為零,並由模式二之分析,導通時皆 同時具有ZCS與ZVS特性。 由上述說明可知,多數開關二極體及開關導通與截止 時,同時保有ZCS與ZVS特性,剩餘至少有一項電壓或電流 為零之切換。因此在理論分析上,本發明所述電路可以獲 得高轉換效率。 茲將各模式分析之柔性切換整理如下表 14 1220591 零電壓切換(zvs) 零電流切換(zcs) 元件符號 導通 截止 導通 截止 〇 〇 〇 τ:、τα-、Τ:、Tb_ 〇 〇 〇 〇 D1、D2 〇 〇 〇 D:、D-a、D;、D-b 〇 〇 〇 〇 Df 〇 〇 〇 〇 表1各模式分析之柔性切換表Vt2 = Vc0 + VDi (7) So the voltage shiftable term of diode qq is vd2 = Vt "Vc〇FA = K. (8) After the switches η and r2 are turned on, the voltage across the two terminals drops to the saturation voltage and the capacitor. When discharged to near zero volts, the voltage across the diode is reduced from reverse bias to ° zero volts. After turning to forward bias, the diode zvs is turned on. Transformer 1220591 and ZVS characteristics. Its withstand voltage specifications are only Consider the case where the output voltage is reverse switching, so it is less than the input DC voltage. The interval between ί4 and ί6 is provided to the primary and secondary side crossover time of the inductor, which is referred to in the present invention as the cut-off delay time. At time ^, the primary current is Zero, you can turn off all IGBT switching signals. 6. Mode 6: Time & 7 Time G is defined as the next cycle (start, which means that the output capacitor continues to discharge to supply the load, and the inductor feedback current continues to decrease. This period of time is related to the size of the load. In order to release the current to the zero magnetic flux of the inductor, to ensure that the current is in the discontinuous mode, so that all switches are turned on next time with ZCS characteristics, so the conduction delay time of mode 1 needs to be increased. When the feedback current // = 0, the diode is / The terminal voltage presents the resonance voltage of stray capacitance and inductance. The resonance voltage starts from zero and forms the diode with both ZCS and ZVS characteristics. As for the next time to turn on the IGBT switch 7; + 'C and paired series diode <,% The voltage across both ends is kept at zero, and according to the analysis of Mode 2, both ZCS and ZVS characteristics are available at the time of conduction. From the above description, it can be seen that most of the switching diodes and switches keep ZCS and ZVS at the same time. ZVS characteristics, at least one of the remaining voltage or current switching is zero. Therefore, theoretically, the circuit described in the present invention can obtain high conversion efficiency. The flexible switching of each mode analysis is summarized in Table 14 1220591 Zero voltage switching (zvs ) Zero current switching (zcs) Component symbol on-off On-off 0000: τ :, τα-, T :, Tb_ 〇〇〇〇〇〇〇〇〇〇〇〇〇〇〇〇〇〇〇〇〇〇〇〇 〇 〇 D: D, D 〇〇〇〇 Table 1 Flexible switching table for each mode analysis
圖4表示本發明所揭示之利用電壓箝制及柔性切換技術 之電流源正弦電壓驅動電路實施例之一電路圖。主電路圖 401為本發明高壓側大電流部分,本電路之元件規格為 vIN=novDc v〇=novr^s 60Hz IGBT:GT50J101FIG. 4 shows a circuit diagram of an embodiment of a current source sinusoidal voltage driving circuit using voltage clamping and flexible switching technology disclosed in the present invention. The main circuit diagram 401 is the high-current side high-current part of the present invention. The component specifications of this circuit are vIN = novDc v〇 = novr ^ s 60Hz IGBT: GT50J101
Diode:SFI604G ·Diode: SFI604G
:EE-55 Ld = Lf =3QQuH Cr=0.047uF C L = 2QuF 切換頻率:5kHz〜20kHz 回授控制電路圖402中,v謂為1.56sin(2*;r*60〇訊號命令,v: 為輸出交流電壓义百分之一迴授值。本實施例目的控制輸 出交流電壓之峰值為156V,換算成有效值為110V。兩者訊 15 1220591 側電流^與二次側電流Q交越波形;圖5(g)輸出交流電壓波 形與反流器開關7;+之電流波形;圖5(h)輸出交流電壓波形 與變壓器一次側電流^之電流波形。由上述波實測波形驗證 本實施例之柔性切換特性,以及控制電路處理零交越電壓 之效果。 圖6表示本發明所揭示之利用電壓箝制及柔性切換技術 之電流源正弦電壓驅動電路實施例之一,輸出電壓電流波 形及供應各種負載之響應波形,在相同測試條件下與傳統 電壓型脈波寬度調變反流器對照波形。圖6之(a)、(c)、⑷ 分別為傳統反流器應用於無載、非線性整流性負載及電感 性負載之電壓電流波形,以及傅立葉分析與波形失真率 (THD);圖6之(b)、(d)、(f)為本發明對照左邊相等實驗條件 之波形。圖6(g)為傳統反流器瞬間加載電壓、電流與局部放 大波形圖,圖6(h)為本發明對照左邊相等實驗條件之波形。 由實驗圖形比較,正弦波波峰附近,本發明實測波形失真 情形較低,從傅立葉分析以及波形失真率之數據驗證本發 明利用電壓箝制及柔性切換技術之電流源正弦電壓驅動電 路,可大幅改善傳統電壓型脈波寬度調變反流器之缺失。 【圖式簡單說明】 圖1表示本發明所揭示之利用電壓箝制及柔性切換技術之 電流源正弦電壓驅動方塊圖。 圖2表示本發明所揭示之利用電壓箝制及柔性切換技術之 17 1220591 電流源正弦電壓驅動電路工作模式圖。 圖3 表示本發明所揭示之利用電壓箝制及柔性切換技術之 電流源正弦電壓驅動電路各點波形時序圖。 圖4表示本發明所揭示之利用電壓箝制及柔性切換技術之 電流源正弦電壓驅動電路實施例之一電路圖。 圖5表示本發明所揭示之利用電壓箝制及柔性切換技術之 電流源正弦電壓驅動電路實施例之一,開關及二極體 之實測電壓及電流柔性切換波形。 圖6表示本發明所揭示之利用電壓箝制及柔性切換技術之 電流源正弦電壓驅動電路實施例之一,圖6之(b)、(d)、 (f)、(h)輸出電壓電流波形及供應各種負載之響應波形; 圖6之(a)、(c)、(e)、(g)在相同測試條件下與傳統電壓 型脈波寬度調變反流器對照波形。 圖示主要部分之編號代表意義如下: 101:直流電源 102:電流源電路 103·.箝制電路 104:反流器電路 105:控制及驅動電路 401:主電路圖 402:回授控制電路圖 403:分相電路圖 404:隔離及電流放大驅動電路圖 405:邏輯控制電路圖 18: EE-55 Ld = Lf = 3QQuH Cr = 0.047uF CL = 2QuF Switching frequency: 5kHz ~ 20kHz Feedback control circuit diagram 402, v is 1.56sin (2 *; r * 60〇 signal command, v: output AC The voltage is one hundredths of the feedback value. The purpose of this embodiment is to control the peak value of the output AC voltage to be 156V, which is converted into an effective value of 110V. The two 15 1520591 cross current waveform of the side current ^ and the secondary side current Q; Figure 5 (g) Output AC voltage waveform and inverter switch 7; + current waveform; Figure 5 (h) Output AC voltage waveform and transformer primary current ^ current waveform. The above-mentioned wave actual measured waveforms verify the flexible switching of this embodiment Characteristics, and the effect of the control circuit in processing the zero-crossing voltage. Figure 6 shows one of the embodiments of the current source sinusoidal voltage driving circuit using voltage clamping and flexible switching technology disclosed in the present invention. The output voltage and current waveforms and the response of various loads are provided. The waveform is compared with the traditional voltage-type pulse width modulation inverter under the same test conditions. Figures 6 (a), (c), and ⑷ are traditional inverters applied to no-load and non-linear rectifier loads, respectively. And inductive The voltage and current waveforms, as well as the Fourier analysis and waveform distortion rate (THD); Figures 6 (b), (d), and (f) are the waveforms of the present invention compared with the experimental conditions on the left. Figure 6 (g) is the traditional inverse Figure 6 (h) shows the waveforms of the same experimental conditions on the left side of the present invention compared with the experimental waveform. Compared with the experimental graphs, near the peak of the sine wave, the measured waveform of the present invention has low distortion. From Fourier Analysis and data verification of waveform distortion rate The current source sinusoidal voltage drive circuit using voltage clamping and flexible switching technology of the present invention can greatly improve the lack of traditional voltage-type pulse width modulation inverters. [Schematic description] Figure 1 FIG. 2 shows a block diagram of a current source sinusoidal voltage drive using voltage clamping and flexible switching technology disclosed in the present invention. FIG. 2 shows a working mode diagram of a 17 1220591 current source sinusoidal voltage drive circuit using voltage clamping and flexible switching technology disclosed in the present invention. Figure 3 shows the waveforms of each point of the current source sinusoidal voltage drive circuit using voltage clamping and flexible switching technology disclosed in the present invention. Sequence diagram. FIG. 4 shows a circuit diagram of one embodiment of a current source sinusoidal voltage driving circuit using voltage clamping and flexible switching technology disclosed in the present invention. FIG. 5 shows a current source sinusoidal voltage driving circuit using voltage clamping and flexible switching technology disclosed in the present invention. One of the embodiments of the voltage driving circuit, the measured voltage and current flexible switching waveforms of the switch and the diode. FIG. 6 shows one of the embodiments of the current source sinusoidal voltage driving circuit using voltage clamping and flexible switching technology disclosed in the present invention. 6 (b), (d), (f), (h) Output voltage and current waveforms and response waveforms for various loads; Figures 6 (a), (c), (e), and (g) are tested in the same way. Compare the waveform with the traditional voltage-type pulse width modulation inverter under the conditions. The numbers of the main parts of the figure represent the following meanings: 101: DC power supply 102: Current source circuit 103 .. Clamping circuit 104: Inverter circuit 105: Control and drive circuit 401: Main circuit diagram 402: Feedback control circuit diagram 403: Phase separation Circuit diagram 404: Isolation and current amplification drive circuit diagram 405: Logic control circuit diagram 18
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Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
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US7492618B2 (en) | 2005-01-14 | 2009-02-17 | Mitsubishi Denki Kabushiki Kaisha | Inverter device |
CN104135266A (en) * | 2014-06-25 | 2014-11-05 | 台达电子企业管理(上海)有限公司 | Driving device and driving method |
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Cited By (4)
Publication number | Priority date | Publication date | Assignee | Title |
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US7492618B2 (en) | 2005-01-14 | 2009-02-17 | Mitsubishi Denki Kabushiki Kaisha | Inverter device |
CN104135266A (en) * | 2014-06-25 | 2014-11-05 | 台达电子企业管理(上海)有限公司 | Driving device and driving method |
CN104135266B (en) * | 2014-06-25 | 2018-02-27 | 台达电子企业管理(上海)有限公司 | Drive device and driving method |
US9906010B2 (en) | 2014-06-25 | 2018-02-27 | Delta Electronics (Shanghai) Co., Ltd. | Driving device and driving method |
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