200425629 玖、發明說明： 【發明所屬之技術領域】 本發明乃將直流電轉換成交流正弦電壓之裝置，由交流 正弦電壓命令與回授電壓之誤差，控制開關導通時間，利 用電感產生電流源（Current Source)，經過全橋式開關正、 負週期導引對電容充電，調整電壓上升或下降之幅度以累 積線性變化電壓。本發明所有開關及二極體皆具有柔性切 換（Soft-Switching)特性，可減少半導體元件之切換損失， 提高能量轉換效率。柔性切換之技術是由下列原理組成： 1·電壓箝制：利用變壓器磁通不滅定理，迫使系統操作電壓 限制設定範圍内，以降低元件之耐壓規格以及成本。 2·半諧振原理：利用LC諧振中電壓連續特性，使開關及二 極體具零電壓（Zero Voltage Switching，ZVS)截止之效果。 3·電感電流之控制在不連續模式:俾使每次開關導通時，電 感電流從零開始上升，形成開關及二極體零電流時導通(Zer〇 Current Switching，ZCS) 〇 【先前技術】 目前市面上將直流電轉成60Hz交流電壓之產品大致分成 兩類；第一類是應用於交流馬達之變頻器，利用馬達之線 圈電感特性，將正弦脈波寬度調變電壓波形產生近似正弦 電流。除此之外，不能適用於電阻性或電容性負載，所以 基本上變頻器不能供應一般家電及電腦產品。第二類即針 對則者缺點所推出產品’典型的商品為不斷電設備(Upjg)為 代表。與第一類比較，輸出端增加電感串聯電容之LC濾波 200425629 電路，並增加回授控制，使輸出電壓固定以克服負載及輸 入電壓變動，另外增加電池及充、放電電路，以提供市電 以外之緊急電源。以目前台灣製造UPS之技術及產品佔有 率’已名列世界前茅。即使如此，仍有若干特性仍須繼續· 改善。首先LC濾波電路有諸多負載限制，第一點濾波電感-貫穿整個輸出電流，且考慮偏移二階諧振電路中半功率頻 率（-3dB)響應，電感值及容量較大，一般市售UPS約在mIi 級’濾波電感提高會增加產品重量與能量轉換損失。第二 點’加諸於電感兩端電壓L·必/汾為直流電壓與輸出電容之 差’其值於正弦峰值附近最小，受限濾波電感值，導致正 弦電壓峰值轉折點失真，產生高諧波成分，即使提高濾波 電壓仍無法避免。此電感提供濾波功能，但同時限制非性 負載，瞬間負載變化之調節能力。第三點，若干負載將危 及驅動電路，如半波整流性負載或高電感性負載，主要因LC 濾波電路之正負半周波形對稱性，以及高電感性負載改變 二階濾波之頻率響應，輸出正弦電壓過低，進而必須調高 直流電壓準位，系統可能過壓而燒毁。第四點，非電阻性 負載之電壓波形失真率，一般又稱為整體諧波失真率（Total Harmonic Distortion，THD)，遠高於電阻性負載。這歸咎於 原先設計之二階濾波電路特性不能滿足非電阻性負載_如電 容性、電感性及非線性負載，本發明將於稍後實施例中比 照其波形變化。 除此之外，開關切換損失隨著切換頻率提高而增加，系 統效率因而降低。許多廠商已經開始引用各種柔性切換技 200425629 術應用於大功率IGBT開關元件，若干文獻中已證明可降低 PWM切換損失進而提高切換頻率，改善輸出電壓波形。 相對於傳統正弦脈波寬度調變電壓波形，電流源反流器 之正弦電壓，大部分控制電流源對電容充電以累積正弦電 ‘ 壓，可以承受各種不同負載與頻率變化，但為何市面上少 -有此種產品，分析原因乃電流源之電感太大，控制電感回 路與柔性切換技術不易實現，故而效率不高。國外有關正 弦電壓反流器論及應用柔性切換技術時，常無法克服諧振 電壓或電流過高之問題。最近美國電機電子協會(IEEE)發 — 表以電壓箝制理論應用於電流源反流器[1](參考附件文 獻），除具有柔性切換特性外，並抑制開關電壓在四倍以内， 惟電流源之電感虛功電流太大，其容量欲小不易，另電壓 波形漣波高，並無實作效率分析且驅動對象為感應馬達。 【發明内容】 本發明乃利用直流轉換器中，降壓式架構縮小電感容 量，並運用返驰式（Flyback)電壓箝制理論來限制系統電壓 @ 並達成整體開關元件具零電壓或零電流之柔性切換，進而 提高反流器之輸出效率，最後製作電路驗證理論之可行性。 本發明改善先前技術之原理及對照功效如下： 1. 利用電壓箝制技術、半諧振特性以及控制電感電流於不連 續模式，使得全部半導體開關及二極體均有柔性切換特性， 最高轉換效率大於95%。 2. 運用本發明電壓箝制技術，可降低開關元件之耐壓規格， 其中箝制電路開關耐壓由4倍輸入電源電壓降為2倍，反流 200425629 器之開關由2倍輸入電源電壓降為相同電壓[i]。 3·電流源電感之體積及電感值小於一般電流源架構，可提 高電流源之電流爬生率，以調節瞬間負載電流。本實施例 中採EE_55鐵粉心，電感值為3〇〇uH。 4.輸出省略濾波電感，電流源直接對輸出負載及濾波電容充 電’因此可接受各種電感性、電容性、非線性及瞬間變化 之負載’由實施例中實作波形驗證輸出電壓波形失真率 (THD)及傅立葉頻譜分析均優於傳統脈波寬度調變架構。 【實施方式】 如圖1所示為本發明所揭示之利用電壓箝制及柔性切換 技術之電流源正弦電壓驅動方塊圖，當輸出電壓為正弦波 正半週時，電流由直流電源1〇1經電流源電路1〇2之電感心， 及箝制電路103之IGBT開關7]、γ2，再由反流器電路1〇4之 IGBT開關7；+、τ對輸出電容&充電。同理，欲產生電壓 為正弦波負半週輸出時，開關乃、&、V及7同時觸發導 通，對輸出電容(^反向充電。電流源電路1〇2之電感心介於 厂撕、^〇)以及〜三者電壓源，必須利用電感限制電流，其電 流上升率與外加電感之電壓成正比，心為一高激磁電流變 壓器之一次側激磁電感，Z/為二次侧激磁電感。箝制電路1〇3 有四種目的，首先與反流器電路串聯，可以控制開關忑、 G，啟斷反流器電流；其次電容器c〇與二極體^、仏並接 在刁、A兩端，使得7]、&在截止時具切換zvs特性；第三 種目的，以返馳原理釋放變壓器剩餘能量，換言之，當變 壓器次侧電壓順偏時（如圖1黑點極性為正），二極體jC^為 200425629 逆偏，二次侧無電流路徑，一次侧電流對變壓器Γ儲存炉量 ：、 當開關7；及A截止後，變壓器7； —次侧電壓及傯 為負)，二極體卿一侧電流= 量釋放至直流電源101，因此又稱為反饋電流，在釋放 中，變壓器7；二次側電壓與電源相同（忽略二極體及内阻^ 降），依Ε數比限制-次側電壓，使得本架構得以箝制兩倍 直流電源101電壓；最後當二次側電流Ζ/為零，代表變壓^ 儲能完全釋放，爾後一次侧任何開關導通，都因電感Ζ初 始電流為零而具有ZCS切換。因此，箝制電路除限制系^最 φ 高電壓外，亦兼具柔性切換效果。反流器電路104採全橋式 架構，所採用IGBT開關串聯二極體，因此不會提供輸出電 谷器短路路徑。藉由電感心之電流對輸出電容q充電，積 分成正弦波電壓。本發明驅動訊號係以控制訊號電路1〇5產 生，由60Hz單相電壓命令與迴授電壓比較，經邏輯控制等 驅動電路輸送給六個開關。反流器部分之開關G、π與厂、 7採雙極性模式以及延遲導通時間控制方式切換，將丄述 兩組訊號做邏輯控制後送至箝制電路1〇3中η、&之驅動氚 · 號，並使得橋式開關具ZCS&ZVS特性。 11 本發明詳細說明如下： 圖2表示本發明驅動電路工作模式圖。圖3驅動電路各點 波形時序圖，以下將以上述兩圖内容逐段說明工作原理：·'、 1·模式一：時間 …如圖2之模式一所示，此時迴授電壓V;低於單相電壓及頻 率命令”_時，所有IGBT開關並未立即導通，延遲~後，igbt 10 200425629200425629 发明 Description of the invention: [Technical field to which the invention belongs] The present invention is a device that converts DC power to AC sinusoidal voltage. The error of the AC sinusoidal voltage command and the feedback voltage controls the on-time of the switch and uses the inductor to generate a current source (Current Source), charge the capacitor through positive and negative period guidance of the full-bridge switch, and adjust the amplitude of the voltage rise or fall to accumulate a linearly varying voltage. All switches and diodes of the present invention have soft-switching characteristics, which can reduce switching losses of semiconductor elements and improve energy conversion efficiency. The technology of flexible switching is composed of the following principles: 1. Voltage clamping: the use of the transformer's non-extinguishing theorem to force the system operating voltage to be limited to a set range to reduce the voltage withstand specifications and cost of components. 2. Half-resonance principle: The use of the continuous voltage characteristic in LC resonance enables the switch and the diode to have the effect of zero voltage switching (ZVS) cutoff. 3. Control of inductor current in discontinuous mode: When the switch is turned on, the inductor current rises from zero to form the switch and the diode is turned on at zero current (Zer〇Current Switching (ZCS)). [Previous technology] Currently Products on the market that convert DC to 60Hz AC voltage are roughly divided into two categories; the first category is inverters used in AC motors, which use the coil inductance characteristics of the motor to generate a sinusoidal current with a sinusoidal pulse width modulated voltage waveform. In addition, it cannot be applied to resistive or capacitive loads, so basically the inverter cannot supply general home appliances and computer products. The second category is the product that is introduced for the disadvantages of the rulers. Typical products are Upjg. Compared with the first type, an LC filter 200425629 circuit with an inductor and a series capacitor is added at the output end, and feedback control is added to make the output voltage fixed to overcome the load and input voltage changes. In addition, the battery and charge and discharge circuits are added to provide power other than the mains power. Emergency power. With the current technology and product share of UPS manufacturing in Taiwan, it has ranked among the best in the world. Even so, there are still some features that must be continued and improved. First, the LC filter circuit has a lot of load limitations. The first point is the filter inductor, which runs through the entire output current, and considers the offset of the half-power frequency (-3dB) response in the second-order resonant circuit. The inductance value and capacity are relatively large. Increased mIi level 'filter inductance will increase product weight and energy conversion loss. The second point, “The voltage L · B / Fn is the difference between the DC voltage and the output capacitance” applied to the inductor, its value is the smallest near the sinusoidal peak, and the limited filtering inductance value causes distortion at the sinusoidal voltage peak turning point and generates high harmonics. Components, even if the filter voltage is increased, it is unavoidable. This inductor provides a filtering function, but at the same time limits the ability to regulate non-sexual loads and instantaneous load changes. Thirdly, some loads will endanger the driving circuit, such as half-wave rectified load or high inductive load, mainly due to the symmetry of the positive and negative half-cycle waveforms of the LC filter circuit, and the high-inductive load changes the frequency response of the second-order filter, and outputs a sinusoidal voltage If it is too low, the DC voltage level must be increased, and the system may be overvoltage and burned. The fourth point is that the voltage waveform distortion rate of non-resistive load is generally called total harmonic distortion (THD), which is much higher than that of resistive load. This is due to the fact that the characteristics of the second-order filter circuit originally designed cannot meet non-resistive loads, such as capacitive, inductive, and non-linear loads. The present invention will compare its waveform changes in later embodiments. In addition, the switching loss of the switch increases as the switching frequency increases, thus reducing system efficiency. Many manufacturers have begun to apply a variety of flexible switching technologies 200425629 to high-power IGBT switching elements. Several documents have proven that it can reduce the PWM switching loss, thereby increasing the switching frequency, and improving the output voltage waveform. Compared with the traditional sinusoidal pulse width modulation voltage waveform, most of the sinusoidal voltage of the current source inverter controls the capacitor to accumulate the sinusoidal voltage, which can withstand various loads and frequency changes. -The reason for this product is that the inductance of the current source is too large, the control inductance loop and flexible switching technology are not easy to implement, so the efficiency is not high. When foreign sine voltage inverters talk about the application of flexible switching technology, they often cannot overcome the problem of too high resonant voltage or current. Recently, the American Electrical and Electronics Association (IEEE) issued a table that applies the voltage clamping theory to the current source inverter [1] (refer to the attached document). In addition to its flexible switching characteristics, and suppressing the switching voltage within four times, the current source The inductor's virtual work current is too large, its capacity is small, and the voltage waveform ripple is high. There is no practical efficiency analysis and the driving object is an induction motor. [Summary of the Invention] The present invention uses a step-down architecture in a DC converter to reduce the inductance capacity, and uses the flyback voltage clamping theory to limit the system voltage @ and achieve the flexibility of the entire switching element with zero voltage or zero current. Switching, thereby improving the output efficiency of the inverter, and finally making a circuit to verify the feasibility of the theory. The principles and comparative effects of the present invention to improve the prior art are as follows: 1. Utilizing voltage clamping technology, half-resonance characteristics, and controlling the inductor current in discontinuous mode, so that all semiconductor switches and diodes have flexible switching characteristics, and the highest conversion efficiency is greater than 95 %. 2. By using the voltage clamping technology of the present invention, the withstand voltage specifications of the switching elements can be reduced, in which the withstand voltage of the clamping circuit switch is reduced from 4 times the input power voltage to 2 times, and the switch of the backflow 200425629 device is reduced from 2 times the input power voltage to the same. Voltage [i]. 3. The volume and inductance of the current source inductor are smaller than those of the general current source architecture, which can increase the current creepage rate of the current source to adjust the instantaneous load current. In this embodiment, EE_55 iron powder core is used, and the inductance value is 300uH. 4. The filter inductor is omitted in the output, and the current source directly charges the output load and filter capacitor 'so it can accept various inductive, capacitive, non-linear and instantaneous changes'. The waveform distortion of the output voltage is verified by implementing the waveform in the embodiment ( THD) and Fourier spectrum analysis are superior to traditional pulse width modulation architectures. [Embodiment] As shown in FIG. 1 is a block diagram of a sinusoidal voltage drive of a current source using voltage clamping and flexible switching technology disclosed in the present invention. When the output voltage is a positive half cycle of a sine wave, the current is passed by a DC power source 101. The inductor core of the current source circuit 102 and the IGBT switch 7] and γ2 of the clamp circuit 103 are further charged by the IGBT switch 7 of the inverter circuit 104; + and τ. In the same way, when the voltage is to be output in the negative half cycle of the sine wave, the switches, &, V, and 7 trigger the conduction at the same time, and reversely charge the output capacitor (^. The inductor core of the current source circuit 102 is in the factory tear. , ^ 〇) and ~ The three voltage sources must use inductors to limit the current. The rate of current rise is proportional to the voltage of the external inductor. The heart is the primary side magnetizing inductance of a high field current transformer, and Z / is the secondary side magnetizing inductance. . The clamping circuit 10 has four purposes. Firstly, it is connected in series with the inverter circuit, which can control the switches 忑, G to start and stop the inverter current. Second, the capacitor c0 is connected in parallel with the diodes ^ and 两端 at both ends of Diao and A. , Make 7], & switch zvs characteristics at the cutoff; the third purpose is to release the residual energy of the transformer based on the flyback principle, in other words, when the voltage on the secondary side of the transformer is forward biased (as shown in Figure 1, the black dot polarity is positive), The diode jC ^ is 200425629 reverse bias, there is no current path on the secondary side, and the primary side current to the transformer Γ stores the amount of furnace:, when switch 7; and A is off, transformer 7;-secondary side voltage and 偬 are negative), The current on the diode side = the amount discharged to the DC power supply 101, so it is also called the feedback current. During the release, the transformer 7; the voltage on the secondary side is the same as the power supply (ignoring the diode and the internal resistance ^), according to Ε Ratio limitation-secondary voltage, this architecture can clamp twice the voltage of the DC power supply 101; finally, when the secondary current Z / is zero, it means that the transformer ^ stored energy is completely released, and then any switch on the primary side is turned on due to inductance Z initial current is zero with ZCS switching. Therefore, in addition to limiting the system's maximum φ high voltage, the clamping circuit also has a flexible switching effect. The inverter circuit 104 adopts a full-bridge architecture, and the IGBT switch is connected in series with the diode, so it will not provide a short circuit path for the output valleyr. The output capacitor q is charged by the current of the inductor core and is integrated into a sine wave voltage. The driving signal of the present invention is generated by a control signal circuit 105, which is compared with a 60Hz single-phase voltage command and a feedback voltage, and is transmitted to six switches through a driving circuit such as logic control. The switches G, π and factory of the inverter part are switched in bipolar mode and delayed on-time control mode. The two sets of signals described above are controlled by logic and sent to the driving of η, & in the clamping circuit 103. · And make the bridge switch with ZCS & ZVS characteristics. 11 The present invention is explained in detail as follows: FIG. 2 shows a working mode diagram of the driving circuit of the present invention. Figure 3 timing diagram of waveforms at each point of the driving circuit. The following will explain the working principle step by step based on the above two figures: · ', 1 · Mode 1: Time ... As shown in Mode 2 of Figure 2, the feedback voltage V at this time; low When the single-phase voltage and frequency command is "_", all IGBT switches are not turned on immediately. After the delay, igbt 10 200425629
開關7；、Γ2、Γ:以及7Γ開始導通，此段時間稱為導通延遲 時間，主要目的有兩個：首先有足夠時間處理前一次導通 末期’儲存在變壓器内之磁通，依磁通不滅定律，反磁動 勢迫使二極體义順偏，藉由反饋電流&釋放變㈣之能量， 為下-次導通具Ζ⑽性作準備1令反饋電流峰值為 9腿，反饋電流從峰值下降至零的時間為9，則 -Lr-di/dt = VTN ⑴ 展開積分後，得到變壓器二次侧反饋電流所需截止時間 h ^/Vmax ^IN ⑺ 當時間^很小，表示變麗器内之電流迅速釋放為零，其餘 時間線圈沒有電流也代表變壓器沒有損失，可提高***整 體效率。當時間,,、時，可確保下次導通前，變壓器内部 儲存磁通為零，因此必須預估輸出電容最大充電電流。另 外目的限制開關切換頻率最大值，令切換週期 Γ = Ά+Ά (3) ，中為電壓箝制電路開關味❻通時間， 截 ==與0然導通之截止延遲時間 出電壓高於 =電fIGBT全部截止之時間。由〜私為電路 以 了二間"又疋值’。與W之時間視負載及波形決定’所 可S又疋切換頻率之極大值 (4) 乂 (max)〈 1/(G + G ) 2·模式二:時間ί2〜ί3 為Π2ί模式二所示、，於時^之前變廢器内之能量釋放 "人側電感&之初始電流為零，因此具扼流圈功能， 11 200425629 當時間在G時，觸發7；、&及T開關，電流流經四個 開關所形成之回路，由零值開始建立，形成巧、巧及G、 Α開關導通具ZCS特性。假設電容器Cq之初始電壓為&⑼， =出電容Cz之初始電壓為匕⑼，若忽略壓降及漏感，電感 器之跨壓為直流電源加上電容Cg與q之電壓，可描述為 VIN -Ld ^di/dt-vc +vQ (5) 同時電容(^之初始電壓迫使二極體q、a逆偏而無法導 ^、所以開關η、&與上述個電壓儲存元件串聯而導通， 電容Q之初始電壓來自於模式四所吸收截止能量，從方程 式(5)可知可提升電感初始電流之攸升率，使之近似於電感 在連續模式下之電流，降低導通時間與峰值電流。電容之 電壓可表示為 νΛ〇)- c〇 dt h <t<t3 (6) 3·模式三：時間ί3〜ί4 依克希荷夫電壓定律，箝制電路之咖丁開關兩端電壓Switches 7 ;, Γ2, Γ :, and 7Γ start to conduct. This period of time is called the turn-on delay time. The main purpose is twofold: first, there is enough time to deal with the magnetic flux stored in the transformer at the end of the previous turn-on period. The law, the diamagnetic momentum forces the diode to go forward and backward, and the feedback current & releases the energy of the change to prepare for the next-time conduction. The peak value of the feedback current is 9 legs, and the feedback current decreases from the peak value. The time to zero is 9, then -Lr-di / dt = VTN ⑴ After the integration is expanded, the cut-off time h ^ / Vmax ^ IN required to obtain the secondary-side feedback current of the transformer is ^ / Vmax ^ IN. The current is quickly released to zero, and the absence of current in the coil at other times also means that there is no loss in the transformer, which can improve the overall efficiency of the system. When time ,,, and can ensure that the magnetic flux stored in the transformer is zero before the next turn-on, the maximum charging current of the output capacitor must be estimated. Another purpose is to limit the maximum value of the switching frequency, so that the switching period Γ = Ά + 3 (3), where the voltage clamping circuit switches the miso on time, cut-off == the off-delay time with 0 but on, the output voltage is higher than = electric fIGBT All deadlines. From ~ private to the circuit to get two "quote again." The time between W and W depends on the load and waveform. The maximum value of the switchable frequency (4) 乂 (max) <1 / (G + G) 2 · Mode 2: Time ί2 ~ ί3 is shown in Π2ί Mode 2 ， The energy release in the waste changer before the time ^ The initial current of the human side inductor is zero, so it has a choke function. 11 200425629 When the time is G, the 7 ;, & and T switches are triggered. The current flows through the loop formed by the four switches, and is established from zero, forming the QCS, QC, and G and A switches with ZCS characteristics. Assume that the initial voltage of the capacitor Cq is & =, the initial voltage of the output capacitor Cz is ⑼, if the voltage drop and leakage inductance are ignored, the voltage across the inductor is the DC power supply plus the voltage of the capacitors Cg and q, which can be described as VIN -Ld ^ di / dt-vc + vQ (5) At the same time, the initial voltage of the capacitor (^ forces the diodes q and a to reverse bias and cannot conduct ^, so the switches η, & are connected in series with the above voltage storage elements to conduct The initial voltage of the capacitor Q comes from the cut-off energy absorbed by the mode 4. From equation (5), it can be known that the initial rate of the inductor's initial current can be increased to make it approximate the current of the inductor in continuous mode, and reduce the on-time and peak current. The voltage of the capacitor can be expressed as νΛ〇)-c〇dt h < t < t3 (6) 3. · Mode 3: Time ί3 ~ ί4 According to the voltage law of Kirchhoff, clamp the voltage across the switch of the coffee switch.
Vti "Vc,+VDi ⑺ 所以二極體A、坧兩端電壓可移項為 :Wc。 ⑻ Κ-νΤ2-νε〇 開關Ρ導通後’兩端電壓降為飽 特時’二極體兩端電壓由逆偏降至 零伏特在轉為順偏後，形成二極體ZVS導通。變壓器一 12 200425629 次側電流Q分成7； - A與A -了1兩併聯路徑向電容器Q充電， 此時Go電壓很低 vc〇 ^VTX -¾ =¾ -yDx (9) 4.模式四：時間ί4〜ί5 輸出回授電壓高於命令電壓時，^及^觸發訊號截止， 電SlL路彳k轉向；?;IL經Z>2、C〇以及，電容Q兩端電壓上 升，代表開關7]及7"2兩端電壓等於二極體導通電壓加上， 以致形成兩開關截止時皆具ZCS及ZVS特性。此時電流特性 為電感與電容QQ之半串聯諧振電流，本發明設計鲁 心==〜=300说，因此當 k =〜=(Fc0 +v0)/2 (1〇) 〜，迫使二極體巧順偏導通，依照磁通不滅定律，因 二次侧導通迴路輸出電壓較低，原一次側電流所建立儲存 之磁通，由二次側線圈心將能量以電流反饋給直流電源侧。 此#又一、一次侧電流交越時間，變壓器一、二次侧電壓受 FC0牽引，電壓為連續，因此二極體qA截止時以及^導 通時同時具有zvs及zcs特性。以方程式（1〇)得知，當κ = 〇 · 時，^co兩端有最高電壓2FW，決定開關Γι、r2之相同耐壓 規格。 5·模式五：時間匕〜& 此時反饋電流開始下降，變壓器一次側電感電流~完全 轉移二次線圈，此時反流器之全橋式開關電流亦為零，其 電壓因有串聯箝制電路吸收電壓差值，因此開關電壓亦零， 同理配對串聯二極體βA-亦同，截止時皆同時具有zCs 13 200425629 及ZVS特性。其耐壓規格僅考慮輸出電壓為逆向切換 形，因此小於輸入直流電壓。於W6區間系提供給電感=情 二次側交越時間，本發明稱之戴止延遲時間，於時間〖日、 一次側電流為零，可以關閉所有IGBT開關信號。 6寺 6.模式六：時間ί6〜6 時間~定義為下一週期（<=VCWM)開始，代表輪出 器持續放電供應負載，電感反饋電流持續下降，此浐日、各 與負載大小有關。為使電流釋放至電感零磁通，確保42 在不連續模式，使下次所有開關導通具zcs特性，因 叫 G扁增 加模式一之導通延遲時間。當反饋電流//=0時，二極體巧 兩端電壓呈現雜散電谷與電感之譜振電壓，諧振電壓從零 開始，形成二極體巧截止時同時具有ZCS與ZVS特性。至 於下一次欲導通IGBT開關7；+、ΓζΓ與配對串聯二極體W、 2¾兩端電壓持續保持為零，並由模式二之分析，導通時皆 同時具有ZCS與ZVS特性。 由上述說明可知，多數開關二極體及開關導通與截止 時，同時保有ZCS與ZVS特性，剩餘至少有一項電壓或電流 為零之切換。因此在理論分析上，本發明所述電路可以獲 得高轉換效率。 茲將各模式分析之柔性切換整理如下表 14 200425629 零電壓切換(zvs) 零電流切換(zcs) 元件符號 導通 截止 導通 _截止 τ^τ2 〇 〇 〇 Τ:、Ί7、Th+、Tb- 〇 〇 〇 〇 A、乃2 〇 〇 〇 D:、D-a、D+h、D: 〇 〇 〇 〇 2j__ 〇 〇 〇 〇 表1各模式分析之柔性切換表 圖4表示本發明所揭示之利用電壓箝制及柔性切換技術 之電流源正弦電壓驅動電路實施例之一電路圖。主電路圖 401為本發明高壓側大電流部分，本電路之元件規格為 vIN=mv dc V. 60Hz IGBT:GT50J101Vti " Vc, + VDi ⑺ So the voltage shiftable term between diode A and 坧 is: Wc. ⑻ Κ-νΤ2-νε〇 After the switch P is turned on, when the voltage at both ends of the diode is saturated, the voltage across the diode is reduced from reverse bias to zero volts. After switching to forward bias, the diode ZVS is turned on. Transformer 12 200425629 The secondary side current Q is divided into 7;-A and A-1 two parallel paths to charge capacitor Q, at this time the Go voltage is very low vc〇 ^ VTX -¾ = ¾ -yDx (9) 4. Mode 4: Time ί4 ~ ί5 When the output feedback voltage is higher than the command voltage, ^ and ^ trigger the signal to be cut off, and the electric SlL circuit will turn;?; IL via Z > 2, C0, and the voltage across the capacitor Q rises, representing switch 7 ] And 7 &2; The voltage across the two terminals is equal to the diode on-voltage plus, so that when the two switches are turned off, they have ZCS and ZVS characteristics. At this time, the current characteristic is the semi-series resonance current of the inductor and the capacitor QQ. The design of the present invention is Lu Xin == ~ = 300, so when k = ~ = (Fc0 + v0) / 2 (1〇) ~, the diode is forced. According to the law of non-destructive magnetic flux, the output voltage of the secondary-side conduction loop is low, and the stored magnetic flux created by the primary-side current is fed by the secondary-side coil core to the DC power source as a current. This #Furthermore, the primary current crossover time, the voltage on the primary and secondary sides of the transformer is pulled by FC0, and the voltage is continuous. Therefore, the diode qA has both zvs and zcs characteristics when it is turned off and when it is turned on. It is known from equation (10) that when κ = 〇 ·, there is a maximum voltage of 2FW across ^ co, which determines the same withstand voltage specifications of switches Γι and r2. 5 · Mode 5: At this time, the feedback current starts to decrease, and the inductor current on the primary side of the transformer is completely transferred to the secondary coil. At this time, the full-bridge switching current of the inverter is also zero, and its voltage is clamped in series. The circuit absorbs the voltage difference, so the switching voltage is also zero, and the same is true for the paired series diode βA-, both of which have zCs 13 200425629 and ZVS characteristics at the same time. The withstand voltage specification only considers that the output voltage is reverse-switched, so it is less than the input DC voltage. In the interval of W6, the inductance is equal to the secondary-side crossover time, which is referred to as wearing delay time in the present invention. At the time [day], the primary-side current is zero, and all IGBT switching signals can be turned off. 6 Temple 6. Mode 6: Time ί 6 ~ 6 Time ~ is defined as the start of the next cycle (< = VCWM), which means that the loader continues to discharge and supply the load, and the inductor feedback current continues to decrease. The next day, each is related to the size of the load. . In order to release the current to the zero magnetic flux of the inductor, ensure that the 42 is in the discontinuous mode, so that all the switches on next time have the zcs characteristic, because it is called G flattening and the delay time of the first mode. When the feedback current // = 0, the voltage across the diode presents the stray electric valley and the spectral vibration voltage of the inductor, and the resonance voltage starts from zero. When the diode is turned off, it has both ZCS and ZVS characteristics. As for the next time to turn on the IGBT switch 7; the voltages at both ends of +, ΓζΓ and the paired series diodes W, 2¾ are kept at zero, and according to the analysis of mode two, they have both ZCS and ZVS characteristics when they are turned on. From the above description, most switching diodes and switches have both ZCS and ZVS characteristics when they are turned on and off, and at least one of the remaining voltage or current switches is zero. Therefore, theoretically, the circuit of the present invention can achieve high conversion efficiency. The flexible switching of each mode analysis is summarized as follows. Table 14 200425629 Zero Voltage Switching (zvs) Zero Current Switching (zcs) Component Symbol On-Off On-Off τ ^ τ2 〇〇〇Τ: Ί7, Th +, Tb- 〇〇〇〇 〇A, ２〇〇〇〇D :, Da, D + h, D: 〇〇〇〇〇2j__ 〇〇〇〇Table 1 Flexible switching analysis of each mode Table 4 shows the use of voltage clamping and flexibility disclosed in the present invention A circuit diagram of an embodiment of a current source sinusoidal voltage driving circuit for switching technology. Main circuit diagram 401 is the high-current side high-current part of the present invention. The component specifications of this circuit are vIN = mv dc V. 60Hz IGBT: GT50J101
Diode:SFI604GDiode: SFI604G
7；:EE-55 Ld=Lf^300uH7;: EE-55 Ld = Lf ^ 300uH
Cr=0M7uFCr = 0M7uF
Cl=20uF 切換頻率:5kHz〜20kHz 回授控制電路圖402中，^為1.56sin(2*;r*60i)訊號命令， 為輸出交流電壓百分之一迴授值。本實施例目的控制輸 出交流電壓之峰值為156V，換算成有效值為110V。兩者訊 15 200425629 號經低通率波電路後，輸入比較器。比較器則將結果送至 分相電路圖403，經反相器分成兩組相差180度之訊號。每 組訊號再經兩路徑之電阻串聯二極體電路，然後與同一個 電容器形成一階R、C充放電電路，目的對同一個訊號處理 上升及下降延遲，在經反相器後達成導通及截止分別延遲 20us以及5us，換算成反流器開關上、下臂之互鎖時間 (Lockout Time)為15us。為處理輕載時，零交越電壓震盪情 形，Y1或Y2點引出訊號經兩個串聯二極體及一個電容延長 另一相反相訊號組之導通時間。6組隔離及電流放大驅動電 路圖404,主要驅動六個獨立電源沁6丁開關，以避免共地短 路情形，403經過反相器處理，以低準位觸發(Low Active) 光耦合隔離並放大輸出電流驅動IGBT。由於反流器任一組 開關導通，2]，及：Γζ都必須配合導通，唯一訊號差別在於導 通延遲’但截止不延遲。因此邏輯控制電路圖405分別將χι、 Y1及X2、Y2做及閘（AND)處理，求出所設定之訊號，再做 或閘（OR)選擇，如此皆可配合反流器任一組訊號導通。本 電路反相後’再送往404以低準位驅動igbT。 圖5表示本發明所揭示之利用電壓箝制及柔性切換技術 之電流源正弦電壓驅動電路實施例之一，開關及二極體之 實測電壓及電流柔性切換波形。以下波形驗證表—之分析· 圖5(a)為電壓箝制開關η兩端電壓與電流波形；圖5⑼為反流 器開關Γ:兩端電壓與電流波形；圖5⑷為二極體q兩端電壓 與電流波形；圖5(d)為二極體％兩端電壓與電流波形；圖 5(e)為二極體乃^兩端電壓與電流波形；圖5(〇為變壓器一次 200425629 侧電流G與二次側電流^交越波形；圖5(g)輸出交流電壓波 形與反流器開關7；+之電流波形；圖5(h)輸出交流電壓波形 與變壓器一次側電流G之電流波形。由上述波實測波形驗證 本實施例之柔性切換特性，以及控制電路處理零交越電壓 之效果。 圖6表示本發明所揭示之利用電壓箝制及柔性切換技術 之電流源正弦電壓驅動電路實施例之一，輸出電壓電流波 形及供應各種負載之響應波形，在相同測試條件下與傳統 電壓型脈波寬度調變反流器對照波形。圖6之(a)、（c)、（e) 分別為傳統反流器應用於無載、非線性整流性負載及電感 性負載之電壓電流波形，以及傅立葉分析與波形失真率 (THD);圖6之(b)、（d)、（f)為本發明對照左邊相等實驗條件 之波形。圖6(g)為傳統反流器瞬間加載電壓、電流與局部放 大波形圖，圖6(h)為本發明對照左邊相等實驗條件之波形。 由實驗圖形比較，正弦波波峰附近，本發明實測波形失真 情形較低，從傅立葉分析以及波形失真率之數據驗證本發 明利用電壓箝制及柔性切換技術之電流源正弦電壓驅動電 路，可大幅改善傳統電壓型脈波寬度調變反流器之缺失。 【圖式簡單說明】 圖1表示本發明所揭示之利用電壓箝制及柔性切換技術之 電流源正弦電壓驅動方塊圖。 圖2表示本發明所揭示之利用電壓箝制及柔性切換技術之 200425629 電流源正弦電壓驅動電路工作模式圖。 圖3 表示本發明所揭示之利用電壓箝制及柔性切換技術之 電流源正弦電壓驅動電路各點波形時序圖。 圖4表示本發明所揭示之利用電壓箝制及柔性切換技術之 電流源正弦電壓驅動電路實施例之一電路圖。 圖5表示本發明所揭示之利用電壓箝制及柔性切換技術之 電流源正弦電壓驅動電路實施例之一，開關及二極體 之實測電壓及電流柔性切換波形。 圖6表示本發明所揭示之利用電壓箝制及柔性切換技術之 電流源正弦電壓驅動電路實施例之一，圖6之(b)、（d)、 (f)、（h)輸出電壓電流波形及供應各種負載之響應波形; 圖6之(a)、（c)、（e)、（g)在相同測試條件下與傳統電壓 型脈波寬度調變反流器對照波形。 圖示主要部分之編號代表意義如下： 101:直流電源 102:電流源電路 103:箝制電路 104:反流電路 105:控制及驅動電路 401:主電路圖 402:回授控制電路圖 403:分相電路圖 404:隔離及電流放大驅動電路圖 405:邏輯控制電路圖 18Cl = 20uF Switching frequency: 5kHz ~ 20kHz In the feedback control circuit diagram 402, ^ is a signal command of 1.56sin (2 *; r * 60i), which is a hundredth of the feedback value of the output AC voltage. The purpose of this embodiment is to control the peak value of the output AC voltage to be 156V, which is converted into an effective value of 110V. Both news 15 200425629 is input to the comparator after the low-pass wave circuit. The comparator sends the result to the phase-separated circuit diagram 403, which is divided into two groups of signals 180 degrees apart by the inverter. Each group of signals is connected in series with a diode circuit through two-path resistors, and then forms a first-order R and C charge and discharge circuit with the same capacitor. The purpose is to process the rise and fall delay of the same signal, and achieve conduction and pass through the inverter. The cut-off is delayed by 20us and 5us, respectively, which is converted into 15us for the interlock time of the upper and lower arms of the inverter switch. In order to deal with the situation of zero-crossing voltage oscillation at light load, the signal at point Y1 or Y2 is extended by two series diodes and a capacitor to extend the on-time of the opposite phase signal group. 6 sets of isolation and current amplification drive circuit diagram 404, which mainly drives six independent power supply switches to avoid common ground short circuit. 403 is processed by the inverter to trigger low active optical coupling to isolate and amplify the output. The current drives the IGBT. Since any group of switches of the inverter is turned on, 2], and Γζ must cooperate to turn on. The only signal difference is the turn-on delay, but the turn-off is not delayed. Therefore, the logic control circuit diagram 405 performs AND processing on χι, Y1, X2, and Y2 to obtain the set signal, and then makes OR selection, so that it can be connected with any set of signals of the inverter. . This circuit is inverted 'and sent to 404 to drive igbT at a low level. Fig. 5 shows one embodiment of a current source sinusoidal voltage driving circuit using voltage clamping and flexible switching technology disclosed in the present invention. The measured voltage and current flexible switching waveforms of switches and diodes. The following waveform verification table—Analysis · Figure 5 (a) is the voltage and current waveforms across the voltage clamping switch η; Figure 5⑼ is the inverter switch Γ: Voltage and current waveforms across the two ends; Figure 5⑷ is the diode q both ends Voltage and current waveforms; Figure 5 (d) is the voltage and current waveforms at the two ends of the diode; Figure 5 (e) is the voltage and current waveforms at the two ends of the diode; Figure 5 (0 is the primary current of the transformer 200425629 side G and the secondary current ^ crossover waveform; Figure 5 (g) output AC voltage waveform and inverter switch 7; + current waveform; Figure 5 (h) output AC voltage waveform and transformer primary current G current waveform The above-mentioned measured waveforms verify the flexible switching characteristics of this embodiment and the effect of the control circuit in processing the zero-crossing voltage. Figure 6 shows an embodiment of a current source sinusoidal voltage driving circuit using voltage clamping and flexible switching technology disclosed in the present invention. First, the output voltage and current waveforms and the response waveforms of various loads are compared with the traditional voltage-type pulse width modulation inverter waveforms under the same test conditions. (A), (c), and (e) of Figure 6 respectively For conventional inverter applications Voltage, current waveforms of load, non-linear rectifying load and inductive load, as well as Fourier analysis and waveform distortion rate (THD); Figures 6 (b), (d), and (f) are the same experimental conditions as the left side of the present invention. Waveform. Figure 6 (g) is the instantaneous voltage, current and partial enlarged waveform diagram of the traditional inverter. Figure 6 (h) is the waveform of the same experimental conditions compared with the left side of the present invention. From the comparison of the experimental graphs, near the sine wave peak, the The measured waveform distortion of the invention is relatively low. From Fourier analysis and waveform distortion data verification, the current source sinusoidal voltage drive circuit using voltage clamping and flexible switching technology can greatly improve the traditional voltage-type pulse width modulation inverter. [Schematic explanation] Figure 1 shows a block diagram of a sinusoidal voltage driving of a current source using voltage clamping and flexible switching technology disclosed in the present invention. Figure 2 shows a 200425629 current using voltage clamping and flexible switching technology disclosed in the present invention. Figure 3 shows the working mode of a source sinusoidal voltage driving circuit. Figure 3 shows the voltage of the voltage clamping and flexible switching technology disclosed in the present invention. Waveform timing diagram of each point of the current source sinusoidal voltage drive circuit. Figure 4 shows a circuit diagram of an embodiment of a current source sinusoidal voltage drive circuit using voltage clamping and flexible switching technology disclosed in the present invention. Figure 5 shows the use voltage disclosed in the present invention One embodiment of the current source sinusoidal voltage driving circuit of clamping and flexible switching technology, the measured voltage and current flexible switching waveforms of switches and diodes. Figure 6 shows the current source sinusoid using voltage clamping and flexible switching technology disclosed by the present invention. One of the embodiments of the voltage driving circuit, (b), (d), (f), (h) output voltage and current waveforms of FIG. 6 and response waveforms for supplying various loads; (a), (c), ( e), (g) Under the same test conditions, compare the waveforms with the traditional voltage-type pulse width modulation inverter. The numbers of the main parts in the figure represent the following meanings: 101: DC power supply 102: Current source circuit 103: Clamping circuit 104: Reverse current circuit 105: Control and drive circuit 401: Main circuit diagram 402: Feedback control circuit diagram 403: Phase-separated circuit diagram 404 : Isolation and current amplification drive circuit diagram 405: Logic control circuit diagram 18